[coreboot-gerrit] Patch set updated for coreboot: dd2460e lenovo/x230: Set xhci_switchable_ports and superspeed_capable_ports.

[Vladimir Serbinenko (phcoder@gmail.com)]

Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8313

-gerrit

commit dd2460eff372472313000166d7d5b2191eb807c3
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sat Jan 31 17:46:29 2015 +0100

    lenovo/x230: Set xhci_switchable_ports and superspeed_capable_ports.
    
    Fixes USB3 ports degraded to USB2 speeds.
    
    Change-Id: Ie71c9fb6e52a3e72bb1e61351ad1cc0492d93cbc
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/mainboard/lenovo/x230/devicetree.cb | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb
index 5130410..3a05b5a 100644
--- a/src/mainboard/lenovo/x230/devicetree.cb
+++ b/src/mainboard/lenovo/x230/devicetree.cb
@@ -67,6 +67,9 @@ chip northbridge/intel/sandybridge
 
 			register "pcie_hotplug_map" = "{ 0, 0, 1, 0, 0, 0, 0, 0 }"
 
+			register "xhci_switchable_ports" = "0xf"
+			register "superspeed_capable_ports" = "0xf"
+
 			# Enable zero-based linear PCIe root port functions
 			register "pcie_port_coalesce" = "1"
 			register "c2_latency" = "101"  # c2 not supported