[coreboot-gerrit] Patch set updated for coreboot: d5fb50e cpu/amd/model_10xxx: Remove UPDATE_CPU_MICROCODE option

[Alexandru Gagniuc (mr.nuke.me@gmail.com)]

Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8322

-gerrit

commit d5fb50e7d4ed8981f71cd43d7c79a2db455b8c50
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Sun Feb 1 18:50:12 2015 -0600

    cpu/amd/model_10xxx: Remove UPDATE_CPU_MICROCODE option
    
    This option is now deperecated by loading microcode updates from cbfs.
    Remove this option in anticipation of implementing CBFS loading for
    AMD cpus. Removing it beforehand results in less patch overhead.
    
    Change-Id: Ibdef7843db686734e2b6b1568692720fb543b240
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/cpu/amd/microcode/Makefile.inc   |  2 +-
 src/cpu/amd/model_10xxx/Kconfig      | 32 --------------------------------
 src/cpu/amd/model_10xxx/Makefile.inc |  2 +-
 src/include/cpu/amd/microcode.h      |  6 +-----
 4 files changed, 3 insertions(+), 39 deletions(-)

diff --git a/src/cpu/amd/microcode/Makefile.inc b/src/cpu/amd/microcode/Makefile.inc
index 48f1d0d..f409d1f 100644
--- a/src/cpu/amd/microcode/Makefile.inc
+++ b/src/cpu/amd/microcode/Makefile.inc
@@ -1,2 +1,2 @@
 ramstage-y += microcode.c
-romstage-$(CONFIG_UPDATE_CPU_MICROCODE) += microcode.c
+romstage-y += microcode.c
diff --git a/src/cpu/amd/model_10xxx/Kconfig b/src/cpu/amd/model_10xxx/Kconfig
index cf5748c..09c7ec7 100644
--- a/src/cpu/amd/model_10xxx/Kconfig
+++ b/src/cpu/amd/model_10xxx/Kconfig
@@ -70,36 +70,4 @@ config UDELAY_LAPIC_FIXED_FSB
 	int
 	default 200
 
-config UPDATE_CPU_MICROCODE
-	bool
-	default y
-
-config UPDATE_CPU_MICROCODE
-	bool "Update CPU microcode"
-	default y
-	depends on EXPERT && CPU_AMD_MODEL_10XXX
-	help
-	  Select this to apply patches to the CPU microcode provided by
-	  AMD without source, and distributed with coreboot, to address
-	  issues in the CPU post production.
-
-	  Microcode updates distributed with coreboot are not necessarily
-	  the latest version available from AMD. Updates are only applied
-	  if they are newer than the microcode already in your CPU.
-
-	  Unselect this to let Fam10h CPUs run with microcode as shipped
-	  from factory. No binary microcode patches will be included in the
-	  coreboot image in that case, which can help with creating an image
-	  for which complete source code is available, which in turn might
-	  simplify license compliance.
-
-	  Microcode updates intend to solve issues that have been discovered
-	  after CPU production. The common case is that systems work as
-	  intended with updated microcode, but we have also seen cases where
-	  issues were solved by not applying the microcode updates.
-
-	  Note that some operating system include these same microcode
-	  patches, so you may need to also disable microcode updates in
-	  your operating system in order for this option to matter.
-
 endif	# CPU_AMD_MODEL_10XXX
diff --git a/src/cpu/amd/model_10xxx/Makefile.inc b/src/cpu/amd/model_10xxx/Makefile.inc
index 5cfcc97..2f04762 100644
--- a/src/cpu/amd/model_10xxx/Makefile.inc
+++ b/src/cpu/amd/model_10xxx/Makefile.inc
@@ -2,5 +2,5 @@ romstage-y += ../../x86/mtrr/earlymtrr.c
 ramstage-y += model_10xxx_init.c
 ramstage-y += processor_name.c
 
-romstage-$(CONFIG_UPDATE_CPU_MICROCODE) += update_microcode.c
+romstage-y += update_microcode.c
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += powernow_acpi.c
diff --git a/src/include/cpu/amd/microcode.h b/src/include/cpu/amd/microcode.h
index e6d686c..3485b6f 100644
--- a/src/include/cpu/amd/microcode.h
+++ b/src/include/cpu/amd/microcode.h
@@ -3,11 +3,7 @@
 
 void amd_update_microcode(void *microcode_updates, unsigned processor_rev_id);
 void model_fxx_update_microcode(unsigned cpu_deviceid);
-
-#if CONFIG_UPDATE_CPU_MICROCODE
 void update_microcode(u32 processor_rev_id);
-#else
-#define update_microcode(x)
-#endif
+
 #endif /* CPU_AMD_MICROCODE_H */