[coreboot-gerrit] New patch to review for coreboot: 126baa8 AMD K8 fam10: Remove some excessive preprocessor use

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Wed Feb 4 20:14:59 CET 2015


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8346

-gerrit

commit 126baa857e06e72ec470de95e8e8c4ab51da2d4a
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Mon Feb 2 20:07:58 2015 +0200

    AMD K8 fam10: Remove some excessive preprocessor use
    
    Change-Id: Iee51c51b662d1f5e3d918d1e5b961f06c6b99df6
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/northbridge/amd/amdfam10/northbridge.c | 34 ++++++++++-------------------
 src/northbridge/amd/amdk8/incoherent_ht.c  | 27 +++++++++--------------
 src/northbridge/amd/amdk8/northbridge.c    | 35 ++++++++++++------------------
 3 files changed, 36 insertions(+), 60 deletions(-)

diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 84f2553..ce97f62 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -288,37 +288,27 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
 	unsigned nodeid;
 	struct bus *link;
 	unsigned sblink = sysconf.sblk;
-	unsigned offset_unitid = 0;
 
 	nodeid = amdfam10_nodeid(dev);
 
-// Put sb chain in bus 0
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
-	if(nodeid==0) {
-	#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-		offset_unitid = 1;
-	#endif
-		for (link = dev->link_list; link; link = link->next)
-			if (link->link_num == sblink)
-				max = amdfam10_scan_chain(dev, nodeid, link, sblink, sblink, max, offset_unitid ); // do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0
+	/* Do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0 */
+	for (link = dev->link_list; link; link = link->next) {
+		unsigned offset_unitid = (CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20);
+		if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && (nodeid == 0) && (link->link_num == sblink))
+			max = amdfam10_scan_chain(dev, nodeid, link, link->link_num, sblink, max, offset_unitid);
 	}
-#endif
 
 #if CONFIG_PCI_BUS_SEGN_BITS
 	max = check_segn(dev, max, sysconf.nodes, &sysconf);
 #endif
 
-	for(link = dev->link_list; link; link = link->next) {
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
-		if( (nodeid == 0) && (sblink == link->link_num) ) continue; //already done
-#endif
-		offset_unitid = 0;
-		#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-			#if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
-			if((nodeid == 0) && (sblink == link->link_num))
-			#endif
-				offset_unitid = 1;
-		#endif
+	for (link = dev->link_list; link; link = link->next) {
+		if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && (nodeid == 0) && (link->link_num == sblink))
+			continue;
+
+		unsigned offset_unitid = (CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20);
+		offset_unitid = offset_unitid &&
+			(((nodeid == 0) && (sblink == link->link_num)) || !CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY);
 
 		max = amdfam10_scan_chain(dev, nodeid, link, link->link_num, sblink, max, offset_unitid);
 	}
diff --git a/src/northbridge/amd/amdk8/incoherent_ht.c b/src/northbridge/amd/amdk8/incoherent_ht.c
index 3c6cf33..40589c4 100644
--- a/src/northbridge/amd/amdk8/incoherent_ht.c
+++ b/src/northbridge/amd/amdk8/incoherent_ht.c
@@ -532,19 +532,13 @@ static int optimize_link_read_pointers_chain(uint8_t ht_c_num)
 
 	reset_needed = 0;
 
+	/* First one is SB HT chain. */
 	for (i = 0; i < ht_c_num; i++) {
 		uint32_t reg;
 		uint8_t nodeid, linkn;
 		uint8_t busn;
 		uint8_t val;
-		unsigned devn = 1;
-
-	#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-		#if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
-		if(i==0) // to check if it is sb ht chain
-		#endif
-			devn = CONFIG_HT_CHAIN_UNITID_BASE;
-	#endif
+		unsigned devn;
 
 		reg = pci_read_config32(PCI_DEV(0,0x18,1), 0xe0 + i * 4);
 
@@ -552,6 +546,11 @@ static int optimize_link_read_pointers_chain(uint8_t ht_c_num)
 		linkn = ((reg & 0xf00)>>8); // link n
 		busn = (reg & 0xff0000)>>16; //busn
 
+		unsigned offset_unitid = (CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20);
+		offset_unitid = offset_unitid && (!CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY || (i == 0));
+
+		devn = offset_unitid ? CONFIG_HT_CHAIN_UNITID_BASE : 1;
+
 		reg = pci_read_config32( PCI_DEV(busn, devn, 0), PCI_VENDOR_ID); // ? the chain dev maybe offseted
 		if ( (reg & 0xffff) == PCI_VENDOR_ID_AMD) {
 			val = 0x25;
@@ -649,14 +648,13 @@ static int ht_setup_chains(uint8_t ht_c_num)
 	sysinfo->link_pair_num = 0;
 #endif
 
-	// first one is SB Chain
+	/* First one is SB HT chain. */
 	for (i = 0; i < ht_c_num; i++) {
 		uint32_t reg;
 		uint8_t devpos;
 		unsigned regpos;
 		uint32_t dword;
 		uint8_t busn;
-		unsigned offset_unitid = 0;
 
 		reg = pci_read_config32(PCI_DEV(0,0x18,1), 0xe0 + i * 4);
 
@@ -670,13 +668,8 @@ static int ht_setup_chains(uint8_t ht_c_num)
 		dword |= (reg & 0xffff0000)>>8;
 		pci_write_config32( PCI_DEV(0, devpos,0), regpos , dword);
 
-
-	#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-		#if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
-		if(i==0) // to check if it is sb ht chain
-		#endif
-			offset_unitid = 1;
-	#endif
+		unsigned offset_unitid = (CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20);
+		offset_unitid = offset_unitid && (!CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY || (i == 0));
 
 		/* Make certain the HT bus is not enumerated */
 		ht_collapse_previous_enumeration(busn, offset_unitid);
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 081ec6d..ea7bdc0 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -237,33 +237,26 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned max)
 	unsigned nodeid;
 	struct bus *link;
 	unsigned sblink = 0;
-	unsigned offset_unitid = 0;
 
 	nodeid = amdk8_nodeid(dev);
-
-	if(nodeid==0) {
+	if (nodeid == 0)
 		sblink = (pci_read_config32(dev, 0x64)>>8) & 3;
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
-	#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-		offset_unitid = 1;
-	#endif
-		for (link = dev->link_list; link; link = link->next)
-			if (link->link_num == sblink)
-				max = amdk8_scan_chain(dev, nodeid, link, sblink, sblink, max, offset_unitid ); // do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0
-#endif
+
+	// do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0
+	for (link = dev->link_list; link; link = link->next) {
+		unsigned offset_unitid = (CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20);
+
+		if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && (nodeid == 0) && (link->link_num == sblink))
+			max = amdk8_scan_chain(dev, nodeid, link, link->link_num, sblink, max, offset_unitid);
 	}
 
 	for (link = dev->link_list; link; link = link->next) {
-#if CONFIG_SB_HT_CHAIN_ON_BUS0 > 0
-		if( (nodeid == 0) && (sblink == link->link_num) ) continue; //already done
-#endif
-		offset_unitid = 0;
-		#if ((CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20))
-			#if CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY
-			if((nodeid == 0) && (sblink == link->link_num))
-			#endif
-				offset_unitid = 1;
-		#endif
+		if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && (nodeid == 0) && (link->link_num == sblink))
+			continue;
+
+		unsigned offset_unitid = (CONFIG_HT_CHAIN_UNITID_BASE != 1) || (CONFIG_HT_CHAIN_END_UNITID_BASE != 0x20);
+		offset_unitid = offset_unitid &&
+			(((nodeid == 0) && (sblink == link->link_num)) || !CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY);
 
 		max = amdk8_scan_chain(dev, nodeid, link, link->link_num, sblink, max, offset_unitid);
 	}



More information about the coreboot-gerrit mailing list