[coreboot-gerrit] New patch to review for coreboot: a8a2ca0 AMD fam10: Refactor variables in scan_chain

[Kyösti Mälkki (kyosti.malkki@gmail.com)]

Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8351

-gerrit

commit a8a2ca0057a1d2aa1f2518d5470653b54b9f883c
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Wed Feb 4 15:37:45 2015 +0200

    AMD fam10: Refactor variables in scan_chain
    
    We only need one of devx and dev. This function should be called
    with dev already adjusted if link_num > 3.
    
    Change-Id: I7166bbb88143bc28802c9530c4da16db67868d8e
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/northbridge/amd/amdfam10/northbridge.c | 12 +++++-------
 1 file changed, 5 insertions(+), 7 deletions(-)

diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index f2b18d0..f28c726 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -168,7 +168,6 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
 		u32 ht_unitid_base[4]; // here assume only 4 HT device on chain
 		u32 max_bus;
 		u32 min_bus;
-		device_t devx;
 		u32 busses;
 		u32 segn = max>>8;
 #if CONFIG_SB_HT_CHAIN_ON_BUS0 > 1
@@ -182,14 +181,13 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
 			regpos = 0x170 + 4 * (link->link_num & 3); // it is only on sublink0
 			reg = pci_read_config32(dev, regpos);
 			if(reg & 1) return max; // already ganged no sblink1
-			devx = get_node_pci(nodeid, 4);
-		} else {
-			devx = dev;
+
+			dev = get_node_pci(nodeid, 4);
 		}
 
 		/* Check for connected link. */
 		link->cap = 0x80 + ((link->link_num & 3) * 0x20);
-		if (!is_non_coherent_link(devx, link))
+		if (!is_non_coherent_link(dev, link))
 			return max;
 
 		/* See if there is an available configuration space mapping
@@ -233,7 +231,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
 		/* Read the existing primary/secondary/subordinate bus
 		 * number configuration.
 		 */
-		busses = pci_read_config32(devx, link->cap + 0x14);
+		busses = pci_read_config32(dev, link->cap + 0x14);
 
 		/* Configure the bus numbers for this bridge: the configuration
 		 * transactions will not be propagates by the bridge if it is
@@ -241,7 +239,7 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
 		 */
 		busses &= 0xffff00ff;
 		busses |= ((u32)(link->secondary) << 8);
-		pci_write_config32(devx, link->cap + 0x14, busses);
+		pci_write_config32(dev, link->cap + 0x14, busses);
 
 
 		/* set the config map space */