[coreboot-gerrit] Patch set updated for coreboot: d11f3be AMD K8 fam10: Set SB_HT_CHAIN_ON_BUS0 default 0

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Wed Feb 4 20:52:23 CET 2015


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8353

-gerrit

commit d11f3bee82e25423bcaef625665563186fff9913
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Wed Feb 4 11:23:16 2015 +0200

    AMD K8 fam10: Set SB_HT_CHAIN_ON_BUS0 default 0
    
    SB HyperTransport chain is always scanned before other chains on BUS0.
    
    Change-Id: I5a00d6372cb89151940aeee517ea613398825c78
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/mainboard/ibm/e325/Kconfig             |  4 ----
 src/mainboard/ibm/e326/Kconfig             |  4 ----
 src/mainboard/iwill/dk8s2/Kconfig          |  4 ----
 src/mainboard/iwill/dk8x/Kconfig           |  4 ----
 src/mainboard/newisys/khepri/Kconfig       |  4 ----
 src/mainboard/tyan/s2850/Kconfig           |  4 ----
 src/mainboard/tyan/s2875/Kconfig           |  4 ----
 src/mainboard/tyan/s2880/Kconfig           |  4 ----
 src/mainboard/tyan/s2882/Kconfig           |  4 ----
 src/mainboard/tyan/s4880/Kconfig           |  4 ----
 src/mainboard/tyan/s4882/Kconfig           |  4 ----
 src/northbridge/amd/amdfam10/Kconfig       |  4 ++++
 src/northbridge/amd/amdfam10/northbridge.c | 27 ++++++++++++++-------------
 src/northbridge/amd/amdk8/Kconfig          |  4 ++++
 src/northbridge/amd/amdk8/northbridge.c    | 23 +++++++++++------------
 15 files changed, 33 insertions(+), 69 deletions(-)

diff --git a/src/mainboard/ibm/e325/Kconfig b/src/mainboard/ibm/e325/Kconfig
index 10b6fde..0400677 100644
--- a/src/mainboard/ibm/e325/Kconfig
+++ b/src/mainboard/ibm/e325/Kconfig
@@ -43,10 +43,6 @@ config MAX_PHYSICAL_CPUS
 	int
 	default 1
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config HT_CHAIN_END_UNITID_BASE
 	hex
 	default 0x20
diff --git a/src/mainboard/ibm/e326/Kconfig b/src/mainboard/ibm/e326/Kconfig
index 005012a..bd2bb26 100644
--- a/src/mainboard/ibm/e326/Kconfig
+++ b/src/mainboard/ibm/e326/Kconfig
@@ -43,10 +43,6 @@ config MAX_PHYSICAL_CPUS
 	int
 	default 2
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config HT_CHAIN_END_UNITID_BASE
 	hex
 	default 0x20
diff --git a/src/mainboard/iwill/dk8s2/Kconfig b/src/mainboard/iwill/dk8s2/Kconfig
index c4de3a1..6b54645 100644
--- a/src/mainboard/iwill/dk8s2/Kconfig
+++ b/src/mainboard/iwill/dk8s2/Kconfig
@@ -37,10 +37,6 @@ config MAX_PHYSICAL_CPUS
 	int
 	default 2
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config HT_CHAIN_END_UNITID_BASE
 	hex
 	default 0x20
diff --git a/src/mainboard/iwill/dk8x/Kconfig b/src/mainboard/iwill/dk8x/Kconfig
index af35bb6..f2660c6 100644
--- a/src/mainboard/iwill/dk8x/Kconfig
+++ b/src/mainboard/iwill/dk8x/Kconfig
@@ -36,10 +36,6 @@ config MAX_PHYSICAL_CPUS
 	int
 	default 2
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config HT_CHAIN_END_UNITID_BASE
 	hex
 	default 0x20
diff --git a/src/mainboard/newisys/khepri/Kconfig b/src/mainboard/newisys/khepri/Kconfig
index 7f618af..f1c2687 100644
--- a/src/mainboard/newisys/khepri/Kconfig
+++ b/src/mainboard/newisys/khepri/Kconfig
@@ -30,10 +30,6 @@ config APIC_ID_OFFSET
 	hex
 	default 0x0
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config MAINBOARD_PART_NUMBER
 	string
 	default "Khepri"
diff --git a/src/mainboard/tyan/s2850/Kconfig b/src/mainboard/tyan/s2850/Kconfig
index e6e3df2..2866b0c 100644
--- a/src/mainboard/tyan/s2850/Kconfig
+++ b/src/mainboard/tyan/s2850/Kconfig
@@ -40,10 +40,6 @@ config HT_CHAIN_END_UNITID_BASE
 	hex
 	default 0x20
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config APIC_ID_OFFSET
 	hex
 	default 0x0
diff --git a/src/mainboard/tyan/s2875/Kconfig b/src/mainboard/tyan/s2875/Kconfig
index 30aa01e..85c3ab4 100644
--- a/src/mainboard/tyan/s2875/Kconfig
+++ b/src/mainboard/tyan/s2875/Kconfig
@@ -42,10 +42,6 @@ config HT_CHAIN_END_UNITID_BASE
 	hex
 	default 0x20
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config APIC_ID_OFFSET
 	hex
 	default 0x0
diff --git a/src/mainboard/tyan/s2880/Kconfig b/src/mainboard/tyan/s2880/Kconfig
index 5186337..62b4e70 100644
--- a/src/mainboard/tyan/s2880/Kconfig
+++ b/src/mainboard/tyan/s2880/Kconfig
@@ -22,10 +22,6 @@ config APIC_ID_OFFSET
 	hex
 	default 0x0
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config MAINBOARD_PART_NUMBER
 	string
 	default "S2880"
diff --git a/src/mainboard/tyan/s2882/Kconfig b/src/mainboard/tyan/s2882/Kconfig
index 646b5a8..bf980d7 100644
--- a/src/mainboard/tyan/s2882/Kconfig
+++ b/src/mainboard/tyan/s2882/Kconfig
@@ -23,10 +23,6 @@ config APIC_ID_OFFSET
 	hex
 	default 0x0
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config MAINBOARD_PART_NUMBER
 	string
 	default "S2882"
diff --git a/src/mainboard/tyan/s4880/Kconfig b/src/mainboard/tyan/s4880/Kconfig
index d4feacb..6c85c6c 100644
--- a/src/mainboard/tyan/s4880/Kconfig
+++ b/src/mainboard/tyan/s4880/Kconfig
@@ -30,10 +30,6 @@ config APIC_ID_OFFSET
 	hex
 	default 0x10
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config MAINBOARD_PART_NUMBER
 	string
 	default "S4880"
diff --git a/src/mainboard/tyan/s4882/Kconfig b/src/mainboard/tyan/s4882/Kconfig
index 2bd3854..7723acf 100644
--- a/src/mainboard/tyan/s4882/Kconfig
+++ b/src/mainboard/tyan/s4882/Kconfig
@@ -30,10 +30,6 @@ config APIC_ID_OFFSET
 	hex
 	default 0x10
 
-config SB_HT_CHAIN_ON_BUS0
-	int
-	default 0
-
 config MAINBOARD_PART_NUMBER
 	string
 	default "S4882"
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index 071557a..7cb8a31 100644
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -69,6 +69,10 @@ config SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	bool
 	default n
 
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 0
+
 config DIMM_FBDIMM
 	bool
 	default n
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index a7d06fc..d5e6b89 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -283,27 +283,28 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
 	unsigned nodeid;
 	struct bus *link;
 	unsigned sblink = sysconf.sblk;
+	int pass = 0;
 
 	nodeid = amdfam10_nodeid(dev);
 
-	/* Do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0 */
-	for (link = dev->link_list; link; link = link->next) {
-		bool is_sblink = (nodeid == 0) && (link->link_num == sblink);
-		if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && is_sblink)
-			max = amdfam10_scan_chain(dev, nodeid, link, is_sblink, max);
-	}
+	/* Scan twice, first pass does SB HT chain only. */
+	do {
 
 #if CONFIG_PCI_BUS_SEGN_BITS
-	max = check_segn(dev, max, sysconf.nodes, &sysconf);
+		if (pass == 1)
+			max = check_segn(dev, max, sysconf.nodes, &sysconf);
 #endif
 
-	for (link = dev->link_list; link; link = link->next) {
-		bool is_sblink = (nodeid == 0) && (link->link_num == sblink);
-		if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && is_sblink)
-			continue;
+		for (link = dev->link_list; link; link = link->next) {
+			bool is_sblink = (nodeid == 0) && (link->link_num == sblink);
+			if ((pass==0) && !is_sblink)
+				continue;
+			if ((pass==1) && is_sblink)
+				continue;
+			max = amdfam10_scan_chain(dev, nodeid, link, is_sblink, max);
+		}
+	} while (++pass < 2);
 
-		max = amdfam10_scan_chain(dev, nodeid, link, is_sblink, max);
-	}
 	return max;
 }
 
diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig
index 65dc173..8dd8cea 100644
--- a/src/northbridge/amd/amdk8/Kconfig
+++ b/src/northbridge/amd/amdk8/Kconfig
@@ -65,6 +65,10 @@ config SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	bool
 	default n
 
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 0
+
 config QRANK_DIMM_SUPPORT
 	bool
 	default n
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index f775c25..4edc197 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -230,25 +230,24 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned max)
 	unsigned nodeid;
 	struct bus *link;
 	unsigned sblink = 0;
+	unsigned pass = 0;
 
 	nodeid = amdk8_nodeid(dev);
 	if (nodeid == 0)
 		sblink = (pci_read_config32(dev, 0x64)>>8) & 3;
 
-	// do sb ht chain at first, in case s2885 put sb chain (8131/8111) on link2, but put 8151 on link0
-	for (link = dev->link_list; link; link = link->next) {
-		bool is_sblink = (nodeid == 0) && (link->link_num == sblink);
-		if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && is_sblink)
+	/* Scan twice, first pass does SB HT chain only. */
+	do {
+		for (link = dev->link_list; link; link = link->next) {
+			bool is_sblink = (nodeid == 0) && (link->link_num == sblink);
+			if ((pass==0) && !is_sblink)
+				continue;
+			if ((pass==1) && is_sblink)
+				continue;
 			max = amdk8_scan_chain(dev, nodeid, link, is_sblink, max);
-	}
-
-	for (link = dev->link_list; link; link = link->next) {
-		bool is_sblink = (nodeid == 0) && (link->link_num == sblink);
-		if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 0) && is_sblink)
-			continue;
+		}
+	} while (++pass < 2);
 
-		max = amdk8_scan_chain(dev, nodeid, link, is_sblink, max);
-	}
 	return max;
 }
 



More information about the coreboot-gerrit mailing list