[coreboot-gerrit] Patch set updated for coreboot: 1540a22 PCI subsystem: Drop parameter max from scan_bus
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Fri Feb 27 19:29:49 CET 2015
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8539
-gerrit
commit 1540a22b0e7337f5e8256df6057c87789c7e007f
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Mon Feb 2 15:40:51 2015 +0200
PCI subsystem: Drop parameter max from scan_bus
Change-Id: Ib33d3363c8d42fa54ac07c11a7ab2bc7ee4ae8bf
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/device/hypertransport.c | 22 ++++++++------------
src/device/pci_device.c | 26 ++++++++++--------------
src/device/pciexp_device.c | 7 +++----
src/include/device/hypertransport.h | 3 ++-
src/include/device/pci.h | 9 +++++---
src/include/device/pciexp.h | 5 +++--
src/include/device/pcix.h | 2 --
src/northbridge/amd/agesa/family10/northbridge.c | 4 +++-
src/northbridge/amd/agesa/family15/northbridge.c | 8 +++++---
src/northbridge/amd/amdfam10/northbridge.c | 15 +++++++-------
src/northbridge/amd/amdk8/northbridge.c | 19 ++++++++---------
src/southbridge/amd/amd8131/bridge.c | 12 +++++------
src/southbridge/amd/amd8132/bridge.c | 13 +++++-------
src/southbridge/amd/cs5536/cs5536.c | 4 ++--
14 files changed, 69 insertions(+), 80 deletions(-)
diff --git a/src/device/hypertransport.c b/src/device/hypertransport.c
index ec0601b..c968af8 100644
--- a/src/device/hypertransport.c
+++ b/src/device/hypertransport.c
@@ -248,8 +248,8 @@ static void ht_collapse_early_enumeration(struct bus *bus,
}
}
-static unsigned int do_hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
- unsigned max_devfn, unsigned int max,
+static void do_hypertransport_scan_chain(struct bus *bus, unsigned min_devfn,
+ unsigned max_devfn,
unsigned *ht_unitid_base,
unsigned offset_unitid)
{
@@ -475,11 +475,10 @@ end_of_chain:
}
/* Now that nothing is overlapping it is safe to scan the children. */
- max = pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7, max);
- return max;
+ pci_scan_bus(bus, 0x00, ((next_unitid - 1) << 3) | 7);
}
-unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max)
+void hypertransport_scan_chain(struct bus *bus)
{
int i;
unsigned int max_devfn;
@@ -493,14 +492,12 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max)
else
max_devfn = (0x20 << 3) - 1;
- max = do_hypertransport_scan_chain(bus, 0, max_devfn, max,
+ do_hypertransport_scan_chain(bus, 0, max_devfn,
ht_unitid_base, offset_unit_id(bus->secondary == 0));
bus->hcdn_reg = 0;
for (i = 0; i < 4; i++)
bus->hcdn_reg |= (ht_unitid_base[i] & 0xff) << (i*8);
-
- return max;
}
/**
@@ -514,15 +511,14 @@ unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max)
* @param bus TODO
* @param min_devfn TODO
* @param max_devfn TODO
- * @param max The highest bus number assigned up to now.
- * @return The maximum bus number found, after scanning all subordinate busses.
*/
-static unsigned int hypertransport_scan_chain_x(struct bus *bus,
- unsigned int min_devfn, unsigned int max_devfn, unsigned int max)
+static void hypertransport_scan_chain_x(struct bus *bus,
+ unsigned int min_devfn, unsigned int max_devfn)
{
unsigned int ht_unitid_base[4];
unsigned int offset_unitid = 1;
- return do_hypertransport_scan_chain(bus, min_devfn, max_devfn, max,
+
+ do_hypertransport_scan_chain(bus, min_devfn, max_devfn,
ht_unitid_base, offset_unitid);
}
diff --git a/src/device/pci_device.c b/src/device/pci_device.c
index 6cb99bf..dc7365f 100644
--- a/src/device/pci_device.c
+++ b/src/device/pci_device.c
@@ -1074,17 +1074,12 @@ unsigned int pci_match_simple_dev(device_t dev, pci_devfn_t sdev)
* Determine the existence of devices and bridges on a PCI bus. If there are
* bridges on the bus, recursively scan the buses behind the bridges.
*
- * This function is the default scan_bus() method for the root device
- * 'dev_root'.
- *
* @param bus Pointer to the bus structure.
* @param min_devfn Minimum devfn to look at in the scan, usually 0x00.
* @param max_devfn Maximum devfn to look at in the scan, usually 0xff.
- * @param max Current bus number.
- * @return The maximum bus number found, after scanning all subordinate busses.
*/
-unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn,
- unsigned max_devfn, unsigned int max)
+void pci_scan_bus(struct bus *bus, unsigned min_devfn,
+ unsigned max_devfn)
{
unsigned int devfn;
struct device *old_devices;
@@ -1149,17 +1144,19 @@ unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn,
* For all children that implement scan_bus() (i.e. bridges)
* scan the bus behind that child.
*/
+ unsigned int max = bus->secondary;
+
for (child = bus->children; child; child = child->sibling)
max = scan_bus(child, max);
+ bus->subordinate = max;
+
/*
* We've scanned the bus and so we know all about what's on the other
* side of any bridges that may be on this bus plus any devices.
* Return how far we've got finding sub-buses.
*/
- printk(BIOS_DEBUG, "PCI: pci_scan_bus returning with max=%03x\n", max);
post_code(0x55);
- return max;
}
typedef enum {
@@ -1228,10 +1225,9 @@ static void pci_bridge_route(struct bus *link, scan_state state)
* @return The maximum bus number found, after scanning all subordinate buses.
*/
unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
- unsigned int (*do_scan_bus) (struct bus * bus,
+ void (*do_scan_bus) (struct bus * bus,
unsigned min_devfn,
- unsigned max_devfn,
- unsigned int max))
+ unsigned max_devfn))
{
struct bus *bus;
@@ -1251,7 +1247,7 @@ unsigned int do_pci_scan_bridge(struct device *dev, unsigned int max,
pci_bridge_route(bus, PCI_ROUTE_SCAN);
- bus->subordinate = do_scan_bus(bus, 0x00, 0xff, bus->secondary);
+ do_scan_bus(bus, 0x00, 0xff);
pci_bridge_route(bus, PCI_ROUTE_FINAL);
@@ -1286,8 +1282,8 @@ unsigned int pci_scan_bridge(struct device *dev, unsigned int max)
*/
unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
{
- max = pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff, max);
- return max;
+ pci_scan_bus(dev->link_list, PCI_DEVFN(0, 0), 0xff);
+ return dev->link_list->subordinate;
}
/**
diff --git a/src/device/pciexp_device.c b/src/device/pciexp_device.c
index 87aea67..c9dbf2f 100644
--- a/src/device/pciexp_device.c
+++ b/src/device/pciexp_device.c
@@ -213,12 +213,12 @@ static void pciexp_tune_dev(device_t dev)
#endif
}
-unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
- unsigned int max_devfn, unsigned int max)
+void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
+ unsigned int max_devfn)
{
device_t child;
- max = pci_scan_bus(bus, min_devfn, max_devfn, max);
+ pci_scan_bus(bus, min_devfn, max_devfn);
for (child = bus->children; child; child = child->sibling) {
if ((child->path.pci.devfn < min_devfn) ||
@@ -227,7 +227,6 @@ unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
}
pciexp_tune_dev(child);
}
- return max;
}
unsigned int pciexp_scan_bridge(device_t dev, unsigned int max)
diff --git a/src/include/device/hypertransport.h b/src/include/device/hypertransport.h
index 6034b27..18589d0 100644
--- a/src/include/device/hypertransport.h
+++ b/src/include/device/hypertransport.h
@@ -10,8 +10,9 @@
#define ConnectionPending (1 << 4)
bool ht_is_non_coherent_link(struct bus *link);
-unsigned int hypertransport_scan_chain(struct bus *bus, unsigned int max);
+void hypertransport_scan_chain(struct bus *bus);
unsigned int ht_scan_bridge(struct device *dev, unsigned int max);
+
extern struct device_operations default_ht_ops_bus;
#define HT_IO_HOST_ALIGN 4096
diff --git a/src/include/device/pci.h b/src/include/device/pci.h
index 0670da4..fe31f24 100644
--- a/src/include/device/pci.h
+++ b/src/include/device/pci.h
@@ -69,11 +69,14 @@ void pci_dev_enable_resources(device_t dev);
void pci_bus_enable_resources(device_t dev);
void pci_bus_reset(struct bus *bus);
device_t pci_probe_dev(device_t dev, struct bus *bus, unsigned devfn);
+
unsigned int do_pci_scan_bridge(device_t bus, unsigned int max,
- unsigned int (*do_scan_bus)(struct bus *bus,
- unsigned min_devfn, unsigned max_devfn, unsigned int max));
+ void (*do_scan_bus)(struct bus *bus,
+ unsigned min_devfn, unsigned max_devfn));
unsigned int pci_scan_bridge(device_t bus, unsigned int max);
-unsigned int pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn, unsigned int max);
+
+void pci_scan_bus(struct bus *bus, unsigned min_devfn, unsigned max_devfn);
+
uint8_t pci_moving_config8(struct device *dev, unsigned reg);
uint16_t pci_moving_config16(struct device *dev, unsigned reg);
uint32_t pci_moving_config32(struct device *dev, unsigned reg);
diff --git a/src/include/device/pciexp.h b/src/include/device/pciexp.h
index 87a5002..9476088 100644
--- a/src/include/device/pciexp.h
+++ b/src/include/device/pciexp.h
@@ -9,8 +9,9 @@ enum aspm_type {
PCIE_ASPM_BOTH = 3,
};
-unsigned int pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
- unsigned int max_devfn, unsigned int max);
+void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn,
+ unsigned int max_devfn);
+
unsigned int pciexp_scan_bridge(device_t dev, unsigned int max);
extern struct device_operations default_pciexp_ops_bus;
diff --git a/src/include/device/pcix.h b/src/include/device/pcix.h
index 4ffab5b..75be7aa 100644
--- a/src/include/device/pcix.h
+++ b/src/include/device/pcix.h
@@ -2,8 +2,6 @@
#define DEVICE_PCIX_H
/* (c) 2005 Linux Networx GPL see COPYING for details */
-unsigned int pcix_scan_bus(struct bus *bus, unsigned int min_devfn,
- unsigned int max_devfn, unsigned int max);
unsigned int pcix_scan_bridge(device_t dev, unsigned int max);
const char *pcix_speed(u16 sstatus);
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index 8fb4f8a..5589ba8 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -564,6 +564,7 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
nodeid = amdfam10_nodeid(dev);
if (nodeid == 0) {
+ ASSERT(dev->bus->secondary == 0);
for (link = dev->link_list; link; link = link->next) {
if (link->link_num == sblink) { /* devicetree put IO Hub on link_lsit[3] */
io_hub = link->children;
@@ -571,9 +572,10 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
die("I can't find the IO Hub, or IO Hub not enabled, please check the device tree.\n");
}
/* Now that nothing is overlapping it is safe to scan the children. */
- max = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, 0);
+ pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7);
}
}
+ max = dev->bus->subordinate;
}
return max;
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 52a03f0..6094f29 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -467,6 +467,7 @@ static unsigned scan_chains(device_t dev, unsigned max)
u32 next_unitid = 0x18;
nodeid = amdfam15_nodeid(dev);
if (nodeid == 0) {
+ ASSERT(dev->bus->secondary == 0);
for (link = dev->link_list; link; link = link->next) {
//if (link->link_num == sblink) { /* devicetree put IO Hub on link_lsit[sblink] */
if (link->link_num == 0) { /* devicetree put IO Hub on link_lsit[0] */
@@ -475,9 +476,10 @@ static unsigned scan_chains(device_t dev, unsigned max)
die("I can't find the IO Hub, or IO Hub not enabled, please check the device tree.\n");
}
/* Now that nothing is overlapping it is safe to scan the children. */
- max = pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7, 0);
+ pci_scan_bus(link, 0x00, ((next_unitid - 1) << 3) | 7);
}
}
+ max = dev->bus->subordinate;
}
return max;
}
@@ -960,8 +962,8 @@ static void domain_set_resources(device_t dev)
/* all family15's pci devices are under 0x18.0, so we search from dev 0x18 fun 0 */
static unsigned int f15_pci_domain_scan_bus(device_t dev, unsigned int max)
{
- max = pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff, max);
- return max;
+ pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff);
+ return dev->link_list->subordinate;
}
static struct device_operations pci_domain_ops = {
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 409ce0f..57d4412 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -188,13 +188,13 @@ static void ht_route_link(struct bus *link, int mode)
#endif
}
-static u32 amdfam10_scan_chain(struct bus *link, u32 max)
+static void amdfam10_scan_chain(struct bus *link)
{
/* See if there is an available configuration space mapping
* register in function 1.
*/
if (get_ht_c_index(link) >= 4)
- return max;
+ return;
/* Set up the primary, secondary and subordinate bus numbers.
* We have no idea how many busses are behind this bridge yet,
@@ -210,7 +210,7 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max)
* chain on the hypertranport link
*/
- link->subordinate = hypertransport_scan_chain(link, link->secondary);
+ hypertransport_scan_chain(link);
/* We know the number of busses behind this bridge. Set the
* subordinate bus number to it's real value
@@ -224,7 +224,6 @@ static u32 amdfam10_scan_chain(struct bus *link, u32 max)
set_config_map_reg(link);
store_ht_c_conf_bus(link);
- return link->subordinate;
}
/* Do sb ht chain at first, in case s2885 put sb chain
@@ -273,9 +272,9 @@ static unsigned amdfam10_scan_chains(device_t dev, unsigned max)
for (link = dev->link_list; link; link = link->next) {
if (link->ht_link_up)
- max = amdfam10_scan_chain(link, max);
+ amdfam10_scan_chain(link);
}
- return max;
+ return dev->bus->subordinate;
}
@@ -915,7 +914,7 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max)
}
for(link = dev->link_list; link; link = link->next) {
- max = pci_scan_bus(link, PCI_DEVFN(CONFIG_CDB, 0), 0xff, max);
+ pci_scan_bus(link, PCI_DEVFN(CONFIG_CDB, 0), 0xff);
}
/* Tune the hypertransport transaction for best performance.
@@ -939,7 +938,7 @@ static u32 amdfam10_domain_scan_bus(device_t dev, u32 max)
pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc);
}
}
- return max;
+ return dev->bus->subordinate;
}
static struct device_operations pci_domain_ops = {
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 9f6ccbd..c9f4d4c 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -130,7 +130,7 @@ static u32 amdk8_nodeid(device_t dev)
return (dev->path.pci.devfn >> 3) - 0x18;
}
-static u32 amdk8_scan_chain(struct bus *link, u32 max)
+static void amdk8_scan_chain(struct bus *link)
{
int index;
u32 config_busses;
@@ -161,9 +161,8 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max)
/* If we can't find an available configuration space mapping
* register skip this bus
*/
- if (config_reg > 0xec) {
- return max;
- }
+ if (config_reg > 0xec)
+ return;
/* Set up the primary, secondary and subordinate bus numbers.
* We have no idea how many busses are behind this bridge yet,
@@ -185,7 +184,7 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max)
/* Now we can scan all of the subordinate busses i.e. the
* chain on the hypertranport link
*/
- link->subordinate = hypertransport_scan_chain(link, link->secondary);
+ hypertransport_scan_chain(link);
/* We know the number of busses behind this bridge. Set the
* subordinate bus number to it's real value
@@ -199,8 +198,6 @@ static u32 amdk8_scan_chain(struct bus *link, u32 max)
index = (config_reg-0xe0) >> 2;
sysconf.hcdn_reg[index] = link->hcdn_reg;
-
- return link->subordinate;
}
/* Do sb ht chain at first, in case s2885 put sb chain
@@ -249,9 +246,9 @@ static unsigned amdk8_scan_chains(device_t dev, unsigned max)
for (link = dev->link_list; link; link = link->next) {
if (link->ht_link_up)
- max = amdk8_scan_chain(link, max);
+ amdk8_scan_chain(link);
}
- return max;
+ return dev->bus->subordinate;
}
@@ -1122,7 +1119,7 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 max)
for(reg = 0xe0; reg <= 0xec; reg += 4) {
f1_write_config32(reg, 0);
}
- max = pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff, max);
+ pci_scan_bus(dev->link_list, PCI_DEVFN(0x18, 0), 0xff);
/* Tune the hypertransport transaction for best performance.
* Including enabling relaxed ordering if it is safe.
@@ -1145,7 +1142,7 @@ static u32 amdk8_domain_scan_bus(device_t dev, u32 max)
pci_write_config32(f0_dev, HT_TRANSACTION_CONTROL, httc);
}
}
- return max;
+ return dev->link_list->subordinate;
}
static struct device_operations pci_domain_ops = {
diff --git a/src/southbridge/amd/amd8131/bridge.c b/src/southbridge/amd/amd8131/bridge.c
index e638fae..cb76980 100644
--- a/src/southbridge/amd/amd8131/bridge.c
+++ b/src/southbridge/amd/amd8131/bridge.c
@@ -192,16 +192,15 @@ static void amd8131_pcix_tune_dev(device_t dev, void *ptr)
pci_write_config16(dev, cap + PCI_X_CMD, cmd);
}
}
-static unsigned int amd8131_scan_bus(struct bus *bus,
- unsigned min_devfn, unsigned max_devfn, unsigned int max)
+static void amd8131_scan_bus(struct bus *bus,
+ unsigned min_devfn, unsigned max_devfn)
{
struct amd8131_bus_info info;
struct bus *pbus;
unsigned pos;
-
/* Find the children on the bus */
- max = pci_scan_bus(bus, min_devfn, max_devfn, max);
+ pci_scan_bus(bus, min_devfn, max_devfn);
/* Find the revision of the 8131 */
info.rev = pci_read_config8(bus->dev, PCI_CLASS_REVISION);
@@ -243,13 +242,13 @@ static unsigned int amd8131_scan_bus(struct bus *bus,
pcix_misc &= ~(0x1f << 16);
pci_write_config32(bus->dev, 0x40, pcix_misc);
- return max;
+ return;
}
/* If we are in conventional PCI mode nothing more is necessary.
*/
if (PCI_X_SSTATUS_MFREQ(info.sstatus) == PCI_X_SSTATUS_CONVENTIONAL_PCI) {
- return max;
+ return;
}
@@ -264,7 +263,6 @@ static unsigned int amd8131_scan_bus(struct bus *bus,
bus_path(pbus));
pbus->disable_relaxed_ordering = 1;
}
- return max;
}
static unsigned int amd8131_scan_bridge(device_t dev, unsigned int max)
diff --git a/src/southbridge/amd/amd8132/bridge.c b/src/southbridge/amd/amd8132/bridge.c
index eecb11b..5df315d 100644
--- a/src/southbridge/amd/amd8132/bridge.c
+++ b/src/southbridge/amd/amd8132/bridge.c
@@ -138,15 +138,14 @@ static void amd8132_pcix_tune_dev(device_t dev, void *ptr)
}
-static unsigned int amd8132_scan_bus(struct bus *bus,
- unsigned min_devfn, unsigned max_devfn, unsigned int max)
+static void amd8132_scan_bus(struct bus *bus,
+ unsigned min_devfn, unsigned max_devfn)
{
struct amd8132_bus_info info;
unsigned pos;
-
/* Find the children on the bus */
- max = pci_scan_bus(bus, min_devfn, max_devfn, max);
+ pci_scan_bus(bus, min_devfn, max_devfn);
/* Find the revision of the 8132 */
info.rev = pci_read_config8(bus->dev, PCI_CLASS_REVISION);
@@ -181,20 +180,18 @@ static unsigned int amd8132_scan_bus(struct bus *bus,
pcix_misc &= ~(0x1f << 16);
pci_write_config32(bus->dev, 0x40, pcix_misc);
- return max;
+ return;
}
#endif
/* If we are in conventional PCI mode nothing more is necessary.
*/
if (PCI_X_SSTATUS_MFREQ(info.sstatus) == PCI_X_SSTATUS_CONVENTIONAL_PCI) {
- return max;
+ return;
}
/* Tune the devices on the bus */
amd8132_walk_children(bus, amd8132_pcix_tune_dev, &info);
-
- return max;
}
static unsigned int amd8132_scan_bridge(device_t dev, unsigned int max)
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c
index dd0ff0f..0ca485b 100644
--- a/src/southbridge/amd/cs5536/cs5536.c
+++ b/src/southbridge/amd/cs5536/cs5536.c
@@ -688,10 +688,10 @@ static struct smbus_bus_operations lops_smbus_bus = {
.read_byte = lsmbus_read_byte,
};
-static unsigned int scan_lpc_smbus(device_t dev, unsigned int max)
+static void scan_lpc_smbus(device_t dev)
{
/* FIXME. Do we have mixed LPC/SMBus device node here. */
- return scan_smbus(dev, max);
+ scan_smbus(dev);
}
static struct device_operations southbridge_ops = {
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