[coreboot-gerrit] Patch merged into coreboot/master: 25c6f75 samus: Update for board revision 1.9

gerrit at coreboot.org gerrit at coreboot.org
Sun Jan 4 00:04:01 CET 2015


the following patch was just integrated into master:
commit 25c6f75bb29fceba7a30d170f2401241fc3428ed
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Thu May 22 08:25:36 2014 -0700

    samus: Update for board revision 1.9
    
    - Update GPIO map
    - Update SPD for new memory and 4-bit table decode
    - Enable USB3 port 3 and 4 (shared with PCIe port 1)
    - Enable PCIe port 3 and disable port 1
    - Enable SerialIO ACPI mode for devices
    - Disable S0ix for now to prevent use of C10
    - Special handling for memory with broadwell CPU
    
    BUG=chrome-os-partner:28234
    TEST=Boot on P1.9
    
    Original-Change-Id: If6adcc2ea76f1af7613b715133483d7661e94dd8
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/201083
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    (cherry picked from commit 35835eaed3e098597e46f602fbd646cfbb899355)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: Icb03808da6d92705bbc411d155c25de57c4409c6
    Reviewed-on: http://review.coreboot.org/8007
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/8007 for details.

-gerrit



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