[coreboot-gerrit] New patch to review for coreboot: 89c9818 nvidia/ck804: Add ability to enable/disable PCIe PME# wake events
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Mon Jan 26 09:17:36 CET 2015
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8283
-gerrit
commit 89c9818a8b868a979b88bc3a85946f15e655a753
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Mon Jan 26 02:15:57 2015 -0600
nvidia/ck804: Add ability to enable/disable PCIe PME# wake events
Change-Id: Ie2937dd220464e3b168aa8a50a57c03b6258c189
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/southbridge/nvidia/ck804/early_setup.c | 6 ++++++
src/southbridge/nvidia/ck804/early_setup_car.c | 6 ++++++
2 files changed, 12 insertions(+)
diff --git a/src/southbridge/nvidia/ck804/early_setup.c b/src/southbridge/nvidia/ck804/early_setup.c
index 792644e..e5f9e9f 100644
--- a/src/southbridge/nvidia/ck804/early_setup.c
+++ b/src/southbridge/nvidia/ck804/early_setup.c
@@ -292,6 +292,12 @@ static void ck804_early_setup(void)
#endif
#endif
+#if CONFIG_CK804_ENABLE_PCIE_PME_WAKE
+ RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe4), 0xffffffff, 0x00400000,
+#else
+ RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe4), 0xffbfffff, 0x00000000,
+#endif
+
#ifdef CK804_MB_SETUP
CK804_MB_SETUP
#endif
diff --git a/src/southbridge/nvidia/ck804/early_setup_car.c b/src/southbridge/nvidia/ck804/early_setup_car.c
index 186424c..1ab1426 100644
--- a/src/southbridge/nvidia/ck804/early_setup_car.c
+++ b/src/southbridge/nvidia/ck804/early_setup_car.c
@@ -217,6 +217,12 @@ static void ck804_early_setup(unsigned ck804_num, unsigned *busn,
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x0d, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)),
RES_PORT_IO_8, SYSCTRL_IO_BASE + 0xc0 + 0x1a, ~(0xff), ((0 << 4) | (2 << 2) | (0 << 0)),
#endif
+
+#if CONFIG_CK804_ENABLE_PCIE_PME_WAKE
+ RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe4), 0xffffffff, 0x00400000,
+#else
+ RES_PCI_IO, PCI_ADDR(0, 1, 0, 0xe4), 0xffbfffff, 0x00000000,
+#endif
};
static const unsigned int ctrl_conf_multiple[] = {
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