[coreboot-gerrit] New patch to review for coreboot: ae5c9e1 coreboot rush: Add support for basic romstage
Marc Jones (marc.jones@se-eng.com)
gerrit at coreboot.org
Tue Mar 3 01:39:00 CET 2015
Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8573
-gerrit
commit ae5c9e1e372c0f445108362e1b0070aeeca6c134
Author: Furquan Shaikh <furquan at google.com>
Date: Thu Jun 26 00:11:29 2014 -0700
coreboot rush: Add support for basic romstage
Add basic romstage support for rush. Since, dram init needs to be done before we
can jump to armv8 core, romstage will run on armv4 core as well. Thus,
correcting the compiler selection options.
BUG=None
BRANCH=None
TEST=Compiles successfully for rush. Prints romstage banner and initial printk
Original-Change-Id: Ie3cd290e56a712b07c1503dab199e4e34cec04d2
Original-Signed-off-by: Furquan Shaikh <furquan at google.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/205763
Original-Tested-by: Furquan Shaikh <furquan at chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Original-Reviewed-by: Tom Warren <twarren at nvidia.com>
Original-Commit-Queue: Aaron Durbin <adurbin at chromium.org>
(cherry picked from commit d20b4e66209e902f54a07a17d5ce741f0a0b3a7b)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: Ic6b7ef4a2ea01c95d0c7f040bbd079219cf5750a
---
src/arch/arm/armv4/Makefile.inc | 1 +
src/mainboard/google/rush/romstage.c | 8 ++++++++
src/soc/nvidia/tegra132/Kconfig | 3 ++-
3 files changed, 11 insertions(+), 1 deletion(-)
diff --git a/src/arch/arm/armv4/Makefile.inc b/src/arch/arm/armv4/Makefile.inc
index 6b516b9..eab7f0f 100644
--- a/src/arch/arm/armv4/Makefile.inc
+++ b/src/arch/arm/armv4/Makefile.inc
@@ -49,6 +49,7 @@ ifeq ($(CONFIG_ARCH_ROMSTAGE_ARMV4),y)
romstage-c-ccopts += $(armv4_flags)
romstage-S-ccopts += $(armv4_flags)
+romstage-y += cache.c
endif # CONFIG_ARCH_ROMSTAGE_ARMV4
diff --git a/src/mainboard/google/rush/romstage.c b/src/mainboard/google/rush/romstage.c
index e2b75f6..f0de9c0 100644
--- a/src/mainboard/google/rush/romstage.c
+++ b/src/mainboard/google/rush/romstage.c
@@ -20,11 +20,19 @@
#include <arch/stages.h>
#include <cbfs.h>
#include <console/console.h>
+#include <arch/exception.h>
void main(void)
{
void *entry;
+ console_init();
+ exception_init();
+
+ printk(BIOS_INFO, "T132: romstage here\n");
+
+ while (1);
+
entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/ramstage");
stage_exit(entry);
}
diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index 4dc71fe..7e9aed8 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -3,13 +3,14 @@ config SOC_NVIDIA_TEGRA132
default n
select ARCH_BOOTBLOCK_ARMV4
select ARCH_VERSTAGE_ARMV4
- select ARCH_ROMSTAGE_ARMV8_64
+ select ARCH_ROMSTAGE_ARMV4
select ARCH_RAMSTAGE_ARMV8_64
select ARM_LPAE
select DYNAMIC_CBMEM
select BOOTBLOCK_CONSOLE
select HAVE_UART_SPECIAL
select HAVE_UART_MEMORY_MAPPED
+ select EARLY_CONSOLE
select ARM_BOOTBLOCK_CUSTOM
if SOC_NVIDIA_TEGRA132
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