[coreboot-gerrit] Patch merged into coreboot/master: 2a0f8cd libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication
gerrit at coreboot.org
gerrit at coreboot.org
Fri Mar 20 15:33:52 CET 2015
the following patch was just integrated into master:
commit 2a0f8cd41b3a94240d1b3d9f4d3f52b34b55aee3
Author: Vadim Bendebury <vbendeb at chromium.org>
Date: Fri Oct 24 13:29:43 2014 -0700
libpayload: move MRC processing to x86 path and remove ACPI_GNVS duplication
It turns out that CB_TAG_ACPI_GNVS is handled in both x86 specific and
common coreboot table parsing code. The MRC cache case used only by
x86 is handled in the common code.
This patch restores sanity and moves processing to where it belongs.
BRANCH=none
BUG=none
TEST=verified that arm and x86 targets build.
Change-Id: Iaddaa3380725be6d08a51a96c68b70522531bafe
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: 0afae893d5027026cb666cd46e054aeae4e71f83
Original-Change-Id: I2c114a8469455002c51593cb8be80585925969a7
Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/225457
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: http://review.coreboot.org/8752
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
See http://review.coreboot.org/8752 for details.
-gerrit
More information about the coreboot-gerrit
mailing list