[coreboot-gerrit] New patch to review for coreboot: 2c1e090 samus: Disable CMDPWR on broadwell
Marc Jones (marc.jones@se-eng.com)
gerrit at coreboot.org
Tue Mar 24 21:35:22 CET 2015
Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/8950
-gerrit
commit 2c1e090a3db3aa56d3264648dcf2c776a67a1328
Author: Kane Chen <kane.chen at intel.com>
Date: Fri Aug 1 10:59:20 2014 -0700
samus: Disable CMDPWR on broadwell
Workaround for auto shutdown issue on broadwell SKU.
Now we can see C7 transition, and MRC fastboot
BUG=chrome-os-partner:29787,chrome-os-partner:29117
BRANCH=None
TEST=build ok and boot on samus
Original-Signed-off-by: Kane Chen <kane.chen at intel.com>
Original-Commit-Id: 932152b16c3943b00bd317e7370402dda451529f
Original-Change-Id: Id1f174b67fa3e6f248dd8b21aee25e6e01abf33e
Original-Reviewed-on: https://chromium-review.googlesource.com/210870
Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
Original-Tested-by: Kane Chen <kane.chen at intel.com>
Original-Commit-Queue: Kane Chen <kane.chen at intel.com>
(cherry picked from commit 932152b16c3943b00bd317e7370402dda451529f)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: Ie9fb792635b39d33136cef576ae5559013d5947a
---
src/mainboard/google/samus/romstage.c | 3 +--
src/soc/intel/broadwell/broadwell/pei_data.h | 2 ++
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/samus/romstage.c b/src/mainboard/google/samus/romstage.c
index b26cc4e..44d712e 100644
--- a/src/mainboard/google/samus/romstage.c
+++ b/src/mainboard/google/samus/romstage.c
@@ -59,8 +59,7 @@ void mainboard_romstage_entry(struct romstage_params *rp)
* Disable use of PEI saved data to work around memory issues.
*/
if (cpu_family_model() == BROADWELL_FAMILY_ULT) {
- pei_data.disable_self_refresh = 1;
- pei_data.disable_saved_data = 1;
+ pei_data.disable_cmd_pwr = 1;
}
/* Initalize memory */
diff --git a/src/soc/intel/broadwell/broadwell/pei_data.h b/src/soc/intel/broadwell/broadwell/pei_data.h
index 07b04d2..19b4451 100644
--- a/src/soc/intel/broadwell/broadwell/pei_data.h
+++ b/src/soc/intel/broadwell/broadwell/pei_data.h
@@ -124,6 +124,8 @@ struct pei_data
int max_ddr3_freq;
/* Disable self refresh */
int disable_self_refresh;
+ /* Disable cmd power/CKEPD */
+ int disable_cmd_pwr;
/* USB port configuration */
struct usb2_port_setting usb2_ports[MAX_USB2_PORTS];
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