[coreboot-gerrit] Patch merged into coreboot/master: 446fb8e broadwell: Misc updates from 2.1.0 ref code
gerrit at coreboot.org
gerrit at coreboot.org
Fri Mar 27 05:39:37 CET 2015
the following patch was just integrated into master:
commit 446fb8e45ef2d555579e7659c1c0a91bb8ff3d78
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Fri Aug 8 09:59:43 2014 -0700
broadwell: Misc updates from 2.1.0 ref code
- ADSP IRQ should be exclusive
- HDA should write reg 0x43 even if disabled
- A few clock gating tweaks based on ref code changes
- Move SATA clock gating to sata.c where SIR changes are done
- Add support for enabling Deep SX in AC/DC modes
- CLKREQ VR Idle for enabled PCIE ports
BUG=chrome-os-partner:28234
BRANCH=None
TEST=build and boot on samus
Original-Change-Id: Icece58e32b7a5d2b359debd5516a230cae3fd48c
Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/211611
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
(cherry picked from commit c0e22ba043ed96bdddca4989b2f29d0e989f6fef)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: If5f5e1666aa9660e31305ee6369f2febf6757b99
Reviewed-on: http://review.coreboot.org/8952
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin at google.com>
See http://review.coreboot.org/8952 for details.
-gerrit
More information about the coreboot-gerrit
mailing list