[coreboot-gerrit] Patch set updated for coreboot: northbridge/amd/amdfam10: Fix gart setup not working on Family 15h processors
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Sun Oct 18 02:53:36 CEST 2015
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12047
-gerrit
commit 978197bc2c87622221914362acba594571391764
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Tue Aug 11 17:52:31 2015 -0500
northbridge/amd/amdfam10: Fix gart setup not working on Family 15h processors
Change-Id: Ib78620c30502df6add9cc2ea1dbd4fb6dc89203e
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/northbridge/amd/amdfam10/misc_control.c | 34 ++++++++++++++++++++++-------
1 file changed, 26 insertions(+), 8 deletions(-)
diff --git a/src/northbridge/amd/amdfam10/misc_control.c b/src/northbridge/amd/amdfam10/misc_control.c
index 4710876..61cf1b6 100644
--- a/src/northbridge/amd/amdfam10/misc_control.c
+++ b/src/northbridge/amd/amdfam10/misc_control.c
@@ -78,7 +78,7 @@ static void mcf3_read_resources(device_t dev)
}
}
-static void set_agp_aperture(device_t dev)
+static void set_agp_aperture(device_t dev, uint32_t pci_id)
{
struct resource *resource;
@@ -98,7 +98,7 @@ static void set_agp_aperture(device_t dev)
/* Update the other northbriges */
pdev = 0;
- while((pdev = dev_find_device(PCI_VENDOR_ID_AMD, 0x1203, pdev))) {
+ while ((pdev = dev_find_device(PCI_VENDOR_ID_AMD, pci_id, pdev))) {
/* Store the GART size but don't enable it */
pci_write_config32(pdev, 0x90, gart_acr);
@@ -114,10 +114,19 @@ static void set_agp_aperture(device_t dev)
}
}
-static void mcf3_set_resources(device_t dev)
+static void mcf3_set_resources_fam10h(device_t dev)
{
/* Set the gart apeture */
- set_agp_aperture(dev);
+ set_agp_aperture(dev, 0x1203);
+
+ /* Set the generic PCI resources */
+ pci_dev_set_resources(dev);
+}
+
+static void mcf3_set_resources_fam15h(device_t dev)
+{
+ /* Set the gart apeture */
+ set_agp_aperture(dev, 0x1603);
/* Set the generic PCI resources */
pci_dev_set_resources(dev);
@@ -156,9 +165,18 @@ static void misc_control_init(struct device *dev)
}
-static struct device_operations mcf3_ops = {
+static struct device_operations mcf3_ops_fam10h = {
+ .read_resources = mcf3_read_resources,
+ .set_resources = mcf3_set_resources_fam10h,
+ .enable_resources = pci_dev_enable_resources,
+ .init = misc_control_init,
+ .scan_bus = 0,
+ .ops_pci = 0,
+};
+
+static struct device_operations mcf3_ops_fam15h = {
.read_resources = mcf3_read_resources,
- .set_resources = mcf3_set_resources,
+ .set_resources = mcf3_set_resources_fam15h,
.enable_resources = pci_dev_enable_resources,
.init = misc_control_init,
.scan_bus = 0,
@@ -166,13 +184,13 @@ static struct device_operations mcf3_ops = {
};
static const struct pci_driver mcf3_driver __pci_driver = {
- .ops = &mcf3_ops,
+ .ops = &mcf3_ops_fam10h,
.vendor = PCI_VENDOR_ID_AMD,
.device = 0x1203,
};
static const struct pci_driver mcf3_driver_fam15 __pci_driver = {
- .ops = &mcf3_ops,
+ .ops = &mcf3_ops_fam15h,
.vendor = PCI_VENDOR_ID_AMD,
.device = 0x1603,
};
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