[coreboot-gerrit] Patch set updated for coreboot: cpu/amd/car: Initialize entire CAR space instead of only half
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Sat Oct 24 02:06:12 CEST 2015
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11974
-gerrit
commit 1b7b6fe1b487f96ba8dd9fe11bed656f2f94765f
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Thu Jun 4 00:07:05 2015 -0500
cpu/amd/car: Initialize entire CAR space instead of only half
Change-Id: If2b6c875e523f595e662d5d62322c3c3f96ccb4a
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/cpu/amd/car/cache_as_ram.inc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/cpu/amd/car/cache_as_ram.inc b/src/cpu/amd/car/cache_as_ram.inc
index 4ccde3f..9edc41f 100644
--- a/src/cpu/amd/car/cache_as_ram.inc
+++ b/src/cpu/amd/car/cache_as_ram.inc
@@ -460,12 +460,12 @@ fam10_end_part1:
/* Read the range with lodsl. */
cld
movl $CacheBase, %esi
- movl $(CacheSize >> 2), %ecx
+ movl $CacheSize, %ecx
rep lodsl
/* Clear the range. */
movl $CacheBase, %edi
- movl $(CacheSize >> 2), %ecx
+ movl $CacheSize, %ecx
xorl %eax, %eax
rep stosl
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