[coreboot-gerrit] New patch to review for coreboot: northbridge/amd/amdfam10: Update RAM speed table with DDR3 values
Timothy Pearson (tpearson@raptorengineeringinc.com)
gerrit at coreboot.org
Sat Oct 31 01:06:02 CET 2015
Timothy Pearson (tpearson at raptorengineeringinc.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/12272
-gerrit
commit 0824575ca0e5fdf6bf62515ecc6867d54697709d
Author: Timothy Pearson <tpearson at raptorengineeringinc.com>
Date: Fri Oct 30 18:53:48 2015 -0500
northbridge/amd/amdfam10: Update RAM speed table with DDR3 values
Change-Id: I8ab7b2cd9bf36d53b744a11d32dd40c750149567
Signed-off-by: Timothy Pearson <tpearson at raptorengineeringinc.com>
---
src/northbridge/amd/amdfam10/northbridge.c | 46 +++++++++++++++++++++---------
1 file changed, 33 insertions(+), 13 deletions(-)
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 035ce4d..ff324cd 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -950,19 +950,39 @@ static int amdfam10_get_smbios_data16(int* count, int handle, unsigned long *cur
static uint16_t amdmct_mct_speed_enum_to_mhz(uint8_t speed)
{
- switch (speed) {
- case 1:
- return 200;
- case 2:
- return 266;
- case 3:
- return 333;
- case 4:
- return 400;
- case 5:
- return 533;
- default:
- return 0;
+ if (IS_ENABLED(CONFIG_DIMM_DDR2)) {
+ switch (speed) {
+ case 1:
+ return 200;
+ case 2:
+ return 266;
+ case 3:
+ return 333;
+ case 4:
+ return 400;
+ case 5:
+ return 533;
+ default:
+ return 0;
+ }
+ } else if (IS_ENABLED(CONFIG_DIMM_DDR3)) {
+ switch (speed) {
+ case 3:
+ return 333;
+ case 4:
+ return 400;
+ case 5:
+ return 533;
+ case 6:
+ return 667;
+ case 7:
+ return 800;
+ default:
+ return 0;
+ }
+ } else {
+ return 0;
+ }
}
static int amdfam10_get_smbios_data17(int* count, int handle, int parent_handle, unsigned long *current)
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