[coreboot-gerrit] Patch set updated for coreboot: bootmode: add display_init_required()
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Wed Sep 2 21:51:33 CET 2015
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11490
-gerrit
commit 5527c4efc7bd33e3711b13179b64952779ebcb40
Author: Aaron Durbin <adurbin at chromium.org>
Date: Wed Sep 2 09:21:36 2015 -0500
bootmode: add display_init_required()
Some of the Chrome OS boards were directly calling vboot
called in some form after contorting around #ifdef preprocessor
macros. The reasoning is that Chrome OS doesn't always do display
initialization during startup. It's runtime dependent. While
this is a requirement that doesn't mean vboot functions should be
sprinkled around in the mainboard and chipset code. Instead provide
one function, display_init_required(), that provides the policy
for determining display initialization action. For Chrome OS
devices this function honors vboot_skip_display_init() and all
other configurations default to initializing display.
Change-Id: I403213e22c0e621e148773597a550addfbaf3f7e
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/include/bootmode.h | 2 ++
src/lib/bootmode.c | 12 ++++++++++--
src/mainboard/google/rush/mainboard.c | 7 +++----
src/mainboard/google/rush_ryu/mainboard.c | 3 ++-
src/mainboard/google/smaug/mainboard.c | 12 +++---------
src/soc/nvidia/tegra124/soc.c | 8 ++++----
src/soc/nvidia/tegra132/soc.c | 13 +++++++------
src/soc/nvidia/tegra210/soc.c | 13 +++++++------
src/soc/rockchip/rk3288/soc.c | 8 ++++----
9 files changed, 42 insertions(+), 36 deletions(-)
diff --git a/src/include/bootmode.h b/src/include/bootmode.h
index ff562d5..96c789b 100644
--- a/src/include/bootmode.h
+++ b/src/include/bootmode.h
@@ -30,6 +30,8 @@ int get_wipeout_mode_switch(void);
int get_lid_switch(void);
+/* Return 1 if display initialization is required. 0 if not. */
+int display_init_required(void);
int gfx_get_init_done(void);
void gfx_set_init_done(int done);
diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c
index c7e4927..f2ff72a 100644
--- a/src/lib/bootmode.c
+++ b/src/lib/bootmode.c
@@ -19,9 +19,7 @@
#include <rules.h>
#include <bootmode.h>
-#if CONFIG_CHROMEOS || CONFIG_VBOOT_VERIFY_FIRMWARE
#include <vendorcode/google/chromeos/chromeos.h>
-#endif
#if CONFIG_BOOTMODE_STRAPS
int developer_mode_enabled(void)
@@ -78,3 +76,13 @@ void gfx_set_init_done(int done)
gfx_init_done = done;
}
#endif
+
+int display_init_required(void)
+{
+ /* For Chrome OS always honor vboot_skip_display_init(). */
+ if (IS_ENABLED(CONFIG_CHROMEOS))
+ return !vboot_skip_display_init();
+
+ /* By default always initialize display. */
+ return 1;
+}
diff --git a/src/mainboard/google/rush/mainboard.c b/src/mainboard/google/rush/mainboard.c
index cffb7ac..aa67ec2 100644
--- a/src/mainboard/google/rush/mainboard.c
+++ b/src/mainboard/google/rush/mainboard.c
@@ -18,7 +18,9 @@
*/
#include <arch/mmu.h>
+#include <bootmode.h>
#include <boot/coreboot_tables.h>
+#include <delay.h>
#include <device/device.h>
#include <memrange.h>
#include <soc/addressmap.h>
@@ -32,9 +34,6 @@
#include <soc/nvidia/tegra/dc.h>
#include <soc/display.h>
-#include <vendorcode/google/chromeos/chromeos.h>
-#include <delay.h>
-
static const struct pad_config sdmmc3_pad[] = {
/* MMC3(SDCARD) */
PAD_CFG_SFIO(SDMMC3_CLK, PINMUX_INPUT_ENABLE, SDMMC3),
@@ -184,7 +183,7 @@ static void mainboard_init(device_t dev)
i2c_init(I2C1_BUS); /* for max98090 codec */
/* if panel needs to bringup */
- if (!vboot_skip_display_init())
+ if (display_init_required())
configure_display_blocks();
}
diff --git a/src/mainboard/google/rush_ryu/mainboard.c b/src/mainboard/google/rush_ryu/mainboard.c
index 863ab52..1af7395 100644
--- a/src/mainboard/google/rush_ryu/mainboard.c
+++ b/src/mainboard/google/rush_ryu/mainboard.c
@@ -19,6 +19,7 @@
#include <arch/mmu.h>
#include <boardid.h>
+#include <bootmode.h>
#include <boot/coreboot_tables.h>
#include <cbmem.h>
#include <delay.h>
@@ -281,7 +282,7 @@ static void mainboard_init(device_t dev)
soc_configure_pads(lcd_gpio_padcfgs, ARRAY_SIZE(lcd_gpio_padcfgs));
/* if panel needs to bringup */
- if (!vboot_skip_display_init())
+ if (display_init_required())
configure_display_blocks();
}
diff --git a/src/mainboard/google/smaug/mainboard.c b/src/mainboard/google/smaug/mainboard.c
index 1cf4d32..6e3393d 100644
--- a/src/mainboard/google/smaug/mainboard.c
+++ b/src/mainboard/google/smaug/mainboard.c
@@ -20,7 +20,9 @@
#include <arch/io.h>
#include <arch/mmu.h>
+#include <bootmode.h>
#include <boot/coreboot_tables.h>
+#include <delay.h>
#include <device/device.h>
#include <device/i2c.h>
#include <soc/addressmap.h>
@@ -36,12 +38,6 @@
#include <soc/pmc.h>
#include <soc/power.h>
-#if IS_ENABLED(CONFIG_CHROMEOS)
-#include <vendorcode/google/chromeos/vboot_handoff.h>
-#include <vendorcode/google/chromeos/vboot2/misc.h>
-#endif
-#include <delay.h>
-
#include "gpio.h"
#include "pmic.h"
@@ -202,9 +198,7 @@ static void mainboard_init(device_t dev)
setup_audio();
/* if panel needs to bringup */
-#if IS_ENABLED(CONFIG_CHROMEOS)
- if (!vboot_skip_display_init())
-#endif
+ if (display_init_required())
configure_display_blocks();
powergate_unused_partitions();
diff --git a/src/soc/nvidia/tegra124/soc.c b/src/soc/nvidia/tegra124/soc.c
index 406457b..c38232d 100644
--- a/src/soc/nvidia/tegra124/soc.c
+++ b/src/soc/nvidia/tegra124/soc.c
@@ -20,13 +20,13 @@
*/
#include <arch/io.h>
+#include <bootmode.h>
#include <console/console.h>
#include <device/device.h>
#include <soc/nvidia/tegra/dc.h>
#include <soc/display.h>
#include <soc/sdram.h>
#include <symbols.h>
-#include <vendorcode/google/chromeos/chromeos.h>
#include "chip.h"
@@ -53,10 +53,10 @@ static void soc_enable(device_t dev)
static void soc_init(device_t dev)
{
- if (vboot_skip_display_init())
- printk(BIOS_INFO, "Skipping display init.\n");
- else
+ if (display_init_required())
display_startup(dev);
+ else
+ printk(BIOS_INFO, "Skipping display init.\n");
printk(BIOS_INFO, "CPU: Tegra124\n");
}
diff --git a/src/soc/nvidia/tegra132/soc.c b/src/soc/nvidia/tegra132/soc.c
index 4ca866c..a65f36d 100644
--- a/src/soc/nvidia/tegra132/soc.c
+++ b/src/soc/nvidia/tegra132/soc.c
@@ -22,6 +22,7 @@
#include <arch/cache.h>
#include <arch/spintable.h>
#include <cpu/cpu.h>
+#include <bootmode.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
@@ -34,7 +35,6 @@
#include <soc/nvidia/tegra/apbmisc.h>
#include <string.h>
#include <timer.h>
-#include <vendorcode/google/chromeos/chromeos.h>
#include "chip.h"
@@ -101,12 +101,13 @@ static void soc_init(device_t dev)
/* Lock down VPR */
lock_down_vpr();
-#if IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)
- if (vboot_skip_display_init())
- printk(BIOS_INFO, "Skipping display init.\n");
- else
+ if (!IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT))
+ return;
+
+ if (display_init_required())
display_startup(dev);
-#endif
+ else
+ printk(BIOS_INFO, "Skipping display init.\n");
}
static struct device_operations soc_ops = {
diff --git a/src/soc/nvidia/tegra210/soc.c b/src/soc/nvidia/tegra210/soc.c
index 9e67531..981b09c 100644
--- a/src/soc/nvidia/tegra210/soc.c
+++ b/src/soc/nvidia/tegra210/soc.c
@@ -22,6 +22,7 @@
#include <arch/cache.h>
#include <arch/spintable.h>
#include <cpu/cpu.h>
+#include <bootmode.h>
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
@@ -35,7 +36,6 @@
#include <soc/nvidia/tegra/apbmisc.h>
#include <string.h>
#include <timer.h>
-#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/sdram.h>
#include <soc/sdram_configs.h>
@@ -92,12 +92,13 @@ static void soc_init(device_t dev)
spintable_init((void *)cfg->spintable_addr);
arch_initialize_cpus(dev, &cntrl_ops);
-#if IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)
- if (vboot_skip_display_init())
- printk(BIOS_INFO, "Skipping display init.\n");
- else
+ if (!IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT))
+ return;
+
+ if (display_init_required())
display_startup(dev);
-#endif
+ else
+ printk(BIOS_INFO, "Skipping display init.\n");
}
static void soc_noop(device_t dev)
diff --git a/src/soc/rockchip/rk3288/soc.c b/src/soc/rockchip/rk3288/soc.c
index a13086a..a9484b4 100644
--- a/src/soc/rockchip/rk3288/soc.c
+++ b/src/soc/rockchip/rk3288/soc.c
@@ -18,6 +18,7 @@
*/
#include <arch/cache.h>
+#include <bootmode.h>
#include <cbmem.h>
#include <console/console.h>
#include <delay.h>
@@ -30,18 +31,17 @@
#include <stdlib.h>
#include <string.h>
#include <symbols.h>
-#include <vendorcode/google/chromeos/chromeos.h>
#include "chip.h"
static void soc_init(device_t dev)
{
ram_resource(dev, 0, (uintptr_t)_dram/KiB, sdram_size_mb()*(MiB/KiB));
- if (vboot_skip_display_init())
- printk(BIOS_INFO, "Skipping display init.\n");
- else
+ if (display_init_required())
rk_display_init(dev, (uintptr_t)_framebuffer,
_framebuffer_size);
+ else
+ printk(BIOS_INFO, "Skipping display init.\n");
}
static struct device_operations soc_ops = {
More information about the coreboot-gerrit
mailing list