[coreboot-gerrit] New patch to review for coreboot: kunimitsu: Disable unused USB ports

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11549

-gerrit

commit 8df84475b3b3a8c4d4471ece035b867078ce0fba
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Fri Aug 28 17:48:11 2015 -0700

    kunimitsu: Disable unused USB ports
    
    Enable only the USB ports that are connected on-board or to an
    external port, all others will be disabled.
    
    BUG=chrome-os-partner:44662
    BRANCH=none
    TEST=emerge-kunimitsu coreboot, change verified in schematic but not tested
    
    Change-Id: I909a6fab553bba829349dd08fa9cc3f26e5adeb2
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 1b0ce28d093e3b12273d7e0f56b47fb5b13d712f
    Original-Change-Id: I0c4b7de6e559595efa97d756e43f8398feccdffd
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/296036
    Original-Commit-Ready: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/intel/kunimitsu/devicetree.cb | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index 6d0e2f4..1c3cf67 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -15,6 +15,18 @@ chip soc/intel/skylake
 		[PchSerialIoIndexUart2] = PchSerialIoPci, \
 	}"
 
+	register "PortUsb20Enable[0]" = "1"	/* Type-C Port 1 */
+	register "PortUsb20Enable[1]" = "1"	/* Type-C Port 2 */
+	register "PortUsb20Enable[2]" = "1"	/* Bluetooth */
+	register "PortUsb20Enable[4]" = "1"	/* Type-A Port (card) */
+	register "PortUsb20Enable[6]" = "1"	/* Camera */
+	register "PortUsb20Enable[8]" = "1"	/* Type-A Port (board) */
+
+	register "PortUsb30Enable[0]" = "1"	/* Type-C Port 1 */
+	register "PortUsb30Enable[1]" = "1"	/* Type-C Port 2 */
+	register "PortUsb30Enable[2]" = "1"	/* Type-A Port (card) */
+	register "PortUsb30Enable[3]" = "1"	/* Type-A Port (board) */
+
 	register "pirqa_routing" = "0x8b"
 	register "pirqb_routing" = "0x8a"
 	register "pirqc_routing" = "0x8b"