[coreboot-gerrit] Patch set updated for coreboot: linking: lay the groundwork for a unified linking approach
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Tue Sep 8 04:11:48 CET 2015
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11507
-gerrit
commit 6de6d370d250a60a13c4fe050b4413534e1472f9
Author: Aaron Durbin <adurbin at chromium.org>
Date: Thu Sep 3 22:49:36 2015 -0500
linking: lay the groundwork for a unified linking approach
Though coreboot started as x86 only, the current approach to x86
linking is out of the norm with respect to other architectures.
To start alleviating that the way ramstage is linked is partially
unified. A new file, program.ld, was added to provide a common way
to link stages by deferring to per-stage architectural overrides.
The previous ramstage.ld is no longer required.
Note that this change doesn't handle RELOCATABLE_RAMSTAGE
because that is handled by rmodule.ld. Future convergence
can be achieved, but for the time being that's being left out.
BUG=chrome-os-partner:44827
BRANCH=None
TEST=Built a myriad of boards.
Change-Id: I5d689bfa7e0e9aff3a148178515ef241b5f70661
Signed-off-by: Aaron Durbin <adubin at chromium.org>
---
src/arch/x86/Makefile.inc | 2 +-
src/arch/x86/include/arch/memlayout.h | 25 +++++++
src/arch/x86/ramstage.ld | 2 +-
src/include/memlayout.h | 42 +++++++++--
src/lib/Makefile.inc | 3 +-
src/lib/program.ld | 130 ++++++++++++++++++++++++++++++++++
src/lib/ramstage.ld | 115 ------------------------------
7 files changed, 197 insertions(+), 122 deletions(-)
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 10a94c3..3c1871e 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -295,7 +295,7 @@ $(objcbfs)/ramstage.elf: $(objcbfs)/ramstage.debug.rmod
else
-ramstage-srcs += $(src)/arch/x86/ramstage.ld
+ramstage-y += ramstage.ld
$(objcbfs)/ramstage.debug: $(objgenerated)/ramstage.o $(obj)/arch/x86/ramstage.ramstage.ld
@printf " CC $(subst $(obj)/,,$(@))\n"
diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h
new file mode 100644
index 0000000..54b8b4a
--- /dev/null
+++ b/src/arch/x86/include/arch/memlayout.h
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#ifndef __ARCH_MEMLAYOUT_H
+#define __ARCH_MEMLAYOUT_H
+
+/* Currently empty to satisfy common arch requirements. */
+
+#endif /* __ARCH_MEMLAYOUT_H */
diff --git a/src/arch/x86/ramstage.ld b/src/arch/x86/ramstage.ld
index 5fcbbb6..c9b2f17 100644
--- a/src/arch/x86/ramstage.ld
+++ b/src/arch/x86/ramstage.ld
@@ -19,7 +19,7 @@ SECTIONS
{
. = CONFIG_RAMBASE;
- INCLUDE "lib/ramstage.ramstage.ld"
+ INCLUDE "lib/program.ramstage.ld"
_ = ASSERT( ( _eprogram < (CONFIG_RAMTOP)) , "Please increase CONFIG_RAMTOP");
}
diff --git a/src/include/memlayout.h b/src/include/memlayout.h
index a529628..3963339 100644
--- a/src/include/memlayout.h
+++ b/src/include/memlayout.h
@@ -22,10 +22,41 @@
#ifndef __MEMLAYOUT_H
#define __MEMLAYOUT_H
+#include <rules.h>
#include <arch/memlayout.h>
+/* Macros that the architecture can override. */
+#ifndef ARCH_POINTER_ALIGN_SIZE
+#define ARCH_POINTER_ALIGN_SIZE 8
+#endif
+
+#ifndef ARCH_CACHELINE_ALIGN_SIZE
+#define ARCH_CACHELINE_ALIGN_SIZE 64
+#endif
+
+#ifndef ARCH_FIRST_TEXT
+#define ARCH_FIRST_TEXT
+#endif
+
+/* Default to data as well as bss. */
+#ifndef ARCH_STAGE_HAS_DATA_SECTION
+#define ARCH_STAGE_HAS_DATA_SECTION 1
+#endif
+
+#ifndef ARCH_STAGE_HAS_BSS_SECTION
+#define ARCH_STAGE_HAS_BSS_SECTION 1
+#endif
+
+/* Default is that currently ramstage and smm only has a heap. */
+#ifndef ARCH_STAGE_HAS_HEAP_SECTION
+#define ARCH_STAGE_HAS_HEAP_SECTION (ENV_RAMSTAGE || ENV_SMM)
+#endif
+
#define STR(x) #x
+#define ALIGN_COUNTER(align) \
+ . = ALIGN(align);
+
#define SET_COUNTER(name, addr) \
_ = ASSERT(. <= addr, STR(name overlaps the previous region!)); \
. = addr;
@@ -34,6 +65,9 @@
SET_COUNTER(name, addr) \
_##name = .;
+#define SYMBOL_CURRENT_LOC(name) \
+ _##name = .;
+
#define REGION(name, addr, size, expected_align) \
SYMBOL(name, addr) \
_ = ASSERT(. == ALIGN(expected_align), \
@@ -58,7 +92,7 @@
/* TODO: This only works if you never access CBFS in romstage before RAM is up!
* If you need to change that assumption, you have some work ahead of you... */
-#if defined(__PRE_RAM__) && !defined(__ROMSTAGE__)
+#if defined(__PRE_RAM__) && !ENV_ROMSTAGE
#define PRERAM_CBFS_CACHE(addr, size) CBFS_CACHE(addr, size)
#define POSTRAM_CBFS_CACHE(addr, size) \
REGION(unused_cbfs_cache, addr, size, 4)
@@ -93,12 +127,12 @@
. += sz;
#endif
-#ifdef __RAMSTAGE__
+#if ENV_RAMSTAGE
#define RAMSTAGE(addr, sz) \
SET_COUNTER(ramstage, addr) \
- _ = ASSERT(_eramstage - _ramstage <= sz, \
+ _ = ASSERT(_eprogram - _program <= sz, \
STR(Ramstage exceeded its allotted size! (sz))); \
- INCLUDE "lib/ramstage.ramstage.ld"
+ INCLUDE "lib/program.ramstage.ld"
#else
#define RAMSTAGE(addr, sz) \
SET_COUNTER(ramstage, addr) \
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 8597667..cd2b70a 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -197,7 +197,8 @@ ifneq ($(CONFIG_ARCH_X86),y)
bootblock-y += bootblock.ld
romstage-y += romstage.ld
endif
-ramstage-y += ramstage.ld
+
+ramstage-y += program.ld
ifeq ($(CONFIG_RELOCATABLE_MODULES),y)
ramstage-y += rmodule.c
diff --git a/src/lib/program.ld b/src/lib/program.ld
new file mode 100644
index 0000000..02d017a
--- /dev/null
+++ b/src/lib/program.ld
@@ -0,0 +1,130 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc.
+ */
+
+#include <memlayout.h>
+
+/* This file is included inside a SECTIONS block */
+
+/* First we place the code and read only data (typically const declared).
+ * This could theoretically be placed in rom.
+ */
+.text : {
+ SYMBOL_CURRENT_LOC(program)
+ SYMBOL_CURRENT_LOC(text)
+ ARCH_FIRST_TEXT
+ *(.text._start);
+ *(.text.stage_entry);
+ *(.text);
+ *(.text.*);
+
+#if ENV_RAMSTAGE || ENV_ROMSTAGE
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(cbmem_init_hooks)
+ KEEP(*(.rodata.cbmem_init_hooks));
+ SYMBOL_CURRENT_LOC(ecbmem_init_hooks)
+#endif
+
+#if ENV_RAMSTAGE
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(pci_drivers)
+ KEEP(*(.rodata.pci_driver));
+ SYMBOL_CURRENT_LOC(epci_drivers)
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(cpu_drivers)
+ KEEP(*(.rodata.cpu_driver));
+ SYMBOL_CURRENT_LOC(ecpu_drivers)
+#endif
+
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ *(.rodata);
+ *(.rodata.*);
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(etext)
+} : to_load
+
+#if ENV_RAMSTAGE && IS_ENABLED(CONFIG_COVERAGE)
+.ctors : {
+ ALIGN_COUNTER(0x100)
+ SYMBOL_CURRENT_LOC(__CTOR_LIST__)
+ KEEP(*(.ctors));
+ LONG(0);
+ LONG(0);
+ SYMBOL_CURRENT_LOC(__CTOR_END__)
+}
+#endif
+
+/* Include data, bss, and heap in that order. Not defined for all stages. */
+#if ARCH_STAGE_HAS_DATA_SECTION
+.data : {
+ ALIGN_COUNTER(ARCH_CACHELINE_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(data)
+ *(.data);
+ *(.data.*);
+
+#ifdef __PRE_RAM__
+ PROVIDE(_preram_cbmem_console = .);
+ PROVIDE(_epreram_cbmem_console = _preram_cbmem_console);
+#elif ENV_RAMSTAGE
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(bs_init_begin)
+ KEEP(*(.bs_init));
+ LONG(0);
+ LONG(0);
+ SYMBOL_CURRENT_LOC(ebs_init_begin)
+#endif
+
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(edata)
+}
+#endif
+
+#if ARCH_STAGE_HAS_BSS_SECTION
+.bss : {
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(bss)
+ *(.bss)
+ *(.bss.*)
+ *(.sbss)
+ *(.sbss.*)
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(ebss)
+}
+#endif
+
+#if ARCH_STAGE_HAS_HEAP_SECTION
+.heap : {
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(heap)
+ . += CONFIG_HEAP_SIZE;
+ ALIGN_COUNTER(ARCH_POINTER_ALIGN_SIZE)
+ SYMBOL_CURRENT_LOC(eheap)
+}
+#endif
+
+SYMBOL_CURRENT_LOC(eprogram)
+
+/* Discard the sections we don't need/want */
+
+/DISCARD/ : {
+ *(.comment)
+ *(.comment.*)
+ *(.note)
+ *(.note.*)
+ *(.eh_frame);
+}
diff --git a/src/lib/ramstage.ld b/src/lib/ramstage.ld
deleted file mode 100644
index b224827..0000000
--- a/src/lib/ramstage.ld
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc.
- */
-
-/* This file is included inside a SECTIONS block */
-
-/* First we place the code and read only data (typically const declared).
- * This could theoretically be placed in rom.
- */
-.text : {
- _program = .;
- _ramstage = .;
- _text = .;
- *(.text._start);
- *(.text.stage_entry);
- *(.text);
- *(.text.*);
- . = ALIGN(16);
- _etext = .;
-} : to_load
-
-#if IS_ENABLED(CONFIG_COVERAGE)
-.ctors : {
- . = ALIGN(0x100);
- __CTOR_LIST__ = .;
- KEEP(*(.ctors));
- LONG(0);
- LONG(0);
- __CTOR_END__ = .;
-}
-#endif
-
-/* TODO: align data sections to cache lines? (is that really useful?) */
-.rodata : {
- _rodata = .;
- . = ALIGN(8);
-
- /* If any changes are made to the driver start/symbols or the
- * section names the equivalent changes need to made to
- * rmodule.ld. */
- _pci_drivers = . ;
- KEEP(*(.rodata.pci_driver));
- _epci_drivers = . ;
- _cpu_drivers = . ;
- KEEP(*(.rodata.cpu_driver));
- _ecpu_drivers = . ;
- _bs_init_begin = .;
- KEEP(*(.bs_init));
- LONG(0);
- LONG(0);
- _bs_init_end = .;
- _cbmem_init_hooks = .;
- KEEP(*(.rodata.cbmem_init_hooks));
- _ecbmem_init_hooks = .;
-
- *(.rodata)
- *(.rodata.*)
- /* kevinh/Ispiri - Added an align, because the objcopy tool
- * incorrectly converts sections that are not long word aligned.
- */
- . = ALIGN(8);
-
- _erodata = .;
-}
-
-.data : {
- /* Move to different cache line to avoid false sharing with .rodata. */
- . = ALIGN(64); /* May not be actual line size, not that important. */
- _data = .;
- *(.data)
- *(.data.*)
- _edata = .;
-}
-
-.bss . : {
- _bss = .;
- *(.bss)
- *(.bss.*)
- *(.sbss)
- *(.sbss.*)
- _ebss = .;
-}
-
-.heap . : {
- _heap = .;
- /* Reserve CONFIG_HEAP_SIZE bytes for the heap */
- . += CONFIG_HEAP_SIZE ;
- . = ALIGN(4);
- _eheap = .;
- _eramstage = .;
- _eprogram = .;
-}
-
-/* Discard the sections we don't need/want */
-
-/DISCARD/ : {
- *(.comment)
- *(.note)
- *(.note.*)
-}
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