[coreboot-gerrit] Patch set updated for coreboot: x86: provide minimum alignment for romstage

Aaron Durbin (adurbin@chromium.org) gerrit at coreboot.org
Tue Sep 8 22:34:00 CET 2015


Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11588

-gerrit

commit f9fe848c5e7a466b2b29490c2baae1cb062aa8f7
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Mon Sep 7 23:05:28 2015 -0500

    x86: provide minimum alignment for romstage
    
    The current way the XIP address of romstage is calculated is by
    doing a 'cbfstool locate' using a bin file of romstage linked
    at address 0. That address is then used for re-linking romstage at
    the address spit out by cbfstool. Currently, the linker actually
    sets minimum alignment on the text sections as 32 bytes, but it
    doesn't actually honor that value. Instead, provide a minimum
    alignment for romstage so as not to fight the linker.
    
    BUG=chrome-os-partner:44827
    BRANCH=None
    TEST=Built asus/kfsn4-dre. Confirmed ROMSTAGE_BASE == gdtptr.
    
    Change-Id: Id6ec65d257df9ede78c720b0d7d4b56acfbb3f15
    Signed-off-by: Aaron Durbin <adubin at chromium.org>
---
 src/arch/x86/Makefile.inc | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index fe974ef..10a94c3 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -207,9 +207,15 @@ $(objgenerated)/romstage.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xi
 	sed -e '/^ROMSTAGE_BASE/d' $(objgenerated)/romstage_null.ld >> $@.tmp
 	mv $@.tmp $@
 
+# Use a '-a 64' option to cbfstool locate to provide a minimum alignment
+# requirement for the overall romstage. While the first object within
+# romstage could have a 4 byte minimum alignment that doesn't mean the linker
+# won't decide the entire section should be aligned to a larger value. In the
+# future cbfstool should add XIP files proper and honor the alignment
+# requirements of the program segment.
 $(objcbfs)/base_xip.txt: $(obj)/coreboot.pre1 $(objcbfs)/romstage_null.bin
 	rm -f $@
-	$(CBFSTOOL) $(obj)/coreboot.pre1 locate -T -f $(objcbfs)/romstage_null.bin -n $(CONFIG_CBFS_PREFIX)/romstage -P $(CONFIG_XIP_ROM_SIZE) > $@.tmp \
+	$(CBFSTOOL) $(obj)/coreboot.pre1 locate -T -f $(objcbfs)/romstage_null.bin -n $(CONFIG_CBFS_PREFIX)/romstage -P $(CONFIG_XIP_ROM_SIZE) -a 64 > $@.tmp \
 	 || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; }
 	mv $@.tmp $@
 



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