[coreboot-gerrit] Patch set updated for coreboot: linking: link bootblock.elf with .data and .bss sections again
Aaron Durbin (adurbin@chromium.org)
gerrit at coreboot.org
Tue Sep 22 15:11:37 CET 2015
Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11680
-gerrit
commit 8eecebdc51101100b6a090f65ea9065cdacd672e
Author: Aaron Durbin <adurbin at chromium.org>
Date: Thu Sep 17 17:02:53 2015 -0500
linking: link bootblock.elf with .data and .bss sections again
Currently coreboot expects the loader to clear the bss section
for all stages. i.e. stages don't clear their own bss. On ARM
SoCs the BootROM would be responsible for this. To do that
one needs to include the bss section data (all zeros) in the
bootblock.bin file. This was previously being attempted by
keeping the .bss info in the .data section because objcopy
happened zero out non-file allocated data section data.
Instead go back to linking bootblock with the bss section
but mark the bss section as loadable allocatable data. That
way it will be included in the binary properly when objcopy
-O binary is emplyed. Also do the same for the data section
in the case of no non-zero object values are in the data
section.
Without this change the trick of including .bss in .data
was not working when there wasn't a non-zero value object
in the data section.
BUG=None
BRANCH=None
TEST=Built emulation/qemu-armv7 and noted bootblock.bin contains
the cleared bss.
Change-Id: I94bd404c2c4a8b9332393e6224e98940a9cad4a2
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
Makefile.inc | 17 +++++++++++++----
src/lib/program.ld | 7 -------
src/soc/broadcom/cygnus/Makefile.inc | 6 +-----
src/soc/imgtec/pistachio/Makefile.inc | 8 +-------
src/soc/marvell/bg4cd/Makefile.inc | 3 ---
src/soc/nvidia/tegra124/Makefile.inc | 3 ---
src/soc/nvidia/tegra132/Makefile.inc | 3 ---
src/soc/qualcomm/ipq806x/Makefile.inc | 8 +-------
src/soc/rockchip/rk3288/Makefile.inc | 3 ---
src/soc/samsung/exynos5250/Makefile.inc | 3 ---
src/soc/samsung/exynos5420/Makefile.inc | 3 ---
11 files changed, 16 insertions(+), 48 deletions(-)
diff --git a/Makefile.inc b/Makefile.inc
index 81c149d..ac6ce0b 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -531,10 +531,19 @@ find-substr = $(word 1,$(subst _, ,$(1)))
# and remove .x the next time and finally return romstage
find-class = $(if $(filter $(1),$(basename $(1))),$(if $(CC_$(1)), $(1), $(call find-substr,$(1))),$(call find-class,$(basename $(1))))
-$(objcbfs)/%.bin: $(objcbfs)/%.elf
- $(eval class := $(call find-class,$(@F)))
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
- $(OBJCOPY_$(class)) -O binary $< $@
+# Bootblocks are not CBFS stages. coreboot is currently expecting the bss to
+# be cleared by the loader of the stage. For ARM SoCs that means one needs to
+# include the bss section in the binary so the BootROM clears the bss on
+# loading of the bootblock stage. Achieve this by marking the bss section
+# loadable,allocatable, and data. Do the same for the .data section in case
+# it's marked as NOBITS.
+$(objcbfs)/bootblock.raw.bin: $(objcbfs)/bootblock.elf
+ @printf " OBJCOPY $(notdir $(@))\n"
+ $(OBJCOPY_bootblock) --set-section-flags .bss=load,alloc,data --set-section-flags .data=load,alloc,data $< $<.tmp
+ $(OBJCOPY_bootblock) -O binary $<.tmp $@
+
+$(objcbfs)/%.bin: $(objcbfs)/%.raw.bin
+ cp $< $@
$(objcbfs)/%.elf: $(objcbfs)/%.debug
$(eval class := $(call find-class,$(@F)))
diff --git a/src/lib/program.ld b/src/lib/program.ld
index c8ce5ee..ab36239 100644
--- a/src/lib/program.ld
+++ b/src/lib/program.ld
@@ -111,14 +111,7 @@
#endif
#if ARCH_STAGE_HAS_BSS_SECTION
-#if ENV_BOOTBLOCK
-/* Bootblocks are not CBFS stages, so they cannot communicate the amount of
- * (memsz - filesz) bytes the loader needs to clear for them. Therefore we merge
- * the BSS into the .data section so those zeroes get loaded explicitly. */
-.data . : {
-#else
.bss . : {
-#endif
. = ALIGN(ARCH_POINTER_ALIGN_SIZE);
_bss = .;
*(.bss)
diff --git a/src/soc/broadcom/cygnus/Makefile.inc b/src/soc/broadcom/cygnus/Makefile.inc
index ff231f7..8bad15f 100644
--- a/src/soc/broadcom/cygnus/Makefile.inc
+++ b/src/soc/broadcom/cygnus/Makefile.inc
@@ -62,10 +62,6 @@ ramstage-y += usb.c
CPPFLAGS_common += -Isrc/soc/broadcom/cygnus/include/
-$(objcbfs)/bootblock.tmp: $(objcbfs)/bootblock.elf
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
- $(OBJCOPY_bootblock) -O binary $< $@
-
ifneq ($(V),1)
redirect := > /dev/null
endif
@@ -96,7 +92,7 @@ endif
# SLEEP 1
# DEEP_SLEEP 2
# EXCEPTION 4
-$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.tmp \
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin \
$(objutil)/broadcom/secimage/secimage \
util/broadcom/unauth.cfg \
util/broadcom/khmacsha256
diff --git a/src/soc/imgtec/pistachio/Makefile.inc b/src/soc/imgtec/pistachio/Makefile.inc
index df9fbcf..7f06db5 100644
--- a/src/soc/imgtec/pistachio/Makefile.inc
+++ b/src/soc/imgtec/pistachio/Makefile.inc
@@ -46,14 +46,8 @@ romstage-y += monotonic_timer.c
CPPFLAGS_common += -Isrc/soc/imgtec/pistachio/include/
-# Generate the actual coreboot bootblock code
-$(objcbfs)/bootblock.raw: $(objcbfs)/bootblock.elf
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
- $(OBJCOPY_bootblock) -O binary $< $@.tmp
- @mv $@.tmp $@
-
# Create a complete bootblock which will start up the system
-$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw $(BIMGTOOL)
+$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin $(BIMGTOOL)
@printf " BIMGTOOL $(subst $(obj)/,,$(@))\n"
$(BIMGTOOL) $< $@ $(call loadaddr,bootblock)
diff --git a/src/soc/marvell/bg4cd/Makefile.inc b/src/soc/marvell/bg4cd/Makefile.inc
index 1a801c0..ded1917 100644
--- a/src/soc/marvell/bg4cd/Makefile.inc
+++ b/src/soc/marvell/bg4cd/Makefile.inc
@@ -45,9 +45,6 @@ ramstage-$(CONFIG_SPI_FLASH) += spi.c
CPPFLAGS_common += -Isrc/soc/marvell/bg4cd/include/
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
@mkdir -p $(dir $@)
diff --git a/src/soc/nvidia/tegra124/Makefile.inc b/src/soc/nvidia/tegra124/Makefile.inc
index 46ce59d..38ba4f6 100644
--- a/src/soc/nvidia/tegra124/Makefile.inc
+++ b/src/soc/nvidia/tegra124/Makefile.inc
@@ -84,9 +84,6 @@ CPPFLAGS_common += -Isrc/soc/nvidia/tegra124/include/
# package up the image pull in bootblock.bin, it will be this wrapped version
# instead of the raw bootblock.
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE)
@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
$(CBOOTIMAGE) -gbct --soc tegra124 $< $@
diff --git a/src/soc/nvidia/tegra132/Makefile.inc b/src/soc/nvidia/tegra132/Makefile.inc
index c192055..bdd8074 100644
--- a/src/soc/nvidia/tegra132/Makefile.inc
+++ b/src/soc/nvidia/tegra132/Makefile.inc
@@ -121,9 +121,6 @@ CBOOTIMAGE_OPTS = --soc tegra132
# package up the image pull in bootblock.bin, it will be this wrapped version
# instead of the raw bootblock.
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(obj)/generated/bct.bin: $(obj)/generated/bct.cfg $(CBOOTIMAGE)
@printf " CBOOTIMAGE $(subst $(obj)/,,$(@))\n"
$(CBOOTIMAGE) -gbct $(CBOOTIMAGE_OPTS) $< $@
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index 84eae0b..83b5e06 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -56,14 +56,8 @@ ramstage-y += tz_wrapper.S
ifeq ($(CONFIG_USE_BLOBS),y)
-# Generate the actual coreboot bootblock code
-$(objcbfs)/bootblock.raw: $(objcbfs)/bootblock.elf
- @printf " OBJCOPY $(subst $(obj)/,,$(@))\n"
- $(OBJCOPY_bootblock) -O binary $< $@.tmp
- @mv $@.tmp $@
-
# Add MBN header to allow SBL3 to start coreboot bootblock
-$(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw
+$(objcbfs)/bootblock.mbn: $(objcbfs)/bootblock.raw.bin
@printf " ADD MBN $(subst $(obj)/,,$(@))\n"
./util/ipqheader/ipqheader.py $(call loadaddr,bootblock) $< $@.tmp
@mv $@.tmp $@
diff --git a/src/soc/rockchip/rk3288/Makefile.inc b/src/soc/rockchip/rk3288/Makefile.inc
index cd523b0..830ae1e 100644
--- a/src/soc/rockchip/rk3288/Makefile.inc
+++ b/src/soc/rockchip/rk3288/Makefile.inc
@@ -75,9 +75,6 @@ ramstage-$(CONFIG_DRIVERS_UART) += uart.c
CPPFLAGS_common += -Isrc/soc/rockchip/rk3288/include/
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf "Generating: $(subst $(obj)/,,$(@))\n"
@mkdir -p $(dir $@)
diff --git a/src/soc/samsung/exynos5250/Makefile.inc b/src/soc/samsung/exynos5250/Makefile.inc
index 9f49134..2731f17 100644
--- a/src/soc/samsung/exynos5250/Makefile.inc
+++ b/src/soc/samsung/exynos5250/Makefile.inc
@@ -46,9 +46,6 @@ ramstage-y += cbmem.c
CPPFLAGS_common += -Isrc/soc/samsung/exynos5250/include/
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
util/exynos/fixed_cksum.py $< $<.cksum 32768
diff --git a/src/soc/samsung/exynos5420/Makefile.inc b/src/soc/samsung/exynos5420/Makefile.inc
index 753e6d0..498e8d1 100644
--- a/src/soc/samsung/exynos5420/Makefile.inc
+++ b/src/soc/samsung/exynos5420/Makefile.inc
@@ -48,9 +48,6 @@ rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c
CPPFLAGS_common += -Isrc/soc/samsung/exynos5420/include/
-$(objcbfs)/bootblock.raw.elf: $(objcbfs)/bootblock.elf
- cp $< $@
-
$(objcbfs)/bootblock.bin: $(objcbfs)/bootblock.raw.bin
@printf " BL1, CKSUM $(subst $(obj)/,,$(@))\n"
util/exynos/variable_cksum.py $< $<.cksum
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