[coreboot-gerrit] Patch merged into coreboot/master: intel/skylake: unconditionally set SPI controller BAR

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 50c3ba24d4969aa33454325abe1a4a25ef4bcc94
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Dec 16 17:11:27 2015 -0600

    intel/skylake: unconditionally set SPI controller BAR
    
    The setting of the SPI controller BAR was conditional
    on the nominal frequency being set. Therefore, that doesn't
    mean the SPI BAR is set on all boots. Move the setting of
    the BAR in the southbridge_bootblock_init() which is called
    prioer to cpu_bootblock_init().
    
    BUG=chrome-os-partner:44827
    BRANCH=None
    TEST=Confirmed spibar is always set on glados.
    
    Change-Id: Ia58447d70f5e39a4336d4d08593f143332de833a
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: 56fff7c25c2eb0ccd90e08f71c064b83c66640f8
    Original-Change-Id: I1e0cff783f4b072b80589a3a84703a262b86be3a
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/319461
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://review.coreboot.org/13587
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See https://review.coreboot.org/13587 for details.

-gerrit