[coreboot-gerrit] Patch set updated for coreboot: drivers/intel/fsp1_1: Make fsp_run_silicon_init public

Leroy P Leahy (leroy.p.leahy@intel.com) gerrit at coreboot.org
Mon Feb 8 18:17:13 CET 2016


Leroy P Leahy (leroy.p.leahy at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13630

-gerrit

commit 40a6e794bdd38caf44c0ee5953ea3d3786155bcd
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Mon Feb 8 08:37:53 2016 -0800

    drivers/intel/fsp1_1: Make fsp_run_silicon_init public
    
    Remove the "static" declaration from fsp_run_silicon_init and declare
    the routine in ramstage.h.  This routine can be called directly when FSP
    is already in RAM.
    
    TEST=Build and run on Galileo
    
    Change-Id: Iddb32d00c5d4447eab5c95b0ad5c40309afa293e
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
---
 src/drivers/intel/fsp1_1/include/fsp/ramstage.h | 1 +
 src/drivers/intel/fsp1_1/ramstage.c             | 8 +++-----
 2 files changed, 4 insertions(+), 5 deletions(-)

diff --git a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
index 9729a5a..5ce6aa8 100644
--- a/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
+++ b/src/drivers/intel/fsp1_1/include/fsp/ramstage.h
@@ -23,6 +23,7 @@
 
 /* Perform Intel silicon init. */
 void intel_silicon_init(void);
+void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup);
 /* Called after the silicon init code has run. */
 void soc_after_silicon_init(void);
 /* Initialize UPD data before SiliconInit call. */
diff --git a/src/drivers/intel/fsp1_1/ramstage.c b/src/drivers/intel/fsp1_1/ramstage.c
index 20ec323..277b609 100644
--- a/src/drivers/intel/fsp1_1/ramstage.c
+++ b/src/drivers/intel/fsp1_1/ramstage.c
@@ -89,9 +89,8 @@ static void display_hob_info(FSP_INFO_HEADER *fsp_info_header)
 		       "ERROR - Missing one or more required FSP HOBs!\n");
 }
 
-static void fsp_run_silicon_init(int is_s3_wakeup)
+void fsp_run_silicon_init(FSP_INFO_HEADER *fsp_info_header, int is_s3_wakeup)
 {
-	FSP_INFO_HEADER *fsp_info_header;
 	FSP_SILICON_INIT fsp_silicon_init;
 	SILICON_INIT_UPD *original_params;
 	SILICON_INIT_UPD silicon_init_params;
@@ -99,8 +98,7 @@ static void fsp_run_silicon_init(int is_s3_wakeup)
 	UPD_DATA_REGION *upd_ptr;
 	VPD_DATA_REGION *vpd_ptr;
 
-	/* Find the FSP image */
-	fsp_info_header = fsp_get_fih();
+	/* Display the FSP header */
 	if (fsp_info_header == NULL) {
 		printk(BIOS_ERR, "FSP_INFO_HEADER not set!\n");
 		return;
@@ -191,7 +189,7 @@ void intel_silicon_init(void)
 	/* FSP_INFO_HEADER is set as the program entry. */
 	fsp_update_fih(prog_entry(&fsp));
 
-	fsp_run_silicon_init(is_s3_wakeup);
+	fsp_run_silicon_init(fsp_get_fih(), is_s3_wakeup);
 }
 
 /* Initialize the UPD parameters for SiliconInit */



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