[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/quark: Enable ESRAM
gerrit at coreboot.org
gerrit at coreboot.org
Mon Feb 8 20:15:09 CET 2016
the following patch was just integrated into master:
commit 9fd0895cb4a8cf8d4ece09d62628b6d4b91177ae
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date: Tue Feb 2 07:17:06 2016 -0800
soc/intel/quark: Enable ESRAM
The Quark SoC uses ESRAM instead of cache-as-RAM. This code requires
that utils/xcompile/xcompile change the machine architecture from i686
to i586 to ensure that the Quark does not attempt to execute unsupported
instructions:
* Adjust Makefile.inc to add the RMU to the coreboot image
* Add code to enable the ESRAM
Directly use the QuarkSocPkg/QuarkNorthCluster/Include/QuarkNcSocId.h
file from the EDK2 tree (https://github.com/tianocore/edk2.git) to
enable
easy differences and correct issues in coreboot that were found in EDK2.
Testing on Galileo:
* Edit the src/mainboard/intel/galileo/Makefile.inc file
* Add "select ADD_RMU_FILE"
* Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
* Remove power from the board
* Apply power to the board
* Testing is successful if the SD LED is on indicating that the end of
esram_init.inc was reached
Change-Id: I91d919da144bb72a5d4c4a8050ffab256632a395
Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
Reviewed-on: https://review.coreboot.org/13440
Tested-by: build bot (Jenkins)
Reviewed-by: FEI WANG <wangfei.jimei at gmail.com>
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
See https://review.coreboot.org/13440 for details.
-gerrit
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