[coreboot-gerrit] Patch merged into coreboot/master: skylake: Check for power failure when WAK_STS is not set

gerrit at coreboot.org gerrit at coreboot.org
Mon Feb 15 08:06:58 CET 2016


the following patch was just integrated into master:
commit 5f0cd58e0e32c930011865224792ae83aff3d406
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Tue Feb 9 09:21:41 2016 -0800

    skylake: Check for power failure when WAK_STS is not set
    
    The PCH does not set PM1_STS[WAK_STS] bit when waking from a
    G3 state, which is triggered by hibernate now on chell when we
    do a PMIC shutdown.  This means the checks for S5 wake are not
    done and instead it is logged as a wake from S0.
    
    BUG=chrome-os-partner:50076
    BRANCH=glados
    TEST=pass firmware_EventLog test on chell
    
    Change-Id: I3ca05a4824df3401150a63d4b6555f759de40087
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: de6c9bac447edd06568193f990f1f4e278576783
    Original-Change-Id: I4472498468d620fe69f2b68710e818a4ad287382
    Original-Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/326888
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://review.coreboot.org/13696
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>


See https://review.coreboot.org/13696 for details.

-gerrit



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