[coreboot-gerrit] Patch set updated for coreboot: arch/x86: Add option to disable default mmap_boot implementation

[Andrey Petrov (andrey.petrov@intel.com)]

Andrey Petrov (andrey.petrov at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13319

-gerrit

commit 0db56c521f62138e2246b557f30bdcd824bc5b04
Author: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
Date:   Tue Oct 27 10:27:30 2015 -0700

    arch/x86: Add option to disable default mmap_boot implementation
    
    On certain platforms, the boot media is either not memory-mapped, or
    not mapped at the stop of 4G. This makes the default mmap_boot
    implementation unsuitable. Add an option to allow such platforms to
    define their own mapping implementation.
    
    Change-Id: I8293126fd9cc1fd3d75072f7811e659765348e4a
    Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc at intel.com>
---
 src/arch/x86/Kconfig      | 10 ++++++++++
 src/arch/x86/Makefile.inc |  8 ++++----
 2 files changed, 14 insertions(+), 4 deletions(-)

diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 204a9be..89e142a 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -83,6 +83,16 @@ config RAMBASE
 	hex
 	default 0x100000
 
+# Traditionally BIOS region on SPI flash boot media was memory mapped right below
+# 4G and it was the last region in the IFD. This way translation between CPU
+# address space to flash address was trivial. However some IFDs on newer SoCs
+# have BIOS region sandwiched between descriptor and other regions. Turning off
+# this option enables soc code to provide custom mmap_boot.c which can be used to
+# implement complex translation.
+config X86_TOP4G_BOOTMEDIA_MAP
+	bool
+	default y
+
 # This is something you almost certainly don't want to mess with.
 # How many SIPIs do we send when starting up APs and cores?
 # The answer in 2000 or so was '2'. Nowadays, on many systems,
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 21084d3..56e2ad0 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -105,7 +105,7 @@ ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32)$(CONFIG_ARCH_BOOTBLOCK_X86_64),y)
 bootblock-y += boot.c
 bootblock-y += memcpy.c
 bootblock-y += memset.c
-bootblock-y += mmap_boot.c
+bootblock-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 
 bootblock-y += id.S
 $(call src-to-obj,bootblock,$(dir)/id.S): $(obj)/build.h
@@ -354,7 +354,7 @@ romstage-$(CONFIG_ARCH_RAMSTAGE_X86_32) += cpu_common.c
 romstage-y += memset.c
 romstage-y += memcpy.c
 romstage-y += memmove.c
-romstage-y += mmap_boot.c
+romstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 
 romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
 
@@ -384,7 +384,7 @@ ramstage-y += memset.c
 ramstage-y += memcpy.c
 ramstage-y += memmove.c
 ramstage-y += ebda.c
-ramstage-y += mmap_boot.c
+ramstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c
 ramstage-$(CONFIG_COOP_MULTITASKING) += thread_switch.S
 ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
@@ -392,7 +392,7 @@ ramstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
 smm-y += memset.c
 smm-y += memcpy.c
 smm-y += memmove.c
-smm-y += mmap_boot.c
+smm-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
 
 ifeq ($(CONFIG_ARCH_RAMSTAGE_X86_32),y)
 rmodules_x86_32-y += memset.c