[coreboot-gerrit] New patch to review for coreboot: urara: Increase bootblock size
Julius Werner (jwerner@chromium.org)
gerrit at coreboot.org
Thu Feb 18 22:13:02 CET 2016
Julius Werner (jwerner at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13733
-gerrit
commit 85d4c63d473bf84bc6dd9d25b495f71f24ea5f19
Author: Julius Werner <jwerner at chromium.org>
Date: Thu Feb 18 12:56:26 2016 -0800
urara: Increase bootblock size
The urara bootblock is less than a kilobyte from its limit (20K).
There's more than enough space available so increase it to avoid
impeding changes to core code.
Change-Id: I2e535b56d5d1748830ea1e70fd12fd9e87009bce
Signed-off-by: Julius Werner <jwerner at chromium.org>
---
src/soc/imgtec/pistachio/include/soc/memlayout.ld | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/imgtec/pistachio/include/soc/memlayout.ld b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
index a9800a5..8771f6b 100644
--- a/src/soc/imgtec/pistachio/include/soc/memlayout.ld
+++ b/src/soc/imgtec/pistachio/include/soc/memlayout.ld
@@ -45,7 +45,7 @@ SECTIONS
* This is identical to SRAM above, and thus also limited 64K and
* needs to avoid conflicts with items set up above.
*/
- BOOTBLOCK(0x9a000000, 20K)
+ BOOTBLOCK(0x9a000000, 32K)
/*
* Let's use SRAM for stack and CBMEM console. Always accessed
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