[coreboot-gerrit] Patch set updated for coreboot: amdfwtool: Postpone the usage of PSP combo directory
Zheng Bao (zheng.bao@amd.com)
gerrit at coreboot.org
Fri Feb 19 07:07:35 CET 2016
Zheng Bao (zheng.bao at amd.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13739
-gerrit
commit 661c518f17a6146ab8bf6fe6044601cfd9f58e15
Author: zbao <fishbaozi at gmail.com>
Date: Fri Feb 19 13:47:31 2016 +0800
amdfwtool: Postpone the usage of PSP combo directory
If we only need to "combo" two PSP directories into one image,
we can put first address in romsig 0x10 and second one in
romsig 0x14.
If we really need to put three, the 0x14 is the combo directory
which points to multiple level-2 PSP directories.
I guess that two PSP can also use combo directory, with only
one level-2 directory. But nobody seems to do that.
Change-Id: Ic450a846bc04db90a75cd417b6d7104fe2a5b177
Signed-off-by: Zheng Bao <fishbaozi at gmail.com>
---
util/amdfwtool/amdfwtool.c | 21 ++++++++++++++++++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c
index 92a53fc..385bd1c 100644
--- a/util/amdfwtool/amdfwtool.c
+++ b/util/amdfwtool/amdfwtool.c
@@ -15,11 +15,12 @@
/*
* ROMSIG At ROMBASE + 0x20000:
+ * 0 4 8 C
* +------------+---------------+----------------+------------+
* | 0x55AA55AA |EC ROM Address |GEC ROM Address |USB3 ROM |
* +------------+---------------+----------------+------------+
- * | PSPDIR ADDR|PSP2DIR ADDR |
- * +------------+---------------+
+ * | PSPDIR ADDR|PSPDIR ADDR |<-- Field 0x14 could be either
+ * +------------+---------------+ 2nd PSP directory or PSP COMBO directory
* EC ROM should be 64K aligned.
*
* PSP directory (Where "PSPDIR ADDR" points)
@@ -41,7 +42,7 @@
* | |
* +------------+---------------+----------------+------------+
*
- * PSP2 directory
+ * PSP Combo directory
* +------------+---------------+----------------+------------+
* | 'PSP2' | Fletcher | Count |Look up mode|
* +------------+---------------+----------------+------------+
@@ -81,6 +82,13 @@
kinds of APU.
*/
#define PSP2 1
+#if PSP2
+/* Use PSP combo directory or not.
+ * Currently we dont have to squeeze 3 PSP directories into 1 image. So
+ * we skip the combo directory.
+ */
+ #define PSP_COMBO 0
+#endif
typedef unsigned int uint32_t;
typedef unsigned char uint8_t;
@@ -534,6 +542,7 @@ int main(int argc, char **argv)
amd_romsig[5] = current + ROM_BASE_ADDRESS;
current += 0x100; /* Add conservative size of psp2dir. */
+ #if PSP_COMBO
/* TODO: remove the hardcode. */
psp2count = 1; /* Start from 1. */
/* for (; psp2count <= PSP2COUNT; psp2count++, current=ALIGN(current, 0x100)) { */
@@ -555,6 +564,12 @@ int main(int argc, char **argv)
psp2dir[2] = psp2count; /* Count */
psp2dir[3] = 0; /* 0-Dynamic look up through all entries, 1-PSP/chip ID match */
psp2dir[1] = fletcher32((uint16_t *)&psp2dir[1], (psp2count*16 + 16)/2 - 2);
+ #else
+ for (count = 0; count < sizeof(amd_psp2_fw_table) / sizeof(amd_fw_entry); count ++) {
+ current = integerate_one_psp(rom, current, psp2dir, count);
+ }
+ fill_psp_head(psp2dir, count);
+ #endif
}
#endif
}
More information about the coreboot-gerrit
mailing list