[coreboot-gerrit] New patch to review for coreboot: soc/intel/apollolake: implement bootblock_soc_early_init()

[Aaron Durbin (adurbin@chromium.org)]

Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13793

-gerrit

commit 7c422a5993badaa504781fee320960890855f09f
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Feb 24 19:02:58 2016 -0600

    soc/intel/apollolake: implement bootblock_soc_early_init()
    
    Provide a bootblock_soc_early_init() to that takes care of
    initializing the UART on behalf of the mainboard when serial
    console is enabled.
    
    Change-Id: I2d3875110b6f58a9e0b4c113084b85817aa05a87
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/apollolake/bootblock/bootblock.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/soc/intel/apollolake/bootblock/bootblock.c b/src/soc/intel/apollolake/bootblock/bootblock.c
index 5007613..4ea3f70 100644
--- a/src/soc/intel/apollolake/bootblock/bootblock.c
+++ b/src/soc/intel/apollolake/bootblock/bootblock.c
@@ -17,6 +17,7 @@
 #include <soc/cpu.h>
 #include <soc/northbridge.h>
 #include <soc/pci_devs.h>
+#include <soc/uart.h>
 
 void asmlinkage bootblock_c_entry(void)
 {
@@ -42,3 +43,10 @@ void platform_prog_run(struct prog *prog)
 	msr.lo |= (1 << 8);
 	wrmsr(MSR_POWER_MISC, msr);
 }
+
+void bootblock_soc_early_init(void)
+{
+	/* Prepare UART for serial console. */
+	if (IS_ENABLED(CONFIG_SOC_UART_DEBUG))
+		soc_console_uart_init();
+}