[coreboot-gerrit] Patch set updated for coreboot: northbridge/intel/i3100: Unify UDELAY selection

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13786

-gerrit

commit 91ce368ad685cd41ee6d8ba4891c293121428c8f
Author: Stefan Reinauer <stefan.reinauer at coreboot.org>
Date:   Wed Feb 24 14:01:59 2016 -0800

    northbridge/intel/i3100: Unify UDELAY selection
    
    Instead of manually including udelay_io.c in each romstage,
    select UDELAY_IO for all i3100 boards in the chipset.
    
    Change-Id: Ia66a0561c75777a9e98bb87117859808a2ff3732
    Signed-off-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
---
 src/mainboard/intel/truxton/Kconfig           | 1 -
 src/mainboard/intel/truxton/romstage.c        | 1 -
 src/northbridge/intel/i3100/Kconfig           | 1 +
 src/northbridge/intel/i3100/raminit_ep80579.c | 1 +
 4 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/intel/truxton/Kconfig b/src/mainboard/intel/truxton/Kconfig
index 11058e6..cd8e478 100644
--- a/src/mainboard/intel/truxton/Kconfig
+++ b/src/mainboard/intel/truxton/Kconfig
@@ -10,7 +10,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_HARD_RESET
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
-	select UDELAY_TSC
 	select BOARD_ROMSIZE_KB_2048
 
 config MAINBOARD_DIR
diff --git a/src/mainboard/intel/truxton/romstage.c b/src/mainboard/intel/truxton/romstage.c
index c637d24..3ea6542 100644
--- a/src/mainboard/intel/truxton/romstage.c
+++ b/src/mainboard/intel/truxton/romstage.c
@@ -21,7 +21,6 @@
 #include <device/pnp_def.h>
 #include <cpu/x86/lapic.h>
 #include <pc80/mc146818rtc.h>
-#include "drivers/pc80/udelay_io.c"
 #include <console/console.h>
 #include "southbridge/intel/i3100/early_smbus.c"
 #include "southbridge/intel/i3100/early_lpc.c"
diff --git a/src/northbridge/intel/i3100/Kconfig b/src/northbridge/intel/i3100/Kconfig
index cb0bd38..2260664 100644
--- a/src/northbridge/intel/i3100/Kconfig
+++ b/src/northbridge/intel/i3100/Kconfig
@@ -1,6 +1,7 @@
 config NORTHBRIDGE_INTEL_I3100
 	bool
 	select LATE_CBMEM_INIT
+	select UDELAY_IO
 
 if NORTHBRIDGE_INTEL_I3100
 config DIMM_MAP_LOGICAL
diff --git a/src/northbridge/intel/i3100/raminit_ep80579.c b/src/northbridge/intel/i3100/raminit_ep80579.c
index 7996e11..497339c 100644
--- a/src/northbridge/intel/i3100/raminit_ep80579.c
+++ b/src/northbridge/intel/i3100/raminit_ep80579.c
@@ -19,6 +19,7 @@
 #include <cpu/x86/cache.h>
 #include <cpu/intel/speedstep.h>
 #include <lib.h>
+#include <delay.h>
 #include "raminit_ep80579.h"
 #include "ep80579.h"