[coreboot-gerrit] New patch to review for coreboot: nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic

[Patrick Rudolph (siro@das-labor.org)]

Patrick Rudolph (siro at das-labor.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13853

-gerrit

commit a17f30e3264bc9b2b5a75bf94ce11250bd32e0d3
Author: Patrick Rudolph <siro at das-labor.org>
Date:   Sun Feb 28 16:14:45 2016 +0100

    nb/intel/sandybridge/raminit: Make discover_timC_write non cyclic
    
    The code can't handle cyclic zero runs. Make sure it will never
    wrap around by setting the top-most bit to constant one.
    
    Fixes "Mini channel test failed (2)".
    
    Test system:
     * Gigabyte GA-B75M-D3H
     * Intel Pentium CPU G2130
    
    Change-Id: I55e610d984d564bd4675f9318dead6d6c1e288a3
    Signed-off-by: Patrick Rudolph <siro at das-labor.org>
---
 src/northbridge/intel/sandybridge/raminit.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 40089e2..603122c 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -3422,9 +3422,12 @@ static void discover_timC_write(ramctr_timing * ctrl)
 					u32 raw_statistics[MAX_TIMC + 1];
 					int statistics[MAX_TIMC + 1];
 
+					/* Make sure rn.start < rn.end */
+					statistics[MAX_TIMC] = 1;
+
 					fill_pattern5(ctrl, channel, pat);
 					write32(DEFAULT_MCHBAR + 0x4288 + 0x400 * channel, 0x1f);
-					for (timC = 0; timC < MAX_TIMC + 1; timC++) {
+					for (timC = 0; timC < MAX_TIMC; timC++) {
 						FOR_ALL_LANES
 							ctrl->timings[channel][slotrank].lanes[lane].timC = timC;
 						program_timings(ctrl, channel);
@@ -3436,10 +3439,11 @@ static void discover_timC_write(ramctr_timing * ctrl)
 					}
 					FOR_ALL_LANES {
 						struct run rn;
-						for (timC = 0; timC <= MAX_TIMC; timC++)
+						for (timC = 0; timC < MAX_TIMC; timC++)
 							statistics[timC] =
 								!!(raw_statistics[timC] &
 								   (1 << lane));
+
 						rn = get_longest_zero_run(statistics,
 									  MAX_TIMC + 1);
 						if (rn.all)