[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/quark: Initialize some of the FADT base registers

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit a6de5470fa757f7e9c40d417e7f40551ccdba99c
Author: Lee Leahy <leroy.p.leahy at intel.com>
Date:   Sun Feb 21 16:04:53 2016 -0800

    soc/intel/quark: Initialize some of the FADT base registers
    
    Initialize the base addresses for:
    *  Power management control
    *  Power management status
    *  Reset
    *  Power management timer
    *  General-Purpose Event 0
    
    Testing on Galileo:
    *  Edit the src/mainboard/intel/galileo/Makefile.inc file:
       *  Add "select ADD_FSP_PDAT_FILE"
       *  Add "select ADD_FSP_RAW_BIN"
       *  Add "select ADD_RMU_FILE"
    *  Place the FSP.bin file in the location specified by CONFIG_FSP_FILE
    *  Place the pdat.bin files in the location specified by
    CONFIG_FSP_PDAT_FILE
    *  Place the rmu.bin file in the location specified by CONFIG_RMU_FILE
    *  Build EDK2 CorebootPayloadPkg/CorebootPayloadPkgIa32.dsc to generate
    UEFIPAYLOAD.fd
    *  Edit .config file and add the following lines:
       * CONFIG_PAYLOAD_ELF=y
       * CONFIG_PAYLOAD_FILE="path to UEFIPAYLOAD.fd"
    *  Testing successful when:
       *  Register address are properly displayed by the payload
       *  "reset -c" performs a reset and reboots the system
       *  "reset -w" performs a reset and reboots the system
       *  "reset -s" performs a reset and turns off the power
    
    Change-Id: I9d043f4906a067b2477650140210cfae4a7f8b79
    Signed-off-by: Lee Leahy <leroy.p.leahy at intel.com>
    Reviewed-on: https://review.coreboot.org/13764
    Tested-by: build bot (Jenkins)
    Reviewed-by: Martin Roth <martinroth at google.com>


See https://review.coreboot.org/13764 for details.

-gerrit