From P.Lister at sychron.com Tue Oct 1 00:09:01 2002 From: P.Lister at sychron.com (Peter Lister) Date: Tue Oct 1 00:09:01 2002 Subject: Is linuxbios GPL ? In-Reply-To: Your message of "Mon, 30 Sep 2002 13:40:19 BST." <200209301240.g8UCeQL03904@vulcan.rissington.net> Message-ID: > However, all that said, I'm not aware of any instance where the GPL has been > tested in court (or even "out of court" as they say) against a company > accused of taking GPL code and developing closed source products from it. Read "Enforcing The GPL" I and II at . Apparently the GPL has been tested out of court several times, and Moglen claims it has never been tested *in* court precisely because it is so watertight. GPL has the nicely recursive feature of being considerably less restrictive that the normal license agreements from which the rest of the software industry makes its money, so if anyone managed to get GPL challenged, all such licenses would be suspect. As the only group likely to be so motivated is precisely that same software industry, this won't be happening any time soon. :) From rminnich at lanl.gov Tue Oct 1 00:22:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 1 00:22:00 2002 Subject: nonsense C/H/S values for CF (used in ide) In-Reply-To: Message-ID: On Tue, 1 Oct 2002, Q-ha Park wrote: > hmm, you mean there's an additional patch to ide.c, which is already used to > build linuxBIOS, not in the source tree? no, it's a south bridge patch. see the southbridge code. Or wait until tomorrow when I get back :-) ron From rminnich at lanl.gov Tue Oct 1 00:23:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 1 00:23:00 2002 Subject: No IRQ Known for interrupt pin A of device 02:04.0. Please try using pci=biosirq In-Reply-To: <001701c268fb$9bf77100$dc01a8c0@notebook> Message-ID: just making sure, what version of linux are you running? ron From rminnich at lanl.gov Tue Oct 1 01:12:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 1 01:12:00 2002 Subject: =?us-ascii?Q?=3F=3F=2C=3F:_No_IRQ_Known_for_interrupt_pin_A_of_device_02:?= =?us-ascii?Q?04.0._Please_try_using_pci=3Dbiosirq?= In-Reply-To: <002e01c2690a$64840bc0$dc01a8c0@notebook> Message-ID: On Tue, 1 Oct 2002, David Xiong wrote: > RedHat 7.2 , the kernel is 2.4.7-10 distributed by RedHat. wow. That's an old one. I realize this may not fix the problem, but I would still recommend you move to 2.4.18 or 2.4.19. Much better. ron From xw at chinahost.com Tue Oct 1 01:12:35 2002 From: xw at chinahost.com (David Xiong) Date: Tue Oct 1 01:12:35 2002 Subject: =?us-ascii?Q?=3F=3F=2C=3F:_No_IRQ_Known_for_interrupt_pin_A_of_device_02:?= =?us-ascii?Q?04.0._Please_try_using_pci=3Dbiosirq?= In-Reply-To: Message-ID: <002e01c2690a$64840bc0$dc01a8c0@notebook> RedHat 7.2 , the kernel is 2.4.7-10 distributed by RedHat. David Xiong -----????----- ???: Ronald G Minnich [mailto:rminnich at lanl.gov] ????: 2002?10?1? 12:37 ???: David Xiong ??: steve at nexpath.com; linuxbios at clustermatic.org ??: RE: No IRQ Known for interrupt pin A of device 02:04.0. Please try using pci=biosirq just making sure, what version of linux are you running? ron From xw at chinahost.com Tue Oct 1 01:13:00 2002 From: xw at chinahost.com (David Xiong) Date: Tue Oct 1 01:13:00 2002 Subject: =?gb2312?B?tPC4tDogTm8gSVJRIEtub3duIGZvciBpbnRlcnJ1cHQgcGluIEEgbw==?= =?gb2312?B?ZiBkZXZpY2UgMDI6MDQuMC4gUGxlYXNlIHRyeXVzaW5nIHBjaT1iaW9zaXJx?= In-Reply-To: <1033444751.1136.63.camel@ollie> Message-ID: <002f01c2690a$a7b74330$dc01a8c0@notebook> The card has problem is not a VGA card. It's a 2-channle-video-capture-card. There is no problem with 1-channel-video-capture-card. David Xiong -----????----- ???: ollie lho [mailto:ollie at sis.com.tw] ????: 2002?10?1? 11:59 ???: David Xiong ??: Ronald G Minnich; steve at nexpath.com; linuxbios at clustermatic.org ??: RE: No IRQ Known for interrupt pin A of device 02:04.0. Please tryusing pci=biosirq On Tue, 2002-10-01 at 11:35, David Xiong wrote: > The mainboard is K7SEM and irq_tables.c is already in the source tree. > I run the program getpir and get an irq_tables.c file which is the same > as the one in the source tree. The program util/getpir reports 6 slot found, > whether I plug in the multimedia card or not, and produce exact the same irq_tables.c. > > And the option HAVE_PIRQ_TABLE=1 is set in the config file of the source tree. > > I traced into the kernel source and found that the original BIOS set IRQ when POST, > but linuxbios does not do so. The IRQ is 0 when start up with linuxbios. > When the driver of the multimedia card comes up, it find the card has not an IRQ. > Then the driver try to get one from the irq_table, but the PCI device is not in > the irq_table, so it can not find one or assign one to the device. > > What else can I do? Can I hard code one irq to the card? > The kernel pci-irq code refuse to setup IRQ for VGA devices. You have to set it up yourself. BTW, your card still need some init code in your VGA BIOS. Ollie From xw at chinahost.com Tue Oct 1 01:18:00 2002 From: xw at chinahost.com (David Xiong) Date: Tue Oct 1 01:18:00 2002 Subject: =?us-ascii?Q?=3F=3F=2C=3F:_=3F=3F=2C=3F:_No_IRQ_Known_for_interrupt_pin?= =?us-ascii?Q?_A_of_device_02:04.0._Please_try_using_pci=3Dbiosirq?= In-Reply-To: Message-ID: <003001c2690b$302987a0$dc01a8c0@notebook> Ok,I will try the new kernel. David Xiong -----????----- ???: Ronald G Minnich [mailto:rminnich at lanl.gov] ????: 2002?10?1? 13:25 ???: David Xiong ??: steve at nexpath.com; linuxbios at clustermatic.org ??: Re: ??,?: No IRQ Known for interrupt pin A of device 02:04.0. Please try using pci=biosirq On Tue, 1 Oct 2002, David Xiong wrote: > RedHat 7.2 , the kernel is 2.4.7-10 distributed by RedHat. wow. That's an old one. I realize this may not fix the problem, but I would still recommend you move to 2.4.18 or 2.4.19. Much better. ron From tejohnson at yahoo.com Wed Oct 2 08:11:00 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Wed Oct 2 08:11:00 2002 Subject: Config file generator Message-ID: <007901c26a0e$96dae710$021e1eac@areas3> Hi all, Is the config file generator on the linuxbios web site going to be updated with the latest working boards? At this moment, it doesn't seem to be working... Thanks in advance for your time! Regards, Todd E. Johnson tejohnson at yahoo.com From rminnich at lanl.gov Wed Oct 2 16:23:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 2 16:23:01 2002 Subject: Config file generator In-Reply-To: <007901c26a0e$96dae710$021e1eac@areas3> Message-ID: > Is the config file generator on the linuxbios web site going to be > updated with the latest working boards? At this moment, it doesn't seem > to be working... Thanks in advance for your time! we're having to redo that. There are over 50 boards now and it is proving unworkable to do things the way we were doing them ... ron From christopher at bergeron.com Wed Oct 2 18:08:00 2002 From: christopher at bergeron.com (Christopher Bergeron) Date: Wed Oct 2 18:08:00 2002 Subject: Config file generator In-Reply-To: References: Message-ID: <16820987559.20021002182202@bergeron.com> If you guys need a web programmer to help; i'd be glad to help you guys build a DB driven (mysql + php) config file page. -CB Wednesday, October 2, 2002, 4:37:04 PM, you wrote: >> Is the config file generator on the linuxbios web site going to be >> updated with the latest working boards? At this moment, it doesn't seem >> to be working... Thanks in advance for your time! RGM> we're having to redo that. There are over 50 boards now and it is proving RGM> unworkable to do things the way we were doing them ... RGM> ron RGM> _______________________________________________ RGM> Linuxbios mailing list RGM> Linuxbios at clustermatic.org RGM> http://www.clustermatic.org/mailman/listinfo/linuxbios From tejohnson at yahoo.com Wed Oct 2 19:39:00 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Wed Oct 2 19:39:00 2002 Subject: Images and ZIF DIP Message-ID: <00b201c26a6e$c4da8fc0$021e1eac@areas3> Hello, I found a ZIF Socket (that works form me when I remove the WOL header) at Digikey for $13.33. It is part number A443-ND (CONN IC SOCKET ZIF 32POS TIN). Here are a few quick pics of it on a PCChips M758LMR+ with the WOL header removed. http://www.groomlakelabs.com/grandamp/pictures/linuxbios/m758lmr.jpg http://www.groomlakelabs.com/grandamp/pictures/linuxbios/closeup.jpg Each image size is between 200 & 300k Regards, Todd E. Johnson tejohnson at yahoo.com From ollie at sis.com.tw Wed Oct 2 20:14:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 2 20:14:00 2002 Subject: Images and ZIF DIP In-Reply-To: <00b201c26a6e$c4da8fc0$021e1eac@areas3> References: <00b201c26a6e$c4da8fc0$021e1eac@areas3> Message-ID: <1033604933.1136.67.camel@ollie> On Thu, 2002-10-03 at 07:52, Todd E. Johnson wrote: > > Hello, > > > I found a ZIF Socket (that works form me when I remove the WOL header) > at Digikey for $13.33. It is part number A443-ND (CONN IC SOCKET ZIF > 32POS TIN). Here are a few quick pics of it on a PCChips M758LMR+ with > the WOL header removed. > > http://www.groomlakelabs.com/grandamp/pictures/linuxbios/m758lmr.jpg > http://www.groomlakelabs.com/grandamp/pictures/linuxbios/closeup.jpg > Are you working on a Car PC ?? Ollie From tejohnson at yahoo.com Wed Oct 2 20:32:00 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Wed Oct 2 20:32:00 2002 Subject: Images and ZIF DIP Message-ID: <00b501c26a76$2f770690$021e1eac@areas3> Hi Ollie, Why do you think I wanted to gauge how fast it would boot ;) ? Isn't research fun? Actually Hui-Fen helped me out with the SiS 900 NIC driver for a BioStar M5SAF. It was some issue with the PHY. It worked great, but alas, it is time to upgrade! Most people would perhaps consider me insane... See what working for the Government can do to a guy? This is a hobby to keep me sane... If you find it interesting, you may want to check out http://www.dashpc.com/ Regards, Todd E. Johnson tejohnson at yahoo.com > Are you working on a Car PC ?? > > Ollie > From rminnich at lanl.gov Wed Oct 2 23:45:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 2 23:45:00 2002 Subject: Walmart PC from MicroTel Message-ID: my very nice $600 non-Windows PC from Walmart is a deal. The chipset is SiS .... for P4 .... SDRAM .... Hey, Ollie, where is the port? ron From bari at onelabs.com Thu Oct 3 00:10:01 2002 From: bari at onelabs.com (Bari Ari) Date: Thu Oct 3 00:10:01 2002 Subject: Walmart PC from MicroTel References: Message-ID: <3D9BC6F4.8050004@onelabs.com> Ronald G Minnich wrote: >my very nice $600 non-Windows PC from Walmart is a deal. > >The chipset is SiS .... for P4 .... SDRAM .... Hey, Ollie, where is the >port? > > > And while you are checking on it....... how about a port for the SiS 650 + 961 since Microtel also uses this chipset in its laptops. Bari From ollie at sis.com.tw Thu Oct 3 00:20:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Thu Oct 3 00:20:01 2002 Subject: Walmart PC from MicroTel In-Reply-To: References: Message-ID: <1033619707.1132.75.camel@ollie> On Thu, 2002-10-03 at 11:58, Ronald G Minnich wrote: > > my very nice $600 non-Windows PC from Walmart is a deal. > > The chipset is SiS .... for P4 .... SDRAM .... Hey, Ollie, where is the > port? > send me lspci -vvv ;-) Ollie From Yves.Godin at lyrtech.com Thu Oct 3 07:52:01 2002 From: Yves.Godin at lyrtech.com (Yves Godin) Date: Thu Oct 3 07:52:01 2002 Subject: Low performance of the IDE on the SIS550 Message-ID: <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> Hi everyone, I have a board based on the SIS550 (Vortex86 @167 MHz) and I wantd to setup a NFS file server that is capable to sustain 10 MBytes/s. But the problem is that the IDE interface seems very slow in writing. I patch my kernel (2.4.19) with the patch for the 5513 and now the controller is recognise as a ATA-100a but when I try to put the controller un UDMA mode mode 5, I got a message from hdparm that told that it is not supported. Anyway, with the UDMA mode 2 I should have the performance that I need. I look on header of the ide connector and the burst when writing seems to be quick anough but between each of these bursts I have a hole of 5-6 seconds. I test the speed with theses commands: time dd if=/dev/zero of=zero bs=1k count=100k -> WRITING -> 30 sec time dd if=zero of=/dev/null bs=1k count=100k -> READING -> 10 sec I try all configuration possible (hdparm) for the harddisk and 3 MB/s is the best result that I got. In PIO mode 4, I only got a 1.5 MB/s ! I performed theses tests on different architecture and I got the following results: SC520 PIO (ISA) -> 1.63 MB/s SC1210 PIO -> 4.54 MB/s -> I was unable to enable the DMA ???? P133 ATA-33 -> 5.50 MB/s PII-266 ATA-33 -> 17.83 MB/s PII-400 ATA-33 -> 20.54 MB/s C3-667 ATA-100 -> 23.05 MB/s Does anyone have an idea why: 1. I cannot enable the UDMA mode 5 ? 2. I only got 3 MBytes/s in writing ? Thanks ! Yves From christopher at bergeron.com Thu Oct 3 10:32:01 2002 From: christopher at bergeron.com (Christopher Bergeron) Date: Thu Oct 3 10:32:01 2002 Subject: Walmart PC from MicroTel In-Reply-To: <1033619707.1132.75.camel@ollie> References: <1033619707.1132.75.camel@ollie> Message-ID: <15680029983.20021003104555@bergeron.com> Ollie, since I'm sure you get inundated with requests for all the different mobo types out there, maybe we can set up a webpage/db that will allow people to submit the lspci -vvv data along with the motherboard type and possibly a link to the motherboard on manufacturer's website? I may be working with Rob Minnich on a mysql db that would hold our data for the config file generator. If that's the case, I could put this page together rather easily. Then people could go to the page and if their motherboard has already been submitted, cast a new "vote" for it; and if it's not listed, they could submit a new request (with the above info [lspci -vvv; etc]). As such, you could prioritize the most popular/requested motherboards and do your magic accordingly. It's just a thought. I really want to help the project out as much as I can (I'm a web/php/mysql developer and not really a C/ASM coder). Your thoughts? -CB Thursday, October 3, 2002, 12:35:07 AM, you wrote: ol> On Thu, 2002-10-03 at 11:58, Ronald G Minnich wrote: >> >> my very nice $600 non-Windows PC from Walmart is a deal. >> >> The chipset is SiS .... for P4 .... SDRAM .... Hey, Ollie, where is the >> port? >> ol> send me lspci -vvv ;-) ol> Ollie ol> _______________________________________________ ol> Linuxbios mailing list ol> Linuxbios at clustermatic.org ol> http://www.clustermatic.org/mailman/listinfo/linuxbios From christopher at bergeron.com Thu Oct 3 10:41:01 2002 From: christopher at bergeron.com (Christopher Bergeron) Date: Thu Oct 3 10:41:01 2002 Subject: Low performance of the IDE on the SIS550 In-Reply-To: <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> References: <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> Message-ID: <6080280429.20021003105006@bergeron.com> Have you tried hdparm /dev/whateverX (or hdparm -t /dev/whateverX)? This will give you a more accurate result (IMHO) and it will allow you to set the DMA settings on the drive. -CB Thursday, October 3, 2002, 8:19:00 AM, you wrote: YG> Hi everyone, YG> I have a board based on the SIS550 (Vortex86 @167 MHz) and I wantd to YG> setup a NFS file server that is capable to sustain 10 MBytes/s. But the YG> problem is that the IDE interface seems very slow in writing. I patch my YG> kernel (2.4.19) with the patch for the 5513 and now the controller is YG> recognise as a ATA-100a but when I try to put the controller un UDMA mode YG> mode 5, I got a message from hdparm that told that it is not supported. YG> Anyway, with the UDMA mode 2 I should have the performance that I need. I YG> look on header of the ide connector and the burst when writing seems to be YG> quick anough but between each of these bursts I have a hole of 5-6 seconds. YG> I test the speed with theses commands: YG> time dd if=/dev/zero of=zero bs=1k count=100k -> WRITING ->> 30 sec YG> time dd if=zero of=/dev/null bs=1k count=100k -> READING ->> 10 sec YG> I try all configuration possible (hdparm) for the harddisk and 3 MB/s is YG> the best result that I got. In PIO mode 4, I only got a 1.5 MB/s ! YG> I performed theses tests on different architecture and I got the following YG> results: YG> SC520 PIO (ISA) -> 1.63 MB/s YG> SC1210 PIO -> 4.54 MB/s -> I was unable to enable the DMA ???? YG> P133 ATA-33 -> 5.50 MB/s YG> PII-266 ATA-33 -> 17.83 MB/s YG> PII-400 ATA-33 -> 20.54 MB/s YG> C3-667 ATA-100 -> 23.05 MB/s YG> Does anyone have an idea why: YG> 1. I cannot enable the UDMA mode 5 ? YG> 2. I only got 3 MBytes/s in writing ? YG> Thanks ! YG> Yves YG> _______________________________________________ YG> Linuxbios mailing list YG> Linuxbios at clustermatic.org YG> http://www.clustermatic.org/mailman/listinfo/linuxbios From Yves.Godin at lyrtech.com Thu Oct 3 11:40:01 2002 From: Yves.Godin at lyrtech.com (Yves Godin) Date: Thu Oct 3 11:40:01 2002 Subject: Low performance of the IDE on the SIS550 In-Reply-To: <6080280429.20021003105006@bergeron.com> References: <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> Message-ID: <5.0.2.1.0.20021003115446.00abdec0@mail.lyre.qc.ca> At 10:50 AM 10/3/02 -0400, you wrote: >Have you tried hdparm /dev/whateverX (or hdparm -t /dev/whateverX)? This >will give you a more >accurate result (IMHO) and it will allow you to set the DMA settings >on the drive. Yes, I do. And the results are very close to those that I got with dd. The problem whith hdparm is that it only gives the performance in reading not in writing. I found why I cannot set the UDMA mode 3/4/5. My board has a 44 pin ide connector and the cable that come with it convert from 44 pins to a 40 pins. To be able to set the UDMA mode 3/4/5, I must used a 80 wires cable. I try on another "slow" PC and there not a great difference of performance between the UDMA mode 2 and the UDMA mode 5. Yves From davelists at imagesmiths.com Thu Oct 3 12:35:01 2002 From: davelists at imagesmiths.com (David Thomas) Date: Thu Oct 3 12:35:01 2002 Subject: athlon board choice Message-ID: <20021003094747.A14701@imagesmiths.com> I've been researching a board for cluster computing. This is my wishlist 1. Dual Athlon 2. At least 2GB RAM capactity. DDR or other high-speed is critical. 3. midrange -- not dell or ibm for cost reasons 4. Integrated video and 10/100 NIC, dual NIC a plus, SCSI not necessary 5. 1U or 2U ATX form factor 6. Lots of hardware monitoring. ASIC/IPMI a must. 7. (of course) will run LinuxBIOS I've tetatively settled on a Tyan Thunder K7 S2462 and I've had reasonable experiences with the vendor in the past. For bios it says it's got a 4MB flash chip and supports DMI 2.0. I'm new to LinuxBIOS so comments are appreciated. There's a page at : http://www.tyan.com/products/html/thunderk7.html and manual at ftp://ftp.tyan.com/manuals/thunder/m_s2462_100.pdf Thx Dave From nathanael at gnat.ca Thu Oct 3 13:50:00 2002 From: nathanael at gnat.ca (Nathanael Noblet) Date: Thu Oct 3 13:50:00 2002 Subject: Low performance of the IDE on the SIS550 In-Reply-To: <5.0.2.1.0.20021003115446.00abdec0@mail.lyre.qc.ca> Message-ID: <7273394D-D6FA-11D6-B213-0003931B4D6A@gnat.ca> On Thursday, October 3, 2002, at 10:05 AM, Yves Godin wrote: > At 10:50 AM 10/3/02 -0400, you wrote: >> Have you tried hdparm /dev/whateverX (or hdparm -t /dev/whateverX)? >> This will give you a more >> accurate result (IMHO) and it will allow you to set the DMA settings >> on the drive. > > > Yes, I do. And the results are very close to those that I got with dd. > The problem whith hdparm > is that it only gives the performance in reading not in writing. try hdparm -Tt device for both read & writes. > I found why I cannot set the UDMA mode 3/4/5. My board has a 44 pin > ide connector and the > cable that come with it convert from 44 pins to a 40 pins. To be able > to set the UDMA mode 3/4/5, > I must used a 80 wires cable. I try on another "slow" PC and there not > a great difference of > performance between the UDMA mode 2 and the UDMA mode 5. > > Yves > > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From bari at onelabs.com Thu Oct 3 14:08:00 2002 From: bari at onelabs.com (Bari Ari) Date: Thu Oct 3 14:08:00 2002 Subject: Low performance of the IDE on the SIS550 References: <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> Message-ID: <3D9C8B6B.6050002@onelabs.com> Yves Godin wrote: > Anyway, with the UDMA mode 2 I should have the performance that I > need. I look on header of the ide connector and the burst when writing > seems to be quick anough but between each of these bursts I have a > hole of 5-6 seconds. How are you looking at the ide header? Logic Analyzer, scope?? If so, are you saying that the dma burst timing looks good but you are getting pauses of 5 -6 seconds between bursts? Bari From Yves.Godin at lyrtech.com Thu Oct 3 17:10:00 2002 From: Yves.Godin at lyrtech.com (Yves Godin) Date: Thu Oct 3 17:10:00 2002 Subject: Low performance of the IDE on the SIS550 In-Reply-To: <3D9C8B6B.6050002@onelabs.com> References: <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> Message-ID: <5.0.2.1.0.20021003164245.00aab3c0@mail.lyre.qc.ca> At 01:24 PM 10/3/02 -0500, you wrote: >Yves Godin wrote: > >>Anyway, with the UDMA mode 2 I should have the performance that I need. I >>look on header of the ide connector and the burst when writing seems to >>be quick anough but between each of these bursts I have a hole of 5-6 seconds. > >How are you looking at the ide header? Logic Analyzer, scope?? If so, are >you saying that the dma burst timing looks good but you are getting pauses >of 5 -6 seconds between bursts? I`am looking the DRQ signal on th ide header with a scope. Now I'm getting pauses of 2-3 seconds in writing. It`s weird because I don`t observe this on a P133 which is slower that the SIS550 and the read seems ok. Do you have a board with a SIS550 to compare my results ? Yves From tejohnson at yahoo.com Thu Oct 3 17:20:01 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Thu Oct 3 17:20:01 2002 Subject: MD-2800-D08 ??? Message-ID: <012201c26b24$89326090$021e1eac@areas3> Hi all, I purchased what I believed to be 2 DOC Millennium chips from Tri-M, but the part number is: MD-2800-D08 Is this right?!? Because this is the `dmesg` output when I try to burn the ROM: Possible DiskOnChip with unknown ChipID 00 found at 0xc8000 Possible DiskOnChip with unknown ChipID 35 found at 0xca000 Possible DiskOnChip with unknown ChipID FF found at 0xcc000 Possible DiskOnChip with unknown ChipID FF found at 0xce000 Possible DiskOnChip with unknown ChipID FF found at 0xd0000 Possible DiskOnChip with unknown ChipID FF found at 0xd2000 Possible DiskOnChip with unknown ChipID FF found at 0xd4000 Possible DiskOnChip with unknown ChipID FF found at 0xd6000 Possible DiskOnChip with unknown ChipID F6 found at 0xd8000 Possible DiskOnChip with unknown ChipID E8 found at 0xda000 Possible DiskOnChip with unknown ChipID 97 found at 0xdc000 Possible DiskOnChip with unknown ChipID 63 found at 0xde000 Possible DiskOnChip with unknown ChipID 00 found at 0xe0000 Possible DiskOnChip with unknown ChipID 00 found at 0xe2000 Possible DiskOnChip with unknown ChipID 00 found at 0xe4000 Possible DiskOnChip with unknown ChipID 00 found at 0xe6000 Possible DiskOnChip with unknown ChipID 00 found at 0xe8000 Possible DiskOnChip with unknown ChipID 00 found at 0xea000 Possible DiskOnChip with unknown ChipID 00 found at 0xec000 Possible DiskOnChip with unknown ChipID 00 found at 0xee000 No recognised DiskOnChip devices found root at grandamp:/usr/local/src/linuxbios/buildrom/m758lmr+# Regards, Todd E. Johnson tejohnson at yahoo.com Regards, Todd E. Johnson tejohnson at yahoo.com From tejohnson at yahoo.com Thu Oct 3 17:42:00 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Thu Oct 3 17:42:00 2002 Subject: Hmmm Message-ID: <012401c26b27$8ca5fc20$021e1eac@areas3> Did the following... `flash_on` `modprobe docprobe doc_config_location=0xfffc8000` Using configured DiskOnChip probe address 0xfffc8000 DiskOnChip Millennium found at address 0xFFFC8000 Flash chip found: Manufacturer ID: 98, Chip ID: E6 (Toshiba TC58V64AFT/DC) 1 flash chips found. Total DiskOnChip size: 8 MiB Gotta mailing list archives... I take it that I should rebuild the kernel w/ CONFIG_MTD_DOCPROBE_HIGH ? Regards, Todd E. Johnson tejohnson at yahoo.com From rminnich at lanl.gov Thu Oct 3 18:49:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 3 18:49:01 2002 Subject: Hmmm In-Reply-To: <012401c26b27$8ca5fc20$021e1eac@areas3> Message-ID: On Thu, 3 Oct 2002, Todd E. Johnson wrote: > Gotta mailing list archives... I take it that I should rebuild the > kernel w/ CONFIG_MTD_DOCPROBE_HIGH ? I guess so :-) In general, I'm not very good with MTD yet :-( ron From tejohnson at yahoo.com Thu Oct 3 19:03:00 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Thu Oct 3 19:03:00 2002 Subject: Hmmm In-Reply-To: Message-ID: <012f01c26b32$ed094620$021e1eac@areas3> Well, It finally boots. My only problem now is hardly any of the devices can be assigned an IRQ. Like USB for example... Here is `dmesg` output: Linux version 2.4.19 (root at grandamp) (gcc version 2.95.3 20010315 (release)) #21 Thu Oct 3 16:56:32 EST 2002 BIOS-provided physical RAM map: BIOS-e801: 0000000000000000 - 000000000009f000 (usable) BIOS-e801: 0000000000100000 - 000000001f700000 (usable) 503MB LOWMEM available. Advanced speculative caching feature not present On node 0 totalpages: 128768 zone(0): 4096 pages. zone(1): 124672 pages. zone(2): 0 pages. Kernel command line: root=/dev/hda2 video=sisfb:800x600-16 at 72 Local APIC disabled by BIOS -- reenabling. Found and enabled local APIC! Initializing CPU#0 Detected 1102.511 MHz processor. Console: colour dummy device 80x25 Calibrating delay loop... 2202.00 BogoMIPS Memory: 506428k/515072k available (1692k kernel code, 8256k reserved, 622k data, 112k init, 0k highmem) Dentry cache hash table entries: 65536 (order: 7, 524288 bytes) Inode cache hash table entries: 32768 (order: 6, 262144 bytes) Mount-cache hash table entries: 8192 (order: 4, 65536 bytes) Buffer-cache hash table entries: 32768 (order: 5, 131072 bytes) Page-cache hash table entries: 131072 (order: 7, 524288 bytes) CPU: Before vendor init, caps: 0383fbff 00000000 00000000, vendor = 0 CPU: L1 I cache: 16K, L1 D cache: 16K CPU: L2 cache: 256K CPU: After vendor init, caps: 0383fbff 00000000 00000000 00000000 Intel machine check architecture supported. Intel machine check reporting enabled on CPU#0. CPU: After generic, caps: 0383fbff 00000000 00000000 00000000 CPU: Common caps: 0383fbff 00000000 00000000 00000000 CPU: Intel(R) Celeron(TM) CPU 1100MHz stepping 01 Enabling fast FPU save and restore... done. Enabling unmasked SIMD FPU exception support... done. Checking 'hlt' instruction... OK. POSIX conformance testing by UNIFIX enabled ExtINT on CPU#0 ESR value before enabling vector: 00000000 ESR value after enabling vector: 00000000 Using local APIC timer interrupts. calibrating APIC timer ... ..... CPU clock speed is 1102.5089 MHz. ..... host bus clock speed is 100.2278 MHz. cpu: 0, clocks: 1002278, slice: 501139 CPU0 mtrr: v1.40 (20010327) Richard Gooch (rgooch at atnf.csiro.au) mtrr: detected mtrr type: Intel PCI: Using configuration type 1 PCI: Probing PCI hardware Unknown bridge resource 0: assuming transparent Unknown bridge resource 2: assuming transparent PCI: Using IRQ router SIS [1039/0008] at 00:01.0 Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket Starting kswapd Installing knfsd (copyright (C) 1996 okir at monad.swb.de). ACPI: System description tables not found ACPI-0068: *** Error: Acpi_load_tables: Could not get RSDP, AE_ERROR ACPI-0116: *** Error: Acpi_load_tables: Could not load tables: AE_ERROR ACPI: System description table load failed parport0: PC-style at 0x378 (0x778) [PCSPP(,...)] parport0: irq 7 detected i2c-core.o: i2c core module i2c-algo-bit.o: i2c bit algorithm module sisfb_lite: $Id: linux-2.4.19-sis.patch,v 1.1 2002/09/03 02:56:32 ollie Exp $ sisfb_lite: framebuffer at 0xf0000000, mapped to 0xe0000000, size 8192 KB sisfb_lite: Turned on MTRR Write Combine for framebuffer sisfb_lite: Use 64KB off-screen memory for Turbo Queue sisfb_lite: Video Dot Clock = 50113 KHz Console: switching to colour frame buffer device 100x37 Detected PS/2 Mouse Port. pty: 256 Unix98 ptys configured Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI enabled ttyS00 at 0x03f8 (irq = 4) is a 16550A PCI: Assigned IRQ 5 for device 00:01.6 PCI: Sharing IRQ 5 with 00:01.4 Uniform Multi-Platform E-IDE driver Revision: 6.31 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx SIS5513: IDE controller on PCI bus 00 dev 01 SiS pirq: advanced IDE/ACPI/DAQ mapping not yet implemented advanced SiS pirq mapping not yet implemented SIS5513: chipset revision 208 SIS5513: not 100% native mode: will probe irqs later SiS630 ide0: BM-DMA at 0x2c80-0x2c87, BIOS settings: hda:pio, hdb:pio ide1: BM-DMA at 0x2c88-0x2c8f, BIOS settings: hdc:pio, hdd:pio hda: C/H/S=0/0/0 from BIOS ignored hda: WDC WD1000BB-00CAA0, ATA DISK drive ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 hda: 195371568 sectors (100030 MB) w/2048KiB Cache, CHS=193821/16/63, UDMA(66) Partition check: hda: [PTBL] [12161/255/63] hda1 hda2 hda3 RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize sis900.c: v1.08.04 4/25/2002 PCI: Assigned IRQ 9 for device 00:01.1 eth0: SiS 900 Internal MII PHY transceiver found at address 1. eth0: Using transceiver found at address 1 as default eth0: SiS 900 PCI Fast Ethernet at 0x2000, IRQ 9, 00:07:95:ec:1e:ae. Linux video capture interface: v1.00 Linux agpgart interface v0.99 (c) Jeff Hartmann agpgart: Maximum main memory to use for agp memory: 431M agpgart: unsupported bridge agpgart: no supported devices found. SCSI subsystem driver Revision: 1.00 kmod: failed to exec /sbin/modprobe -s -k scsi_hostadapter, errno = 2 kmod: failed to exec /sbin/modprobe -s -k scsi_hostadapter, errno = 2 ohci1394: $Rev: 530 $ Ben Collins PCI: No IRQ known for interrupt pin A of device 02:0b.0. Please try using pci=biosirq. ohci1394: Failed to allocate shared interrupt 0 video1394: Installed video1394 module raw1394: /dev/raw1394 device initialized ieee1394: sbp2: Please load the lower level IEEE-1394 driver (e.g. ohci1394) before sbp2... cmpci: version $Revision: 5.64 $ time 15:00:42 Oct 3 2002 PCI: Enabling device 00:0f.0 (0080 -> 0081) PCI: No IRQ known for interrupt pin A of device 00:0f.0. Please try using pci=biosirq. usb.c: registered new driver usbdevfs usb.c: registered new driver hub PCI: No IRQ known for interrupt pin C of device 02:08.2. Please try using pci=biosirq. hcd.c: Found HC with no IRQ. Check BIOS/PCI 02:08.2 setup! PCI: Assigned IRQ 11 for device 00:01.2 PCI: Sharing IRQ 11 with 00:01.3 usb-ohci.c: USB OHCI at membase 0xe0822000, IRQ 11 usb-ohci.c: usb-00:01.2, Silicon Integrated Systems [SiS] 7001 usb.c: new USB bus registered, assigned bus number 1 hub.c: USB hub found hub.c: 3 ports detected PCI: Found IRQ 11 for device 00:01.3 PCI: Sharing IRQ 11 with 00:01.2 usb-ohci.c: USB OHCI at membase 0xe0824000, IRQ 11 usb-ohci.c: usb-00:01.3, Silicon Integrated Systems [SiS] 7001 (#2) usb.c: new USB bus registered, assigned bus number 2 hub.c: USB hub found hub.c: 2 ports detected PCI: No IRQ known for interrupt pin A of device 02:08.0. Please try using pci=biosirq. usb-ohci.c: found OHCI device with no IRQ assigned. check BIOS settings! PCI: No IRQ known for interrupt pin B of device 02:08.1. Please try using pci=biosirq. usb-ohci.c: found OHCI device with no IRQ assigned. check BIOS settings! usb.c: registered new driver hiddev usb.c: registered new driver hid hid-core.c: v1.8.1 Andreas Gal, Vojtech Pavlik hid-core.c: USB HID support drivers usb.c: registered new driver powermate usb.c: registered new driver usbtouch usbtouch.c: USB Touchscreen support registered. usb.c: registered new driver serial usbserial.c: USB Serial support registered for Generic usbserial.c: USB Serial Driver core v1.4 usbserial.c: USB Serial support registered for Belkin F5U120-PC USB Serial Adapter usbserial.c: USB Serial support registered for Belkin F5U103 USB Serial Adapter usbserial.c: USB Serial support registered for Belkin USB Serial Adapter usbserial.c: USB Serial support registered for Peracom single port USB Serial Adapter usbserial.c: USB Serial support registered for GO-COM232 USB Serial Converter belkin_sa.c: USB Belkin Serial converter driver v1.1 usbserial.c: USB Serial support registered for Magic Control Technology USB-RS232 usbserial.c: USB Serial support registered for MCT/Sitecom USB-RS232 usbserial.c: USB Serial support registered for MCT/D-Link DU-H3SP USB BAY mct_u232.c: v1.1:Magic Control Technology USB-RS232 converter driver usbserial.c: USB Serial support registered for PL-2303 pl2303.c: Prolific PL2303 USB to serial adaptor driver v0.9 Initializing USB Mass Storage driver... usb.c: registered new driver usb-storage USB Mass Storage support registered. mice: PS/2 mouse device common for all mice NET4: Linux TCP/IP 1.0 for NET4.0 IP Protocols: ICMP, UDP, TCP, IGMP IP: routing cache hash table of 4096 buckets, 32Kbytes TCP: Hash tables configured (established 32768 bind 32768) NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. IrCOMM protocol (Dag Brattli) FAT: bogus logical sector size 0 FAT: bogus logical sector size 0 reiserfs: checking transaction log (device 03:02) ... Warning, log replay starting on readonly filesystem hub.c: USB new device connect on bus2/2, assigned device number 2 usb.c: USB device not accepting new address=2 (error=-110) hub.c: USB new device connect on bus2/2, assigned device number 3 usb.c: USB device not accepting new address=3 (error=-110) reiserfs: replayed 29 transactions in 1 seconds Using r5 hash to sort names ReiserFS version 3.6.25 VFS: Mounted root (reiserfs filesystem) readonly. Freeing unused kernel memory: 112k freed Adding Swap: 248968k swap-space (priority -1) reiserfs: checking transaction log (device 03:03) ... reiserfs: replayed 15 transactions in 2 seconds Using r5 hash to sort names ReiserFS version 3.6.25 eth0: Media Link On 10mbps half-duplex usbtouch.c: open_usbtouch(0): invalid tscrn_minor sisfb_lite: Video Dot Clock = 50113 KHz hub.c: USB new device connect on bus2/2, assigned device number 4 usb.c: USB device not accepting new address=4 (error=-110) hub.c: USB new device connect on bus2/2, assigned device number 5 usb.c: USB device not accepting new address=5 (error=-110) hub.c: USB new device connect on bus2/2, assigned device number 6 usb.c: USB device not accepting new address=6 (error=-110) hub.c: USB new device connect on bus2/2, assigned device number 7 usb.c: USB device not accepting new address=7 (error=-110) Do you folks think that ACPI will ever work w/ this? Regards, Todd E. Johnson tejohnson at yahoo.com > -----Original Message----- > From: linuxbios-admin at clustermatic.org > [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Ronald > G Minnich > Sent: Thursday, October 03, 2002 7:03 PM > To: Todd E. Johnson > Cc: Linuxbios at clustermatic.org > Subject: Re: Hmmm > > > On Thu, 3 Oct 2002, Todd E. Johnson wrote: > > > Gotta mailing list archives... I take it that I should rebuild the > > kernel w/ CONFIG_MTD_DOCPROBE_HIGH ? > > I guess so :-) > > In general, I'm not very good with MTD yet :-( > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From tejohnson at yahoo.com Thu Oct 3 19:59:00 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Thu Oct 3 19:59:00 2002 Subject: PCChips M758LMR+ works for me but... Message-ID: <013001c26b3a$b97f7b50$021e1eac@areas3> Hi again all, I am able to boot and get X up. It takes about 45 seconds, which is not bad, but it is a bit more than I was expecting. sshd takes up a bit of this time though. I have most everything else disabled. One of the largest problems is that none of the onboard USB ports work. Also, none of the PCI cards I am using appears to work as well (Which all of the devices work fine with the factory bios). Finally, I unfortunately rely heavily on ACPI to startup and shutdown the system. I have included a bit of output with this message, such as my config file, output from `lspci -vvv`, and the output from `dmesg`. Perhaps I did something wrong, or I'm setting my expectations a bit too high. I appreciate anyone's time and effort that the may put into this, and I thinking this pretty much rocks! (This would explain why I bought another motherboard and a few extra DOCs...) Any and all ideas are appreciated! Regards, Todd E. Johnson tejohnson at yahoo.com -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: dmesg.txt URL: -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: lspci_vvv.txt URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: m758lmr+.config Type: application/octet-stream Size: 1484 bytes Desc: not available URL: From rminnich at lanl.gov Thu Oct 3 21:27:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 3 21:27:00 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: <013001c26b3a$b97f7b50$021e1eac@areas3> Message-ID: On Thu, 3 Oct 2002, Todd E. Johnson wrote: > I am able to boot and get X up. It takes about 45 seconds, which is not > bad, but it is a bit more than I was expecting. sshd takes up a bit of > this time though. I have most everything else disabled. I assume this is redhat 7. The slowness of the bootup scripts has managed to almost eliminate the speed of boot you get with linuxbios. It's depressing. There is a tool that will optimize boot-time scripts you might want to look at. > One of the largest problems is that none of the onboard USB ports work. I believe this has been solved, Andrew Ip and Ollie are the experts on this one. > Also, none of the PCI cards I am using appears to work as well (Which > all of the devices work fine with the factory bios). This sounds like an IRQ table problem. Did you get a chance to run getpir and compare to linuxbios getpir? > Finally, I unfortunately rely heavily on ACPI to startup and shutdown > the system. what features do you use? we're weak in this area and could use help. Thanks for your patience ... ron From qhpark at jchyun.com Thu Oct 3 22:17:01 2002 From: qhpark at jchyun.com (Q-ha Park) Date: Thu Oct 3 22:17:01 2002 Subject: nonsense C/H/S values for CF (used in ide) In-Reply-To: Message-ID: > no, it's a south bridge patch. see the southbridge code. Or wait until > tomorrow when I get back :-) ron, are you back yet? would you send me the south bridge patch? (actually, I couldn't find much different in rr2 from voyager2 except voyager2 uses a different super I/O pc97317.) Q, From aip at cwlinux.com Thu Oct 3 22:31:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Thu Oct 3 22:31:01 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: <013001c26b3a$b97f7b50$021e1eac@areas3>; from tejohnson@yahoo.com on Thu, Oct 03, 2002 at 08:12:27PM -0400 References: <013001c26b3a$b97f7b50$021e1eac@areas3> Message-ID: <20021004104537.A14509@mail.cwlinux.com> Todd, > One of the largest problems is that none of the onboard USB ports work. > Also, none of the PCI cards I am using appears to work as well (Which > all of the devices work fine with the factory bios). Finally, I > unfortunately rely heavily on ACPI to startup and shutdown the system. > I have included a bit of output with this message, such as my config > file, output from `lspci -vvv`, and the output from `dmesg`. Perhaps I > did something wrong, or I'm setting my expectations a bit too high. I > appreciate anyone's time and effort that the may put into this, and I > thinking this pretty much rocks! (This would explain why I bought > another motherboard and a few extra DOCs...) For newer m758lr+, it has different irq routing table. Try to generate a newer one using getirq. Also, don't forget to enable option DISABLE_INTERNAL_DEVICES=1 -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From rminnich at lanl.gov Thu Oct 3 22:35:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 3 22:35:01 2002 Subject: nonsense C/H/S values for CF (used in ide) In-Reply-To: Message-ID: On Fri, 4 Oct 2002, Q-ha Park wrote: > ron, are you back yet? would you send me the south bridge patch? (actually, > I couldn't find much different in rr2 from voyager2 except voyager2 uses a > different super I/O pc97317.) I don't think you need it. It's in the tree. What drives IDE on the voyager? which chip? ron From ollie at sis.com.tw Fri Oct 4 00:17:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Fri Oct 4 00:17:00 2002 Subject: Walmart PC from MicroTel In-Reply-To: <15680029983.20021003104555@bergeron.com> References: <1033619707.1132.75.camel@ollie> <15680029983.20021003104555@bergeron.com> Message-ID: <1033693126.1132.103.camel@ollie> On Thu, 2002-10-03 at 22:45, Christopher Bergeron wrote: > Ollie, since I'm sure you get inundated with requests for all the different > mobo types out there, maybe we can set up a webpage/db that will allow > people to submit the lspci -vvv data along with the motherboard type > and possibly a link to the motherboard on manufacturer's website? > > I may be working with Rob Minnich on a mysql db that would hold our > data for the config file generator. If that's the case, I could put > this page together rather easily. > > Then people could go to the page and if their motherboard has already > been submitted, cast a new "vote" for it; and if it's not listed, they > could submit a new request (with the above info [lspci -vvv; etc]). > As such, you could prioritize the most popular/requested motherboards > and do your magic accordingly. > It would be a good idea for end-user to pickup an MB and install LinuxBIOS on it. It would be good for the developers too, I doubt there is anyone have any idea about what MB/Chipsets are supported exactly. > It's just a thought. I really want to help the project out as much as I > can (I'm a web/php/mysql developer and not really a C/ASM coder). > It is good to have someone with Web/DB programming skill for the project. I tried to learn things like Zope/PostgreSQL, but I found that I an not that kind programmer. Ollie From ollie at sis.com.tw Fri Oct 4 01:26:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Fri Oct 4 01:26:00 2002 Subject: Hmmm In-Reply-To: <012401c26b27$8ca5fc20$021e1eac@areas3> References: <012401c26b27$8ca5fc20$021e1eac@areas3> Message-ID: <1033710032.1136.109.camel@ollie> On Fri, 2002-10-04 at 05:55, Todd E. Johnson wrote: > Did the following... > > `flash_on` > `modprobe docprobe doc_config_location=0xfffc8000` > > > Using configured DiskOnChip probe address 0xfffc8000 > DiskOnChip Millennium found at address 0xFFFC8000 > Flash chip found: Manufacturer ID: 98, Chip ID: E6 (Toshiba > TC58V64AFT/DC) > 1 flash chips found. Total DiskOnChip size: 8 MiB > > > Gotta mailing list archives... I take it that I should rebuild the > kernel w/ CONFIG_MTD_DOCPROBE_HIGH ? > Yes. Ollie From ollie at sis.com.tw Fri Oct 4 01:32:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Fri Oct 4 01:32:00 2002 Subject: Hmmm In-Reply-To: <012f01c26b32$ed094620$021e1eac@areas3> References: <012f01c26b32$ed094620$021e1eac@areas3> Message-ID: <1033710152.1132.112.camel@ollie> On Fri, 2002-10-04 at 07:16, Todd E. Johnson wrote: > Well, > > It finally boots. My only problem now is hardly any of the devices can > be assigned an IRQ. Like USB for example... > why do you have another USB device on PCI bus 2 ?? Ollie From qhpark at jchyun.com Fri Oct 4 02:08:01 2002 From: qhpark at jchyun.com (Q-ha Park) Date: Fri Oct 4 02:08:01 2002 Subject: nonsense C/H/S values for CF (used in ide) Message-ID: > I don't think you need it. It's in the tree. > > What drives IDE on the voyager? which chip? > yeah, exactly. that's what I wondered in the first place. I have a cs5530 chip that drives IDE.. and southbridge/nsc/cs5530/southbridge.c is used to enable the IDE. isn't this the same as rr2? what patch were you referring to when you told me I needed a patch to read C/H/S values correctly? Q From tejohnson at yahoo.com Fri Oct 4 08:11:00 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Fri Oct 4 08:11:00 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: Message-ID: <015001c26ba0$e8c0bd00$021e1eac@areas3> Thanks for the response! >I assume this is redhat 7. The slowness of the bootup scripts >has managed to almost eliminate the speed of boot you get with linuxbios. It's >depressing. No, sorry, It's Slackware 8.1 and about half the boot scripts have been remarked out. > I believe this has been solved, Andrew Ip and Ollie are the experts on > this one. That's great, I have been relying on USB... > This sounds like an IRQ table problem. Did you get a chance > to run getpir > and compare to linuxbios getpir? No, but I will certainly so this! > what features do you use? we're weak in this area and could use help. I primarily have been using ACPI for startup & shutdown. Startup will always work when there is momentary contact to the power header. ACPI fails to load which causes it to not see the power button. There is not an ACPI directory under /proc, so ACPID has nothing to watch for (ex: Momentary contact on the power button to initiate `shutdown`. Regards, Todd E. Johnson tejohnson at yahoo.com From tejohnson at yahoo.com Fri Oct 4 08:18:01 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Fri Oct 4 08:18:01 2002 Subject: Hmmm In-Reply-To: <1033710152.1132.112.camel@ollie> Message-ID: <015101c26ba1$2d287cd0$021e1eac@areas3> Howdy, The 3rd PCI bus is an Adaptec DuoConnect UBS/Firewire card. Regards, Todd E. Johnson tejohnson at yahoo.com > > why do you have another USB device on PCI bus 2 ?? > > Ollie > From rminnich at lanl.gov Fri Oct 4 10:28:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 4 10:28:01 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: <015001c26ba0$e8c0bd00$021e1eac@areas3> Message-ID: On Fri, 4 Oct 2002, Todd E. Johnson wrote: > I primarily have been using ACPI for startup & shutdown. Startup will > always work when there is momentary contact to the power header. ACPI > fails to load which causes it to not see the power button. There is not > an ACPI directory under /proc, so ACPID has nothing to watch for (ex: > Momentary contact on the power button to initiate `shutdown`. The trend in the free os community is to do ACPI functions in the OS -- this is smart, I think. You need to get ACPI tables from the existing BIOS and then see how far the Linux ACPI emulator is and how well it works. This is a bit of work but would be a huge help and we would love to have a writeup. ron From spyro at f2s.com Fri Oct 4 13:25:01 2002 From: spyro at f2s.com (Ian Molton) Date: Fri Oct 4 13:25:01 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: References: <015001c26ba0$e8c0bd00$021e1eac@areas3> Message-ID: <20021004185209.065e9546.spyro@f2s.com> On Fri, 4 Oct 2002 08:42:09 -0600 (MDT) Ronald G Minnich wrote: > > The trend in the free os community is to do ACPI functions in the OS > -- this is smart, I think. Even smarter would be to ditch ACPI and design a proper interface... From rminnich at lanl.gov Fri Oct 4 13:59:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 4 13:59:01 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: <20021004185209.065e9546.spyro@f2s.com> Message-ID: On Fri, 4 Oct 2002, Ian Molton wrote: > Even smarter would be to ditch ACPI and design a proper interface... agreed, but somebody has to take that on and then get the world to agree. ron From tejohnson at yahoo.com Fri Oct 4 17:09:01 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Fri Oct 4 17:09:01 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: Message-ID: <016d01c26bec$2ba6a2b0$021e1eac@areas3> Hello, I would tend to agree that it _may_ help in a rather large cluster. For example, a node's fan or environmental control fails and the system becomes too hot, ACPI may signal an event to gracefully shut down the node. Or perhaps look towards CPU throttling. However, from some of the messages I have seen to the LinuxACPI mailing list from Linus, it is hard to gauge the outlook for ACPI in Linux, or I am mis-reading the messages altogether. For my development purposes, I have completely disabled ACPI in my kernel config, however, this had no effect. Also, when I run `getpir` and generate a new irq_table.c, do I need to make any modification to that source? Or, do I simply replace the existing /src/util/mainboard/pcchips/m758lmr+/irq_table.c ? If the latter is the case, this had no effect. I used the resulting irq_table.c from `getpir` with "option DISABLE_INTERNAL_DEVICES=1" in my config, and without. No change: No USB, and the same IRQ problems. The only change is with "option DISABLE_INTERNAL_DEVICES=1" set in the config file, it now boots in 35 seconds, but of course, I didn't have any devices working besides the FrameBuffer console... A quick side note, in the config file, there is no difference between "option DISABLE_INTERNAL_DEVICES=1" && "option DISABLE_INTERNAL_DEVICES=0" Regards, Todd E. Johnson tejohnson at yahoo.com > -----Original Message----- > From: linuxbios-admin at clustermatic.org > [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Ronald > G Minnich > Sent: Friday, October 04, 2002 10:42 AM > To: Todd E. Johnson > Cc: Linuxbios at clustermatic.org > Subject: RE: PCChips M758LMR+ works for me but... > > > On Fri, 4 Oct 2002, Todd E. Johnson wrote: > > > I primarily have been using ACPI for startup & shutdown. > Startup will > > always work when there is momentary contact to the power > header. ACPI > > fails to load which causes it to not see the power button. > There is not > > an ACPI directory under /proc, so ACPID has nothing to > watch for (ex: > > Momentary contact on the power button to initiate `shutdown`. > > The trend in the free os community is to do ACPI functions in > the OS -- > this is smart, I think. You need to get ACPI tables from the > existing BIOS > and then see how far the Linux ACPI emulator is and how well it works. > > This is a bit of work but would be a huge help and we would > love to have a > writeup. > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From hansolofalcon at worldnet.att.net Fri Oct 4 22:02:00 2002 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Fri Oct 4 22:02:00 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: <015001c26ba0$e8c0bd00$021e1eac@areas3> Message-ID: <001f01c26c15$3f6e4720$a86a580c@who> Hello from Gregg C Levine Um, Todd, way to go choosing Slackware, that's what I use. Now what's this about the slowness of the bootup scripts? I use Slackware here, and about all I can say, it's a bit strange about those scripts. Of course, this is version, 8.0, I haven't ordered copies of 8.1 on CD yet. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of Todd E. Johnson > Sent: Friday, October 04, 2002 8:24 AM > To: 'Ronald G Minnich' > Cc: Linuxbios at clustermatic.org > Subject: RE: PCChips M758LMR+ works for me but... > > Thanks for the response! > > >I assume this is redhat 7. The slowness of the bootup scripts > >has managed to almost eliminate the speed of boot you get with > linuxbios. It's > >depressing. > > No, sorry, It's Slackware 8.1 and about half the boot scripts have been > remarked out. > > > I believe this has been solved, Andrew Ip and Ollie are the experts on > > this one. > > That's great, I have been relying on USB... > > > This sounds like an IRQ table problem. Did you get a chance > > to run getpir > > and compare to linuxbios getpir? > > No, but I will certainly so this! > > > what features do you use? we're weak in this area and could use help. > > I primarily have been using ACPI for startup & shutdown. Startup will > always work when there is momentary contact to the power header. ACPI > fails to load which causes it to not see the power button. There is not > an ACPI directory under /proc, so ACPID has nothing to watch for (ex: > Momentary contact on the power button to initiate `shutdown`. > > Regards, > > Todd E. Johnson > tejohnson at yahoo.com > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From tejohnson at yahoo.com Fri Oct 4 23:40:01 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Fri Oct 4 23:40:01 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: <001f01c26c15$3f6e4720$a86a580c@who> Message-ID: <000301c26c22$da0bf5e0$021e1eac@areas3> Actually, Previously I moved most of the boot scripts off to a backup directory... There was really no change. I have since moved all boot scripts to a directory called "/etc/rc.d/HOLD". Heh... This was kind of a mistake. For those interested, I have attached a copy of my serial post to this message. I'm probably going to re-build from scratch soon since I have been doing a lot of un-organized development on this system. BTW, it seems that there is no booting action (Based on the Serial output) until the HDD spins up. Is this a result of me keeping my root file system on the HDD? Regards, Todd E. Johnson tejohnson at yahoo.com > -----Original Message----- > From: Gregg C Levine [mailto:hansolofalcon at worldnet.att.net] > Sent: Friday, October 04, 2002 10:17 PM > To: tejohnson at yahoo.com; 'Ronald G Minnich' > Cc: Linuxbios at clustermatic.org > Subject: RE: PCChips M758LMR+ works for me but... > > > Hello from Gregg C Levine > Um, Todd, way to go choosing Slackware, that's what I use. Now what's > this about the slowness of the bootup scripts? I use Slackware here, > and about all I can say, it's a bit strange about those scripts. Of > course, this is version, 8.0, I haven't ordered copies of 8.1 > on CD yet. > ------------------- > Gregg C Levine hansolofalcon at worldnet.att.net > ------------------------------------------------------------ > "The Force will be with you...Always." Obi-Wan Kenobi > "Use the Force, Luke."? Obi-Wan Kenobi > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > (This company dedicates this E-Mail to Master Yoda ) > > -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: lbios_post_serial.txt URL: From rminnich at lanl.gov Fri Oct 4 23:59:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 4 23:59:00 2002 Subject: PCChips M758LMR+ works for me but... In-Reply-To: <000301c26c22$da0bf5e0$021e1eac@areas3> Message-ID: On Fri, 4 Oct 2002, Todd E. Johnson wrote: > BTW, it seems that there is no booting action (Based on the Serial > output) until the HDD spins up. Is this a result of me keeping my root > file system on the HDD? you can't do anything until the HDD spins up, and yes it's because you've god file system on the HDD. There's not much to be done for this. ron From tkarthikbalaguru at yahoo.co.in Sat Oct 5 10:58:01 2002 From: tkarthikbalaguru at yahoo.co.in (=?iso-8859-1?q?Karthik=20Bala=20Guru?=) Date: Sat Oct 5 10:58:01 2002 Subject: porting rtlinux into x86 In-Reply-To: Message-ID: <20021005151231.34704.qmail@web8203.mail.in.yahoo.com> I have a x86 board . how and where to start to port using linuxbios. tell me a most widely available board . tell me some other tools/rpms and hardware required to proceed with. Help me out with some clear steps. Xpecting ur reply, karthik bala guru --- Ronald G Minnich wrote: > On Thu, 26 Sep 2002, Karthik Bala Guru wrote: > > > If linuxbios boots other linux ... then it should > > act as a BIOS and boot rtlinux ??? am i correct > > till now ? > > sure. > > ron > ________________________________________________________________________ Missed your favourite TV serial last night? Try the new, Yahoo! TV. visit http://in.tv.yahoo.com From tkarthikbalaguru at yahoo.co.in Sat Oct 5 11:05:01 2002 From: tkarthikbalaguru at yahoo.co.in (=?iso-8859-1?q?Karthik=20Bala=20Guru?=) Date: Sat Oct 5 11:05:01 2002 Subject: just 2 boards supported by linuxbios In-Reply-To: Message-ID: <20021005151435.30951.qmail@web8205.mail.in.yahoo.com> I think it was about linuxbios . A seminar abt linuxbios from the net. How many boards does it actually support. Correct me .... Mention some boards supported . karthik bala guru --- Ronald G Minnich wrote: > On Thu, 26 Sep 2002, Karthik Bala Guru wrote: > > > i read from a pdf that linuxbios supports just > > two motherboards . Is it true ? > > what pdf? > > ron > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios ________________________________________________________________________ Missed your favourite TV serial last night? Try the new, Yahoo! TV. visit http://in.tv.yahoo.com From Antony at Soft-Solutions.co.uk Sat Oct 5 11:26:01 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Sat Oct 5 11:26:01 2002 Subject: just 2 boards supported by linuxbios In-Reply-To: <20021005151435.30951.qmail@web8205.mail.in.yahoo.com> References: <20021005151435.30951.qmail@web8205.mail.in.yahoo.com> Message-ID: <200210051540.g95Fe9L12189@vulcan.rissington.net> On Saturday 05 October 2002 4:14 pm, Karthik Bala Guru wrote: > I think it was about linuxbios . A seminar abt > linuxbios from the net. > > How many boards does it actually support. > Correct me .... > Mention some boards supported . Try here: http://www.acl.lanl.gov/linuxbios/status/index.html Antony. -- Software development can be quick, high-quality, or low-cost. The customer gets to pick any two out of three. From rminnich at lanl.gov Sat Oct 5 11:36:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 5 11:36:00 2002 Subject: porting rtlinux into x86 In-Reply-To: <20021005151231.34704.qmail@web8203.mail.in.yahoo.com> Message-ID: I think the best thing for you to do is contact cwlinux.com and buy a pre-loaded board. ron From rminnich at lanl.gov Sat Oct 5 11:42:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 5 11:42:01 2002 Subject: just 2 boards supported by linuxbios In-Reply-To: <20021005151435.30951.qmail@web8205.mail.in.yahoo.com> Message-ID: something like 50 boards supported right now. ron From angelo-arifi at cogeco.ca Sat Oct 5 12:33:01 2002 From: angelo-arifi at cogeco.ca (Angelo Arifi) Date: Sat Oct 5 12:33:01 2002 Subject: Mini-TX boards References: <20021005151435.30951.qmail@web8205.mail.in.yahoo.com> Message-ID: <001101c26c8e$e4ef7790$64041d09@blackbird> hey guys, thats the future, mini-tx boards! i am going to be working on a project which will be a standalone dvd, divx, vcd, dvd, svcd, ogg, mp3, and more audio/video player. I will have to use a mini-tx for minimum noise, etc... but like i dont know whether you guys have worked on any mini-tx to support linuxbios. From christopher at bergeron.com Sat Oct 5 13:21:01 2002 From: christopher at bergeron.com (Christopher Bergeron) Date: Sat Oct 5 13:21:01 2002 Subject: usb root FS? Message-ID: <40263041576.20021005133538@bergeron.com> Is it possible to use a DOC and a USB drive as the root filesystem? Has anyone ever attempted this? I understand that it not be fastest thing in the world, but it would be neat... Thoughts anyone? -CB From rminnich at lanl.gov Sat Oct 5 13:27:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 5 13:27:01 2002 Subject: Mini-TX boards In-Reply-To: <001101c26c8e$e4ef7790$64041d09@blackbird> Message-ID: why not give us some product links for examples. Also the names confuse me so what is the format (size) of mini-tx. Smaller than PC/104? ron From steve at nexpath.com Sat Oct 5 13:56:01 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Sat Oct 5 13:56:01 2002 Subject: Mini-TX boards In-Reply-To: Message-ID: > why not give us some product links for examples. Also the names confuse me > so what is the format (size) of mini-tx. Smaller than PC/104? > > ron Someone needs to clarify the terms for sure. The Pcchips m787cl+ is a microATX format, and is larger (244mm x 190mm) than the Via EPIA, which is called a miniITX (170mm x 170mm). Yet both are microATX chassis compatible. -Steve From Antony at Soft-Solutions.co.uk Sat Oct 5 15:32:00 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Sat Oct 5 15:32:00 2002 Subject: usb root FS? In-Reply-To: <40263041576.20021005133538@bergeron.com> References: <40263041576.20021005133538@bergeron.com> Message-ID: <20021005194656.RAAY459.mta02-svc.ntlworld.com@there> On Saturday 05 October 2002 6:35 pm, Christopher Bergeron wrote: > Is it possible to use a DOC and a USB drive as the root filesystem? > Has anyone ever attempted this? I understand that it not be fastest > thing in the world, but it would be neat... > > Thoughts anyone? I really don't see why this shouldn't be possible. Compile your kernel with USB support, SCSI emulation etc, and it should be able to mount the root fs from USB (and find it faster than a hard drive too - no need to spin up). If I wasn't so busy getting ready for Linux Expo London next week I'd give it a go.... Antony. -- Success is a lousy teacher. It seduces smart people into thinking they can't lose. - William H Gates III From angelo-arifi at cogeco.ca Sat Oct 5 16:01:01 2002 From: angelo-arifi at cogeco.ca (Angelo Arifi) Date: Sat Oct 5 16:01:01 2002 Subject: Mini-TX boards References: Message-ID: <001601c26cac$079e6130$64041d09@blackbird> http://www.mini-itx.com/ there's a start please join this discussion: http://www.diyaudio.com/forums/showthread.php?threadid=6552 thats where my idea is going on ----- Original Message ----- From: "Steve M. Gehlbach" To: Sent: Saturday, October 05, 2002 2:25 PM Subject: RE: Mini-TX boards > > > why not give us some product links for examples. Also the names confuse me > > so what is the format (size) of mini-tx. Smaller than PC/104? > > > > ron > > Someone needs to clarify the terms for sure. The Pcchips m787cl+ is a > microATX format, and is larger (244mm x 190mm) than the Via EPIA, which is > called a miniITX (170mm x 170mm). Yet both are microATX chassis compatible. > > -Steve > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From Chaos325 at hotmail.com Sat Oct 5 18:27:00 2002 From: Chaos325 at hotmail.com (Miguel A. Mota Jr.) Date: Sat Oct 5 18:27:00 2002 Subject: Booting over Fast Ethernet Message-ID: Dear Mailing list members, I'm Miguel A. Mota Jr., Co-Founder and President of the Woodrow Wilson High School Science & Technology Club in Camden, New Jersey USA. With a few small grants from Lucent Technologies/Bell Labs, we have developed a parallel-processing Linux Cluster based on openMosix cluster technology. In a attempt to make this new technology more useful and efficient, I have integrated LAM-MPI and PVM into our cluster, giving it certain advantages of a Beowulf Cluster. The Nodes boot a custom CD-based mini-Linux distribution and configure themselves via DHCP, thus making them quite inexpensive and plug-n-play. I feel that this mixture of technologies makes cheap and yet efficient clusters. Our cluster is not that advanced in terms of hardware. Its not much, but its a modest start for a few minority teenagers in a urban city pushing for the movement of Open Source software. Its a star topology Fast Ethernet TCP switched cluster with 7 nodes. Here's a few key specs: - Server: AMD 750Mhz Duron w/390MB PC133 SD-RAM - Masternode AMD 750Mhz Duron w/128MB PC133 SD-RAM - Nodes 1&2: Intel 800MHz Celerons w/128MB PC133 SD-RAM - Nodes 3&4: AMD 650MHz Durons w/128MB PC133 SD-RAM - Nodes 5-7: Intel 450MHz Pentiums w/128MB PC133 SD-RAM We are currently trying to expand, but Lucent's loses in the stock market has affected our funding. So now we are trying to find companies willing to donate anything down to a 75Mhz PC, but no luck yet. While reading the paper, I came across an article on the clusters at Los Alamos. My understanding is that they booting their kernels from a Server. I was wondering if it could be possible to have our Nodes boot an ISO image off our Server in a similar fashion? This could allow us to bring the cost of Nodes down to $100 USD and utilize 486 DX PCs as well. I appreciate anyone's responses and thank you for your time. Miguel A. Mota Jr. Chaos325 at Netzero.net From aip at cwlinux.com Sun Oct 6 03:52:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Sun Oct 6 03:52:01 2002 Subject: usb root FS? In-Reply-To: <40263041576.20021005133538@bergeron.com>; from christopher@bergeron.com on Sat, Oct 05, 2002 at 01:35:38PM -0400 References: <40263041576.20021005133538@bergeron.com> Message-ID: <20021006160659.A15131@mail.cwlinux.com> Christopher, > Is it possible to use a DOC and a USB drive as the root filesystem? > Has anyone ever attempted this? I understand that it not be fastest > thing in the world, but it would be neat... Actually it is more that that. You can even boot kernel within USB drive with kexec. In this case, you will use Linux in DOC as a bootloader. 1. Boot DOC's Linux 2. Mount usb drive 3. kexec kernel within USB drive In theory, you can boot Linux system even from memory stick. :) For those who are interested, I have got DOC image support kexec and you can start from there. I only have images for PCCHIPS 758lr+/m787 and PCCHIPS 810 motherboards so far. Comments are welcome. ftp://ftp.cwlinux.com/pub/downloads/linuxbios-sdk/images/docimages/cwlinux_758+_mb.lb.tar.gz ftp://ftp.cwlinux.com/pub/downloads/linuxbios-sdk/images/docimages/cwlinux_810lmr_mb-mii.lb.tar.gz -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From steve at nexpath.com Sun Oct 6 22:07:01 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Sun Oct 6 22:07:01 2002 Subject: usb root FS? In-Reply-To: <20021006160659.A15131@mail.cwlinux.com> Message-ID: > 3. kexec kernel within USB drive > Is there a version of kexec for 2.4.18/19 (and where can I download it)? The only files I could find were for 2.5.x. -Steve From ollie at sis.com.tw Sun Oct 6 22:52:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Sun Oct 6 22:52:00 2002 Subject: Low performance of the IDE on the SIS550 In-Reply-To: <5.0.2.1.0.20021003164245.00aab3c0@mail.lyre.qc.ca> References: <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> <5.0.2.1.0.20021003164245.00aab3c0@mail.lyre.qc.ca> Message-ID: <1033959813.1136.115.camel@ollie> On Fri, 2002-10-04 at 05:36, Yves Godin wrote: > At 01:24 PM 10/3/02 -0500, you wrote: > >Yves Godin wrote: > > > >>Anyway, with the UDMA mode 2 I should have the performance that I need. I > >>look on header of the ide connector and the burst when writing seems to > >>be quick anough but between each of these bursts I have a hole of 5-6 seconds. > > > >How are you looking at the ide header? Logic Analyzer, scope?? If so, are > >you saying that the dma burst timing looks good but you are getting pauses > >of 5 -6 seconds between bursts? > > I`am looking the DRQ signal on th ide header with a scope. Now I'm getting > pauses of 2-3 seconds in writing. It`s weird because I don`t observe this > on a P133 which is slower that the SIS550 and the read seems ok. > What boad and chipset revision are you using ?? Can you contact our marketing/technical support ?? Ollie From aip at cwlinux.com Sun Oct 6 23:25:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Sun Oct 6 23:25:01 2002 Subject: usb root FS? In-Reply-To: ; from steve@nexpath.com on Sun, Oct 06, 2002 at 07:35:33PM -0700 References: <20021006160659.A15131@mail.cwlinux.com> Message-ID: <20021007113948.A25985@mail.cwlinux.com> Steve, > Is there a version of kexec for 2.4.18/19 (and where can I download it)? > The only files I could find were for 2.5.x. Here is my back-port patch. ftp://ftp.cwlinux.com/pub/downloads/kexec/linux-2.4.19-lb-kexec.patch -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From zhushisongzhu at yahoo.com Mon Oct 7 04:19:00 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Oct 7 04:19:00 2002 Subject: set fixed mtrr can't work Message-ID: <20021007083348.90200.qmail@web13202.mail.yahoo.com> I'm using cvs freebios, and intel celeron CPU and winfast 6300 mainboard. When linuxbios post 0x60 and go to execute set fixed mtrr, it halt. The output is as following: Setting up fixed MTRRs(0-88) type:UC Setting fixed MTRRS( who know the problem? thanks __________________________________________________ Do you Yahoo!? Faith Hill - Exclusive Performances, Videos & More http://faith.yahoo.com From aip at cwlinux.com Mon Oct 7 05:20:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Mon Oct 7 05:20:01 2002 Subject: set fixed mtrr can't work In-Reply-To: <20021007083348.90200.qmail@web13202.mail.yahoo.com>; from zhushisongzhu@yahoo.com on Mon, Oct 07, 2002 at 01:33:48AM -0700 References: <20021007083348.90200.qmail@web13202.mail.yahoo.com> Message-ID: <20021007173443.A30437@mail.cwlinux.com> zhu shi song, > I'm using cvs freebios, and intel celeron CPU and > winfast 6300 mainboard. When linuxbios post 0x60 and > go to execute set fixed mtrr, it halt. The output is > as following: > Setting up fixed MTRRs(0-88) type:UC > > Setting fixed MTRRS( > who know the problem? You need this patch(see attachment). I know, I know. The code is... -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- diff -Nur freebios/src/cpu/p6/mtrr.c freebios.mtrr/src/cpu/p6/mtrr.c --- freebios/src/cpu/p6/mtrr.c 2002-07-02 15:13:09.000000000 +0800 +++ freebios.mtrr/src/cpu/p6/mtrr.c 2002-08-13 15:36:12.000000000 +0800 @@ -205,6 +205,18 @@ unsigned int i; unsigned int fixed_msr = NUM_FIXED_RANGES >> 3; unsigned long low, high; + unsigned int tmp; + + // it is recommended that we disable and enable cache when we + // do this. + /* Disable cache */ + /* Write back the cache and flush TLB */ + asm volatile ("movl %%cr0, %0\n\t" + "orl $0x40000000, %0\n\t" + "wbinvd\n\t" + "movl %0, %%cr0\n\t" + "wbinvd\n\t":"=r" (tmp)::"memory"); + low = high = 0; /* Shut up gcc */ for(i = first; i < last; i++) { /* When I switch to a new msr read it in */ @@ -228,6 +240,11 @@ if (fixed_msr < (NUM_FIXED_RANGES >> 3)) { wrmsr(mtrr_msr[fixed_msr], low, high); } + + // turn cache back on. + asm volatile ("movl %%cr0, %0\n\t" + "andl $0x9fffffff, %0\n\t" + "movl %0, %%cr0\n\t":"=r" (tmp)::"memory"); } static unsigned fixed_mtrr_index(unsigned long addrk) -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From ricardo_strauch at yahoo.com Mon Oct 7 07:44:00 2002 From: ricardo_strauch at yahoo.com (=?iso-8859-1?q?Ricardo=20Strauch?=) Date: Mon Oct 7 07:44:00 2002 Subject: Mini-ITX Mb Message-ID: <20021007115850.32516.qmail@web40311.mail.yahoo.com> From: "Angelo Arifi" To: Subject: Mini-TX boards Date: Sat, 5 Oct 2002 12:47:27 -0400 hey guys, thats the future, mini-tx boards! i am going to be working on a project which will be a standalone dvd, divx, vcd, dvd, svcd, ogg, mp3, and more audio/video player. I will have to use a mini-tx for minimum noise, etc... but like i dont know whether you guys have worked on any mini-tx to support linuxbios. I was thinking about the same idea. ?Did you have an idea how to begin the work? Ricardo Strauch --------------------------------- Do You Yahoo!? Todo lo que quieres saber de Estados Unidos, Am?rica Latina y el resto del Mundo. Vis?ta Yahoo! Noticias. -------------- next part -------------- An HTML attachment was scrubbed... URL: From linuxbios at hello.org Mon Oct 7 07:56:00 2002 From: linuxbios at hello.org (CMZ) Date: Mon Oct 7 07:56:00 2002 Subject: Mini-ITX Mb References: <20021007115850.32516.qmail@web40311.mail.yahoo.com> Message-ID: <001d01c26dfa$80869370$0401a8c0@minibm> I am working same thing too, but for a slighly different chipsets (VIA CLE266) Regards! ----- Original Message ----- From: Ricardo Strauch To: linuxbios at clustermatic.org Cc: angelo-arifi at cogeco.ca Sent: Monday, October 07, 2002 7:58 PM Subject: Mini-ITX Mb From: "Angelo Arifi" To: Subject: Mini-TX boards Date: Sat, 5 Oct 2002 12:47:27 -0400 hey guys, thats the future, mini-tx boards! i am going to be working on a project which will be a standalone dvd, divx, vcd, dvd, svcd, ogg, mp3, and more audio/video player. I will have to use a mini-tx for minimum noise, etc... but like i dont know whether you guys have worked on any mini-tx to support linuxbios. I was thinking about the same idea. ?Did you have an idea how to begin the work? Ricardo Strauch ------------------------------------------------------------------------------ Do You Yahoo!? Todo lo que quieres saber de Estados Unidos, Am?rica Latina y el resto del Mundo. Vis?ta Yahoo! Noticias. -------------- next part -------------- An HTML attachment was scrubbed... URL: From Yves.Godin at lyrtech.com Mon Oct 7 08:08:00 2002 From: Yves.Godin at lyrtech.com (Yves Godin) Date: Mon Oct 7 08:08:00 2002 Subject: Low performance of the IDE on the SIS550 In-Reply-To: <1033959813.1136.115.camel@ollie> References: <5.0.2.1.0.20021003164245.00aab3c0@mail.lyre.qc.ca> <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> <5.0.2.1.0.20021003164245.00aab3c0@mail.lyre.qc.ca> Message-ID: <5.0.2.1.0.20021007081617.00aa3630@mail.lyre.qc.ca> At 11:03 AM 10/7/02 +0800, you wrote: >On Fri, 2002-10-04 at 05:36, Yves Godin wrote: > > At 01:24 PM 10/3/02 -0500, you wrote: > > >Yves Godin wrote: > > > > > >>Anyway, with the UDMA mode 2 I should have the performance that I > need. I > > >>look on header of the ide connector and the burst when writing seems to > > >>be quick anough but between each of these bursts I have a hole of 5-6 > seconds. > > > > > >How are you looking at the ide header? Logic Analyzer, scope?? If so, are > > >you saying that the dma burst timing looks good but you are getting > pauses > > >of 5 -6 seconds between bursts? > > > > I`am looking the DRQ signal on th ide header with a scope. Now I'm getting > > pauses of 2-3 seconds in writing. It`s weird because I don`t observe this > > on a P133 which is slower that the SIS550 and the read seems ok. > > > >What boad and chipset revision are you using ?? To evaluate the SIS550 , I'am using a board from ICOP, the ICOP-6070. ... ... SIS5513: IDE controller on PCI bus 00 dev 01 SIS5513: chipset revision 208 ... The SIS550 is running at 167 MHz. By using a smaller partion of type ext2 instead of ext3, a succeed to have peaks at 10 MB/s (locally) in writing with block size of 100 KBytes. I don't know if it's the smaller partition or the ext2 partition that help me. On the bigger ext3 partition, the max I got was 7 MB/s (locally). >Can you contact our marketing/technical support ?? I certainly will, but first I need to know what performance I can expected from the SIS550. I`m in a rush now, I need to determine this week if the SIS550 will be able to sustain 10 MB/s in seconds in NFS writing. You are probably the best person to ask, what is the performance that I can expected from the SIS550 ? The 550 is our prefered choice, but if it not performant anough, we will go with the VIA C3 with a PLE133T. >Ollie > >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Mon Oct 7 10:07:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 7 10:07:00 2002 Subject: set fixed mtrr can't work In-Reply-To: <20021007173443.A30437@mail.cwlinux.com> Message-ID: re that code you just sent a patch for ... it disables cache before doing MTRR settings for fixed MTRRs. My memory is that long ago that code was in there; or was it somewhere else; or did it get removed? ron From zhushisongzhu at yahoo.com Mon Oct 7 10:26:00 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Oct 7 10:26:00 2002 Subject: can't find keyboard of winfast6300 Message-ID: <20021007144047.31365.qmail@web13203.mail.yahoo.com> I am using cvs freeebios , linux kernel 2.4.18 and winfast6300 mainborad. All is Ok, but linux kernel can't find keyboard. it said keyboad timeout. what's the problem? I hope I can get your help. thanks zhu __________________________________________________ Do you Yahoo!? Faith Hill - Exclusive Performances, Videos & More http://faith.yahoo.com From m.neefs at dutchspace.nl Mon Oct 7 10:31:00 2002 From: m.neefs at dutchspace.nl (Marc neefs) Date: Mon Oct 7 10:31:00 2002 Subject: supermicro p4dms Message-ID: <3DA19DE6.1080600@fokkerspace.nl> Does anybody know if linuxbios would also work on the supermicro p4dms-6gm. This motherboard is intel e7500 based and seems quite simular to the p4dp6. lspci gives: 00:00.0 Host bridge: Intel Corp. e7500 DRAM Controller (rev 02) 00:00.1 Class ff00: Intel Corp. e7500 DRAM Controller Error Reporting (rev 02) 00:02.0 PCI bridge: Intel Corp. e7500 HI_B Virtual PCI-to-PCI Bridge (F0) (rev 02) 00:1d.0 USB Controller: Intel Corp. 82801CA/CAM USB (Hub (rev 02) 00:1d.1 USB Controller: Intel Corp. 82801CA/CAM USB (Hub (rev 02) 00:1d.2 USB Controller: Intel Corp. 82801CA/CAM USB (Hub (rev 02) 00:1e.0 PCI bridge: Intel Corp. 82801BA/CA PCI Bridge (rev 42) 00:1f.0 ISA bridge: Intel Corp. 82801CA ISA Bridge (LPC) (rev 02) 00:1f.1 IDE interface: Intel Corp. 82801CA IDE U100 (rev 02) 00:1f.3 SMBus: Intel Corp. 82801CA/CAM SMBus (rev 02) 01:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 03) 01:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 03) 01:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 03) 01:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 03) 02:03.0 Ethernet controller: Intel Corp. 82544GC Gigabit Ethernet Controller (rev 02) 03:02.0 SCSI storage controller: Adaptec AIC-7899P U160/m (rev 01) 03:02.1 SCSI storage controller: Adaptec AIC-7899P U160/m (rev 01) 03:03.0 Network controller: VMIC: Unknown device 5565 04:02.0 Signal processing controller: Datum Inc. Bancomm-Timing Division: Unknown device 4013 (rev 12) 04:04.0 VGA compatible controller: ATI Technologies Inc Rage XL (rev 27) 04:05.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev 0d) Thanks in advance, Marc Neefs -- Marc J. Neefs Dutch Space BV email: m.neefs at dutchspace.nl Project Operations phone: 071-5245269 Newtonweg 1 fax: 071-5245499 Leiden home phone: 015-2576259 The Netherlands From zhushisongzhu at yahoo.com Mon Oct 7 10:31:04 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Oct 7 10:31:04 2002 Subject: keyboard time out Message-ID: <20021007144526.25841.qmail@web13208.mail.yahoo.com> I'm using cvs freebios , kernel 2.4.18 and winfast6300 mainboard. All is ok , but kernel can't find keyboard and prompted keyboard timeout. what't the problem? I hope someone can help me. thanks zhu __________________________________________________ Do you Yahoo!? Faith Hill - Exclusive Performances, Videos & More http://faith.yahoo.com From aip at cwlinux.com Mon Oct 7 10:35:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Mon Oct 7 10:35:01 2002 Subject: can't find keyboard of winfast6300 In-Reply-To: <20021007144047.31365.qmail@web13203.mail.yahoo.com>; from zhushisongzhu@yahoo.com on Mon, Oct 07, 2002 at 07:40:47AM -0700 References: <20021007144047.31365.qmail@web13203.mail.yahoo.com> Message-ID: <20021007225006.A1561@mail.cwlinux.com> zhu shi song, > I am using cvs freeebios , linux kernel 2.4.18 and > winfast6300 mainborad. All is Ok, but linux kernel > can't find keyboard. it said keyboad timeout. > what's the problem? I hope I can get your help. You need this patch. Looks like you are getting progress. :) -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- diff -Nur freebios/src/arch/i386/lib/hardwaremain.c freebios.kbd/src/arch/i386/lib/hardwaremain.c --- freebios/src/arch/i386/lib/hardwaremain.c 2002-08-22 05:01:37.000000000 +0800 +++ freebios.kbd/src/arch/i386/lib/hardwaremain.c 2002-09-02 14:52:37.000000000 +0800 @@ -23,13 +23,13 @@ /* * C Bootstrap code for the INTEL - * $Id: hardwaremain.c,v 1.29 2002/08/21 21:01:37 rminnich Exp $ + * $Id: hardwaremain.c,v 1.28 2002/07/18 20:30:20 ebiederm Exp $ * */ #define LINUXBIOS #ifndef lint -static char rcsid[] = "$Id: hardwaremain.c,v 1.29 2002/08/21 21:01:37 rminnich Exp $"; +static char rcsid[] = "$Id: hardwaremain.c,v 1.28 2002/07/18 20:30:20 ebiederm Exp $"; #endif #ifndef MAX_PHYSICAL_CPUS @@ -342,7 +342,7 @@ nvram_on(); - //keyboard_on(); + keyboard_on(); #ifndef USE_NEW_SUPERIO_INTERFACE enable_floppy(); diff -Nur freebios/src/lib/elfboot.c freebios.kbd/src/lib/elfboot.c --- freebios/src/lib/elfboot.c 2002-08-22 05:02:38.000000000 +0800 +++ freebios.kbd/src/lib/elfboot.c 2002-09-02 14:52:56.000000000 +0800 @@ -623,7 +623,6 @@ for(i = 0; i < ELF_HEAD_SIZE - (sizeof(Elf_ehdr) + sizeof(Elf_phdr)); i+=16) { ehdr = (Elf_ehdr *)(&header[i]); if (memcmp(ehdr->e_ident, ELFMAG, 4) != 0) { - printk_debug("NO header at %d\n", i); continue; } printk_debug("Found ELF candiate at offset %d\n", i); @@ -642,12 +641,10 @@ } ehdr = 0; } - printk_debug("header_offset is %d\n", header_offset); if (header_offset == -1) { goto out; } - printk_debug("Try to load at offset 0x%x\n", header_offset); result = elfload(stream, mem, header + header_offset , ELF_HEAD_SIZE - header_offset); out: -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From wimmer at decomsys.com Mon Oct 7 12:03:00 2002 From: wimmer at decomsys.com (marcus wimmer) Date: Mon Oct 7 12:03:00 2002 Subject: cannot initialize ide controller Message-ID: <200210071602.g97G2Bi26516@nwn.definitive.org> Hi there, I'm working on employing linuxbios for my emnbedded system. loading my kernel image from hda1 seems to be the best solution for my purposes. unfortunately I stick with some problems accessing the ide device for a whole while now. thus I don't seem to get around asking for help again and giving a description of my proceeding 'though I hate to bore busy people with details my target hardware: digitallogic smartcore-p5 SEN ROM MTD: 256k flash IDE device: 128MB disk on module what I did so far is: dos files converted: some time ago I reportet some building problems and nobody seemed to have stepped into that trap before. in the meantime the reason turned out to be several files containing dos like line terminators. (a greenhorns mistake, you may say ;) ) dos2unix helped. for a list of those files see addendum linker script changed: when running linuxbios first time on my target it got hung since some functions weren't found at the addresses where they're supposed to be. I solved this by setting the last alignment of every output section in ldscript.base to 32 my environment: both of the above difficulties may be specific for my particular environment: suse 7.3: gcc version 2.95.3 ln version 4.1 as version 2.11.90.0.29 I reported them anyway since someone might happen to have the same. config file changed to p5: many thanks to ron for the config file. was it meant to be for the p5? I changed all the 'p3's to 'p5's but left all the opions unchanged. (see addendum) what keeps me from proceeding now is: IDE initializing fails. when booting I recieve the message: (see addendum for full bootmessages) "I am now initializing the ide system Controller 0: detect FAILED (1) Initializing the main controller failed! Could not initialize driver..." which as far as I figured out means that the write and confirm read operation on the ide legacy port failed. The mentioned errormessage led me to try calling southbridge_fixup right after mainboard_fixup in hardwaremain.c (just like in the smartcore_p3 code) - without any effect. I wonder if a slightly different mainboard type could be responsible for that (smartcore-p5 SEN or SEV) or if the ide initialization might work for boards with compact flash but not for those with disk on module? Can someone help me to deal with that problem? regards, marc ADDENDUM: list of CRLF containing file in freebios: (additional ones may have been added since my last checkout) ./src/northbridge/acer/m1631/ipl.S ./src/northbridge/acer/m1631/ipl.h ./src/northbridge/intel/430tx/raminit.inc ./src/superio/SMC/fdc37c67x/setup_serial.inc ./src/mainboard/asus/cua/ipl.S ./src/mainboard/asus/cua/ipl.h ./src/mainboard/digitallogic/smartcore-p3/Config ./src/mainboard/digitallogic/smartcore-p5/Config ./util/config/l440gx.config ./util/config/l440bx-test12.config ./HOWTO/ALIM1631_M1535D adapted config file: This will make a target directory of ./smartcore-p5 target smartcore-p5 mainboard digitallogic/smartcore-p5 # Enable Serial Console for debugging option SERIAL_CONSOLE=1 option NO_KEYBOARD=1 option INBUF_COPY=1 option DEFAULT_CONSOLE_LOGLEVEL=7 option MAXIMUM_CONSOLE_LOGLEVEL=7 option DEBUG=1 option BOOT_IDE=1 dir /src/pc80/ide option USE_ELF_BOOT=1 option RAMTEST=1 option CONFIG_LINUXBIOS_ENABLE_IDE=1 option CONFIG_LINUXBIOS_LEGACY_IDE=1 payload /dev/null bootmessages: LinuxBIOS-1.0.0 Fri Oct 4 12:14:31 CEST 2002 starting... Testing SDRAM : 00000000-0009ffff SDRAM fill: 00000009ffff SDRAM verify: 00000009ffff Done. LinuxBIOS-1.0.0 Fri Oct 4 12:14:31 CEST 2002 booting... Finding PCI configuration type. Scanning PCI bus...done totalram: 128M Initializing CPU #0 Enabling cache...done. done. CPU #0 Initialized Allocating PCI resources...done. Enabling PCI resourcess...done. Initializing PCI devices... PCI devices initialized Enabling extended BIOS access...done. Checking IRQ routing tables...done. Copying IRQ routing tables to 0xf0000...done. Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 end 0:70ab2326, start 0:651b22f2 32-bit delta 185 calibrate_tsc 32-bit result is 24 clocks_per_usec: 185 I am now initializing the ide system Controller 0: detect FAILED (1) Initializing the main controller failed! Could not initialize driver... Cannot Load ELF Image adapted ldscript: /* * Memory map: * * _RAMBASE * : data segment * : bss segment * : heap * : stack * _ROMBASE * : linuxbios text * : readonly text */ /* * Bootstrap code for the STPC Consumer * Copyright (c) 1999 by Net Insight AB. All Rights Reserved. * * $Id: ldscript.base,v 1.13 2002/07/25 20:50:52 ebiederm Exp $ * */ /* * Written by Johan Rydberg, based on work by Daniel Kahlin. * Rewritten by Eric Biederman */ /* * We use ELF as output format. So that we can * debug the code in some form. */ OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") OUTPUT_ARCH(i386) ENTRY(_start) SECTIONS { . = DEFINED(_ROMBASE)? _ROMBASE : _RAMBASE; /* This section might be better named .setup */ .rom . : { _rom = .; *(.rom.text); *(.rom.data); . = ALIGN(32); _erom = .; } _lrom = LOADADDR(.rom); _elrom = LOADADDR(.rom) + SIZEOF(.rom); . = DEFINED(_ROMBASE)? _RAMBASE : . ; /* * First we place the code and read only data (typically const declared). * This get placed in rom. */ .text . : AT (_elrom) { _text = .; *(.text); *(.text.*); . = ALIGN(32); _etext = .; } _ltext = LOADADDR(.text); _eltext = LOADADDR(.text) + SIZEOF(.text); .rodata . : AT(_eltext){ _rodata = .; . = ALIGN(4); streams = . ; *(.rodata.streams) estreams = .; . = ALIGN(4); pci_drivers = . ; *(.rodata.pci_drivers) epci_drivers = . ; *(.rodata) *(.rodata.*) . = ALIGN(32); _erodata = .; } _lrodata = LOADADDR(.rodata); _elrodata = LOADADDR(.rodata) + SIZEOF(.rodata); /* * After the code we place initialized data (typically initialized * global variables). This gets copied into ram by startup code. * __data_start and __data_end shows where in ram this should be placed, * whereas __data_loadstart and __data_loadend shows where in rom to * copy from. */ .data . : AT(_elrodata) { _data = .; *(.data) . = ALIGN(32); _edata = .; } _ldata = LOADADDR(.data); _eldata = LOADADDR(.data) + SIZEOF(.data); /* The initialized data segment. * This is all of the data that we copy from rom into the ram. */ _iseg = _text; _eiseg = _edata; _liseg = _ltext; _eliseg = _eldata; /* * bss does not contain data, it is just a space that should be zero * initialized on startup. (typically uninitialized global variables) * crt0.S fills between _bss and _ebss with zeroes. */ _bss = .; .bss . : { *(.bss) *(.sbss) *(COMMON) } _ebss = .; _end = .; _stack = .; .stack . : { /* Reserve a stack for each possible cpu, +1 extra */ . = ((MAX_CPUS * STACK_SIZE) + STACK_SIZE) ; } _estack = .; _heap = .; .heap . : { /* Reserve 256K for the heap */ . = HEAP_SIZE ; . = ALIGN(4); } _eheap = .; /* The ram segment * This is all address of the memory resident copy of linuxBIOS. */ _ram_seg = _text; _eram_seg = _eheap; /DISCARD/ : { *(.comment) *(.note) } } From steve at nexpath.com Mon Oct 7 14:51:00 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Mon Oct 7 14:51:00 2002 Subject: usb root FS? In-Reply-To: <20021007113948.A25985@mail.cwlinux.com> Message-ID: The link doesn't seem to work, but I was able to find this one that does work: http://www.cwlinux.com/downloads/kexec/linux-2.4.19-lb-kexec.patch Thanks, -Steve G. > -----Original Message----- > From: Andrew Ip [mailto:aip at cwlinux.com] > Sent: Sunday, October 06, 2002 8:40 PM > To: Steve M. Gehlbach > Cc: linuxbios at clustermatic.org > Subject: Re: usb root FS? > > > Steve, > > > Is there a version of kexec for 2.4.18/19 (and where can I download it)? > > The only files I could find were for 2.5.x. > Here is my back-port patch. > ftp://ftp.cwlinux.com/pub/downloads/kexec/linux-2.4.19-lb-kexec.patch > > -Andrew > > -- > Andrew Ip > Email: aip at cwlinux.com > Tel: (852) 2542 2046 > Fax: (852) 2542 2036 > Mobile: (852) 9201 9866 > > Cwlinux Limited > Unit 202B 2/F Lai Cheong Factory Building, > 479-479A Castle Peak Road, > Lai Chi Kok, Kowloon, > Hong Kong. > > Tel: (852)2542 2046 > Fax: (852)2542 2036 > > For public pgp key, please obtain it from http://www.keyserver.net/en. > From angelo-arifi at cogeco.ca Mon Oct 7 15:09:00 2002 From: angelo-arifi at cogeco.ca (Angelo Arifi) Date: Mon Oct 7 15:09:00 2002 Subject: Alright regarding the player project (read up -- continuation of mini-tx post) Message-ID: <001401c26e37$1e089210$64041d09@blackbird> Ya, so who is intersted please join in the discussion alot of people are more and more interested! http://www.diyaudio.com/forums/showthread.php?s=cfbc7224dc55081eff679033d696196d&threadid=6552&perpage=15&pagenumber=1 Thats the diyaudio forum they make alot of hi-fi stuff, i started this little project on there and got alot of people interseted I am sure many of you would love to join in this! Please join the forum and start posting :) ----------------------------------- Angelo "Gigatron" Arifi -------------- next part -------------- An HTML attachment was scrubbed... URL: From ricardo_strauch at yahoo.com Mon Oct 7 16:00:01 2002 From: ricardo_strauch at yahoo.com (=?iso-8859-1?q?Ricardo=20Strauch?=) Date: Mon Oct 7 16:00:01 2002 Subject: Mini-ITX Mb In-Reply-To: <001d01c26dfa$80869370$0401a8c0@minibm> Message-ID: <20021007201429.57222.qmail@web40304.mail.yahoo.com> In my opinion, the best option is to add effort to develop one producto for the Mini-ITX.(is the future) ?you agree? ?How much have you developed until this moment ? Regards Ricardo CMZ wrote:I am working same thing too, but for a slighly different chipsets (VIA CLE266) Regards! --------------------------------- Do You Yahoo!? Todo lo que quieres saber de Estados Unidos, Am?rica Latina y el resto del Mundo. Vis?ta Yahoo! Noticias. -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Mon Oct 7 19:15:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 7 19:15:00 2002 Subject: welcome to andrew ip Message-ID: I've just added andrew ip of cwlinux.com as a developer on linuxbios. Please welcome Andrew, he has been a real supporter and helped a lot with the SiS platforms, as well as running a company that sells linuxbios mainboards. Andrew, go ahead and apply those patches you posted in the last two days :-) ron From ollie at sis.com.tw Mon Oct 7 20:46:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Mon Oct 7 20:46:01 2002 Subject: Low performance of the IDE on the SIS550 In-Reply-To: <5.0.2.1.0.20021007081617.00aa3630@mail.lyre.qc.ca> References: <5.0.2.1.0.20021003164245.00aab3c0@mail.lyre.qc.ca> <5.0.2.1.0.20021003075346.00ab5b30@mail.lyre.qc.ca> <5.0.2.1.0.20021003164245.00aab3c0@mail.lyre.qc.ca> <5.0.2.1.0.20021007081617.00aa3630@mail.lyre.qc.ca> Message-ID: <1034038991.1132.120.camel@ollie> On Mon, 2002-10-07 at 20:37, Yves Godin wrote: > > >Can you contact our marketing/technical support ?? > > I certainly will, but first I need to know what performance > I can expected from the SIS550. I`m in a rush now, I need > to determine this week if the SIS550 will be able to sustain > 10 MB/s in seconds in NFS writing. > > You are probably the best person to ask, what is the performance > that I can expected from the SIS550 ? The 550 is our prefered choice, > but if it not performant anough, we will go with the VIA C3 with a PLE133T. > > I have forwarded your mail to our IAPD technical marketing personnel Jason Tsai. I believe he will give you detailed benchmark result. Ollie From aip at cwlinux.com Mon Oct 7 21:27:00 2002 From: aip at cwlinux.com (Andrew Ip) Date: Mon Oct 7 21:27:00 2002 Subject: usb root FS? In-Reply-To: ; from steve@nexpath.com on Mon, Oct 07, 2002 at 12:12:08PM -0700 References: <20021007113948.A25985@mail.cwlinux.com> Message-ID: <20021008094205.A8173@mail.cwlinux.com> Steve, > The link doesn't seem to work, but I was able to find this one that does > work: > > http://www.cwlinux.com/downloads/kexec/linux-2.4.19-lb-kexec.patch should be ftp://ftp.cwlinux.com/pub/downloads/kexec/linux-2.4.19-lb-kexec.patch -Andrew > > > -----Original Message----- > > From: Andrew Ip [mailto:aip at cwlinux.com] > > Sent: Sunday, October 06, 2002 8:40 PM > > To: Steve M. Gehlbach > > Cc: linuxbios at clustermatic.org > > Subject: Re: usb root FS? > > > > > > Steve, > > > > > Is there a version of kexec for 2.4.18/19 (and where can I download it)? > > > The only files I could find were for 2.5.x. > > Here is my back-port patch. > > ftp://ftp.cwlinux.com/pub/downloads/kexec/linux-2.4.19-lb-kexec.patch > > -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From zhushisongzhu at yahoo.com Mon Oct 7 23:51:01 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Oct 7 23:51:01 2002 Subject: thanks for help Message-ID: <20021008040546.43318.qmail@web13207.mail.yahoo.com> all is ok. thanks to andrew ip. btw, now i am using initrd_dyn to boot linux from DOC. I have checked the patch, the most recent patch is for kernel-2.4.18. I haven't got for kernel-2.4.19. Do you hear about it? or if I want to use 2.4.19, can you give me some suggestions? Also , i hope you can come over to shenzhen to play. we are very close. thanks zhu __________________________________________________ Do you Yahoo!? Faith Hill - Exclusive Performances, Videos & More http://faith.yahoo.com From christer at weinigel.se Tue Oct 8 10:24:00 2002 From: christer at weinigel.se (Christer Weinigel) Date: Tue Oct 8 10:24:00 2002 Subject: LinuxBIOS + FreeBSD = true? Message-ID: <20021008143904.564AC75800@zoo.weinigel.se> Hi, a quick question, is LinuxBIOS able to boot any of the BSD-flavours? I'm especially interested in FreeBSD. /Christer -- "Just how much can I get away with and still go to heaven?" Freelance consultant specializing in device driver programming for Linux Christer Weinigel http://www.weinigel.se From bari at onelabs.com Tue Oct 8 10:26:01 2002 From: bari at onelabs.com (Bari Ari) Date: Tue Oct 8 10:26:01 2002 Subject: LinuxBIOS on Slashdot Again Message-ID: <3DA2EEAE.30903@onelabs.com> LinuxBIOS makes Slashdot again: http://science.slashdot.org/science/02/10/08/0324241.shtml?tid=106 Bari From pyro at linuxlabs.com Tue Oct 8 10:35:00 2002 From: pyro at linuxlabs.com (steven james) Date: Tue Oct 8 10:35:00 2002 Subject: Ram problem Message-ID: Greetings, I'm trying to get ram working on an e7500 MCH. It seems to be actually initting, but when I run ramtest it, I consistantly see a single bit toggled when reading back such as: 00024ab4:00024a94 00024abc:00024a9c 00024ad4:00024af4 00024adc:00024afc 00024af4:00024ad4 00024afc:00024adc 00024b14:00024b34 00024b1c:00024b3c 00024b34:00024b14 00024b3c:00024b1c 00024b54:00024b74 00024b5c:00024b7c 00024b74:00024b54 00024b7c:00024b5c 00024b94:00024bb4 00024b9c:00024bbc 00024bb4:00024b94 00024bbc:00024b9c 00024bd4:00024bf4 00024bdc:00024bfc Other times, I see that the second read (in order to display the bad value) actually reads successfully such as 000127a8:000127a8 Does anyone have any ideas what might cause that? G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Tue Oct 8 12:12:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 8 12:12:00 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: <20021008143904.564AC75800@zoo.weinigel.se> Message-ID: On Tue, 8 Oct 2002, Christer Weinigel wrote: > a quick question, is LinuxBIOS able to boot any of the BSD-flavours? I wish. I can't get interest from any of the BSD community. ron From agnew at cs.umd.edu Tue Oct 8 17:28:01 2002 From: agnew at cs.umd.edu (Adam Agnew) Date: Tue Oct 8 17:28:01 2002 Subject: Walmart PC from MicroTel In-Reply-To: Message-ID: <20021003003536.N82096-100000@www.missl.cs.umd.edu> Was the question ever solved as to what chipset is used in the $199 model from walmart.com? On Wed, 2 Oct 2002, Ronald G Minnich wrote: > > my very nice $600 non-Windows PC from Walmart is a deal. > > The chipset is SiS .... for P4 .... SDRAM .... Hey, Ollie, where is the > port? > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From mr_walsh at yahoo.com Tue Oct 8 17:50:01 2002 From: mr_walsh at yahoo.com (Matt Walsh) Date: Tue Oct 8 17:50:01 2002 Subject: getting started Message-ID: <20021008220501.19411.qmail@web13603.mail.yahoo.com> All, I would like to get my feet wet and build a cheap 3 node cluster to play with linux bios, beowulf, etc. Soo, if you were starting from scratch and wanted the motherboard that... - is cheap - has good linux bios documentation - has a good success rate ...which would you choose? Thanks in advance, --matt __________________________________________________ Do you Yahoo!? Faith Hill - Exclusive Performances, Videos & More http://faith.yahoo.com From steve at nexpath.com Tue Oct 8 18:13:01 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Tue Oct 8 18:13:01 2002 Subject: Walmart PC from MicroTel In-Reply-To: <20021003003536.N82096-100000@www.missl.cs.umd.edu> Message-ID: > Was the question ever solved as to what chipset is used in the $199 model > from walmart.com? It is a Giga-byte mobo, the GA-6VEML: http://tw.giga-byte.com/products/products.htm. They list it as the VIA VT8602 (PLE133T) and VIA VT82C686B chipsets. -Steve From rminnich at lanl.gov Tue Oct 8 18:17:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 8 18:17:00 2002 Subject: getting started In-Reply-To: <20021008220501.19411.qmail@web13603.mail.yahoo.com> Message-ID: I strongly recommend you just buy one pre-installed with linuxbios to start. See cwlinux.com ron From bari at onelabs.com Tue Oct 8 18:37:01 2002 From: bari at onelabs.com (Bari Ari) Date: Tue Oct 8 18:37:01 2002 Subject: [ARMboot-users] ARMboot vs BLOB References: <20021008221704.879A7FA9F@denx.denx.de> Message-ID: <3DA36237.3060305@onelabs.com> Wolfgang Denk wrote: >In message <3DA35343.3010606 at onelabs.com> you wrote: > > >>We're looking at trying to merge ARMboot or BLOB into the LinuxBIOS tree >>to give LinuxBIOS >>http://www.acl.lanl.gov/linuxbios/ a common code base to boot ARM. >> >> > >You may consider PPCBoot (or "Das U-Boot" = the Universal Booter as >the next major release will be renamed), too. > >PPCboot is where ARMBoot descended from, and where it has been merged >back (more or less completely). Ports for other architectures >(including ColdFire, XScale, and even x86) are in the works or being >discussed. > > LinuxBIOS has mainly evolved for x86 and Alpha for large clustering applications and has built up good a user and developer base. It's also gaining popularity for x86 embedded applications. LinuxBIOS also includes support for Etherboot. LinuxBIOS currently boots x86 to Linux and Plan9. It's also being used to build a new 10TeraFLOP cluster at LANL. http://www.lanl.gov/worldview/news/releases/archive/02-106.shtml Bari From htran at viosoft.com Tue Oct 8 19:41:00 2002 From: htran at viosoft.com (Hieu T. Tran) Date: Tue Oct 8 19:41:00 2002 Subject: LinuxBIOS in 512KB flash Message-ID: We're working to port LinuxBIOS to a via 133 platform with a 512KB boot flash. We believe that the flash is wired such that on reset, 0xFFFF0 is mapped to 0x7FFF0 on the flash, which is slightly below 512KB on the flash. We have been trying various config file settings (ROMTOP, ROMSIZE, PAYLOAD_SIZE) to position ROMTOP and reset_vector accordingly without much success. Simply getting a larger flash wont help since the board will only recognize the first 512KB. Has anyone solved this problem? -- HT htran at viosoft.com From rminnich at lanl.gov Tue Oct 8 20:03:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 8 20:03:01 2002 Subject: LinuxBIOS in 512KB flash In-Reply-To: Message-ID: On Tue, 8 Oct 2002, Hieu T. Tran wrote: > We're working to port LinuxBIOS to a via 133 platform > with a 512KB boot flash. We believe that the flash is > wired such that on reset, 0xFFFF0 is mapped to 0x7FFF0 > on the flash, which is slightly below 512KB on the flash. I am missing the problem. That's what should happen, right? So that physical ffff0 maps to 7fff0 on the flash, and the 8086 reset vector is visible to the processor at 0xf000:fff0, and the correct instructions are fetched. I don't think there is a problem here. ron From ebiederman at lnxi.com Tue Oct 8 20:14:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Tue Oct 8 20:14:01 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: <20021008143904.564AC75800@zoo.weinigel.se> References: <20021008143904.564AC75800@zoo.weinigel.se> Message-ID: Christer Weinigel writes: > Hi, > > a quick question, is LinuxBIOS able to boot any of the BSD-flavours? > I'm especially interested in FreeBSD. LinuxBIOS will load etherboot. etherboot has support for FreeBSD. But I believe the FreeBSD kernel uses vm86 mode and makes x86 BIOS calls which LinuxBIOS does not implement. It should just be a matter of modifying the BSDs to not make x86 BIOS calls and instead read the LinuxBIOS table. There may be a few integration issues but it should not be too hard to get going. Eric From ebiederman at lnxi.com Tue Oct 8 20:19:00 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Tue Oct 8 20:19:00 2002 Subject: Ram problem In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > I'm trying to get ram working on an e7500 MCH. > It seems to be actually initting, but when I run ramtest it, I > consistantly see a single bit toggled when reading back such as: > Other times, I see that the second read (in order to display the bad > value) actually reads successfully such as 000127a8:000127a8 Hmm. it sounds very much like you are missing something. When I finally finally got the ram intialization sequence working the ram was rock solid. Is this known good ram? > Does anyone have any ideas what might cause that? There are too many variables for me to have a good guess. I am just about to sync my tree with the sourceforge tree and you can compare notes. Eric From ebiederman at lnxi.com Tue Oct 8 20:26:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Tue Oct 8 20:26:01 2002 Subject: LinuxBIOS in 512KB flash In-Reply-To: References: Message-ID: "Hieu T. Tran" writes: > We're working to port LinuxBIOS to a via 133 platform > with a 512KB boot flash. We believe that the flash is > wired such that on reset, 0xFFFF0 is mapped to 0x7FFF0 > on the flash, which is slightly below 512KB on the flash. That sounds correct. Though I would normally use the mapping at: 0xFFFFFFF0 and not even mess with the legacy stuff. > We have been trying various config file settings > (ROMTOP, ROMSIZE, PAYLOAD_SIZE) to position ROMTOP and > reset_vector accordingly without much success. Simply > getting a larger flash wont help since the board will > only recognize the first 512KB. Has anyone solved this > problem? What exact problem are you having? When you build romimage it always places the entry point at the end of the rom. Eric From ebiederman at lnxi.com Tue Oct 8 20:39:00 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Tue Oct 8 20:39:00 2002 Subject: can't find keyboard of winfast6300 In-Reply-To: <20021007225006.A1561@mail.cwlinux.com> References: <20021007144047.31365.qmail@web13203.mail.yahoo.com> <20021007225006.A1561@mail.cwlinux.com> Message-ID: Andrew Ip writes: > zhu shi song, > > I am using cvs freeebios , linux kernel 2.4.18 and > > winfast6300 mainborad. All is Ok, but linux kernel > > can't find keyboard. it said keyboad timeout. > > what's the problem? I hope I can get your help. > You need this patch. Looks like you are getting progress. :) Any clue who commented out keyboard_on? We need to tell them to include #define NO_KEYBOARD in their build... Eric From rminnich at lanl.gov Tue Oct 8 20:59:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 8 20:59:00 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: Message-ID: On 8 Oct 2002, Eric W Biederman wrote: > But I believe the FreeBSD kernel uses vm86 mode and makes x86 BIOS calls > which LinuxBIOS does not implement. It should just be a matter of modifying > the BSDs to not make x86 BIOS calls and instead read the LinuxBIOS table. yup. That's the state of play. I looked at this 2 years ago and talked to some freebsd guys but did not get back any hints of interest. A shame too. I used to always run freebsd clusters ... ron From htran at viosoft.com Wed Oct 9 01:19:00 2002 From: htran at viosoft.com (Hieu T. Tran) Date: Wed Oct 9 01:19:00 2002 Subject: LinuxBIOS in 512KB flash In-Reply-To: Message-ID: Ron and Eric, Thank you for the response. The problem that we're having is that the generated romimage positions reset_vector / ROMTOP at 0xFFFF0, resulting in an image size of ~ 1MB. Put another way, reset_vector is at offset 1MB on the flash device. At boot, the system fetches the address at 0xFFFF0, and executes the code there. As this address is truncated to 0x7FFF0 on our platform, or offset 512KB of flash, which is more or less random junk rather than the intended reset_vector. To work around this problem, we're trying various methods to force reset_vector / ROMTOP to 0x7FFF0. It appears that there are several ways to do this, ranging from adorning the build config file with various ROMTOP, ROMSIZE, and PAYLOAD_SIZE settings, to providing a customized ldscript.ld file for the mainboard. What I'd like to know is if there is a simple way to accomplish this. Also, I would be much oblidged for pointer to any document, if exists, that prescribes how to construct Config file for a given platform. I suspect other developers would enjoy this as well. -- HT -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org]On Behalf Of Eric W Biederman Sent: Tuesday, October 08, 2002 5:41 PM To: Hieu T. Tran Cc: linuxbios at clustermatic.org Subject: Re: LinuxBIOS in 512KB flash "Hieu T. Tran" writes: > We're working to port LinuxBIOS to a via 133 platform > with a 512KB boot flash. We believe that the flash is > wired such that on reset, 0xFFFF0 is mapped to 0x7FFF0 > on the flash, which is slightly below 512KB on the flash. That sounds correct. Though I would normally use the mapping at: 0xFFFFFFF0 and not even mess with the legacy stuff. > We have been trying various config file settings > (ROMTOP, ROMSIZE, PAYLOAD_SIZE) to position ROMTOP and > reset_vector accordingly without much success. Simply > getting a larger flash wont help since the board will > only recognize the first 512KB. Has anyone solved this > problem? What exact problem are you having? When you build romimage it always places the entry point at the end of the rom. Eric _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Wed Oct 9 01:36:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Oct 9 01:36:00 2002 Subject: LinuxBIOS in 512KB flash In-Reply-To: References: Message-ID: "Hieu T. Tran" writes: > Ron and Eric, > > Thank you for the response. > > The problem that we're having is that the generated romimage > positions reset_vector / ROMTOP at 0xFFFF0, resulting in an > image size of ~ 1MB. Put another way, reset_vector is at offset > 1MB on the flash device. At boot, the system fetches the > address at 0xFFFF0, and executes the code there. As this > address is truncated to 0x7FFF0 on our platform, or offset 512KB > of flash, which is more or less random junk rather than the > intended reset_vector. > > To work around this problem, we're trying various methods to > force reset_vector / ROMTOP to 0x7FFF0. It appears that there > are several ways to do this, ranging from adorning the build > config file with various ROMTOP, ROMSIZE, and PAYLOAD_SIZE settings, > to providing a customized ldscript.ld file for the mainboard. > > What I'd like to know is if there is a simple way to accomplish this. > Also, I would be much oblidged for pointer to any document, if > exists, that prescribes how to construct Config file for a given > platform. I suspect other developers would enjoy this as well. For the linuxbios part of the rom: PAYLOAD_SIZE+ROM_IMAGE_SIZE == bytes in romimage PAYLOAD_SIZE is the amount of space reserved for your bootloader. _ROMBASE is the start address (of the ROM) ROM_IMAGE_SIZE is far long you go after that, often 64K. So something like: option PAYLOAD_SIZE=458752 option ROM_IMAGE_SIZE=65536 option _ROMBASE=0xf0000 Should achieve what you are trying to do... Eric From zhushisongzhu at yahoo.com Wed Oct 9 09:41:01 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Wed Oct 9 09:41:01 2002 Subject: acpi error Message-ID: <20021009135627.52989.qmail@web13201.mail.yahoo.com> I compile acpi into the kernel. When the kernel booting, through doc , acpi error. When I boot it from bios , it's ok. I'm using cvs freebios, linux-2.4.18. who met the problem? thanks zhu __________________________________________________ Do you Yahoo!? Faith Hill - Exclusive Performances, Videos & More http://faith.yahoo.com From bari at onelabs.com Wed Oct 9 09:46:01 2002 From: bari at onelabs.com (Bari Ari) Date: Wed Oct 9 09:46:01 2002 Subject: [Fwd: Re: [PPCBoot-users] PPCboot vs ARMboot or Blob and a Merge with LinuxBIOS] Message-ID: <3DA43741.3070200@onelabs.com> in message <3DA3D18E.4000109 at onelabs.com> you wrote: > > LinuxBIOS was designed to use Linux to boot the OS of choice. So was PPCBoot, but without excluding the resto of the world. > It uses some assembly to do some basic init and config and then jumps to > Linux to fully configure the rest of the system, after that LinuxBIOS > jumps to whatever OS kernel is wanted. So your boot sequence is LinuxBIOS => Linux => LinuxBIOS => Target OS? Seems a bit overkill to me. Especially in systems where (flash) memory is tight it might be a PITA to have to reserve space for a Linux kernel just to initialize the hardware. > LinuxBIOS has booted; Linux, Plan9 and Win-CE. There is currently an > effort to boot BSD and also another to boot Win32 (probably XP). > Architectures include x86 and Alpha. IA64 is also in the works. The current version of PPCBoot boots Linux, VxWorks, QNX, and NetBSD. It comes with out-of-the-box configurations for 98 x PowerPC boards (MPC8xx, MPC824x, MPC8260, MPX7xx, MPC74xx, IBM 4xx), 3 x StrongARM boards, 2 x ARM7 and 3 x ARM9 systems. This includes a couple of commercial products like boards by esd, Gespac, Microsys, TQ, but also desktop systems like the AmigaOne or real-life products (from ISDN routers, Bluetooth LAN Access Points to bigger things like huge mobile cranes). Ports for ColdFire and XScale are in the works. x86 is being discussed. > For simple systems PPCboot looks like a great way to go. LinuxBIOS would > add support and config for more complex systems that include PCI, PCI > Express, Infiniband and Hypertransport. It seems you do not know much about PPCBoot. PPCBoot supports a LOT of devices, of course including PCI. But also plain flash, DOC, flash disk, Compact Flash, harddisk, CDROM, SCSI devices, even some USB. PPCBoot provides a very powerful method to store configuration parameters and command sequences. In most systems you do not need tools like ifconfig, route, etc. because PPCBoot can pass all required information to the Linux kernel's IP autoconfig mechanism. The environment is protected, and can be stored redundand so it is a very reliable mechanism. PPCBoot also provides powerful scripting capabilties; busybox' "hush" shell has been integrated, so you can write standard shell scripts or run conditional command sequences using "if...then...else...fi", "for...do...done", "while...do...done", "until...do...done", or using shortcuts like "cmd1 && cmd2" or "cmd1 || cmd2". A lot of complicated things like reliable software upgrade procedures with guaranteed fall-back to the old, working version can be implemented in PPCBoot with just a few lines of script. PPCBoot also provides many additional features that are less frequently required, but very handy when you need them, for example dial-in support (so you can attach a modem to the serial console for remote administration), password protection, extensive POST code, etc. etc. From stepan at suse.de Wed Oct 9 09:47:00 2002 From: stepan at suse.de (Stefan Reinauer) Date: Wed Oct 9 09:47:00 2002 Subject: acpi error In-Reply-To: <20021009135627.52989.qmail@web13201.mail.yahoo.com> References: <20021009135627.52989.qmail@web13201.mail.yahoo.com> Message-ID: <20021009140216.GE1002@suse.de> * zhu shi song [021009 15:56]: > I compile acpi into the kernel. When the kernel > booting, > through doc , acpi error. When I boot it from bios , > > it's ok. > I'm using cvs freebios, linux-2.4.18. > who met the problem? LinuxBIOS does not provide ACPI tables at the moment. Thus, when Linux is searching for these, the search fails. Nothing evil, if the machine is set up correctly without ACPI. Best regards, Stefan Reinauer -- The x86 isn't all that complex - it just doesn't make a lot of sense. -- Mike Johnson, Leader of 80x86 Design at AMD Microprocessor Report (1994) From stepan at suse.de Wed Oct 9 09:54:01 2002 From: stepan at suse.de (Stefan Reinauer) Date: Wed Oct 9 09:54:01 2002 Subject: [Fwd: Re: [PPCBoot-users] PPCboot vs ARMboot or Blob and a Merge with LinuxBIOS] In-Reply-To: <3DA43741.3070200@onelabs.com> References: <3DA43741.3070200@onelabs.com> Message-ID: <20021009140947.GF1002@suse.de> * Bari Ari [021009 16:03]: > in message <3DA3D18E.4000109 at onelabs.com> you wrote: > > > >LinuxBIOS was designed to use Linux to boot the OS of choice. > > So was PPCBoot, but without excluding the resto of the world. Neither does LinuxBIOS.. It can load plan9 and winCE afaik. > >It uses some assembly to do some basic init and config and then jumps to > >Linux to fully configure the rest of the system, after that LinuxBIOS > >jumps to whatever OS kernel is wanted. > > So your boot sequence is LinuxBIOS => Linux => LinuxBIOS => Target OS? > Seems a bit overkill to me. Especially in systems where (flash) > memory is tight it might be a PITA to have to reserve space for a > Linux kernel just to initialize the hardware. It's LinuxBIOS => EtherBoot => TargetOS. Linux itself is basically not needed. > >For simple systems PPCboot looks like a great way to go. LinuxBIOS would > >add support and config for more complex systems that include PCI, PCI > >Express, Infiniband and Hypertransport. Is there any hypertransport setup code yet? One might assume that some major three letter hardware vendor would not want that code to become public? Best regards, Stefan Reinauer -- The x86 isn't all that complex - it just doesn't make a lot of sense. -- Mike Johnson, Leader of 80x86 Design at AMD Microprocessor Report (1994) From rminnich at lanl.gov Wed Oct 9 10:29:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 9 10:29:00 2002 Subject: [Fwd: Re: [PPCBoot-users] PPCboot vs ARMboot or Blob and a Merge with LinuxBIOS] In-Reply-To: <3DA43741.3070200@onelabs.com> Message-ID: On Wed, 9 Oct 2002, Bari Ari wrote: > > LinuxBIOS was designed to use Linux to boot the OS of choice. > > So was PPCBoot, but without excluding the resto of the world. this is not the forum for PPCBoot vs. LinuxBIOS arguments. I Just Don't Care. I am sure PPCBoot is wonderful software! > So your boot sequence is LinuxBIOS => Linux => LinuxBIOS => Target OS? no. The boot sequence is: - LinuxBIOS -> Linux -> OS (i.e. on Pink) - LinuxBIOS -> 9load -> Plan 9 - LinuxBIOS -> Etherboot built in to linuxbios -> OS of choice - LinuxBios -> Etherboot (external ) -> OS of choice In other words, we have lots of boot sequences depending on the target system and OS. The issue of *BSD is not that we can't boot it. We can. The issue is that *BSD wants to make BIOS calls we don't support. > Seems a bit overkill to me. Especially in systems where (flash) > memory is tight it might be a PITA to have to reserve space for a > Linux kernel just to initialize the hardware. We Have Our Reasons. And, we don't always load linux in flash. > The current version of PPCBoot boots Linux, VxWorks, QNX, and NetBSD. terrific! I'm happy for you. But this is not a competition. > It seems you do not know much about PPCBoot. funny, as it seem syou don't know much about linuxbios. So we all need to read more :-) > PPCBoot also provides powerful scripting capabilties; busybox' "hush" > shell has been integrated, so you can write standard shell scripts or > run conditional command sequences using "if...then...else...fi", > "for...do...done", "while...do...done", "until...do...done", or using > shortcuts like "cmd1 && cmd2" or "cmd1 || cmd2". I really don't much like firmware that starts taking on the attributes of an OS, but to each his own. If you're going to put an OS in firmware, just make it an OS, not a pseudo-OS. But that's just my opinion. anyway, I am sure PPCBoot is wonderful, and we should be sharing code, not getting out our rulers to see whose BIOS is bigger. ron From mullins at netlab.uky.edu Wed Oct 9 11:39:00 2002 From: mullins at netlab.uky.edu (Billy Mullins) Date: Wed Oct 9 11:39:00 2002 Subject: LinuxBIOS instead of Dell BIOS Message-ID: <20021009155428.80EABCE81@tosh.netlab.uky.edu> Hi, I work with a couple small clusters of Dell PC's, and I'm wondering if someone would be able to give me an educated guess as to whether or not LinuxBIOS will work out of the box for these PC's. I've looked at the supported mb list, and they don't seem to be listed, but maybe... The machines are the Dell Optiplex Gx240, they use the standard Dell BIOS Release A02, and have the Intel 845 chipset. What are the factors that play into whether or not you can use LinuxBIOS out of the box(maybe that is in a faq somewhere)? For example, just the chipset, strange motherboard quirks, etc... Also, what would it take, and has anyone tried to get a Dell PC to run LinuxBIOS? Thanks much, Billy Mullins From Py.Kerembellec at langages-virtuels.com Wed Oct 9 11:56:00 2002 From: Py.Kerembellec at langages-virtuels.com (Pierre-Yves Kerembellec) Date: Wed Oct 9 11:56:00 2002 Subject: LinuxBios support for Via Mini-ITX motherboard Message-ID: <20021009180200.B0DF.PY.KEREMBELLEC@langages-virtuels.com> Hi all, I'm pretty sure this question has already been asked a thousand times, but I'd just like to know the status of the LinuxBios support on the VIA Mini-ITX motherboards (typically C3-based). I've seen things like mainboard/via/epia, src/northbridge/via/vt8601, src/southbridge/via/vt8231 or superio/via/vt8231 in the source tree but I don't know the exact status of the port ... the status on the web page does not state anything else ... Did anyone successfully used LinuxBios on the Eden platform ? Many thanks, Pierre-Yves From rminnich at lanl.gov Wed Oct 9 12:15:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 9 12:15:01 2002 Subject: LinuxBIOS instead of Dell BIOS In-Reply-To: <20021009155428.80EABCE81@tosh.netlab.uky.edu> Message-ID: On Wed, 9 Oct 2002, Billy Mullins wrote: > What are the factors that play into whether or > not you can use LinuxBIOS out of the box(maybe > that is in a faq somewhere)? For example, just > the chipset, strange motherboard quirks, etc... send me an lspci. Dell has not been helpful however. I would recommend you get the ISO at www.clustermatic.org, stamp out the CDs, and use that for your cluster. You can get a lot of advantage of our software even without linuxbios. > Also, what would it take, and has anyone tried > to get a Dell PC to run LinuxBIOS? we've tried. They were not very supportive. ron From rminnich at lanl.gov Wed Oct 9 12:17:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 9 12:17:00 2002 Subject: LinuxBios support for Via Mini-ITX motherboard In-Reply-To: <20021009180200.B0DF.PY.KEREMBELLEC@langages-virtuels.com> Message-ID: On Wed, 9 Oct 2002, Pierre-Yves Kerembellec wrote: > Did anyone successfully used LinuxBios on the Eden platform ? I set up the trees and ran out of time. Andrew Ip is working on this and now has commit priveleges so we can hope he gets us something soon :-) ron From justin at street-vision.com Wed Oct 9 12:20:01 2002 From: justin at street-vision.com (Justin Cormack) Date: Wed Oct 9 12:20:01 2002 Subject: LinuxBios support for Via Mini-ITX motherboard In-Reply-To: <20021009180200.B0DF.PY.KEREMBELLEC@langages-virtuels.com> from "Pierre-Yves Kerembellec" at Oct 09, 2002 06:11:03 PM Message-ID: <200210091633.g99GXlh11604@tench.street-vision.com> > > Hi all, > > I'm pretty sure this question has already been asked a thousand times, but > I'd just like to know the status of the LinuxBios support on the VIA Mini-ITX > motherboards (typically C3-based). I've seen things like mainboard/via/epia, > src/northbridge/via/vt8601, src/southbridge/via/vt8231 or superio/via/vt8231 > in the source tree but I don't know the exact status of the port ... the status > on the web page does not state anything else ... > > Did anyone successfully used LinuxBios on the Eden platform ? Not yet. I intend to work on it but have other things to do right this minute. I do have a large pile of machines though, and most of the specs (though if anyone can persuade VIA to give out all the right specs it would be good). Justin From Py.Kerembellec at langages-virtuels.com Wed Oct 9 12:53:01 2002 From: Py.Kerembellec at langages-virtuels.com (Pierre-Yves Kerembellec) Date: Wed Oct 9 12:53:01 2002 Subject: LinuxBios support for Via Mini-ITX motherboard In-Reply-To: <200210091633.g99GXlh11604@tench.street-vision.com> References: <20021009180200.B0DF.PY.KEREMBELLEC@langages-virtuels.com> <200210091633.g99GXlh11604@tench.street-vision.com> Message-ID: <20021009190728.B0E4.PY.KEREMBELLEC@langages-virtuels.com> Justin, > > I'm pretty sure this question has already been asked a thousand times, but > > I'd just like to know the status of the LinuxBios support on the VIA Mini-ITX > > motherboards (typically C3-based). I've seen things like mainboard/via/epia, > > src/northbridge/via/vt8601, src/southbridge/via/vt8231 or superio/via/vt8231 > > in the source tree but I don't know the exact status of the port ... the status > > on the web page does not state anything else ... > > > > Did anyone successfully used LinuxBios on the Eden platform ? > > Not yet. I intend to work on it but have other things to do right this minute. > I do have a large pile of machines though, and most of the specs > > (though if anyone can persuade VIA to give out all the right specs it would be good). I'm ready to provide help for this port, what do you exactly need ? Pierre-Yves From Jean-Francois.Hammond at mindready.com Wed Oct 9 16:57:01 2002 From: Jean-Francois.Hammond at mindready.com (=?iso-8859-1?Q?=22Hammond=2C_Jean-Fran=E7ois=22?=) Date: Wed Oct 9 16:57:01 2002 Subject: ieee 1394 support Message-ID: Does any one know if the IEEE 1394 is supported ? Regards, Jean-Fran?ois Hammond Software Designer Mindready Solutions inc. 2800, avenue Marie-Curie Saint-Laurent (Qu?bec) Canada H4S 2C2 Tel. : (1) 514-339-1394 ext. 2121 Fax. : (1) 514-339-1376 mailto:jean-francois.hammond at mindready.com www.mindready.com From rminnich at lanl.gov Wed Oct 9 17:15:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 9 17:15:00 2002 Subject: ieee 1394 support In-Reply-To: Message-ID: On Wed, 9 Oct 2002, "Hammond, Jean-Fran?ois" wrote: > Does any one know if the IEEE 1394 is supported ? ah, this is why I like usig linux as the bios ... if you load linux from flash, then I guess 1394 is supported. ron From xw at chinahost.com Wed Oct 9 21:47:00 2002 From: xw at chinahost.com (David Xiong) Date: Wed Oct 9 21:47:00 2002 Subject: ipl.S of sis735 code compile fail In-Reply-To: <20021009160001.3320.36545.Mailman@nwn.definitive.org> Message-ID: <004c01c27000$bea3c530$dc01a8c0@notebook> Hello everyone, I have a mainboard elite k7s5a, the chipset is sis735. When I make linuxbios for it, the compiler shows freebios/src/southnorthbridge/sis/735/ipl.S has errors. Can someone give me a patch? Thanks! David Xiong From aip at cwlinux.com Wed Oct 9 22:25:00 2002 From: aip at cwlinux.com (Andrew Ip) Date: Wed Oct 9 22:25:00 2002 Subject: LinuxBios support for Via Mini-ITX motherboard In-Reply-To: ; from rminnich@lanl.gov on Wed, Oct 09, 2002 at 10:32:23AM -0600 References: <20021009180200.B0DF.PY.KEREMBELLEC@langages-virtuels.com> Message-ID: <20021010103959.A7844@mail.cwlinux.com> > I set up the trees and ran out of time. Andrew Ip is working on this and > now has commit priveleges so we can hope he gets us something soon :-) I spent some time on it. It has trouble to jump to hardwaremain from crt0.base somehow. I'm tracking it at the moment. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From rminnich at lanl.gov Wed Oct 9 22:26:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 9 22:26:01 2002 Subject: LinuxBios support for Via Mini-ITX motherboard In-Reply-To: <20021010103959.A7844@mail.cwlinux.com> Message-ID: On Thu, 10 Oct 2002, Andrew Ip wrote: > I spent some time on it. It has trouble to jump to hardwaremain from > crt0.base somehow. I'm tracking it at the moment. When I had this problem it always got back to a DRAM issue. ron From aip at cwlinux.com Wed Oct 9 22:47:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Wed Oct 9 22:47:01 2002 Subject: ipl.S of sis735 code compile fail In-Reply-To: <004c01c27000$bea3c530$dc01a8c0@notebook>; from xw@chinahost.com on Thu, Oct 10, 2002 at 09:57:17AM +0800 References: <20021009160001.3320.36545.Mailman@nwn.definitive.org> <004c01c27000$bea3c530$dc01a8c0@notebook> Message-ID: <20021010110229.A8309@mail.cwlinux.com> David, > Hello everyone, > I have a mainboard elite k7s5a, the chipset is sis735. > When I make linuxbios for it, the compiler shows freebios/src/southnorthbridge/sis/735/ipl.S > has errors. > Can someone give me a patch? Are you using DOC? 735's ddr init code is too large for DOC's ipl, but it should work with etherboot. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From steve at nexpath.com Wed Oct 9 23:02:00 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Wed Oct 9 23:02:00 2002 Subject: LinuxBios support for Via Mini-ITX motherboard In-Reply-To: Message-ID: > > I spent some time on it. It has trouble to jump to hardwaremain from > > crt0.base somehow. I'm tracking it at the moment. > > When I had this problem it always got back to a DRAM issue. > I agree. Below is my favorite "check and see if the copy worked" hack for crt0.base. There is an extra pattern test if the copy fails for some reason or other that I don't remember. Maybe we ought to always compare ram to flash as a sanity check after the copy. -Steve // see if copy succeeded leal EXT(_liseg), %esi leal EXT(_iseg), %edi cmpl %esi, %edi jz .Lnocopy movl $EXT(_eliseg), %ecx subl %esi, %ecx jz .Lnocopy /* should not happen */ 0: cmpsb jnz .failed loop 0b CONSOLE_DEBUG_TX_STRING($str_success) jmp .Lnocopy .failed: CONSOLE_DEBUG_TX_STRING($str_failed) CONSOLE_DEBUG_TX_HEX32(%ecx) CONSOLE_DEBUG_TX_STRING($str_crlf) leal EXT(_liseg), %esi movl $0xa5a5a5a5,0(%esi) movl 0(%esi),%eax cmpl $0xa5a5a5a5,%eax jne 1f CONSOLE_DEBUG_TX_STRING($str_g1) jmp .Lnocopy 1: CONSOLE_DEBUG_TX_STRING($str_f1) CONSOLE_DEBUG_TX_STRING($str_failed) CONSOLE_DEBUG_TX_HEX32(%eax) CONSOLE_DEBUG_TX_STRING($str_crlf) jmp . - 2 hlt /* no sense in going on */ .Lnocopy .... (at the end) str_success: .string "\n\rRam compare succeeded.\r\n" str_failed: .string "\n\rRam compare failed: val: " str_crlf: .string "\n\r" str_f1: .string "test 1 failed.\n\r" str_g1: .string "test 1 okay.\n\r" From rminnich at lanl.gov Thu Oct 10 00:18:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 10 00:18:00 2002 Subject: Making IPL coding easier? (fwd) Message-ID: Neil has a very interesting point, and it does bring up the "cache as ram" issue again. Neil, my only question is, did you test this MTRR approach on lots of CPUs. My impression is that it is not guaranteed to work. thanks ron ---------- Forwarded message ---------- Date: Wed, 9 Oct 2002 17:50:22 -0600 From: Neil Crossley To: rminnich at lanl.gov Subject: Making IPL coding easier? Hi Ron, Dunno if this will be any use to you but you never know ..... I was thinking how much easier is would be to write dram setup code for IPL's if it was possible to get even a small amount of memory for temp variables and a stack. This would get rid of the annoing CALL_SP/BP and RET_SP macros. Obviously this 'memory' couldn't be DRAM coz we haven't initialised it yet. and using the CMOS RTC locations would get us a few bytes of memory, but no stack (i'm suprised you dont use the RTC memory though as at least you could store a few temp vars if you needed to) Having some work memory should make the IPL code a bit more readable and thus easier to work with, you could also put more functionality there leaving less work for the C code to do later. I found 2 methods of getting some work memory, one relies of the motherboard having a SiS7018 soundchip (as found on the SiS540/630/730 series) and the other requires a CPU with MTRR support. Using method 2 may allow you to code the DRAM initialisation code in 'C' as it will provide you with 64K of work memory, but it may take some tweaking to get C code running. Appologies for the following code fragments using intel syntax but they should be easy enoogh to follow. Have fun and mail me if you have any questions ... bye for now .... Neil :) METHOD 1 - Use the 7018 Soundchip to get 1KB of memory ------------------------------------------------------ The first way is at least relativley sane but relies on the mainboard having the 7018 soundchip enabled (some motherboard manufacturers choose to disable this and fit another chip on the mainboard) The 1KB of ram exists from offset 0x800 in the soundchip's Memory mapped IO space mov ebx,0x80000c00 ; Select 7018 Soundchip mov eax,ebx ; Set MMIO Base address mov al,0x14 mov dx,0xcf8 out dx,eax add dl,4 mov eax,0xf8100000 ; Map MMIO at this address out dx,eax mov eax,ebx ; Enable device mov al,0x04 sub dl,4 out dx,eax add dl,4 mov eax,0x6 ; Just set Bus master and MMIO, not I/O out dx,eax mov esp,0xf8100bfc ; Set stack to top of ram mov ebp,0xf8100800 ; Set ebp to bottom mov eax,0xf00dface ; Check the memory is really mov [ebp],eax ; working ... mov ebx,[ebp] cmp eax,ebx je .got_mem jmp ERROR_1 ; issue some sort of BEEP code or something .got_mem As far as I know, VIA and ALI both use variations of this soundchip on their integrated boards so this may work on those chipsets too :) METHOD 2 - Abuse the CPU Cache to get 64K of memory --------------------------------------------------- CPU's like the Hitachi SH series allow the cache to be memory mapped and used as RAM, so I wondered if there was any way to do this on the Intel chips. I actually discovered this method by accident (dont ask - long story!!). To use it requires a CPU with MTRR support. Note - When you switch to protected mode make sure the NW and CD bits in CR0 are 0 (enabled) doing "mov eax,1" and "mov cr0,eax" will do this nicely :) ; Enable Variable MTRR's only (not fixed) and set the default memory type to ; uncached xor edx,edx mov eax,0x800 mov ecx,0x2ff wrmsr ; Allocate ONE MTRR to map 64KB at location 0xc000000 mov ecx,0x200 ; Base mov edx,0 mov eax,0xc0000006 wrmsr mov eax,0xffff0800 ; Mask (64K) mov edx,0x0000000f mov ecx,0x201 wrmsr cld ; Wipe our 'memory' forcing all the 64K xor eax,eax ; to be cached mov ecx,65536/4 mov edi,ebp rep stosd mov esp,0xc000fffc ; Set stack to top of ram mov ebp,0xc0000000 ; Set ebp to bottom mov eax,0xf00dface ; Check the memory is really mov [ebp],eax ; working ... mov ebx,[ebp] cmp eax,ebx je .got_mem jmp ERROR_1 ; issue some sort of BEEP code or something .got_mem ______________________________________________________ Check out all the latest outrageous email attachments on the Outrageous Email Chart! - http://viral.lycos.co.uk From John.Usher at perth.maptek.com.au Thu Oct 10 04:55:01 2002 From: John.Usher at perth.maptek.com.au (John Usher (Maptek)) Date: Thu Oct 10 04:55:01 2002 Subject: PIRQ checksum drama Message-ID: <10F0E58C0018054484E329DC494C4D7F02E980@mexper1.maptek.net.au> G'day all... I am currently having trouble with the irq_tables.c produced by getpir. I am receiving the following error from the linuxbios boot: Checking IRQ routing tables.../root/aug2002/lb/freebios/src/arch/i386/lib/pirq_routing.c: 24:check_pirq_routing_table() - irq_routing_table located at: 0x0000b0c0 /root/aug2002/lb/freebios/src/arch/i386/lib/pirq_routing.c: 31:check_pirq_routing_table() - checksum is: 0x26 but should be: 0x7a /root/aug2002/lb/freebios/src/arch/i386/lib/pirq_routing.c: 49:check_pirq_routing_table() - checksum error in irq routing table done. Copying IRQ routing tables to 0xf0000...done. As can be seen from irq_tables.c, the checksum internally is 0x26, and getpir did not report any errors when it downloaded the table. Does anyone have any ideas? John... irq_tables.c follows: /* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) Contains the IRQ Routing Table dumped directly from your memory , wich BIOS sets up Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM */ #include const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ 32+16*8, /* there can be total 8 devices on the bus */ 0, /* Where the interrupt router lies (bus) */ 0x38, /* Where the interrupt router lies (dev) */ 0xe00, /* IRQs devoted exclusively to PCI usage */ 0x8086, /* Vendor */ 0x7000, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ 0x26, /* u8 checksum , this hase to set to some value that would give 0 after the sum of all bytes for this structure (including checksum) */ { {0,0x48, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0x1, 0}, {0,0x50, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x2, 0}, {0,0x58, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}}, 0x3, 0}, {0,0x60, {{0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}}, 0x4, 0}, {0,0x68, {{0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}, {0x61, 0xdeb8}}, 0x5, 0}, {0,0x70, {{0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}, {0x60, 0xdeb8}}, 0x6, 0}, {0,0x39, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0, 0}, {0,0x8, {{0x60, 0xdeb8}, {0x61, 0xdeb8}, {0x62, 0xdeb8}, {0x63, 0xdeb8}}, 0, 0}, } }; From Andre.Courchesne at ca.kontron.com Thu Oct 10 08:40:00 2002 From: Andre.Courchesne at ca.kontron.com (Courchesne, Andre) Date: Thu Oct 10 08:40:00 2002 Subject: ServerWorks... Message-ID: <5009AD9521A8D41198EE00805F85F18F02FE1C88@sembo111.teknor.com> Hi all, I am new to the list. I would like to know is there are any development done for the ServerWorks chipsets. Thanks, Andre Courchesne From xw at chinahost.com Thu Oct 10 09:21:01 2002 From: xw at chinahost.com (David Xiong) Date: Thu Oct 10 09:21:01 2002 Subject: =?us-ascii?Q?=3F=3F=2C=3F:_ipl.S_of_sis735_code_compile_fail?= In-Reply-To: <20021010110229.A8309@mail.cwlinux.com> Message-ID: <007e01c27061$a6b20b60$dc01a8c0@notebook> Yes, I am using DoC2001. But I do not need to use ddr , is there an ipl.S without ddr init code which can be compiled? Thanks! -----????----- ???: Andrew Ip [mailto:aip at cwlinux.com] ????: 2002?10?10? 11:02 ???: David Xiong ??: linuxbios at clustermatic.org ??: Re: ipl.S of sis735 code compile fail David, > Hello everyone, > I have a mainboard elite k7s5a, the chipset is sis735. > When I make linuxbios for it, the compiler shows freebios/src/southnorthbridge/sis/735/ipl.S > has errors. > Can someone give me a patch? Are you using DOC? 735's ddr init code is too large for DOC's ipl, but it should work with etherboot. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From angelo-arifi at cogeco.ca Thu Oct 10 10:25:01 2002 From: angelo-arifi at cogeco.ca (Angelo Arifi) Date: Thu Oct 10 10:25:01 2002 Subject: LinuxBios support for Via Mini-ITX motherboard References: Message-ID: <001601c2706b$01619860$64041d09@blackbird> Sorry to bud in again but we constantly keep talking about linuxbios and mini-tx mobos :) keep up to date on the discussion: http://www.diyaudio.com/forums/showthread.php?s=&threadid=6552&perpage=40&pa genumber=1 ----- Original Message ----- From: "Steve M. Gehlbach" To: Sent: Wednesday, October 09, 2002 11:32 PM Subject: RE: LinuxBios support for Via Mini-ITX motherboard > > > I spent some time on it. It has trouble to jump to hardwaremain from > > > crt0.base somehow. I'm tracking it at the moment. > > > > When I had this problem it always got back to a DRAM issue. > > > > I agree. Below is my favorite "check and see if the copy worked" hack for > crt0.base. There is an extra pattern test if the copy fails for some reason > or other that I don't remember. Maybe we ought to always compare ram to > flash as a sanity check after the copy. > > -Steve > > // see if copy succeeded > leal EXT(_liseg), %esi > leal EXT(_iseg), %edi > cmpl %esi, %edi > jz .Lnocopy > movl $EXT(_eliseg), %ecx > subl %esi, %ecx > jz .Lnocopy /* should not happen */ > 0: cmpsb > jnz .failed > loop 0b > > CONSOLE_DEBUG_TX_STRING($str_success) > jmp .Lnocopy > > .failed: > CONSOLE_DEBUG_TX_STRING($str_failed) > CONSOLE_DEBUG_TX_HEX32(%ecx) > CONSOLE_DEBUG_TX_STRING($str_crlf) > leal EXT(_liseg), %esi > movl $0xa5a5a5a5,0(%esi) > movl 0(%esi),%eax > cmpl $0xa5a5a5a5,%eax > jne 1f > CONSOLE_DEBUG_TX_STRING($str_g1) > jmp .Lnocopy > 1: > CONSOLE_DEBUG_TX_STRING($str_f1) > CONSOLE_DEBUG_TX_STRING($str_failed) > CONSOLE_DEBUG_TX_HEX32(%eax) > CONSOLE_DEBUG_TX_STRING($str_crlf) > jmp . - 2 > hlt /* no sense in going on */ > > .Lnocopy .... > > (at the end) > > str_success: .string "\n\rRam compare succeeded.\r\n" > str_failed: .string "\n\rRam compare failed: val: " > str_crlf: .string "\n\r" > str_f1: .string "test 1 failed.\n\r" > str_g1: .string "test 1 okay.\n\r" > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Thu Oct 10 11:01:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 10 11:01:00 2002 Subject: ServerWorks... In-Reply-To: <5009AD9521A8D41198EE00805F85F18F02FE1C88@sembo111.teknor.com> Message-ID: On Thu, 10 Oct 2002, Courchesne, Andre wrote: > I would like to know is there are any development done for the > ServerWorks chipsets. No, serverworks has been unwilling to get involved with linuxbios. sorry. ron From pyro at linuxlabs.com Thu Oct 10 11:36:01 2002 From: pyro at linuxlabs.com (steven james) Date: Thu Oct 10 11:36:01 2002 Subject: Ram problem In-Reply-To: Message-ID: Greetings, I think I've got it now. It passes mem tests, and boots. I will look forward to comparing just to see... G'day, sjames On 8 Oct 2002, Eric W Biederman wrote: > steven james writes: > > > Greetings, > > > > I'm trying to get ram working on an e7500 MCH. > > It seems to be actually initting, but when I run ramtest it, I > > consistantly see a single bit toggled when reading back such as: > > > Other times, I see that the second read (in order to display the bad > > value) actually reads successfully such as 000127a8:000127a8 > > Hmm. it sounds very much like you are missing something. > When I finally finally got the ram intialization sequence working the > ram was rock solid. > > Is this known good ram? > > > Does anyone have any ideas what might cause that? > > There are too many variables for me to have a good guess. I am just > about to sync my tree with the sourceforge tree and you can compare > notes. > > Eric > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Thu Oct 10 12:04:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 10 12:04:01 2002 Subject: There is something odd going on with eepro-100 Message-ID: Here is the scenario. This is a pre-release etherboot from Eric that has worked well on a number of platforms. The version is 5.1.2rc4.eb5. I take two identical advantech PCM-5283-2 systems, and put in a linuxbios flash that has worked fine for many months on a PCM-5823-1. The Etherboot I have built will boot preferentially from Compact Flash, loading a kernel and initrd which uses eepro100 to contact a server. If no flash is found, then it does a boot over Ethernet. System A System B CF boot Linux Works Works No CF, boot net Works Fails; sends DHCP but never sees reply. Packet is visible on network and dhcpd responds So, we have an interface which seems to work, and works on linux. It's basically the same board. etherboot correctly reads the MAC address from ROM. dhcpd sees packets from etherboot in both cases and responds. But System B never sees the reply ... this is really very odd. Here is the best part of all. An older flash, running etherboot 5.0.6, System B works fine. Yikes! I have no idea what relationship this has, if any, to the Smartcore problem I have been having, but it is at least pretty suspicious. The symptoms are almost identical. Anyway, I'm going to stick with CF for now but wanted to let the community know what was up. ron From ebiederman at lnxi.com Thu Oct 10 14:49:00 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Thu Oct 10 14:49:00 2002 Subject: [COMMIT] Start of merging my tree and the LinuxBIOS tree Message-ID: A lot of small differences have accumulated between my tree and the main LinuxBIOS tree. Some of them are hacks that I need to generalize before putting them in the public tree. So I am taking this in small manageable chunks. Holler if anything looks to nasty. src/arch/i386/boot/boot.c - Tone down the severity of error messages src/arch/i386/lib/console.inc - Preserve morre registers in __CONSOLE_INLINE_TX_HEX8 src/arch/i386/lib/hardwaremain.c - Fixup the cmos option to handle multiple cpus - Move pci setup before ramsize initialization - Renable keyboard_on src/arch/i386/smp/Config Add secondary.S src/arch/i386/smp/secondary.S - add src/arch/i386/smp/secondary.inc - remove src/arch/i386/smp/start_stop.c - Remove unused variables src/config/Config - Cleanup the cross compiling options - Rename cmos.conf cmos.layout as the previous name was too confusing src/cpu/p6/mtrr.c - Create subroutines to enable/disable caching - Call them in all of the appropriate places - Add an extra argument to range_to_mtrr to allow for future optimizations Eric From rminnich at lanl.gov Thu Oct 10 15:15:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 10 15:15:01 2002 Subject: [COMMIT] Start of merging my tree and the LinuxBIOS tree In-Reply-To: Message-ID: > - Move pci setup before ramsize initialization I originally put this after with the idea that we would know where to start PCI memory space instead of the current assumptions that it starts at 0x80000000. I realize that we have stuck with the current blind placement of pci space but if you put pci setup before ramsize you won't have a way to fix this -- ever. Question is, how do you pick a place to start pci space now? Or does it not matter? ron From ebiederman at lnxi.com Thu Oct 10 15:23:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Thu Oct 10 15:23:01 2002 Subject: [COMMIT] Start of merging my tree and the LinuxBIOS tree In-Reply-To: References: Message-ID: Ronald G Minnich writes: > > - Move pci setup before ramsize initialization > > I originally put this after with the idea that we would know where to > start PCI memory space instead of the current assumptions that it starts > at 0x80000000. I realize that we have stuck with the current blind > placement of pci space but if you put pci setup before ramsize you won't > have a way to fix this -- ever. > > Question is, how do you pick a place to start pci space now? I start pci memory space at 0xFFFFFFFF and work backwards. And then I remove the ram I cannot use do to having too many pci devices. I should probably put a limit like ensuring I have at least 64M of ram or something. But currently it is much more common to have Gigabytes of ram then gigabytes of pci memory space consumed. Check out my src.rpm if you want to see how I am actually acheiving this in my tree. But basically you really need to know how large each region is potentially before you make those decisions. So at least assign_pci_resources needs to happen before getting the ram size. Eric From rminnich at lanl.gov Thu Oct 10 15:37:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 10 15:37:01 2002 Subject: [COMMIT] Start of merging my tree and the LinuxBIOS tree In-Reply-To: Message-ID: On 10 Oct 2002, Eric W Biederman wrote: > > I start pci memory space at 0xFFFFFFFF and work backwards. that sounds good. ron From ebiederman at lnxi.com Thu Oct 10 15:37:12 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Thu Oct 10 15:37:12 2002 Subject: [COMMIT] Batch 2 Message-ID: AUTHORS - Add myself src/cpu/p5/delay_tsc.c - Fix the indentation - Don't have the new calibrate_tsc function directly update global variables. src/include/smp/start_stop.h - Change #ifdef SMP to #if SMP == 1 src/include/string.h - Declare sprintf src/lib/elfboot.c - Minor fixes to verify_loaded_image - Change all of the new debugging messages to printk_spew src/lib/inflate.c - Remove sensless warning message fixes src/lib/linuxpci.c - move declaration of sprintf to string.h - Better detection of read only bars in pci_get_resource - Remove pci_noop - Remove warning about set_pci_dev_ops not being finished src/lib/src.c - change #ifdef SERIAL_POST to #if SERIAL_POST in post_code Eric From fmeli at cisco.com Thu Oct 10 18:30:00 2002 From: fmeli at cisco.com (Fulvio Meli) Date: Thu Oct 10 18:30:00 2002 Subject: RadiSys 82600 Chipset Message-ID: <4.3.2.7.2.20021010153923.031e8720@andiamo.com> Ron, is there are any development done for RadiSys 82600 High Data Throughput Telecom PCI Bridge Chipset Thanks, Fulvio -------------- next part -------------- An HTML attachment was scrubbed... URL: From ebiederman at lnxi.com Thu Oct 10 19:40:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Thu Oct 10 19:40:01 2002 Subject: [COMMIT] batch 3 E7500 support... Message-ID: src/northbridge/intel/E7500/{sync the directory} src/ram/ramtest.inc{Add movnti ... } src/southbridge/intel/82801ca/{sync the directory} src/southbridge/intel/82870/{sync the directory} src/southbridge/via/vt8231/southgbridge.c - Transform intel_conf_xxx into pcibios_xxxx src/southbridge/via/v82c686/southgbridge.c - Transform intel_conf_xxx into pcibios_xxxx src/winbond/w83627hf/Config - Enable the hardware monitor - Add support for turning on the power_led util/config/NLBConfig.py - Add support for object .c - Add support for object .S - recode how the list of source files is built up. util/lb-dump/dump_lb_table.c - Fix the memory size abreviations Eric From ollie at sis.com.tw Thu Oct 10 20:34:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Thu Oct 10 20:34:01 2002 Subject: ??,?: ipl.S of sis735 code compile fail In-Reply-To: <007e01c27061$a6b20b60$dc01a8c0@notebook> References: <007e01c27061$a6b20b60$dc01a8c0@notebook> Message-ID: <1034297352.24665.1.camel@ollie> On Thu, 2002-10-10 at 21:28, David Xiong wrote: > Yes, I am using DoC2001. > But I do not need to use ddr , is there an ipl.S without ddr init code which can be compiled? > > Thanks! > No. actually, the SDRAM init sequence will be almost as complex as DDR. You have identical register set to program and you just program them with different value for SDRAM and DDR. Ollie From rminnich at lanl.gov Thu Oct 10 21:12:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 10 21:12:01 2002 Subject: RadiSys 82600 Chipset In-Reply-To: <4.3.2.7.2.20021010153923.031e8720@andiamo.com> Message-ID: I don't know anything about that chipset, is there a URL? What is it used in? ron From gnuorder at tampabay.rr.com Fri Oct 11 01:08:00 2002 From: gnuorder at tampabay.rr.com (GNUOrder) Date: Fri Oct 11 01:08:00 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: References: Message-ID: <200210110523.g9B5NDMq024128@smtp-server1.tampabay.rr.com> I think the problem might be the name of the project. Many BSD users, especially freeBSD, wouldn't get caught dead running anything linux if they can help it. Silly elitist attitude, much like the elitist attitude some linux users take towards windows users. Now if it was still named freeBIOS, they may be more cooperative. GO On Tuesday 08 October 2002 12:25, Ronald G Minnich wrote: > On Tue, 8 Oct 2002, Christer Weinigel wrote: > > a quick question, is LinuxBIOS able to boot any of the BSD-flavours? > > I wish. I can't get interest from any of the BSD community. > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From htran at viosoft.com Fri Oct 11 01:34:01 2002 From: htran at viosoft.com (Hieu T. Tran) Date: Fri Oct 11 01:34:01 2002 Subject: Trouble calling hardwaremain Message-ID: Greeting, With Ron and Eric help, we were able to build a romimage for our VIA vt133 platform with reset_vector correctly located at 0x7fff0. The resulting romimage seems to have successfully initialized memory and copied code from rom to ram, but seems to be stucked at the call to hardwaremain from crt0. (Post code is 0xfd, which is right before the call). Anyone has a good idea as to why this call would possibly fail? I'm assuming that SDRAM is successfully initialized because the copy operation to ram was successful (e.g. it didn't hang the system), but I'm not too sure. I'm going to insert some code in crt0 tomorrow to verify that the image in rom and ram are the same, but if anyone has any other idea, I would very much like to know. Regards, -- HT From bari at onelabs.com Fri Oct 11 05:51:01 2002 From: bari at onelabs.com (Bari Ari) Date: Fri Oct 11 05:51:01 2002 Subject: RadiSys 82600 Chipset References: Message-ID: <3DA6A367.3090809@onelabs.com> Ronald G Minnich wrote: >I don't know anything about that chipset, is there a URL? > >What is it used in? > > > A few years ago Intel and other chipset vendors didn't offer any chipsets that would be in production for more than a year or two so Radisys decided to make a long term available chipset. http://www.radisys.com/oem_products/embeddedchipsets.cfm Since then however Intel, SiS and others are now offering chipsets with availability of 5 years or more. Bari From rminnich at lanl.gov Fri Oct 11 09:59:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 11 09:59:01 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: <200210110523.g9B5NDMq024128@smtp-server1.tampabay.rr.com> Message-ID: On Fri, 11 Oct 2002, GNUOrder wrote: > I think the problem might be the name of the project. Many BSD users, > especially freeBSD, wouldn't get caught dead running anything linux if they > can help it. Silly elitist attitude, much like the elitist attitude some > linux users take towards windows users. Now if it was still named freeBIOS, > they may be more cooperative. Actually, that was not the issue when I talked to them. The issue was that they didn't want to give up the BIOS calls. ron From rminnich at lanl.gov Fri Oct 11 10:02:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 11 10:02:01 2002 Subject: Trouble calling hardwaremain In-Reply-To: Message-ID: On Thu, 10 Oct 2002, Hieu T. Tran wrote: > The resulting romimage seems to have successfully initialized memory > and copied code from rom to ram, but seems to be stucked at the call > to hardwaremain from crt0. (Post code is 0xfd, which is right before > the call). the call may not be failing. What may be happening is that you saw the last successful post code; the memory is configured wrong; and the system failed when you jumped to hardwaremain. This is what makes this chipset so frustrating. > Anyone has a good idea as to why this call would possibly fail? I'm > assuming that SDRAM is successfully initialized because the copy operation > to ram was successful (e.g. it didn't hang the system), but I'm not too > sure. You are right not to be sure. Often the copy operation can work but the memory will fail when the processor tries to use it for a stack, for example. Any operation that causes a burst to memory can cause trouble. The chip is EXTREMELY sensitive to the SDRAM drive level settings. ron From stepan at suse.de Fri Oct 11 10:16:01 2002 From: stepan at suse.de (Stefan Reinauer) Date: Fri Oct 11 10:16:01 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: References: <200210110523.g9B5NDMq024128@smtp-server1.tampabay.rr.com> Message-ID: <20021011143155.GA8268@suse.de> * Ronald G Minnich [021011 16:15]: > On Fri, 11 Oct 2002, GNUOrder wrote: > > > I think the problem might be the name of the project. Many BSD users, > > especially freeBSD, wouldn't get caught dead running anything linux if they > > can help it. Silly elitist attitude, much like the elitist attitude some > > linux users take towards windows users. Now if it was still named freeBIOS, > > they may be more cooperative. > > Actually, that was not the issue when I talked to them. The issue was that > they didn't want to give up the BIOS calls. Wouldn't some config option be an alternative? Is there a list of the specific bios calls we're talking about Best regards, Stefan Reinauer -- The x86 isn't all that complex - it just doesn't make a lot of sense. -- Mike Johnson, Leader of 80x86 Design at AMD Microprocessor Report (1994) From rminnich at lanl.gov Fri Oct 11 10:24:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 11 10:24:01 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: <20021011143155.GA8268@suse.de> Message-ID: On Fri, 11 Oct 2002, Stefan Reinauer wrote: > Wouldn't some config option be an alternative? Is there a list of the > specific bios calls we're talking about it's all possible, but nobody in the -core has offered to do it, or even offered to take changes. I strongly believe that if somebody did it then they would take the changes, however. Almost certainly OpenBSD would go for it. Those guys are really open to new ideas. I understand the issue with the name 'linuxbios', but I'm not ready to drop it -- it is easy for people to parse. ron From tkarthikbalaguru at yahoo.co.in Fri Oct 11 11:37:00 2002 From: tkarthikbalaguru at yahoo.co.in (=?iso-8859-1?q?Karthik=20Bala=20Guru?=) Date: Fri Oct 11 11:37:00 2002 Subject: DSP TI5402 kit simulator in linux Message-ID: <20021011155308.48670.qmail@web8203.mail.in.yahoo.com> hi, Is it possible to run DSP kits using linux ?? Is there any simulator for these ??? is there any simulator for Texas instruments DSP kit(5402) ? How about ADSP kits ?? Thanking You, karthik bala guru ________________________________________________________________________ Missed your favourite TV serial last night? Try the new, Yahoo! TV. visit http://in.tv.yahoo.com From jdarby at powercom.net Fri Oct 11 12:45:01 2002 From: jdarby at powercom.net (Justin C. Darby) Date: Fri Oct 11 12:45:01 2002 Subject: R&D Project Message-ID: <000401c27147$b19edb70$241f72d8@M00> I'm trying to get together funding for a research project at my company to build a generic platform for high availability devices using Linux, LinuxBIOS, etc, as the software portion. I had some general questions about LinuxBIOS I wanted to ask while I'm still collecting information to report in my project plan. a) I have a requirement of a 4+ PCI slots, compact flash booting via IDE, and a serial console. Video, sound, etc, are pointless for any project we will take on. Onboard network ports are nice. What hardware works best? I don't care about AMD vs. Intel, I want to know what (hopefully easily available) motherboards are best served by LinuxBIOS in general. If this is going to start a flame war, I don't mind personal responses to this question. :) b) Are there any known problems running any types of PCI cards? High speed serial, ethernet, whatever, or if it works with Linux, it should work just fine? c) Can Disk-on-Chip BIOS solutions be reflashed several times? I would like these machines to be remotely upgradeable in all aspects while having a local device to boot from. d) Are any SMP motherboards supported? Thanks for your time, Justin C. Darby From dale.j.robson at lmco.com Fri Oct 11 14:22:01 2002 From: dale.j.robson at lmco.com (Dale J Robson) Date: Fri Oct 11 14:22:01 2002 Subject: support for supermicro P4DL6 - serverworks GC-LE chipset Message-ID: <1034361462.13275.180.camel@e7la09> I'm trying to get LinuxBIOS working on a SMP xeon board: http://www.supermicro.com/PRODUCT/MotherBoards/GC_LE/P4DL6.htm I'm attaching the lspci -vv output. Is there any possibility of this board being supported? Would it require writing numerous new device drivers? If this board is a poor fit for use with the LinuxBIOS project. Can anyone recommend a more compatible dual p4 xeon board with 1000baseT? -- Dale Robson Software Engineer Lockheed Martin - NESS Syracuse -------------- next part -------------- 00:00.0 Host bridge: Relience Computer: Unknown device 0012 (rev 13) Control: I/O- Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- Status: Cap- 66Mhz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- TAbort- SERR- References: <1034361462.13275.180.camel@e7la09> Message-ID: Dale J Robson writes: > I'm trying to get LinuxBIOS working on a SMP xeon board: > http://www.supermicro.com/PRODUCT/MotherBoards/GC_LE/P4DL6.htm > > I'm attaching the lspci -vv output. > > Is there any possibility of this board being supported? I don't know of anyone one who has managed to get serverworks to give them documentation at this point. > Would it require writing numerous new device drivers? Several. The hardest one is the memory controller, but for a new chipset there are several other chips that need support as well. > If this board is a poor fit for use with the LinuxBIOS project. Can > anyone recommend a more compatible dual p4 xeon board with 1000baseT? I have worked primarily with the supermicro p4dpr. Based on the intel E7500 chipset. It has onboard 10/100 and onboard gibabit. Depending on what you are doing we at LinuxNetworx might even be able to sell you some support. Eric From ebiederman at lnxi.com Fri Oct 11 15:20:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Fri Oct 11 15:20:01 2002 Subject: Trouble calling hardwaremain In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On Thu, 10 Oct 2002, Hieu T. Tran wrote: > > > The resulting romimage seems to have successfully initialized memory > > and copied code from rom to ram, but seems to be stucked at the call > > to hardwaremain from crt0. (Post code is 0xfd, which is right before > > the call). > > the call may not be failing. What may be happening is that you saw the > last successful post code; the memory is configured wrong; and the system > failed when you jumped to hardwaremain. This is what makes this chipset so > frustrating. > > > Anyone has a good idea as to why this call would possibly fail? I'm > > assuming that SDRAM is successfully initialized because the copy operation > > to ram was successful (e.g. it didn't hang the system), but I'm not too > > sure. > > You are right not to be sure. Often the copy operation can work but the > memory will fail when the processor tries to use it for a stack, for > example. Any operation that causes a burst to memory can cause trouble. > The chip is EXTREMELY sensitive to the SDRAM drive level settings. For even more fun I have had a hardware glitch that caused the the memory size to be set to 0 after initializing it, properly. The copy succeeded when I had no ram at all. Of course I couldn't execute the LinuxBIOS code. Have you enabled the serial port? There is a file ramtest.inc that you can included that will do a basic sanity check on the ram to see if is working. Usually that is a help when brining up a new port. Eric From tejohnson at yahoo.com Fri Oct 11 15:31:01 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Fri Oct 11 15:31:01 2002 Subject: SiS 530 and the Biostar "Sunflower" M5SAF In-Reply-To: Message-ID: <009a01c2715e$bc7b7ff0$021e1eac@areas3> Kinda curious, What is the possibility of trying LinuxBios on this hardware? `lspci -vvv` is attached in pci.txt. It is a SiS 530 chipset, and a vendor link to the unit is: http://www.biostar-usa.com/products/easynow/easynowpc.htm Just kinda curious since you can find these for < $75.00 US is most places, and since I have a few of them. One of which was previously installed in my car. Regards, Todd E. Johnson tejohnson at yahoo.com -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: pci.txt URL: From ebiederman at lnxi.com Fri Oct 11 15:36:00 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Fri Oct 11 15:36:00 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On Fri, 11 Oct 2002, GNUOrder wrote: > > > I think the problem might be the name of the project. Many BSD users, > > especially freeBSD, wouldn't get caught dead running anything linux if they > > can help it. Silly elitist attitude, much like the elitist attitude some > > linux users take towards windows users. Now if it was still named freeBIOS, > > they may be more cooperative. > > Actually, that was not the issue when I talked to them. The issue was that > they didn't want to give up the BIOS calls. Was this before or after we had the LinuxBIOS table? Eric From htran at viosoft.com Fri Oct 11 15:49:00 2002 From: htran at viosoft.com (Hieu T. Tran) Date: Fri Oct 11 15:49:00 2002 Subject: Trouble calling hardwaremain In-Reply-To: Message-ID: Eric W. Biederman wrote: > For even more fun I have had a hardware glitch that caused the the > memory size to be set to 0 after initializing it, properly. The copy > succeeded when I had no ram at all. Of course I couldn't execute the > LinuxBIOS code. > > Have you enabled the serial port? I have enabled the serial port, but no console message so far. Perhaps, my bigger challenge is to get access to documentation for this board. It's manufactured by Portwell (NAD-2050), but there is very data that is available on their site or from the live techsupport contact. > There is a file ramtest.inc that you can included that will do a basic > sanity check on the ram to see if is working. Usually that is a help > when brining up a new port. I haved tried including ramtest.inc, but without serial port output, it's difficult to tell. BTW: I'm attaching my lspci output and config file for reference. I'm going to do more due-dilligence on SDRAM initialization before I have more progress to report. -- HT -------------- next part -------------- A non-text attachment was scrubbed... Name: portwell.pci Type: application/octet-stream Size: 7081 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: portwell.config Type: application/octet-stream Size: 480 bytes Desc: not available URL: From nathanael at gnat.ca Fri Oct 11 16:04:01 2002 From: nathanael at gnat.ca (Nathanael Noblet) Date: Fri Oct 11 16:04:01 2002 Subject: SiS 530 and the Biostar "Sunflower" M5SAF In-Reply-To: <009a01c2715e$bc7b7ff0$021e1eac@areas3> Message-ID: On Friday, October 11, 2002, at 01:45 PM, Todd E. Johnson wrote: > Kinda curious, > > What is the possibility of trying LinuxBios on this hardware? `lspci > -vvv` is attached in pci.txt. It is a SiS 530 chipset, and a vendor > link to the unit is: > http://www.biostar-usa.com/products/easynow/easynowpc.htm > > Just kinda curious since you can find these for < $75.00 US is most > places, and since I have a few of them. One of which was previously > installed in my car. > I have a SIS 530 board that I'd like to add support for. I'm not to the point where I can though. I do have the complete datasheet for the 530 chipset so that would probably help in developing it. In reality though my main problem is finding documentation that adequately describes how one would go through the process of building linuxbios for a machine. The source tree seems really convoluted to me at the moment, although I haven't spent much time getting deep into it because I'm still getting other parts of the system working, and the LinuxBIOS part will be a "feature" or nice perk if I get it working that is... -- Nathanael Noblet Gnat Solutions 4604 Monterey Ave NW Calgary, AB T3B 5K4 (403) 288 - 4613 (403) 809 - 5368 www.gnat.ca From xw at chinahost.com Sat Oct 12 00:45:01 2002 From: xw at chinahost.com (David Xiong) Date: Sat Oct 12 00:45:01 2002 Subject: ipl.S of sis735 code compile fail Message-ID: <002401c271ab$edad7770$dc01a8c0@notebook> The status page http://www.acl.lanl.gov/linuxbios/status/index.html shows that the Pcchips m830lr mainboard is supported by linuxbios. m8310lr seems as same as elite k7s5a, both of them use sis735 chipset. I am a little confused. Thanks! >Subject: Re: ??,?: ipl.S of sis735 code compile fail >From: ollie lho >To: David Xiong >Cc: "'Andrew Ip'" , linuxbios at clustermatic.org >Date: 11 Oct 2002 08:49:10 +0800 >On Thu, 2002-10-10 at 21:28, David Xiong wrote: >> Yes, I am using DoC2001. >> But I do not need to use ddr , is there an ipl.S without ddr init code which can be compiled? >> >> Thanks! > > >No. actually, the SDRAM init sequence will be almost as complex as DDR. >You have identical register set to program and you just program them >with different value for SDRAM and DDR. > >Ollie From aip at cwlinux.com Sat Oct 12 01:00:00 2002 From: aip at cwlinux.com (Andrew Ip) Date: Sat Oct 12 01:00:00 2002 Subject: ipl.S of sis735 code compile fail In-Reply-To: <002401c271ab$edad7770$dc01a8c0@notebook>; from xw@chinahost.com on Sat, Oct 12, 2002 at 12:57:54PM +0800 References: <002401c271ab$edad7770$dc01a8c0@notebook> Message-ID: <20021012131538.A6666@mail.cwlinux.com> David, > The status page > http://www.acl.lanl.gov/linuxbios/status/index.html > shows that the Pcchips m830lr mainboard is supported by linuxbios. > m8310lr seems as same as elite k7s5a, both of them use sis735 chipset. > I am a little confused. Yes, LinuxBIOS does support 830 but it can't be used with DOC. However, LinuxBIOS + etherboot works fine. In this case, you either can boot from network or ide device(harddisk/CF). -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From rminnich at lanl.gov Sat Oct 12 15:58:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 12 15:58:01 2002 Subject: support for supermicro P4DL6 - serverworks GC-LE chipset In-Reply-To: <1034361462.13275.180.camel@e7la09> Message-ID: This board will be a good fit. Plus lmco builds cool gear so we'll make sure you get it going, as long as I can get a poster of whatever it flies in :-) ron From rminnich at lanl.gov Sat Oct 12 16:06:02 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 12 16:06:02 2002 Subject: support for supermicro P4DL6 - serverworks GC-LE chipset In-Reply-To: Message-ID: On 11 Oct 2002, Eric W Biederman wrote: > Dale J Robson writes: > > > I'm trying to get LinuxBIOS working on a SMP xeon board: > > http://www.supermicro.com/PRODUCT/MotherBoards/GC_LE/P4DL6.htm oops, dale, sorry! I blew it! I totally misread the chipset type. Serverworks, we just can't do, The company refuses to help. I had a one-year NDA with them and in that year they never returned phone calls or email, and I got ZERO information from them. ron From rminnich at lanl.gov Sat Oct 12 16:11:27 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 12 16:11:27 2002 Subject: Trouble calling hardwaremain In-Reply-To: Message-ID: Another good thing to do is to learn how to use the dump_northbridge .inc file. For an example see the 430tx port. You can dump northbridge state as you configure it, so that you can see if you are making errors. ron From rminnich at lanl.gov Sat Oct 12 16:16:55 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 12 16:16:55 2002 Subject: LinuxBIOS + FreeBSD = true? In-Reply-To: Message-ID: On 11 Oct 2002, Eric W Biederman wrote: > Was this before or after we had the LinuxBIOS table? long before, maybe they would reconsider? ron From chiangyj at csie.nctu.edu.tw Sun Oct 13 09:39:01 2002 From: chiangyj at csie.nctu.edu.tw (chiangyj) Date: Sun Oct 13 09:39:01 2002 Subject: Drive VGA card (Am I right ?) Message-ID: <200210131355.g9DDtT2b063793@ccbsd2.csie.nctu.edu.tw> After reading some related posts, I am not sure how LinuxBios drive VGA card ? LinuxBios replace normal BIOS with its own BIOS, so it can't drive VGA card like normal initialization(find the VGA card, map VGA BIOS to system memory, then call initialize routine) There are two ways to drive it: 1. Use BIOS emulator: Run VGA BIOS in BIOS emulator and you can drive it like normal initialization. BIOS emulator's job is to take appropriate actions(hardware-dependent actions, eg. access VGA register) 2. Use matroxfb: Because it can intiailize VGA without VGA BIOS. Am I right ? And Is there another way to drive VGA card? Thank for your help. From ebiederman at lnxi.com Sun Oct 13 11:19:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sun Oct 13 11:19:00 2002 Subject: p4dpe (fwd) In-Reply-To: References: Message-ID: Ronald G Minnich writes: > fyi ... I'm still merging... And yes I probably introduced a typo or two. So far I have just managed to wade through most of the easy parts. I am having to watch my code fairly closely so I don't introduce changes that break the tree for other people. Who was this from? I'm willing to work with people directly... Eric > > ---------- Forwarded message ---------- > Date: Sat, 12 Oct 2002 15:29:55 -0500 > Subject: Re: p4dpe > > Ron, > > Thanks. > > The E7500/raminit.inc has a few problems. > > SMBUS_MEM_CHANNEL_OFF on line# 981 and 985 is not defined. > A typo on line # 1097, "a" should be deleted? > Proceedure call to "spot_check" on line# 1664 does not exsist (in > this codebase). From ebiederman at lnxi.com Sun Oct 13 12:16:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sun Oct 13 12:16:00 2002 Subject: Making IPL coding easier? (fwd) In-Reply-To: References: Message-ID: Ronald G Minnich writes: > Neil has a very interesting point, and it does bring up the "cache as ram" > issue again. > > Neil, my only question is, did you test this MTRR approach on lots of > CPUs. My impression is that it is not guaranteed to work. Let me respond. My apologies for the delay but I misplaced this email. There are several sides to this problem. 1) I have tried setting up the MTRRs and fake an area of ram. In fact if you look at the p4dc6 I actually implemented it and did a port that way. Unfortunately there is not an architecturally garanteed way to make this work, and cpu designers are continuously tweaking how their caches work so it breaks with new cpus at the drop of a hat. Especially new hyperthreaded monsters. There is no real savings in having code that breaks when new cpus are introduced. 2) Using memory that is elsewhere in the system. I do use cmos memory but not currently for temporaries. I like the idea. But with only 128bytes to play with you can not do much with it. 3) Using external ram for a stack, is dangerous in a couple of ways. Cache coherency with pci devices isn't garanteed, so setting up mttrs over the stack is not guaranteed to work. The common case is in processors is to work against cacheable memory. I have seen P4's incorrectly execute code when caching was disabled. Stacks may soon follow suite. So long term this does not look a solution. Then there is the added danger that the device or something on the path to the device will be corrupted/broken. And then you get very strange hard to debug failure cases. The only real solution to this problem is to build a compiler that generates code that does not use ram. And then the compiler can have all of the smarts about how to call subroutines etc. The coding would still be tryi Eric From ebiederman at lnxi.com Sun Oct 13 12:21:32 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sun Oct 13 12:21:32 2002 Subject: Making IPL coding easier? (fwd) In-Reply-To: References: Message-ID: Ronald G Minnich writes: > Neil has a very interesting point, and it does bring up the "cache as ram" > issue again. > > Neil, my only question is, did you test this MTRR approach on lots of > CPUs. My impression is that it is not guaranteed to work. Let me respond. My apologies for the delay but I misplaced this email. There are several sides to this problem. 1) I have tried setting up the MTRRs and fake an area of ram. In fact if you look at the p4dc6 I actually implemented it and did a port that way. Unfortunately there is not an architecturally garanteed way to make this work, and cpu designers are continuously tweaking how their caches work so it breaks with new cpus at the drop of a hat. Especially new hyperthreaded monsters. There is no real savings in having code that breaks when new cpus are introduced. 2) Using memory that is elsewhere in the system. I do use cmos memory but not currently for temporaries. I like the idea. But with only 128bytes to play with you can not do much with it. 3) Using external ram for a stack, is dangerous in a couple of ways. Cache coherency with pci devices isn't garanteed, so setting up mttrs over the stack is not guaranteed to work. The common case is in processors is to work against cacheable memory. I have seen P4's incorrectly execute code when caching was disabled. Stacks may soon follow suite. So long term this does not look a solution. Then there is the added danger that the device or something on the path to the device will be corrupted/broken. And then you get very strange hard to debug failure cases. The only real solution to this problem is to build a compiler that generates code that does not use ram. And then the compiler can have all of the smarts about how to call subroutines etc. The coding would still be tricky as you could not have too many active variables at ounce but it should be much easier than the current situation. Eric From ebiederman at lnxi.com Sun Oct 13 12:28:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sun Oct 13 12:28:01 2002 Subject: R&D Project In-Reply-To: <000401c27147$b19edb70$241f72d8@M00> References: <000401c27147$b19edb70$241f72d8@M00> Message-ID: "Justin C. Darby" writes: > I'm trying to get together funding for a research project at my company > to build a generic platform for high availability devices using Linux, > LinuxBIOS, etc, as the software portion. > > I had some general questions about LinuxBIOS I wanted to ask while I'm > still collecting information to report in my project plan. > > a) I have a requirement of a 4+ PCI slots, compact flash booting via > IDE, and a serial console. Video, sound, etc, are pointless for any > project we will take on. Onboard network ports are nice. What hardware > works best? I don't care about AMD vs. Intel, I want to know what > (hopefully easily available) motherboards are best served by LinuxBIOS > in general. If this is going to start a flame war, I don't mind personal > responses to this question. :) We have at least one board with 6 slots and 4 PCI-X busses... > b) Are there any known problems running any types of PCI cards? High > speed serial, ethernet, whatever, or if it works with Linux, it should > work just fine? Only video.... And that is just initialization glitches. > c) Can Disk-on-Chip BIOS solutions be reflashed several times? I would > like these machines to be remotely upgradeable in all aspects while > having a local device to boot from. All recent BIOS solutions can reflashed several times. > d) Are any SMP motherboards supported? yes. Eric From ebiederman at lnxi.com Sun Oct 13 12:33:25 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sun Oct 13 12:33:25 2002 Subject: R&D Project In-Reply-To: <000401c27147$b19edb70$241f72d8@M00> References: <000401c27147$b19edb70$241f72d8@M00> Message-ID: "Justin C. Darby" writes: > I'm trying to get together funding for a research project at my company > to build a generic platform for high availability devices using Linux, > LinuxBIOS, etc, as the software portion. > > I had some general questions about LinuxBIOS I wanted to ask while I'm > still collecting information to report in my project plan. > > a) I have a requirement of a 4+ PCI slots, compact flash booting via > IDE, and a serial console. Video, sound, etc, are pointless for any > project we will take on. Onboard network ports are nice. What hardware > works best? I don't care about AMD vs. Intel, I want to know what > (hopefully easily available) motherboards are best served by LinuxBIOS > in general. If this is going to start a flame war, I don't mind personal > responses to this question. :) We have at least one board with 6 slots and 4 PCI-X busses... > b) Are there any known problems running any types of PCI cards? High > speed serial, ethernet, whatever, or if it works with Linux, it should > work just fine? Only video.... And that is just initialization glitches. > c) Can Disk-on-Chip BIOS solutions be reflashed several times? I would > like these machines to be remotely upgradeable in all aspects while > having a local device to boot from. All recent BIOS solutions can reflashed several times. > d) Are any SMP motherboards supported? yes. Eric From rminnich at lanl.gov Sun Oct 13 16:03:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sun Oct 13 16:03:00 2002 Subject: Drive VGA card (Am I right ?) In-Reply-To: <200210131355.g9DDtT2b063793@ccbsd2.csie.nctu.edu.tw> Message-ID: On Sun, 13 Oct 2002, chiangyj wrote: > LinuxBios replace normal BIOS with its own BIOS, > so it can't drive VGA card like normal initialization(find the VGA card, > map VGA BIOS to system memory, then call initialize routine) It can and does. It is a build option. Buy many VGA card BIOSes do illegal actions so we do not support them. > 1. Use BIOS emulator: Run VGA BIOS in BIOS emulator and you > can drive it like normal initialization. BIOS emulator's job is to take > appropriate actions(hardware-dependent actions, eg. access VGA register) we do that too, there is a supplied program to do this. It needs some work. > 2. Use matroxfb: Because it can intiailize VGA without VGA BIOS. We also do that. ron From ebiederman at lnxi.com Sun Oct 13 17:04:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sun Oct 13 17:04:00 2002 Subject: p4dpe In-Reply-To: <3DA9B4E6.9020106@baldguysoftware.com> References: <3DA88643.3000008@baldguysoftware.com> <3DA9B4E6.9020106@baldguysoftware.com> Message-ID: Larry Creech writes: > Eric, > > I just got subscribed to the listserv. I'm a few months behind since I've only > had access to the archives upto Aug. I'm trying to build linux bios for the > p4dpe. I've got it mostly working except some raminit stuff. I wasn't looking > forward to writing it for the E7500 and knowing it was going to be about 2k > lines in assembly and that you had already done it. I'm assuming the > SMBUS_MEM_CHANNEL_OFF value is "4", but have not tackled the spot_check function > > yet. Is spot_check something that will be in the E7500/raminit.inc? It is a cleaned up variant of ram/ramtest.inc and I think I have probably checked it in. Many not yet. SMBUS_MEM_CHANNEL_OFF is indeed 4. That is how I group the paired dimms. I haven't gotten to merging the mainboard directories yet. There is some old stuff in there but not quite everything. Eric From majinsuk at etri.re.kr Sun Oct 13 22:09:01 2002 From: majinsuk at etri.re.kr (majinsuk at etri.re.kr) Date: Sun Oct 13 22:09:01 2002 Subject: MTRR problem Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A7CBB7F@cms3.etri.re.kr> Hello I am Korean reseacher and was deeply impressed by your project and community. I have been working some home server with linuxbios. That is based on SIS645, SIS961 and Pentium 4. My project was stopped by P4 MTRR fixing problem at last week. I found cache on/off routine in mailing list and inserted that code. The result was system stop on that routine. How can I solve this problem? Please let me know about this. Best regards. -------------- next part -------------- An HTML attachment was scrubbed... URL: From ebiederman at lnxi.com Mon Oct 14 01:22:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 14 01:22:01 2002 Subject: the plan for stable In-Reply-To: References: Message-ID: Ronald G Minnich writes: > A short sketch. > > What I want to do, but have not had time to do. For each mainboard, we > designate an owner. The owner is responsible for letting us know that > their mainboard works. Mainboards are in one of 3 states: (stable, > unstable, unsupported) > > Mainboards start out in the unstable or unsupported state. > > We pick a date (1/1/03?) and say we want all owners of all mainboards to > tell us that their mainboard is stable. We freeze the tree one month > ahead of that time and the only changes that go in are for stabilization. 1 January 2003 is a bad date for me as I have plans to be far away from computers over christmas. > If nobody steps up for a board, it goes to unsupported state. Boards with > owners start out in the unstable state. The challenge is for a lot of boards we do not get active feedback after a port has been completed. So for any ongoing work we need to very very careful not to make changes to the core that break ports. I am probably the worst offender, except for the various bits of debug code that come and go but still. > Mainboards move to the stable state when the owner confirms stability. > When patches are made for a problem, ALL stable mainboards revert to > unstable. We iterate until we get it solid, then freeze it. For the first round this looks o.k, it really depends on what kind of feedback we have. > This information is maintained by a file in each mainboard directory > called STATUS, which consists of name/value paris. One file in the root directory called STATUS should do it.. > Will this work? Sounds like a good rough draft. The very important thing about the stable series is that nothing happens to the core code that could possibly break a motherboard port. That way within a stable series we can get more but not fewer boards working. Then whenever a new port gets working we can do another release. Of course if the come in fast enough we can delay... > thanks (I'm off email for a bit -- at a workshop) Speaking of which we probably should put together some kind of conference/workshop for LinuxBIOS. So the developers can get together and talk face to face. Eric From zhushisongzhu at yahoo.com Mon Oct 14 10:29:01 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Oct 14 10:29:01 2002 Subject: strange error on sis900 ethernet Message-ID: <20021014144507.19698.qmail@web13202.mail.yahoo.com> I met one strange error on sis900 ethernet driver. I'm using cvs freebios on 6 Oct, 2002 , kernel 2.4.17, mainboard is winfast6300. After booting using linuxbios stored in DOC, I boot my host linux system using normal bios. the host linux is the same system as in DOC. I test pings, the result is ( after linuxbios booting): ping -s 2592 192.12.11.1 ( remote ip addr ) 0% lost ping -s 2593 192.12.11.1 ( remote ip addr ) no response, 100% lost I can't make the mainboard work correctly until I have booted windows98. Then I use my host linux system to boot, the thing is ok. (after windows98 booting ) ping -s 2592 192.12.11.1 0% lost ping -s 2593 192.12.11.1 0% lost What's the problem, maybe something wrong with pci ,or sis900 init code. thanks zhu __________________________________________________ Do you Yahoo!? Faith Hill - Exclusive Performances, Videos & More http://faith.yahoo.com From zhushisongzhu at yahoo.com Mon Oct 14 10:38:01 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Oct 14 10:38:01 2002 Subject: strange error on sis900 ethernet Message-ID: <20021014143033.7942.qmail@web13208.mail.yahoo.com> I met one strange error on sis900 ethernet driver. I'm using cvs freebios on 6 Oct, 2002 , kernel 2.4.17, mainboard is winfast6300. After booting using linuxbios stored in DOC, I boot my host linux system using normal bios. the host linux is the same system as in DOC. I test pings, the result is ( after linuxbios booting): ping -s 2592 192.12.11.1 ( remote ip addr ) 0% lost ping -s 2593 192.12.11.1 ( remote ip addr ) no response, 100% lost I can't make the mainboard work correctly until I have booted windows98. Then I use my host linux system to boot, the thing is ok. (after windows98 booting ) ping -s 2592 192.12.11.1 0% lost ping -s 2593 192.12.11.1 0% lost What's the problem, maybe something wrong with pci ,or sis900 init code. thanks zhu __________________________________________________ Do you Yahoo!? Faith Hill - Exclusive Performances, Videos & More http://faith.yahoo.com From preston.bannister at cox.net Mon Oct 14 13:55:01 2002 From: preston.bannister at cox.net (Preston L. Bannister) Date: Mon Oct 14 13:55:01 2002 Subject: the plan for stable In-Reply-To: Message-ID: Missed the original message, but I do have a couple suggestions. You only know if LinuxBIOS is "stable" on a particular motherboard when one or more people have gotten it to work on one or more revisions and instances of that motherboard. The more cumulative experience the greater your faith. Perhaps the record you want is: Reporter (email) LinuxBIOS version (tagged in CVS) Motherboard version Number of boards (especially in clusters) Status: working/no known problems, some problems, not working Description (optional, brief) of how used and any known problems. To be able to *start* with a working version of LinuxBIOS (if one existed), and then move forward is a huge advantage. -----Original Message----- From: Eric W. Biederman Sent: Sunday, October 13, 2002 10:38 PM Ronald G Minnich writes: > A short sketch. > > What I want to do, but have not had time to do. For each mainboard, we > designate an owner. The owner is responsible for letting us know that > their mainboard works. Mainboards are in one of 3 states: (stable, > unstable, unsupported) > > Mainboards start out in the unstable or unsupported state. > > We pick a date (1/1/03?) and say we want all owners of all mainboards to > tell us that their mainboard is stable. We freeze the tree one month > ahead of that time and the only changes that go in are for stabilization. 1 January 2003 is a bad date for me as I have plans to be far away from computers over christmas. > If nobody steps up for a board, it goes to unsupported state. Boards with > owners start out in the unstable state. The challenge is for a lot of boards we do not get active feedback after a port has been completed. So for any ongoing work we need to very very careful not to make changes to the core that break ports. I am probably the worst offender, except for the various bits of debug code that come and go but still. > Mainboards move to the stable state when the owner confirms stability. > When patches are made for a problem, ALL stable mainboards revert to > unstable. We iterate until we get it solid, then freeze it. For the first round this looks o.k, it really depends on what kind of feedback we have. > This information is maintained by a file in each mainboard directory > called STATUS, which consists of name/value paris. One file in the root directory called STATUS should do it.. > Will this work? Sounds like a good rough draft. The very important thing about the stable series is that nothing happens to the core code that could possibly break a motherboard port. That way within a stable series we can get more but not fewer boards working. Then whenever a new port gets working we can do another release. Of course if the come in fast enough we can delay... > thanks (I'm off email for a bit -- at a workshop) Speaking of which we probably should put together some kind of conference/workshop for LinuxBIOS. So the developers can get together and talk face to face. From hansolofalcon at worldnet.att.net Mon Oct 14 14:32:00 2002 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Mon Oct 14 14:32:00 2002 Subject: the plan for stable In-Reply-To: Message-ID: <000001c273b2$69efeea0$bc5a580c@who> Hello from Gregg C Levine I confess I missed the original message as well. Drat! But I do agree with the sentiments expressed in the last part of the message. I'll post a copy of it here: > Speaking of which we probably should put together > some kind of conference/workshop for LinuxBIOS. So the developers can > get together and talk face to face. > That's what I agree with. Are any of you planning on attending the LWE conference & Expo in any form, next year? I'll be there, attending the exhibits. The idea is, that we should discuss more about what we are working on here. Sorry that didn?t come out right. I was transcribing my thoughts, there, and sometimes they don't work out correctly. And the usual caveats about double posts apply. If any of you don't appreciate it, please complain directly. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of Preston L. Bannister > Sent: Monday, October 14, 2002 2:10 PM > To: Eric W. Biederman; Ronald G Minnich > Cc: LinuxBIOS > Subject: RE: the plan for stable > > Missed the original message, but I do have a couple suggestions. > > You only know if LinuxBIOS is "stable" on a particular motherboard when one > or more people have gotten it to work on one or more revisions and instances > of that motherboard. The more cumulative experience the greater your faith. > > Perhaps the record you want is: > > Reporter (email) > LinuxBIOS version (tagged in CVS) > Motherboard version > Number of boards (especially in clusters) > Status: working/no known problems, some problems, not working > Description (optional, brief) of how used and any known problems. > > To be able to *start* with a working version of LinuxBIOS (if one existed), > and then move forward is a huge advantage. > > > -----Original Message----- > From: Eric W. Biederman > Sent: Sunday, October 13, 2002 10:38 PM > > Ronald G Minnich writes: > > > A short sketch. > > > > What I want to do, but have not had time to do. For each mainboard, we > > designate an owner. The owner is responsible for letting us know that > > their mainboard works. Mainboards are in one of 3 states: (stable, > > unstable, unsupported) > > > > Mainboards start out in the unstable or unsupported state. > > > > We pick a date (1/1/03?) and say we want all owners of all mainboards to > > tell us that their mainboard is stable. We freeze the tree one month > > ahead of that time and the only changes that go in are for stabilization. > > 1 January 2003 is a bad date for me as I have plans to be far > away from computers over christmas. > > > If nobody steps up for a board, it goes to unsupported state. Boards with > > owners start out in the unstable state. > > The challenge is for a lot of boards we do not get active feedback > after a port has been completed. So for any ongoing work we need > to very very careful not to make changes to the core that break ports. > I am probably the worst offender, except for the various bits of debug > code that come and go but still. > > > Mainboards move to the stable state when the owner confirms stability. > > When patches are made for a problem, ALL stable mainboards revert to > > unstable. We iterate until we get it solid, then freeze it. > > For the first round this looks o.k, it really depends on what > kind of feedback we have. > > > This information is maintained by a file in each mainboard directory > > called STATUS, which consists of name/value paris. > > One file in the root directory called STATUS should do it.. > > > Will this work? > > Sounds like a good rough draft. The very important thing > about the stable series is that nothing happens to the core > code that could possibly break a motherboard port. That > way within a stable series we can get more but not fewer > boards working. > > Then whenever a new port gets working we can do another release. > Of course if the come in fast enough we can delay... > > > thanks (I'm off email for a bit -- at a workshop) > > Speaking of which we probably should put together > some kind of conference/workshop for LinuxBIOS. So the developers can > get together and talk face to face. > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From ollie at sis.com.tw Mon Oct 14 21:14:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Mon Oct 14 21:14:01 2002 Subject: strange error on sis900 ethernet In-Reply-To: <20021014143033.7942.qmail@web13208.mail.yahoo.com> References: <20021014143033.7942.qmail@web13208.mail.yahoo.com> Message-ID: <1034645546.1238.17.camel@ollie> On Mon, 2002-10-14 at 22:30, zhu shi song wrote: > I met one strange error on sis900 ethernet driver. > I'm using cvs freebios on 6 Oct, 2002 , kernel 2.4.17, > mainboard is winfast6300. After booting using > linuxbios stored in DOC, I boot > my host linux system using normal bios. the host > linux > is the same system as in DOC. I test pings, the > result > is ( after linuxbios booting): > ping -s 2592 192.12.11.1 ( remote ip addr ) 0% lost > ping -s 2593 192.12.11.1 ( remote ip addr ) no > response, 100% lost Why are your using a packet size of 259x bytes ?? It just makes no sense since the MTU of ethernet is about 1500. > I can't make the mainboard work correctly until I have > booted > windows98. Then I use my host linux system to boot, > the thing is ok. (after windows98 booting ) > ping -s 2592 192.12.11.1 0% lost > ping -s 2593 192.12.11.1 0% lost > > What's the problem, maybe something wrong with pci > ,or sis900 init > code. Some early 630A/E chips has some kind of bugs due to semiconductor fab process. Probably you are just unlucky to get a bad one. Ollie From zhushisongzhu at yahoo.com Tue Oct 15 01:18:00 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Tue Oct 15 01:18:00 2002 Subject: strange error on sis900 ethernet In-Reply-To: <1034645546.1238.17.camel@ollie> Message-ID: <20021015053414.27603.qmail@web13201.mail.yahoo.com> (1) IP has the fragmentation function, ip should support it correctly (2) why windows98 can handle the matter correctly, but linux can't , maybe linux pci or sis900 ehternet driver has some bug (3) maybe linuxbios init sis900 so unusual that linux can't handle it correctly. thanks zhu ollie lho wrote:On Mon, 2002-10-14 at 22:30, zhu shi song wrote: > I met one strange error on sis900 ethernet driver. > I'm using cvs freebios on 6 Oct, 2002 , kernel 2.4.17, > mainboard is winfast6300. After booting using > linuxbios stored in DOC, I boot > my host linux system using normal bios. the host > linux > is the same system as in DOC. I test pings, the > result > is ( after linuxbios booting): > ping -s 2592 192.12.11.1 ( remote ip addr ) 0% lost > ping -s 2593 192.12.11.1 ( remote ip addr ) no > response, 100% lost Why are your using a packet size of 259x bytes ?? It just makes no sense since the MTU of ethernet is about 1500. > I can't make the mainboard work correctly until I have > booted > windows98. Then I use my host linux system to boot, > the thing is ok. (after windows98 booting ) > ping -s 2592 192.12.11.1 0% lost > ping -s 2593 192.12.11.1 0% lost > > What's the problem, maybe something wrong with pci > ,or sis900 init > code. Some early 630A/E chips has some kind of bugs due to semiconductor fab process. Probably you are just unlucky to get a bad one. Ollie _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios --------------------------------- Do you Yahoo!? Faith Hill - Exclusive Performances, Videos, & more faith.yahoo.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From zhushisongzhu at yahoo.com Tue Oct 15 01:45:01 2002 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Tue Oct 15 01:45:01 2002 Subject: strange error on sis900 ethernet In-Reply-To: <1034645546.1238.17.camel@ollie> Message-ID: <20021015060134.58736.qmail@web13205.mail.yahoo.com> And also I have tested different packet size , I found odd len packet can't response, even can. for example: ping -s 122 192.12.11.1 0% lost ping -s 123 192.12.11.1 100% lost thanks zhu ollie lho wrote:On Mon, 2002-10-14 at 22:30, zhu shi song wrote: > I met one strange error on sis900 ethernet driver. > I'm using cvs freebios on 6 Oct, 2002 , kernel 2.4.17, > mainboard is winfast6300. After booting using > linuxbios stored in DOC, I boot > my host linux system using normal bios. the host > linux > is the same system as in DOC. I test pings, the > result > is ( after linuxbios booting): > ping -s 2592 192.12.11.1 ( remote ip addr ) 0% lost > ping -s 2593 192.12.11.1 ( remote ip addr ) no > response, 100% lost Why are your using a packet size of 259x bytes ?? It just makes no sense since the MTU of ethernet is about 1500. > I can't make the mainboard work correctly until I have > booted > windows98. Then I use my host linux system to boot, > the thing is ok. (after windows98 booting ) > ping -s 2592 192.12.11.1 0% lost > ping -s 2593 192.12.11.1 0% lost > > What's the problem, maybe something wrong with pci > ,or sis900 init > code. Some early 630A/E chips has some kind of bugs due to semiconductor fab process. Probably you are just unlucky to get a bad one. Ollie _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios --------------------------------- Do you Yahoo!? Faith Hill - Exclusive Performances, Videos, & more faith.yahoo.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From whm_buaa at sina.com Tue Oct 15 03:53:01 2002 From: whm_buaa at sina.com (=?GB2312?Q?=CD=F5=BA=A3=C3=F7?=) Date: Tue Oct 15 03:53:01 2002 Subject: (no subject) Message-ID: <200210150752.g9F7q3a01104@nwn.definitive.org> HI ALL: I want to boot the kernel from harddisk(ide) using Linuxbios. I found a rominage in www.cwlinux.com which can boot successfully via ide hardisk . From the output message, I found they use etherboot-5.0.6.But I don't know how they build the romimage.If some one can give me some advice ,i will appreciate your help! ?? ????????? ?? ????????????????? ??????????????whm_buaa at sina.com ?????????????????2002-10-15 From hcyun at etri.re.kr Tue Oct 15 04:11:01 2002 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Tue Oct 15 04:11:01 2002 Subject: MTRR on P4 Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD537@cms3.etri.re.kr> Hello. I have problems in setting MTRR registers on our SIS645 based custom P4 mainboard. More precisely my system hangs on set_fixed_mtrrs() function on mtrr.c Because I'm using recently updated cvs tree, that function already use disable/enable cache but it doen't work for me. I investigated your configuration files of supermicro p4dxx boards because they are the only P4 boards in the cvs tree. And I found your comment about mtrr. You said that 'Don't do generic MTRR setup, instead use values from the fixed_mtrr_values array' So I saw the code and I found that fixed_mtrr_values array is defined but never used anywhere. Can you tell me more about your comments and please suggest how can I pass this problem if possible. Best regards, Heechul -------------- next part -------------- An HTML attachment was scrubbed... URL: From whm_buaa at sina.com Tue Oct 15 04:13:00 2002 From: whm_buaa at sina.com (=?GB2312?Q?=CD=F5=BA=A3=C3=F7?=) Date: Tue Oct 15 04:13:00 2002 Subject: I need some help about BOOT VIA IDE! Message-ID: <200210150812.g9F8Cla01568@nwn.definitive.org> HI ALL: I want to boot the kernel from harddisk(ide) using Linuxbios. I found a rominage in www.cwlinux.com which can boot successfully via ide hardisk . From the output message, I found they use etherboot-5.0.6.But I don't know how they build the romimage.If some one can give me some advice ,i will appreciate your help! From whm_buaa at sina.com Tue Oct 15 04:13:04 2002 From: whm_buaa at sina.com (=?GB2312?Q?=CD=F5=BA=A3=C3=F7?=) Date: Tue Oct 15 04:13:04 2002 Subject: I need some help about BOOT VIA IDE! Message-ID: <200210150812.g9F8Cla01572@nwn.definitive.org> HI ALL: I want to boot the kernel from harddisk(ide) using Linuxbios. I found a rominage in www.cwlinux.com which can boot successfully via ide hardisk . From the output message, I found they use etherboot-5.0.6.But I don't know how they build the romimage.If some one can give me some advice ,i will appreciate your help! From whm_buaa at sina.com Tue Oct 15 04:13:07 2002 From: whm_buaa at sina.com (=?GB2312?Q?=CD=F5=BA=A3=C3=F7?=) Date: Tue Oct 15 04:13:07 2002 Subject: I need some help about BOOT VIA IDE! Message-ID: <200210150812.g9F8Cla01569@nwn.definitive.org> HI ALL: I want to boot the kernel from harddisk(ide) using Linuxbios. I found a rominage in www.cwlinux.com which can boot successfully via ide hardisk . From the output message, I found they use etherboot-5.0.6.But I don't know how they build the romimage.If some one can give me some advice ,i will appreciate your help! From whm_buaa at sina.com Tue Oct 15 04:13:09 2002 From: whm_buaa at sina.com (=?GB2312?Q?=CD=F5=BA=A3=C3=F7?=) Date: Tue Oct 15 04:13:09 2002 Subject: I need some help about BOOT VIA IDE! Message-ID: <200210150812.g9F8Cla01570@nwn.definitive.org> HI ALL: I want to boot the kernel from harddisk(ide) using Linuxbios. I found a rominage in www.cwlinux.com which can boot successfully via ide hardisk . From the output message, I found they use etherboot-5.0.6.But I don't know how they build the romimage.If some one can give me some advice ,i will appreciate your help! From whm_buaa at sina.com Tue Oct 15 04:13:12 2002 From: whm_buaa at sina.com (=?GB2312?Q?=CD=F5=BA=A3=C3=F7?=) Date: Tue Oct 15 04:13:12 2002 Subject: I need some help about BOOT VIA IDE! Message-ID: <200210150812.g9F8Cla01571@nwn.definitive.org> HI ALL: I want to boot the kernel from harddisk(ide) using Linuxbios. I found a rominage in www.cwlinux.com which can boot successfully via ide hardisk . From the output message, I found they use etherboot-5.0.6.But I don't know how they build the romimage.If some one can give me some advice ,i will appreciate your help! From davedworin at msn.com Tue Oct 15 07:45:01 2002 From: davedworin at msn.com (Dave Dworin) Date: Tue Oct 15 07:45:01 2002 Subject: LinuxBIOS for MIPS Message-ID: Is LinuxBIOS available for MIPS architecture? Dave _________________________________________________________________ Send and receive Hotmail on your mobile device: http://mobile.msn.com From jdarby at powercom.net Tue Oct 15 08:59:00 2002 From: jdarby at powercom.net (Justin C. Darby) Date: Tue Oct 15 08:59:00 2002 Subject: R&D Project In-Reply-To: Message-ID: <000d01c2744c$ee2c1c80$241f72d8@M00> Thank you for your reply. I was wondering if you had the make and model of a SMP motherboard that supports 4 PCI slots? This isin't documented well that I can see in the LinuxBIOS tarballs. Sorry to bother you. Thanks again, Justin C. Darby -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Eric W. Biederman Sent: Sunday, October 13, 2002 11:36 AM To: Justin C. Darby Cc: linuxbios at clustermatic.org Subject: Re: R&D Project "Justin C. Darby" writes: > I'm trying to get together funding for a research project at my > company to build a generic platform for high availability devices > using Linux, LinuxBIOS, etc, as the software portion. > > I had some general questions about LinuxBIOS I wanted to ask while I'm > still collecting information to report in my project plan. > > a) I have a requirement of a 4+ PCI slots, compact flash booting via > IDE, and a serial console. Video, sound, etc, are pointless for any > project we will take on. Onboard network ports are nice. What hardware > works best? I don't care about AMD vs. Intel, I want to know what > (hopefully easily available) motherboards are best served by LinuxBIOS > in general. If this is going to start a flame war, I don't mind > personal responses to this question. :) We have at least one board with 6 slots and 4 PCI-X busses... > b) Are there any known problems running any types of PCI cards? High > speed serial, ethernet, whatever, or if it works with Linux, it should > work just fine? Only video.... And that is just initialization glitches. > c) Can Disk-on-Chip BIOS solutions be reflashed several times? I would > like these machines to be remotely upgradeable in all aspects while > having a local device to boot from. All recent BIOS solutions can reflashed several times. > d) Are any SMP motherboards supported? yes. Eric _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From hansolofalcon at worldnet.att.net Tue Oct 15 09:31:01 2002 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Tue Oct 15 09:31:01 2002 Subject: List strangeness and multiple posts Message-ID: <001401c27451$7a64e200$7558580c@who> Hello from Gregg C Levine Here is something strange. I just saw here, on this list, multiple posts, from two different subscribers, each contained the exact same thing. These were sent in HTML format. Can the list processor be configured to reject HTML mail period? And for that matter items of the same subject, except for replies? And if anyone were to examine the multiples, six of them, you would find the subject loaded with the list address, at least several times. The ones on the SiS9000 system, I'll leave alone for now. But the ones on one specific chip set are the ones that I am annoyed about. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) From davedworin at msn.com Tue Oct 15 09:47:01 2002 From: davedworin at msn.com (Dave Dworin) Date: Tue Oct 15 09:47:01 2002 Subject: LinuxBIOS for MIPS Message-ID: Is LinuxBIOS available for MIPS architecture? Dave _________________________________________________________________ Join the world?s largest e-mail service with MSN Hotmail. http://www.hotmail.com From rminnich at lanl.gov Tue Oct 15 09:52:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 15 09:52:01 2002 Subject: LinuxBIOS for MIPS In-Reply-To: Message-ID: On Tue, 15 Oct 2002, Dave Dworin wrote: > Is LinuxBIOS available for MIPS architecture? I would like it to be, but we have not found a good platform to work with. ron From rminnich at lanl.gov Tue Oct 15 09:53:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 15 09:53:00 2002 Subject: R&D Project In-Reply-To: <000d01c2744c$ee2c1c80$241f72d8@M00> Message-ID: On Tue, 15 Oct 2002, Justin C. Darby wrote: > I was wondering if you had the make and model of a SMP motherboard that > supports 4 PCI slots? just about any supermicro or tyan with e7500 chipset ought to be possible. Also I have a tyan guiness here (2xK7, 4 PCI slot) that uses linuxbios. ron From bari at onelabs.com Tue Oct 15 11:29:00 2002 From: bari at onelabs.com (Bari Ari) Date: Tue Oct 15 11:29:00 2002 Subject: LinuxBIOS for MIPS References: Message-ID: <3DAC38E6.7030205@onelabs.com> Ronald G Minnich wrote: >On Tue, 15 Oct 2002, Dave Dworin wrote: > > > >>Is LinuxBIOS available for MIPS architecture? >> >> > >I would like it to be, but we have not found a good platform to work with. > >ron > > > We are looking at getting LinuxBIOS or PPCboot up on the Broadcom 1250 http://www.broadcom.com/products/1250.html Dual 64bit MIPS cores, 3 Gigabit Ethernet Macs, Dual DDR controllers, PCI and HyperTransport I/O all on a single die and around 10 Watts at 1 GHz. I hear there is a quad core version due out soon. They look a bit pricy but we could easily stuff enough of these into a single 42U rack to offer the same performance as the large 10-TFlop cluster thats being built at LANL with 1/10 the heat. Bari From whm_buaa at sina.com Tue Oct 15 12:22:01 2002 From: whm_buaa at sina.com (=?GB2312?Q?=CD=F5=BA=A3=C3=F7?=) Date: Tue Oct 15 12:22:01 2002 Subject: (no subject) Message-ID: <200210151621.g9FGL9a03437@nwn.definitive.org> hi all: I have found the solution to boot linux from ide using linuxbios. My plateform is : sis630 based mainboard, redhat6.2, kernel: 2.2.14. If somebody are interested at it and need some help , you can contact me. Thanks the help of Mr Andres Ip From agnew at cs.umd.edu Tue Oct 15 13:10:00 2002 From: agnew at cs.umd.edu (Adam Agnew) Date: Tue Oct 15 13:10:00 2002 Subject: I need some help about BOOT VIA IDE! (fwd) Message-ID: <20021015132822.I30485-100000@www.missl.cs.umd.edu> Here is a patch for etherboot 5.0.6 to do polled ide. http://www.missl.cs.umd.edu/~agnew/ On Tue, 15 Oct 2002, [GB2312] ?????? wrote: > HI ALL: > I want to boot the kernel from harddisk(ide) using Linuxbios. I found a rominage in > www.cwlinux.com which can boot successfully via ide hardisk . From the output message, > I found they use etherboot-5.0.6.But I don't know how they build the romimage.If some one > can give me some advice ,i will appreciate your help! > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From bari at onelabs.com Tue Oct 15 18:25:00 2002 From: bari at onelabs.com (Bari Ari) Date: Tue Oct 15 18:25:00 2002 Subject: LinuxBIOS for MIPS References: Message-ID: <3DAC9A7D.8030503@onelabs.com> Anyone have experience with : http://linux-vr.org/ http://www.hacksrus.com/~mike/lince/kernel.htm#Source http://people.freebsd.org/~imp/pdamips.html http://www.linux-mips.org/hardware.html We looked at this a couple years ago for the getting Linux up on the Mips VR41xx series, but Mips didn't win in the CPU for PDA wars. Bari From bari at onelabs.com Tue Oct 15 19:03:01 2002 From: bari at onelabs.com (Bari Ari) Date: Tue Oct 15 19:03:01 2002 Subject: LinuxBIOS for MIPS References: Message-ID: <3DACA344.3090908@onelabs.com> Another place to look for Mips boot support is AMD with the Au series (formerly Alchemy) http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/Au1000BootRom_rev1.2.pdf http://www.amd.com/us-en/ConnectivitySolutions/TechnicalResources/0,,50_2334_2496_7112,00.html Bari From ollie at sis.com.tw Tue Oct 15 21:28:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Tue Oct 15 21:28:01 2002 Subject: LinuxBIOS for MIPS In-Reply-To: <3DAC9A7D.8030503@onelabs.com> References: <3DAC9A7D.8030503@onelabs.com> Message-ID: <1034732557.1162.34.camel@ollie> On Wed, 2002-10-16 at 06:45, Bari Ari wrote: > > We looked at this a couple years ago for the getting Linux up on the > Mips VR41xx series, but Mips didn't win in the CPU for PDA wars. > Yea, and my Agenda VR3 is literally a brick now. Ollie From bari at onelabs.com Tue Oct 15 23:52:01 2002 From: bari at onelabs.com (Bari Ari) Date: Tue Oct 15 23:52:01 2002 Subject: LinuxBIOS for MIPS References: <3DAC9A7D.8030503@onelabs.com> <1034732557.1162.34.camel@ollie> Message-ID: <3DACE709.5030805@onelabs.com> > > >Yea, and my Agenda VR3 is literally a brick now. > >Ollie > > To make a new Romdisk http://www.cs.umbc.edu/~acedil1/agenda/romdisk.shtml plus you'll probably need a soldering iron and a flash programmer if it's really dead. Bari From andrew.dennison at motec.com.au Wed Oct 16 01:27:00 2002 From: andrew.dennison at motec.com.au (Andrew Dennison) Date: Wed Oct 16 01:27:00 2002 Subject: Linuxbios for AMD SC520 Message-ID: <001e01c274d7$585807b0$4000a8c0@ANDREWDT3> Has anyone setup linuxbios for the AMD SC520 (an AMD 486 microcontroller)? I'm looking into doing this for the AMD "CDP" evaluation board and just wanted to check I wasn't re-inventing the wheel... Regards, Andrew From truewhirm at yahoo.es Wed Oct 16 05:49:01 2002 From: truewhirm at yahoo.es (whirm) Date: Wed Oct 16 05:49:01 2002 Subject: linuxbios for the tyan 2466n-4m Message-ID: <200210161202.18424.truewhirm@yahoo.es> -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 someon knows if there is something for that motherboard? thanks - -- You're either part of the solution or part of the problem. -- Eldridge Cleaver -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.0.7 (GNU/Linux) iD8DBQE9rTkqsmoTA4lHN/MRAtLmAJ0Ww1QXyr5e0GGb4jIZQ7GaFHmPzQCfdLIF dRm9ar/aYnrVdgpIgxNAUkU= =kNvg -----END PGP SIGNATURE----- From rminnich at lanl.gov Wed Oct 16 10:06:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 16 10:06:00 2002 Subject: Linuxbios for AMD SC520 In-Reply-To: <001e01c274d7$585807b0$4000a8c0@ANDREWDT3> Message-ID: On Wed, 16 Oct 2002, Andrew Dennison wrote: > Has anyone setup linuxbios for the AMD SC520 (an AMD 486 microcontroller)? > I'm looking into doing this for the AMD "CDP" evaluation board and just > wanted to check I wasn't re-inventing the wheel... no, nobody has done that one AFAIK. ron From rminnich at lanl.gov Wed Oct 16 10:08:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 16 10:08:00 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: <200210161202.18424.truewhirm@yahoo.es> Message-ID: On Wed, 16 Oct 2002, whirm wrote: > someon knows if there is something for that motherboard? not sure. What chipset is that nowadays? ron From jdarby at powercom.net Wed Oct 16 10:19:00 2002 From: jdarby at powercom.net (Justin C. Darby) Date: Wed Oct 16 10:19:00 2002 Subject: LinuxBIOS for VIA Apollo PLE133 + VT8231 Chipset In-Reply-To: Message-ID: <000701c27521$58300db0$241f72d8@M00> I was asking earlier about a work related problem, this is a personal one: Can LinuxBIOS currently work with the VIA Apollo PLE133 + VT8231 Chipset? This is a Mini-ITX motherboard that's built for use with the VIA Eden fanless CPU's (embedded systems stuff). It's all x86 compatible. The full specs on the motherboard are here: http://www.viavpsd.com/product/epia_mini_itx_spec.jsp?motherboardId=21 Thanks, Justin C. Darby From justin at street-vision.com Wed Oct 16 10:22:00 2002 From: justin at street-vision.com (Justin Cormack) Date: Wed Oct 16 10:22:00 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: from "Ronald G Minnich" at Oct 16, 2002 08:25:03 AM Message-ID: <200210161437.g9GEbO008586@tench.street-vision.com> > > On Wed, 16 Oct 2002, whirm wrote: > > > someon knows if there is something for that motherboard? > > not sure. What chipset is that nowadays? Thats AMD MPX. Didnt the MP get done but not the MPX yet? Justin From rminnich at lanl.gov Wed Oct 16 10:23:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 16 10:23:01 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: <200210161437.g9GEbO008586@tench.street-vision.com> Message-ID: On Wed, 16 Oct 2002, Justin Cormack wrote: > Thats AMD MPX. Didnt the MP get done but not the MPX yet? yes. We're waiting for someone to tackle the MPX. I wonder if the PPC guys know how easy they have it :-) The chipsets don't seem to rotate nearly as fast in the PPC world. ron From aip at cwlinux.com Wed Oct 16 10:36:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Wed Oct 16 10:36:01 2002 Subject: LinuxBIOS for VIA Apollo PLE133 + VT8231 Chipset In-Reply-To: <000701c27521$58300db0$241f72d8@M00>; from jdarby@powercom.net on Wed, Oct 16, 2002 at 09:35:59AM -0500 References: <000701c27521$58300db0$241f72d8@M00> Message-ID: <20021016225224.A4735@mail.cwlinux.com> Justin, > Can LinuxBIOS currently work with the VIA Apollo PLE133 + VT8231 > Chipset? This is a Mini-ITX motherboard that's built for use with the > VIA Eden fanless CPU's (embedded systems stuff). It's all x86 > compatible. I was looking at it couple weeks ago. LinuxBIOS failed to jump to hardwaremain. I hope I can have time again to tackle it during the weekend. But I just want to let you know we are working on it. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From pyro at linuxlabs.com Wed Oct 16 11:59:00 2002 From: pyro at linuxlabs.com (steven james) Date: Wed Oct 16 11:59:00 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: Message-ID: Greetings, I'm considering tackling that board (The legacy BIOS is TERRIBLE on that board). Hopefully, next week, I'll try out the MP LinuxBIOS then try to port from there. G'day, sjames On Wed, 16 Oct 2002, Ronald G Minnich wrote: > On Wed, 16 Oct 2002, Justin Cormack wrote: > > > Thats AMD MPX. Didnt the MP get done but not the MPX yet? > > yes. We're waiting for someone to tackle the MPX. > > I wonder if the PPC guys know how easy they have it :-) > > The chipsets don't seem to rotate nearly as fast in the PPC world. > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From freedman at physics.cornell.edu Wed Oct 16 12:13:01 2002 From: freedman at physics.cornell.edu (Daniel Freedman) Date: Wed Oct 16 12:13:01 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: References: Message-ID: <20021016162947.GA27964@physics.cornell.edu> Hi Steven (and others), On Wed, Oct 16, 2002, steven james wrote: > Greetings, > > I'm considering tackling that board (The legacy BIOS is TERRIBLE on that Great news! I have a lot of interest in the 760MPX and the S2466N-4M, running nearly fifty in my cluster (diskless, using PXE remote boot from BIOS, which is probably the best to hope for, outside of something modern, well-written, and open like LinuxBIOS). I agree that the bios provided leaves _much_ to be desired, especially with serial console, etc... > board). Hopefully, next week, I'll try out the MP LinuxBIOS then try to > port from there. Let me know (on- or off-list) if there's anything I could do to help. Take care, Daniel > G'day, > sjames -- Daniel A. Freedman , Graduate Fellow Electronic Structure Calculations, LASSP, Cornell University Free University Project: http://www.freeuniversityproject.org Help build an accredited open-admission, free-tuition online university! From David.Barr at student.oc.edu Wed Oct 16 12:58:01 2002 From: David.Barr at student.oc.edu (David Barr) Date: Wed Oct 16 12:58:01 2002 Subject: openBIOS and freeBIOS relative to linuxBIOS Message-ID: <400A070D6312A14BB126A4061C51AFAA03D49419@mail.oc.edu> Are they dead? After I finished reading through the last three months of mail here, I headed out to a few similar projects to keep digging. Only thing is, the last real post-y type stuff I can find is July '02. Is LinuxBIOS the only one still going? Anyone here have a hand / foot / appendage in any of those other type projects? -------------- next part -------------- An HTML attachment was scrubbed... URL: From truewhirm at yahoo.es Wed Oct 16 15:44:00 2002 From: truewhirm at yahoo.es (whirm) Date: Wed Oct 16 15:44:00 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: <200210161437.g9GEbO008586@tench.street-vision.com> References: <200210161437.g9GEbO008586@tench.street-vision.com> Message-ID: <200210162157.31365.truewhirm@yahoo.es> -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 > Thats AMD MPX. Didnt the MP get done but not the MPX yet? yes, Is it, the mpx chiset is mp with USB working, I think... - -- Aberdeen was so small that when the family with the car went on vacation, the gas station and drive-in theatre had to close. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.0.7 (GNU/Linux) iD8DBQE9rcSrsmoTA4lHN/MRAkMDAKCFqG0rkXefTJMOHZZReDegkcikJwCgqJAI ExBAdE8CJ1TF1BPVdMMk7zE= =gXP/ -----END PGP SIGNATURE----- From truewhirm at yahoo.es Wed Oct 16 15:48:00 2002 From: truewhirm at yahoo.es (whirm) Date: Wed Oct 16 15:48:00 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: <20021016162947.GA27964@physics.cornell.edu> References: <20021016162947.GA27964@physics.cornell.edu> Message-ID: <200210162201.19952.truewhirm@yahoo.es> -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 > Let me know (on- or off-list) if there's anything I could do to help. I can help too! - -- Never kick a man, unless he's down. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.0.7 (GNU/Linux) iD8DBQE9rcWPsmoTA4lHN/MRAqlOAKCCeEDuizUB8PbatdmU+yWtyt4KAACfUuS/ 8q434HA7m4dq3BuJO0cE/d0= =NHtj -----END PGP SIGNATURE----- From freedman at physics.cornell.edu Wed Oct 16 17:25:01 2002 From: freedman at physics.cornell.edu (Daniel Freedman) Date: Wed Oct 16 17:25:01 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: <200210162157.31365.truewhirm@yahoo.es> References: <200210161437.g9GEbO008586@tench.street-vision.com> <200210162157.31365.truewhirm@yahoo.es> Message-ID: <20021016214141.GB25531@physics.cornell.edu> Hi whirm, On Wed, Oct 16, 2002, whirm wrote: > -----BEGIN PGP SIGNED MESSAGE----- > > Thats AMD MPX. Didnt the MP get done but not the MPX yet? > > yes, Is it, the mpx chiset is mp with USB working, I think... No, the 760MPX is the 768 southbridge, rather than the 766 southbridge with 760MP. It's quite different as it also supports 66MHz 64-bit PCI. What you're probably thinking about was when the first 760MPX chipsets were released, they had a subtle USB bug, so motherboards (such as Tyan S2466N) included a PCI card to support USB. AMD fixed the chipset to natively support USB properly, but didn't change the chipset number (still 760MPX); Tyan's new motherboards containing this fixed 760MPX chipset do have a new model number (Tyan S2466N-4M, which actually denotes the 4Mbit/512KB Flash-ram). Hope this helps, and take care, Daniel -- Daniel A. Freedman , Graduate Fellow Electronic Structure Calculations, LASSP, Cornell University Free University Project: http://www.freeuniversityproject.org Help build an accredited open-admission, free-tuition online university! From davelists at imagesmiths.com Wed Oct 16 20:17:01 2002 From: davelists at imagesmiths.com (David Thomas) Date: Wed Oct 16 20:17:01 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: <200210162201.19952.truewhirm@yahoo.es>; from whirm on Wed, Oct 16, 2002 at 10:01:19PM +0200 References: <20021016162947.GA27964@physics.cornell.edu> <200210162201.19952.truewhirm@yahoo.es> Message-ID: <20021016173401.C21121@imagesmiths.com> Me too. I'm about to buy a stack of them. On Wed, Oct 16, 2002 at 10:01:19PM +0200, whirm (truewhirm at yahoo.es) wrote: Subject: Re: linuxbios for the tyan 2466n-4m Message ID: <200210162201.19952.truewhirm at yahoo.es> > -----BEGIN PGP SIGNED MESSAGE----- > Hash: SHA1 > > > > Let me know (on- or off-list) if there's anything I could do to help. > > I can help too! > > - -- > Never kick a man, unless he's down. > -----BEGIN PGP SIGNATURE----- > Version: GnuPG v1.0.7 (GNU/Linux) > > iD8DBQE9rcWPsmoTA4lHN/MRAqlOAKCCeEDuizUB8PbatdmU+yWtyt4KAACfUuS/ > 8q434HA7m4dq3BuJO0cE/d0= > =NHtj > -----END PGP SIGNATURE----- > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Wed Oct 16 21:34:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 16 21:34:00 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: <200210161437.g9GEbO008586@tench.street-vision.com> Message-ID: On Wed, 16 Oct 2002, Justin Cormack wrote: > Thats AMD MPX. Didnt the MP get done but not the MPX yet? yes, and I would sure like to see the MPX get done ... ron From rminnich at lanl.gov Wed Oct 16 21:36:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 16 21:36:01 2002 Subject: LinuxBIOS for VIA Apollo PLE133 + VT8231 Chipset In-Reply-To: <000701c27521$58300db0$241f72d8@M00> Message-ID: I have 3 of these motherboards, and other people have some too. Work is ongoing. ron From rminnich at lanl.gov Wed Oct 16 21:42:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 16 21:42:01 2002 Subject: openBIOS and freeBIOS relative to linuxBIOS In-Reply-To: <400A070D6312A14BB126A4061C51AFAA03D49419@mail.oc.edu> Message-ID: they are not dead I think. openbios is still plugging away on forth stuff. I would very much like to see openbios hosted on top of linuxbios at some point. freebios, for the moment, is really just linuxbios but that could change. ron From truewhirm at yahoo.es Wed Oct 16 22:26:00 2002 From: truewhirm at yahoo.es (whirm) Date: Wed Oct 16 22:26:00 2002 Subject: linuxbios for the tyan 2466n-4m In-Reply-To: <20021016214141.GB25531@physics.cornell.edu> References: <200210161437.g9GEbO008586@tench.street-vision.com> <200210162157.31365.truewhirm@yahoo.es> <20021016214141.GB25531@physics.cornell.edu> Message-ID: <200210170439.19262.truewhirm@yahoo.es> -----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 > Hope this helps, and take care, > Daniel woops! ^_^ thanks! - -- Many pages make a thick book, except for pocket Bibles which are on very very thin paper. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.0.7 (GNU/Linux) iD8DBQE9riLXsmoTA4lHN/MRAhqtAKDP1msfgnmk7CkIWCI6Bso4taUb3gCfRv8J rZogH5Bz+A9yS+U35ciJ7/A= =h4rL -----END PGP SIGNATURE----- From ebiederman at lnxi.com Wed Oct 16 22:40:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Oct 16 22:40:01 2002 Subject: Heads up 2.5.42 does not work with mkelfImage Message-ID: I just did a quick check and the kernels 32bit entry point has changed again. In particular the segment numbers that are used are different. I am going to see what I can do but this could be a serious problem. Eric From rminnich at lanl.gov Wed Oct 16 23:27:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 16 23:27:00 2002 Subject: Heads up 2.5.42 does not work with mkelfImage In-Reply-To: Message-ID: On 16 Oct 2002, Eric W. Biederman wrote: > I just did a quick check and the kernels 32bit entry point > has changed again. In particular the segment numbers > that are used are different. how different? Are there a different number of registers, or did they just move around? Also, doesn't the 32-bit entry point get handled transparently by the ELF code? We have the same problem with plan 9. We're going to need to figure out how to parameterize this sooner or later. kron From ebiederman at lnxi.com Wed Oct 16 23:38:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Wed Oct 16 23:38:01 2002 Subject: Heads up 2.5.42 does not work with mkelfImage In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On 16 Oct 2002, Eric W. Biederman wrote: > > > I just did a quick check and the kernels 32bit entry point > > has changed again. In particular the segment numbers > > that are used are different. > > how different? The contents of the segment registers are different. As 2.5.x currently sits they only way to have a version of mkelfImage that works for both 2.5.recent and 2.4.x is to explicitly test the version number. >Are there a different number of registers, or did they just > move around? > > Also, doesn't the 32-bit entry point get handled transparently by the ELF > code? Yes so no BIOS's need to be rebuilt. But tools like mkelfImage need some help. Hopefully I can get some native support into Linux and then I can just skip the need to port mkelfImage, to newer kernels. The feature freeze is on the 20th so I don't know if I will be able to get anything in or not. > We have the same problem with plan 9. We're going to need to figure out > how to parameterize this sooner or later. Getting support into the kernel proper is they only long term maintainable way to go. Eric From David.Barr at student.oc.edu Thu Oct 17 08:22:01 2002 From: David.Barr at student.oc.edu (David Barr) Date: Thu Oct 17 08:22:01 2002 Subject: m810clmr (SiS730S) Plan Of Attack Message-ID: <400A070D6312A14BB126A4061C51AFAA03D4941B@mail.oc.edu> I want my uni to do something non-MS based, so I've opted to try and win them over to a fully open source solution. Eventually I'd like to have a small (5 nodes or so) system to benchmark various clustering setups on (openMOSIX, Scyld, SCORE, OSCAR, clustermatic, etc.), but first I have to show them it can be done. My goal then is to impress the Computer Science Faculty and Staff with an inexpensive, fast-booting, stable, speedy Linux wundernode; and then present a "Fund Me for a Few More Penguins" speech which will cause them to loosen the purse strings. Maybe if they'd stop buying extra copies of Exchange Server... but I digress. At any rate, even if I 'fail', I still have a really cool toy, and a lot of valuable experience. Here's my List of Things to Acquire(TM): 0) pcchips m810clmr (SiS730S) w/ Duron 1.2 ($77) 1) 1GB PC 133 RAM ($25/ea. 512MB; $50 total) 2) DiskOnChip MD-2008-D08 ($25) 3) MATX Case ($19) 4) IDE2CF Adapter ($21?) 5) CF Media ($40 - $???) 6) Optional HDD (ca. $50) All told, I'm looking at about $USD 300 per node, which is in my opinion quite reasonable. So what am I waiting for? Why, someone to poke obvious holes in my hastily conceived plan, of course. Good questions to answer would be: - Did I overlook some incredibly obvious component / requirement? - Can I do the three-step (DOC -> CF -> HDD) boot? - Should I avoid a particular brand of CF Media? - What size CF should I aim for? - Do you have a sample of a pcchips m810lmr config lying around? - Is my cost analysis fairly complete and realistic? Some of these questions are inane enough that they may not warrant flooding the whole list with responses. Direct replies ( david.barr (at) student.oc.edu ) are welcome, especially if you've done time on the SiS730S. -dbarr. PS: Apologies for the ugliness of my previous post to the list: that'll teach me to send mail from lab computers during class. From rminnich at lanl.gov Thu Oct 17 09:21:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 09:21:01 2002 Subject: m810clmr (SiS730S) Plan Of Attack In-Reply-To: <400A070D6312A14BB126A4061C51AFAA03D4941B@mail.oc.edu> Message-ID: On Thu, 17 Oct 2002, David Barr wrote: > - Can I do the three-step (DOC -> CF -> HDD) boot? If you have CF, I don't think you need DOC I think this is a great project. ron From rminnich at lanl.gov Thu Oct 17 10:25:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 10:25:00 2002 Subject: mainboard status Message-ID: Maintaining mainboard status has been a pain in the neck from the beginning, and as the number of mainboards has grown it has gotten harder and harder. Here is what I would like to do: for each src/mainboard//, e.g. src/mainboard/tyan/guiness, I want to have a file called STATUS. In this file are keyword-value pairs describing the state of the mainboard. Each night at midnight we'll have a cron job collate this information and produce a web page. Mainboards will have owners responsible for letting us know if the board is working, and what the most recent good build time was. This information will be display on the web page. The file would look something like this: # These are keyword-value pairs. # a : separates the keyword from the value # the value is arbitrary text delimited by newline. # continuation, if needed, will be via the \ at the end of a line # comments are indicated by a '#' as the first character. # the keywords are case-INSENSITIVE owner: Ron Minnich email: rminnich at lanl.gov #status: One of unsupported, unstable, stable status: unstable # Last-known-good follows the internationl date standard: day/month/year last-known-good: 0/0/0000 Comments: Great mainboard for a dashboard radio Rather than have a single file with all the status, I want to have separate files for each mainboard so the various committers can work on their STATUS file without worrying about stomping on each other. Comments? Are there fields missing? Is there a fundamental problem with this idea that I'm missing? Thanks ron From freedman at physics.cornell.edu Thu Oct 17 12:07:00 2002 From: freedman at physics.cornell.edu (Daniel Freedman) Date: Thu Oct 17 12:07:00 2002 Subject: mainboard status In-Reply-To: References: Message-ID: <20021017162348.GE16057@physics.cornell.edu> Hi Ron, On Thu, Oct 17, 2002, Ronald G Minnich wrote: > Here is what I would like to do: for each src/mainboard//, > e.g. src/mainboard/tyan/guiness, I want to have a file called STATUS. In > this file are keyword-value pairs describing the state of the mainboard. > Each night at midnight we'll have a cron job collate this information and > produce a web page. Sounds great... > Mainboards will have owners responsible for letting us know if the board > is working, and what the most recent good build time was. This information > will be display on the web page. > Comments? Are there fields missing? Is there a fundamental problem with > this idea that I'm missing? I'd add something like a "reason" field or "explanation" field to provide info to the "status" line (unless you feel this is amply covered in the "comments" field, though I interpreted that to be more generic than commenting directly on the "status" line). This could be something like: "Serverworks won't provide any chipset specs w/o NDA, and doesn't respond to contacts with NDA, so support is unlikely for the future" "e7500 supported, except for serial console" "sis740 support is currently minimal, but growing quickly due to great help of sis-employee Ollie" (Above are all just made-up examples, incidentally.) Don't know if this suggestion helps... Take care, Daniel PS I am actually interested in LinuxBIOS support for Sis740 (featured on nice SFF Shuttle S40G). Wondering if anyone else is pursueing such? -- Daniel A. Freedman , Graduate Fellow Electronic Structure Calculations, LASSP, Cornell University Free University Project: http://www.freeuniversityproject.org Help build an accredited open-admission, free-tuition online university! From steve at nexpath.com Thu Oct 17 12:20:00 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Thu Oct 17 12:20:00 2002 Subject: mainboard status In-Reply-To: Message-ID: > The file would look something like this: > > # These are keyword-value pairs. > # a : separates the keyword from the value > # the value is arbitrary text delimited by newline. > # continuation, if needed, will be via the \ at the end of a line > # comments are indicated by a '#' as the first character. > # the keywords are case-INSENSITIVE > owner: Ron Minnich > email: rminnich at lanl.gov > #status: One of unsupported, unstable, stable > status: unstable > # Last-known-good follows the internationl date standard: day/month/year > last-known-good: 0/0/0000 > Comments: Great mainboard for a dashboard radio I would suggest adding some information related to how or what booting modes have been tested, ie, DOC, IDE, etherboot, floppy, and with what console, serial, VGA, etc. In some cases the memory type or position (slot#) matters too. -Steve From rminnich at lanl.gov Thu Oct 17 12:29:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 12:29:00 2002 Subject: mainboard status In-Reply-To: <20021017162348.GE16057@physics.cornell.edu> Message-ID: On Thu, 17 Oct 2002, Daniel Freedman wrote: > I'd add something like a "reason" field or "explanation" field to provide info > to the "status" line (unless you feel this is amply covered in the > "comments" field, though I interpreted that to be more generic than > commenting directly on the "status" line). This could be something like: I'm adding it as "explanation". Good idea. Thanks ron From rminnich at lanl.gov Thu Oct 17 12:29:15 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 12:29:15 2002 Subject: mainboard status In-Reply-To: <20021017162348.GE16057@physics.cornell.edu> Message-ID: On Thu, 17 Oct 2002, Daniel Freedman wrote: > PS I am actually interested in LinuxBIOS support for Sis740 (featured on > nice SFF Shuttle S40G). Wondering if anyone else is pursueing such? Ollie ? :-) ron From rminnich at lanl.gov Thu Oct 17 12:30:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 12:30:01 2002 Subject: mainboard status In-Reply-To: Message-ID: On Thu, 17 Oct 2002, Steve M. Gehlbach wrote: > I would suggest adding some information related to how or what booting modes > have been tested, ie, DOC, IDE, etherboot, floppy, and with what console, > serial, VGA, etc. In some cases the memory type or position (slot#) matters > too. done. ron From Antony at Soft-Solutions.co.uk Thu Oct 17 12:34:01 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Thu Oct 17 12:34:01 2002 Subject: mainboard status In-Reply-To: References: Message-ID: <200210171651.g9HGp1L27082@vulcan.rissington.net> On Thursday 17 October 2002 3:41 pm, Ronald G Minnich wrote: > The file would look something like this: > > # These are keyword-value pairs. > # a : separates the keyword from the value > # the value is arbitrary text delimited by newline. > # continuation, if needed, will be via the \ at the end of a line > # comments are indicated by a '#' as the first character. > # the keywords are case-INSENSITIVE > owner: Ron Minnich > email: rminnich at lanl.gov > #status: One of unsupported, unstable, stable > status: unstable > # Last-known-good follows the internationl date standard: day/month/year > last-known-good: 0/0/0000 > Comments: Great mainboard for a dashboard radio Not sure whether to include this in the Comments field, or suggest an extra field called Notes, but make sure that html can be included so that hyperlinks can be used to point to other web pages containing more detailed notes on getting various bits to work, longer lists of retail systems including a specific motherboard, etc. Antony. -- Anything that improbable is effectively impossible. - Murray Gell-Mann, Nobel Prizewinner in Physics From rminnich at lanl.gov Thu Oct 17 12:43:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 12:43:00 2002 Subject: mainboard status In-Reply-To: <200210171651.g9HGp1L27082@vulcan.rissington.net> Message-ID: I could just make a field called links? ron From linuxbios at hello.org Thu Oct 17 12:48:00 2002 From: linuxbios at hello.org (CMZ) Date: Thu Oct 17 12:48:00 2002 Subject: mainboard status References: Message-ID: <013f01c275ff$39409800$0401a8c0@minibm> Just an Idea, Exact revision(s) of mainboards tested might be needed. ----- Original Message ----- From: "Ronald G Minnich" To: "Steve M. Gehlbach" Cc: Sent: Friday, October 18, 2002 12:46 AM Subject: RE: mainboard status > On Thu, 17 Oct 2002, Steve M. Gehlbach wrote: > > > I would suggest adding some information related to how or what booting modes > > have been tested, ie, DOC, IDE, etherboot, floppy, and with what console, > > serial, VGA, etc. In some cases the memory type or position (slot#) matters > > too. > > done. > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From Antony at Soft-Solutions.co.uk Thu Oct 17 12:49:00 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Thu Oct 17 12:49:00 2002 Subject: mainboard status In-Reply-To: References: Message-ID: <200210171705.g9HH5YL27106@vulcan.rissington.net> On Thursday 17 October 2002 5:59 pm, Ronald G Minnich wrote: > I could just make a field called links? Sounds good. Then the individual mainboard owners can point to whatever information they like (whether it's theirs or someone else's). Antony. -- KDE 3.0.3 contains an important fix for handling SSL certificates. Users of Internet Explorer, which suffers from the same problem but which does not yet have a fix available, are also encouraged to switch to KDE 3.0.3. http://www.kde.org/announcements/announce-3.0.3.html From rminnich at lanl.gov Thu Oct 17 12:57:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 12:57:01 2002 Subject: mainboard status In-Reply-To: <013f01c275ff$39409800$0401a8c0@minibm> Message-ID: On Fri, 18 Oct 2002, CMZ wrote: > Just an Idea, Exact revision(s) of mainboards tested might be needed. done thanks, that was important! ron From ebiederman at lnxi.com Thu Oct 17 14:36:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Thu Oct 17 14:36:01 2002 Subject: [ANNOUNCE] mkelfImage-1.17 Message-ID: The differences in 2.5.42 weren't as bad as they looked at first glance. I just had to add some extra descriptors into the gdt. mkelfImage-1.17 is now released. You can find it at: ftp://ftp.lnxi.com/pub/src/mkelfImage/mkelfImage-1.17.tar.gz Eric From tejohnson at yahoo.com Thu Oct 17 16:05:01 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Thu Oct 17 16:05:01 2002 Subject: mainboard status In-Reply-To: Message-ID: <01e001c2761a$c2e7e5c0$021e1eac@areas3> Wow, This sounds really cool. One quick question though... What about boards that are "Generic" in terms of labels, where you have board name A, and board name B, when they are in fact the same board? Would there be any benefit to a field called "OtherNames"? Or similar? Regards, Todd E. Johnson tejohnson at yahoo.com From Antony at Soft-Solutions.co.uk Thu Oct 17 16:06:01 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Thu Oct 17 16:06:01 2002 Subject: Fwd: RE: mainboard status Message-ID: <20021017202305.MHQN459.mta02-svc.ntlworld.com@there> ---------- Forwarded Message ---------- Subject: RE: mainboard status Date: Thu, 17 Oct 2002 16:11:32 -0400 From: "Todd E. Johnson" Wow, This sounds really cool. One quick question though... What about boards that are "Generic" in terms of labels, where you have board name A, and board name B, when they are in fact the same board? Would there be any benefit to a field called "OtherNames"? Or similar? Regards, Todd E. Johnson tejohnson at yahoo.com > -----Original Message----- > On Thursday 17 October 2002 5:59 pm, Ronald G Minnich wrote: > > I could just make a field called links? > > Sounds good. Then the individual mainboard owners can point > to whatever > information they like (whether it's theirs or someone else's). > > Antony. -- Most people have more than the average number of legs. From rminnich at lanl.gov Thu Oct 17 16:07:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 16:07:01 2002 Subject: supermicro motherboards from the tree Message-ID: I'm trying to build a supermicro e7500 motherboard from the sourceforge repo for testing. Currently I get: /home/rminnich/src/freebios/src/arch/i386/smp/secondary.inc Anyone else seen this? ron From rminnich at lanl.gov Thu Oct 17 16:07:05 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 16:07:05 2002 Subject: mainboard status In-Reply-To: <01e001c2761a$c2e7e5c0$021e1eac@areas3> Message-ID: On Thu, 17 Oct 2002, Todd E. Johnson wrote: > Would there be any benefit to a field called "OtherNames"? Or similar? AKA? ron From tejohnson at yahoo.com Thu Oct 17 16:13:00 2002 From: tejohnson at yahoo.com (Todd E. Johnson) Date: Thu Oct 17 16:13:00 2002 Subject: mainboard status In-Reply-To: Message-ID: <01e201c2761b$f5136a00$021e1eac@areas3> Hi again, Are you asking, or telling me? Perhaps I missed this field? If not, this works for me! Regards, Todd E. Johnson tejohnson at yahoo.com > -----Original Message----- > From: linuxbios-admin at clustermatic.org > [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Ronald > G Minnich > Sent: Thursday, October 17, 2002 4:24 PM > To: Todd E. Johnson > Cc: 'CMZ'; linuxbios at clustermatic.org > Subject: RE: mainboard status > > > On Thu, 17 Oct 2002, Todd E. Johnson wrote: > > > Would there be any benefit to a field called "OtherNames"? > Or similar? > > AKA? > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From rminnich at lanl.gov Thu Oct 17 16:16:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 16:16:00 2002 Subject: mainboard status In-Reply-To: <01e201c2761b$f5136a00$021e1eac@areas3> Message-ID: On Thu, 17 Oct 2002, Todd E. Johnson wrote: > Are you asking, or telling me? Perhaps I missed this field? If not, > this works for me! sorry. How about we call the alias field AKA for Also Known As? ron From rminnich at lanl.gov Thu Oct 17 16:23:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 16:23:01 2002 Subject: some commits ... Message-ID: Simple fixes so that dependencies are satisfied; now for the compile errors. CVS: Modified Files: CVS: src/config/Config src/mainboard/supermicro/p4dpe/Config CVS: src/northbridge/intel/E7500/raminit.inc ~ From rminnich at lanl.gov Thu Oct 17 16:28:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 16:28:00 2002 Subject: gcc, ever improving ... :-) Message-ID: printk_debug(__FUNCTION__ "\n"); You get the message: /home/rminnich/src/freebios/src/arch/i386/lib/hardwaremain.c:139: warning: concatenation of string literals with __FUNCTION__ is deprecated OK, I use this technique quite a bit. Anybody know why this handy little trick is 'deprecated'? ron From j-perdue at tamu.edu Thu Oct 17 16:40:01 2002 From: j-perdue at tamu.edu (Jack Perdue) Date: Thu Oct 17 16:40:01 2002 Subject: gcc, ever improving ... :-) In-Reply-To: Message-ID: <5.1.0.14.0.20021017155358.039f6b00@neo.tamu.edu> Howdy Ron, A quick Google search gives up this: http://gcc.gnu.org/ml/gcc-help/2002-02/msg00210.html which would imply (without actually RingTFM) the "proper" replacement would be __func__ HIH, jack (not digging further) j-perdue at tamu.edu At 02:45 PM 10/17/02 -0600, you wrote: > printk_debug(__FUNCTION__ "\n"); > >You get the message: > >/home/rminnich/src/freebios/src/arch/i386/lib/hardwaremain.c:139: warning: >concatenation of string literals with __FUNCTION__ is deprecated > >OK, I use this technique quite a bit. Anybody know why this handy little >trick is 'deprecated'? > >ron > >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Thu Oct 17 16:43:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Thu Oct 17 16:43:01 2002 Subject: gcc, ever improving ... :-) In-Reply-To: References: Message-ID: Ronald G Minnich writes: > printk_debug(__FUNCTION__ "\n"); > > You get the message: > > /home/rminnich/src/freebios/src/arch/i386/lib/hardwaremain.c:139: warning: > concatenation of string literals with __FUNCTION__ is deprecated > > OK, I use this technique quite a bit. Anybody know why this handy little > trick is 'deprecated'? Because I believe all __FUNCTION__ is guaranteed to be by the standard is a string pointer. And I think it not being that way caused someone some pain in gcc. Just make it: printk_debug("%s\n", __FUNCTION__); Eric From davej at suse.de Thu Oct 17 16:48:01 2002 From: davej at suse.de (Dave Jones) Date: Thu Oct 17 16:48:01 2002 Subject: gcc, ever improving ... :-) In-Reply-To: ; from rminnich@lanl.gov on Thu, Oct 17, 2002 at 02:45:19PM -0600 References: Message-ID: <20021017230459.A27003@suse.de> On Thu, Oct 17, 2002 at 02:45:19PM -0600, Ronald G Minnich wrote: > printk_debug(__FUNCTION__ "\n"); > > You get the message: > > /home/rminnich/src/freebios/src/arch/i386/lib/hardwaremain.c:139: warning: > concatenation of string literals with __FUNCTION__ is deprecated > > OK, I use this technique quite a bit. Anybody know why this handy little > trick is 'deprecated'? Simple fix : printk_debug("%s\n", __FUNCTION__); -- | Dave Jones. http://www.codemonkey.org.uk | SuSE Labs From ebiederman at lnxi.com Thu Oct 17 16:51:01 2002 From: ebiederman at lnxi.com (Eric W Biederman) Date: Thu Oct 17 16:51:01 2002 Subject: supermicro motherboards from the tree In-Reply-To: References: Message-ID: Ronald G Minnich writes: > I'm trying to build a supermicro e7500 motherboard from the sourceforge > repo for testing. > > Currently I get: > /home/rminnich/src/freebios/src/arch/i386/smp/secondary.inc > > Anyone else seen this? O.k. I have not quite finished the E7500 merge. Ron if you want to help, everything is in that .src.rpm I sent you. You can just kill that include. My big issue is that there are a few pieces that don't work for everyone, and because of the kernel feature freeze deadline I put the priority on getting kexec into the kernel. If anyone wants to help me test kexec the code out it is at: http://www.xmission.com/~ebiederm/files/kexec Anyway now back to attempting to get code into the kernel. Eric From rminnich at lanl.gov Thu Oct 17 16:56:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 16:56:01 2002 Subject: e7500 Message-ID: Getting there. Eric has done a truly amazing amount of work ... Basic syntax errors and other compilation errors fixed. Now to shoot for link-time errors (e.g. udelay etc.) CVS: Modified Files: CVS: src/arch/i386/lib/Config src/include/pci.h CVS: src/include/pci_ids.h src/include/superio/w83627hf.h CVS: src/lib/newpci.c src/northbridge/intel/E7500/northbridge.c CVS: src/southbridge/intel/82801ca/ich3_ioapic.c CVS: src/southbridge/intel/82870/p64h2_ioapic.c ron From pyro at linuxlabs.com Thu Oct 17 17:38:00 2002 From: pyro at linuxlabs.com (steven james) Date: Thu Oct 17 17:38:00 2002 Subject: E7500 Message-ID: Greetings, The last batch of commits helped. Now I'm getting undefined reference to SMBUS_MEM_CHANNEL_OFF doing find -exec grep, I don't see that defined anywhere. G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Thu Oct 17 17:40:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 17:40:01 2002 Subject: supermicro motherboards from the tree In-Reply-To: Message-ID: I'm working from the code you sent. I know you're busy Eric so I'm posting informational stuff and trying not to get you distracted -- the kernel stuff is very important. many thanks ron From rminnich at lanl.gov Thu Oct 17 17:42:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 17:42:00 2002 Subject: gcc, ever improving ... :-) In-Reply-To: <20021017230459.A27003@suse.de> Message-ID: On Thu, 17 Oct 2002, Dave Jones wrote: > Simple fix : > > printk_debug("%s\n", __FUNCTION__); Yep I know about this. It's just that there are usages that won't work this way -- macros that count on being able to use standard C string concatenation. I'm not the only person using these, there are tons of them out there, and the various projects just got over the recent changes in cpp concatenation. Oh well, enough whining. Another day, another change :-) ron From rminnich at lanl.gov Thu Oct 17 17:44:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 17:44:00 2002 Subject: gcc, ever improving ... :-) In-Reply-To: <5.1.0.14.0.20021017155358.039f6b00@neo.tamu.edu> Message-ID: On Thu, 17 Oct 2002, Jack Perdue wrote: > which would imply (without actually RingTFM) the > "proper" replacement would be __func__ no, unfortunately, what that means is that __FUNCTION__ is no longer a string literal. Bummer. But fixable with enough work. ron From rminnich at lanl.gov Thu Oct 17 17:50:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 17:50:01 2002 Subject: E7500 In-Reply-To: Message-ID: I'm working that now. ron From rminnich at lanl.gov Thu Oct 17 18:26:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 18:26:00 2002 Subject: e7500 closer. Message-ID: only remaining undefined's are gdt, gdt_limit, and udelay. If you're working with these boards, do an update. ron From rminnich at lanl.gov Thu Oct 17 18:47:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 18:47:01 2002 Subject: e7500 and gas and undefined and ... Message-ID: OK, here is a fun one. secondary.inc moved to separate compilation as secondary.S It won't assemble: secondary.s: Assembler messages: secondary.s:87: Error: subtraction of two symbols in different sections `gdt_end' {*UND* section} - `gdt' {*UND* section} at file address 155 make: *** [secondary.o] Error 1 The problem code is: gdtaddr: .word gdt_end - gdt - 1 /* compute the table limit */ .long gdt /* we know the offset */ Now, I have to sign off -- kids and all that -- and I'm hoping some of you gas experts can puzzle this out. What should happen is that the gdtaddr in secondary.S will have pointers to the gdt defined in crt0.S. Obviously something needs fixing here so that the undefined references in secondary.S are properly set up so you have a gdt in secondary.S. One option is to include the gdt from the .inc file. That *UND* section is kind of suspicious -- Maybe another directive is needed? ron From andrew.dennison at motec.com.au Thu Oct 17 22:07:00 2002 From: andrew.dennison at motec.com.au (Andrew Dennison) Date: Thu Oct 17 22:07:00 2002 Subject: e7500 and gas and undefined and ... In-Reply-To: Message-ID: <001601c2764d$cd7ce930$4000a8c0@ANDREWDT3> secondary.inc used to be concatenated into the same file as the definition of gdt (from entry32.inc). Maybe you just need to wrap gdt in EXT() to show it's now an external reference to be resolved by the linker? ie: [andrew at starbug src]$ diff arch/i386/smp/secondary.S.orig arch/i386/smp/secondary.S 75,76c75,76 < .word gdt_end - gdt - 1 /* compute the table limit */ < .long gdt /* we know the offset */ --- > .word EXT(gdt_end) - EXT(gdt) - 1 /* compute the table limit */ > .long EXT(gdt) /* we know the offset */ labels like "gdtptr" are already exported in entry32.inc, so this may also need to be done to "gdt" and "gdt_end" so the linker can resolve the external references. ie [andrew at starbug src]$ diff cpu/i386/entry32.inc.orig cpu/i386/entry32.inc 22c22,23 < gdt: --- > .globl EXT(gdt) > EXT(gdt): 64c65,66 < gdt_end: --- > .globl EXT(gdt_end) > EXT(gdt_end): I'm still working out the structure of the code so I can look integrating the SC520 and I haven't compiled these changes so I may be completely off track... Andrew > -----Original Message----- > From: linuxbios-admin at clustermatic.org > [mailto:linuxbios-admin at clustermatic.org]On Behalf Of Ronald G Minnich > Sent: Friday, 18 October 2002 9:04 AM > To: linuxbios at clustermatic.org > Subject: e7500 and gas and undefined and ... > > > OK, here is a fun one. secondary.inc moved to separate compilation as > secondary.S > > It won't assemble: > > secondary.s: Assembler messages: > secondary.s:87: Error: subtraction of two symbols in different sections > `gdt_end' {*UND* section} - `gdt' {*UND* section} at file address 155 > make: *** [secondary.o] Error 1 > > The problem code is: > gdtaddr: > .word gdt_end - gdt - 1 /* compute the table limit */ > .long gdt /* we know the offset */ > > Now, I have to sign off -- kids and all that -- and I'm hoping some of you > gas experts can puzzle this out. What should happen is that the gdtaddr in > secondary.S will have pointers to the gdt defined in crt0.S. Obviously > something needs fixing here so that the undefined references in > secondary.S are properly set up so you have a gdt in secondary.S. One > option is to include the gdt from the .inc file. > > That *UND* section is kind of suspicious -- Maybe another directive is > needed? > > ron > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From ebiederman at lnxi.com Thu Oct 17 22:35:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Thu Oct 17 22:35:00 2002 Subject: e7500 and gas and undefined and ... In-Reply-To: References: Message-ID: Ronald G Minnich writes: > OK, here is a fun one. secondary.inc moved to separate compilation as > secondary.S > > It won't assemble: > > secondary.s: Assembler messages: > secondary.s:87: Error: subtraction of two symbols in different sections > `gdt_end' {*UND* section} - `gdt' {*UND* section} at file address 155 > make: *** [secondary.o] Error 1 > > The problem code is: > gdtaddr: > .word gdt_end - gdt - 1 /* compute the table limit */ > .long gdt /* we know the offset */ And it was: gdtaddr: .word gdt_limit /* the table limit */ .long gdt /* we know the offset */ And gdt_limit got rid of the problem. And it is all defined in: arch/i386/lib/c_start.S This is from my break up of linuxbios into two seperately compiled pieces so I could use upx on the code that runs from ram. There are some issues with all of the ports working if I merged it as is so I was delaying merging that bit. I believe if I make the compression optional I can get around the worst of the kinks. The challenge is keeping the p4dc6 port that uses cache as ram working. Eric From rminnich at lanl.gov Thu Oct 17 22:40:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 22:40:01 2002 Subject: e7500 and gas and undefined and ... In-Reply-To: Message-ID: On 17 Oct 2002, Eric W. Biederman wrote: > gdtaddr: > .word gdt_limit /* the table limit */ > .long gdt /* we know the offset */ I'll have to look, and find gdt_limit. This all started with gdt_limit undefined :-) thanks, Eric. I will try to get this one fixed and commit. ron From rminnich at lanl.gov Thu Oct 17 23:11:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 23:11:01 2002 Subject: status Message-ID: I have to do some other stuff, but: ar cr linuxbios.a crt0.o //home/rminnich/src/config/./normal/option_table.o linuxbiosmain.o linuxpci.o newpci.o clog2.o printk.o serial_subr.o subr.o vsprintf.o memset.o memcpy.o memcmp.o malloc.o elfboot.o do_inflate.o delay.o fallback_boot.o compute_ip_checksum.o version.o keyboard.o mc146818rtc.o isa-dma.o i8259.o ide.o boot.o linuxbios_table.o i386_subr.o params.o hardwaremain.o c_start.o pirq_routing.o mpspec.o ioapic.o start_stop.o secondary.o northbridge.o nvram.o ich3_ioapic.o ich3_lpc.o ich3_ide.o ich3_reset.o ich3_smbus.o ich3_cpu.o ich3_rtc.o ich3_power.o ich3_1e0_misc.o ich3_1f0_misc.o p64h2_ioapic.o p64h2_pcibridge.o superio_winbond_w83627hf.o nsuperio.o keyboard.o mc146818rtc.o isa-dma.o i8259.o ide.o generic_superio.o w83627hf_power.o power_led.o ramtest.o cpuid.o microcode.o mtrr.o l2_cache.o delay_i786.o mainboard.o mtrr_values.o mptable.o irq_tables.o gcc -nostdlib -r -o linuxbios.o crt0.o rom_fill_inbuf.o linuxbios.a /usr/lib/gcc-lib/i386-redhat-linux/3.2/libgcc.a linuxbios.a(c_start.o): In function `_start': c_start.o(.text+0x0): multiple definition of `_start' crt0.o(.rom.text+0x4): first defined here collect2: ld returned 1 exit status make: *** [linuxbios.o] Error 1 What's interesting: I have a build that works from eric in which _start is defined (as T) in crt0.0 and c_start.o; and I have this build, same thing. This build gets the error, the other build doesn't. More as a find it. ron From rminnich at lanl.gov Thu Oct 17 23:15:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 23:15:00 2002 Subject: e7500 Message-ID: OK eric I see what you're up to with the upx. Interesting. I'll try to get further tomorrow :-) ron From rminnich at lanl.gov Thu Oct 17 23:19:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 17 23:19:01 2002 Subject: upx In-Reply-To: Message-ID: So upx is definitely worth it, right? Unless I misread it the decompressor is assembly. We have a PPC port going on. I do see the 2-1 compression but in 256KB we have oodles of room (with etherboot), so I'm just trying to make sure the added complexity in the build is something we want. Is it easily turned off? thanks ron p.s. I know I promised not to distract you, sorry :-) From ebiederman at lnxi.com Fri Oct 18 00:50:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Oct 18 00:50:01 2002 Subject: upx In-Reply-To: References: Message-ID: Ronald G Minnich writes: > So upx is definitely worth it, right? Yes. It is much easier to put in lots of microcode updates and things. And we have lots of strings. It is a very maintainable solution. > Unless I misread it the decompressor is assembly. And fits on one screen. See also util/nrv2b which has the C compressor decompressor. I put it in crt0.base in my tree The data structures are all heavily tuned so you can have a very small and simple assembly decopressor. And I think you can dig non-x86 ports out of the main upx tree. > We have a PPC port going on. I do see the 2-1 compression but > in 256KB we have oodles of room (with etherboot), so I'm just trying to > make sure the added complexity in the build is something we want. Except for the decompression step all I did was clearly seperate the code that can assume it has ram, from the painful assemly include, execute from rom code that gets us there. It actually reduces complexity in several places in the linker script, as we don't have to tell the linker put the code here, but actually set it up so it executes there. As for size for the longest time it has been my goal to keep linuxbios small enough that I can fit LinuxBIOS and etherboot into 64KB. We are quickly going from being the overly large solution to a solution for a smaller BIOS. And if we can do it why not? > Is it easily turned off? Yes. You do a memcpy instead of decompression. I just haven't had time to write the code to make it conditional yet. > thanks > > ron > p.s. I know I promised not to distract you, sorry :-) So long as I don't have to do the merger a little distraction now and again is o.k. And getting some discussion and code review going over my code is probably a good side benefit. Eric From rminnich at lanl.gov Fri Oct 18 09:37:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 18 09:37:01 2002 Subject: upx In-Reply-To: Message-ID: So how about a CONFIG_UPX to turn that feature on and off? sound reasonable? ron From rminnich at lanl.gov Fri Oct 18 09:38:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 18 09:38:01 2002 Subject: STATUS file Message-ID: Here, based on input, is the mainboard status file format. Comments welcome! If I don't hear any more ideas I will put this out today or monday. # These are keyword-value pairs. # a : separates the keyword from the value # the value is arbitrary text delimited by newline. # continuation, if needed, will be via the \ at the end of a line # comments are indicated by a '#' as the first character. # the keywords are case-INSENSITIVE owner: Ron Minnich email: rminnich at lanl.gov #status: One of unsupported, unstable, stable status: unstable explanation: flash-types: payload-types: # e.g. linux, plan 9, wince, etc. OS-types: # e.g. "Plan 9 interrupts don't work on this chipset" OS-issues: console-types: # vga is unsupported, unstable, or stable vga: # Last-known-good follows the internationl date standard: day/month/year last-known-good: 0/0/0000 Comments: Links: Mainboard-revision: # What other mainboards are like this one? List them here. AKA: From ebiederman at lnxi.com Fri Oct 18 11:32:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Oct 18 11:32:00 2002 Subject: upx In-Reply-To: References: Message-ID: Ronald G Minnich writes: > So how about a > CONFIG_UPX > > to turn that feature on and off? sound reasonable? I'd rather see CONFIG_COMPRESS as that is a little more obvious what it does, and no where else do we actually mention UPX, but instead we talk about the ucl compression library and the nrv2b compresion algorithm. But the name is the easy part.... Eric From rminnich at lanl.gov Fri Oct 18 11:51:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 18 11:51:01 2002 Subject: upx In-Reply-To: Message-ID: CONFIG_COMPRESS it is. Now for the hard part :-) ron From rminnich at lanl.gov Fri Oct 18 13:38:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Fri Oct 18 13:38:00 2002 Subject: more gcc Message-ID: gcc ... -o mptable.o /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c:106:22: warning: multi-line string literals are deprecated I wonder how much code I've seen in the last while (Emacs for example) that uses this one. I just can't keep up with these improvements. :-) ron From aip at cwlinux.com Sat Oct 19 09:28:00 2002 From: aip at cwlinux.com (Andrew Ip) Date: Sat Oct 19 09:28:00 2002 Subject: IPMI support in Linux Message-ID: <20021019214515.A19785@mail.cwlinux.com> Does anyone know if IPMI works under LinuxBIOS? AFAIK, there is a Linux driver patch but dunno if it still works under LinuxBIOS. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From david.h.barr at myself.com Sat Oct 19 11:45:01 2002 From: david.h.barr at myself.com (David H. Barr) Date: Sat Oct 19 11:45:01 2002 Subject: STATUS file Message-ID: <20021018181148.16510.qmail@mail.com> Sorry about the freemail -- The uni, in their infinite wisdom, decided to take down the campus' mail system for all of fall break. Pardon me if these are a bit ignorant: 1) I'm assuming the name of the mainboard itself will be the status file name. Or will that only be contained in mainboard-revision? 2) Links: http>:Here, based on input, is the mainboard status file format. >Comments welcome! >If I don't hear any more ideas I will put this out today or >monday. ># These are keyword-value pairs. ># a : separates the keyword from the value ># the value is arbitrary text delimited by newline. ># continuation, if needed, will be via the \ at the end of a line ># comments are indicated by a '#' as the first character. ># the keywords are case-INSENSITIVE ... >Links: >Mainboard-revision: ... -- __________________________________________________________ Sign-up for your own FREE Personalized E-mail at Mail.com http://www.mail.com/?sr=signup From rminnich at lanl.gov Sat Oct 19 11:51:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 19 11:51:00 2002 Subject: IPMI support in Linux In-Reply-To: <20021019214515.A19785@mail.cwlinux.com> Message-ID: I can try the patch. There is no reason it would not work as IPMI is more or less a device driver on the boards we've seen. ron From ebiederman at lnxi.com Sat Oct 19 12:46:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sat Oct 19 12:46:00 2002 Subject: IPMI support in Linux In-Reply-To: <20021019214515.A19785@mail.cwlinux.com> References: <20021019214515.A19785@mail.cwlinux.com> Message-ID: Andrew Ip writes: > Does anyone know if IPMI works under LinuxBIOS? AFAIK, there is a Linux > > driver patch but dunno if it still works under LinuxBIOS. Which part of IPMI. IPMI is a weird spec where all of the parts seem optional that I have not seen on a stable production board. There is the L440gx but I would not call that stable. I have do not have good feelings about intel delivering hardware where accessing the i2c bus with any noise locks of the i2c controller. Not planning to fix it, and then planning to have extra hardware monitoring your system state via i2c. I do not see how you can build a stable system that way. The fact that there is some semi-standard and people are starting adopt it is good. It means things like temperature monitoring etc should get easier. But only if people actually implement something sane. I have trouble seeing designs with an onboard microcontroller as sane. Eric From rminnich at lanl.gov Sat Oct 19 13:00:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 19 13:00:00 2002 Subject: STATUS file In-Reply-To: <20021018181148.16510.qmail@mail.com> Message-ID: On Fri, 18 Oct 2002, David H. Barr wrote: > 1) I'm assuming the name of the mainboard itself will be the status > file name. Or will that only be contained in mainboard-revision? No, the name is always STATUS, but it's location is in src/mainboard//, so that is how it is disambiguated. > 2) Links: http>: Message-ID: On 19 Oct 2002, Eric W. Biederman wrote: > I have trouble seeing designs with an onboard microcontroller as sane. Agree 100%. That's what we keep telling vendors too. The worst thing I've seen lately is a board with 2 K8s, and a PPC running hardhat Linux for maintenance. That's just nuts. ron From David.Barr at student.oc.edu Sat Oct 19 13:20:00 2002 From: David.Barr at student.oc.edu (David Barr) Date: Sat Oct 19 13:20:00 2002 Subject: STATUS file Message-ID: Anything wrong with '|'? ... >OOPS! Hmm, what's a sensible separator then? >ron From stuge-linuxbios at cdy.org Sun Oct 20 00:22:01 2002 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Sun Oct 20 00:22:01 2002 Subject: STATUS file In-Reply-To: <20021018181148.16510.qmail@mail.com>; from david.h.barr@myself.com on Fri, Oct 18, 2002 at 01:11:48PM -0500 References: <20021018181148.16510.qmail@mail.com> Message-ID: <20021020063915.B14739@foo.birdnet.se> On Fri, Oct 18, 2002 at 01:11:48PM -0500, David H. Barr wrote: > 2) Links: http>: Sounds good to me. That's why I asked if they were ignorant questions :-) -dBarr. >As long as the keyword doesn't contain the separator it shouldn't matter. >KEYWORD SEPARATOR VALUE >KEYWORD is any number of any characters excluding ":" >SEPARATOR is the string ": " >VALUE is the remaining characters up to a CR or LF >And ":" IS the sensible separator IMO. >//Peter From tkarthikbalaguru at yahoo.co.in Sun Oct 20 03:43:01 2002 From: tkarthikbalaguru at yahoo.co.in (=?iso-8859-1?q?Karthik=20Bala=20Guru?=) Date: Sun Oct 20 03:43:01 2002 Subject: ATMEL 8051 8-bit + linux Message-ID: <20021020080005.68673.qmail@web8207.mail.in.yahoo.com> Hi, i know to work with ATMEL 8-bit 8051 microcontroller and have done FLASH,EEPROM,LCD .... and many other tiny interfaces with it. How could i get into the nice linux world along with microcontroller concepts ??? I have knowledge in linux . Suggestions plz karthik bala guru ________________________________________________________________________ Missed your favourite TV serial last night? Try the new, Yahoo! TV. visit http://in.tv.yahoo.com From aip at cwlinux.com Sun Oct 20 04:00:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Sun Oct 20 04:00:01 2002 Subject: VIA EPIA status Message-ID: <20021020161717.A32376@mail.cwlinux.com> Hi, Just checked in new code for VIA EPIA src/mainboard/via/epia/irq_tables.c src/mainboard/via/epia/Config src/mainboard/via/epia/do_ramtest.inc util/config/epia.config These checkins enable LinuxBIOS to boot 'till etherboot, but it has problem to see harddisk and network card. For those who want to debug/have fun, a sample config can be found at util/config/epia.config. To make flash writable, you need to run `set setpci -s 0:11.0 40.b=54` before running flash_rom. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From stuge-linuxbios at cdy.org Sun Oct 20 08:00:01 2002 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Sun Oct 20 08:00:01 2002 Subject: ATMEL 8051 8-bit + linux In-Reply-To: <20021020080005.68673.qmail@web8207.mail.in.yahoo.com>; from tkarthikbalaguru@yahoo.co.in on Sun, Oct 20, 2002 at 09:00:05AM +0100 References: <20021020080005.68673.qmail@web8207.mail.in.yahoo.com> Message-ID: <20021020141736.A21950@foo.birdnet.se> On Sun, Oct 20, 2002 at 09:00:05AM +0100, Karthik Bala Guru wrote: > i know to work with ATMEL 8-bit 8051 microcontroller > How could i get into the nice linux world along > with microcontroller concepts ??? Please stop sending wildly off topic mails to the list. Thank you. Linux wants a 32 bit CPU. Stock Linux wants a MMU. I'm not sure if it is at all feasible to port Linux to a <32bit architecture but I'm definately sure that it will be a LOT of work and probably not worth it in the end. I suggest you investigate ARM cores, Crusoe CPUs and/or some of the other chips that have been mentioned in discussions on this list earlier if you want to start experimenting with embedded systems and Linux. //Peter From dpeddi at dpeddi.com Sun Oct 20 18:32:01 2002 From: dpeddi at dpeddi.com (Eddi) Date: Sun Oct 20 18:32:01 2002 Subject: SIS 620 - Specifications request Message-ID: <002b01c2788b$1ec0e320$8501a8c0@athlonxp> Hi, I'm new of this mailing list. I have an Acer Power SE equipped with a motherboard with SiS 620 chipset. Since I've seen that your project doesn't support this chipset, I'd like to use my mainboard to write a bit of support for this chip too. I've read in the archive that perhaps "ollie" can give me some information about this chipset and how to initialize it. Best Regards Eddi From ollie at sis.com.tw Sun Oct 20 22:10:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Sun Oct 20 22:10:01 2002 Subject: more gcc In-Reply-To: References: Message-ID: <1035167487.8530.2.camel@ollie> On Sat, 2002-10-19 at 01:55, Ronald G Minnich wrote: > gcc ... -o mptable.o > /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c > /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c:106:22: > warning: multi-line string literals are deprecated > > > I wonder how much code I've seen in the last while (Emacs for example) > that uses this one. > which gcc version is it ?? Ollie From rminnich at lanl.gov Sun Oct 20 22:23:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sun Oct 20 22:23:00 2002 Subject: more gcc In-Reply-To: <1035167487.8530.2.camel@ollie> Message-ID: On 21 Oct 2002, ollie lho wrote: > On Sat, 2002-10-19 at 01:55, Ronald G Minnich wrote: > > gcc ... -o mptable.o > > /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c > > /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c:106:22: > > warning: multi-line string literals are deprecated > > > > > > I wonder how much code I've seen in the last while (Emacs for example) > > that uses this one. > > > > which gcc version is it ?? 3.2, the latest greatest that ships with red hat. The API changed too, which caused headaches for bproc etc. ron From ebiederman at lnxi.com Sun Oct 20 22:38:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sun Oct 20 22:38:01 2002 Subject: more gcc In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On 21 Oct 2002, ollie lho wrote: > > > On Sat, 2002-10-19 at 01:55, Ronald G Minnich wrote: > > > gcc ... -o mptable.o > > > > /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c > > > > > /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c:106:22: > > > > warning: multi-line string literals are deprecated > > > > > > > > > I wonder how much code I've seen in the last while (Emacs for example) > > > that uses this one. They are easy enough to fix: "multi-line string" becomes: "multi-line \n" "string" Which is actually easier to get the indentation correct with. > > > > > > > which gcc version is it ?? > > 3.2, the latest greatest that ships with red hat. The API changed too, > which caused headaches for bproc etc. The API changed, or the ABI changed? The API should be stable. And only for C++ should the ABI have noticeably changed. Eric From rminnich at lanl.gov Sun Oct 20 22:38:07 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sun Oct 20 22:38:07 2002 Subject: PPC tree created Message-ID: we've got two people looking at PPC support. I've created the skeletal structure for the beginnings of PPC. For starters, I've created src/arch/ppc and src/cpu/g{2,3,4} trees. If those of you doing PPC want to get back to me with mainboard names etc. we can plug those in too. ron From ebiederm at xmission.com Sun Oct 20 22:47:01 2002 From: ebiederm at xmission.com (Eric W. Biederman) Date: Sun Oct 20 22:47:01 2002 Subject: boot the kernel 2.4.19 from linuxbios In-Reply-To: <002001c278a2$a6ae96d0$2800a8c0@MALXP> References: <002001c278a2$a6ae96d0$2800a8c0@MALXP> Message-ID: "Munjun Kang" writes: > Dear Eric W. Biederman. > > I try to boot kernel from linuxbios. > In this time, I meet serious problem. > I saw your kernel startup patch for linuxbios. (x86 Boot enhancements) > In my opinion, you can solve my problem. > > I succeed to loading linux kernel, but Can't mount to root any device, ramdisk, > hdd, nfs. > > In select ramdisk as a root file system, there are different panic message by > kernel module setting. > > And, other device is similar to that. > I think that problem is memory management, > How about do you think? > > If you have some idea, plz let me know. My suggestions. 1) setup to use the external etherboot, and the linuxbios elf loader, it keeps you from being stuck with just loading Linux. 2) Load memtest86 and see if you memory appears o.k. 3) Get an oops that reports something, without running ksyms oops on the output I have no idea. Where in the kernel you are crashing. The best clue you have given is: > VFS: Mounted root (ext3 filesystem). > Freeing unused kernel memory: 244k freed > attempt to access beyond end of device > 03:02: rw=0, want=2147481940, limit=14651280 > attempt to access beyond end of device > 03:02: rw=0, want=738197788, limit=14651280 It looks like there is something fishy in your hard drive code. I don't have any direct experience with the VIA 694X, so I don't know which kinds of things are likely to go wrong. I am forwarding this to the LinuxBIOS list in case someone else has a clue. Eric > Thanks for reading. > > Regards, > malas > > ---------- follow is linuxbios boot message -------- > > LinuxBIOS-1.0.0 Thu Oct 17 10:50:01 KST 2002 starting... > Copying LinuxBIOS to ram. > Jumping to LinuxBIOS. > LinuxBIOS-1.0.0 Thu Oct 17 10:50:01 KST 2002 booting... > Finding PCI configuration type. > Scanning PCI bus... > PCI: pci_scan_bus for bus 0 > PCI: 00:00.0 [1106/0605] > PCI: 00:01.0 [1106/8605] > PCI: 00:11.0 [1106/8231] > PCI: 00:11.1 [1106/0571] > PCI: 00:11.2 [1106/3038] > PCI: 00:11.3 [1106/3038] > PCI: 00:11.4 [1106/8235] > PCI: 00:11.5 [1106/3058] > PCI: 00:11.6 [1106/3068] > PCI: 00:12.0 [1106/3065] > PCI: pci_scan_bus for bus 1 > PCI: 01:00.0 [5333/8d01] > PCI: pci_scan_bus returning with max=01 > PCI: pci_scan_bus returning with max=01 > done > smasize: 8 MB > totalram: 120 MB > Initializing CPU #0 > Enabling cache... > Setting fixed MTRRs(0-88) type: UC > Setting fixed MTRRs(0-16) type: WB > DONE fixed MTRRs > Setting variable MTRR 0, base: 0MB, range: 64MB, type WB > Setting variable MTRR 1, base: 64MB, range: 32MB, type WB > Setting variable MTRR 2, base: 96MB, range: 16MB, type WB > Setting variable MTRR 3, base: 112MB, range: 8MB, type WB > DONE variable MTRRs > Clear out the extra MTRR's > call intel_enable_fixed_mtrr() > call intel_enable_var_mtrr() > Leave setup_mtrrs > done. > > Max cpuid index : 1 > Vendor ID : CentaurHauls > Processor Type : 0x00 > Processor Family : 0x06 > Processor Model : 0x07 > Processor Mask : 0x00 > Processor Stepping : 0x08 > Feature flags : 0x00803035 > > > MTRR check > Fixed MTRRs : Enabled > Variable MTRRs: Enabled > > Configuring L2 cache...Not 'GenuineIntel' Processor > Enable Cache > done. > Disabling local apic...done. > CPU #0 Initialized > IDE enable in reg. 0x50 is 0x7 > set IDE reg. 0x50 to 0x7 > IRQs in reg. 0x4c are 0x4 > setting reg. 0x4c to 0x4 > IDE channel enable reg. 0x40 is 0x8 > set IDE channel enable reg. 0x40 to 0xb > Prg. Interface reg. 0x9 is 0x8f > set Pro. Interface reg. 0x9 to 0x8a > command reg. 0x4 is 0x80 > set command reg. 0x4 to 0x85 > Checking IRQ routing tables... > Allocating PCI resources... > ASSIGN RESOURCES, bus 0 > PCI: 00:00.0 10 <- [0xf8000000 - 0xfbfffffe] prefmem > PCI: 00:01.0 1c <- [not assigned in sub-bus] bus 1 io > PCI: 00:01.0 24 <- [0xf0000000 - 0xf7ffffff] bus 1 prefmem > PCI: 00:01.0 20 <- [0xfc000000 - 0xfc0fffff] bus 1 mem > ASSIGN RESOURCES, bus 1 > PCI: 01:00.0 10 <- [0xfc000000 - 0xfc07fffe] mem > PCI: 01:00.0 14 <- [0xf0000000 - 0xf7fffffe] prefmem > PCI: 00:11.1 20 <- [0x00001820 - 0x0000182e] io > PCI: 00:11.2 20 <- [0x00001500 - 0x0000151e] io > PCI: 00:11.3 20 <- [0x00001800 - 0x0000181e] io > PCI: 00:11.5 10 <- [0x00001000 - 0x000010fe] io > PCI: 00:11.5 14 <- [0x00001830 - 0x00001832] io > PCI: 00:11.5 18 <- [0x00001840 - 0x00001842] io > PCI: 00:11.6 10 <- [0x00001100 - 0x000011fe] io > PCI: 00:12.0 10 <- [0x00001400 - 0x000014fe] io > PCI: 00:12.0 14 <- [0xfc100000 - 0xfc1000fe] mem > Allocating VGA resource > done. > Enabling PCI resourcess... > PCI: 00:00.0 cmd <- 06 > PCI: 00:01.0 cmd <- 07 > PCI: 00:11.0 cmd <- 87 > PCI: 00:11.1 cmd <- 85 > PCI: 00:11.2 cmd <- 01 > PCI: 00:11.3 cmd <- 01 > PCI: 00:11.4 cmd <- 00 > PCI: 00:11.5 cmd <- 01 > PCI: 00:11.6 cmd <- 01 > PCI: 00:12.0 cmd <- 83 > PCI: 01:00.0 cmd <- 03 > done. > Initializing PCI devices... > PCI devices initialized > nvram_on > keyboard_on > Clocks/sec = 801 > Clocks/tick = 8010000 > Preset Video RAM = 2 MB > m = 65, n = 1, r = 3 > PCI: Enabling bus mastering for device 00:90 > rhine.c v1.0.0 2000-01-07 > IO address 1400 Ethernet Address: ab:cd:10:92:ef:ef > Analyzing Media type,this will take several seconds........OK > MII Addr. : 0x01 > PHYID1 : 0x0101, PHYID2 : 0x8f25 > Control : 0x3100, Status : 0x786d > Auto-Nego. Adv. : 0x05e1, Link Partner Adv. : 0x41e1 > Linespeed : 100Mbs, Full-duplex > Wrote linuxbios table at: 00000500 - 00000664 checksum 8ed7 > PDVR_Hx> tftp 01000000 linux.img > # ServerIP = 192.168.0.41 > # ServerMAC = 00:50:fc:3a:46:cd > # TFTP Ready : blocksize/dot = 1432 bytes > # Loading ................................................................ > ................................................................ > ................................................................ > ................................................................ > ................................................................ > ................................................................ > ................................................................ > ................................................................ > ................................................................ > ................................................................ > ................................................................ > .................................. > # TFTP Complete : 0x00101d1d bytes at address 0x01000000. > PDVR_Hx> boot 1000000 > # Checking Image at 0x01000000. > # Image Name: PDVR-H8 Kernel Image > Image Type: Intel x86 Linux Kernel Image (gzip compressed) > Data Size: 1055965 Bytes = 1031 kB = 1 MB > Load Address: 00100000 > Entry Point: 00100000 > # Verifying Checksum ... OK > # Uncompressing kernel image... > # command line - [root=/dev/hda2 console=ttyS0,115200n8] > # boot kernel > > ----------------- following is kernel boot message > ------------------------------ > > > Linux version 2.4.19 (malas at dvrdev) (gcc version 2.96 20000731 (Red Hat Linux > 7.3 2.96-110)) #84 Thu Oct 17 16:29:57 KST 2002 > > > BIOS-provided physical RAM map: > BIOS-e820: 0000000000000000 - 00000000000a0000 (usable) > BIOS-e820: 00000000000a0000 - 0000000000100000 (reserved) > BIOS-e820: 0000000000100000 - 0000000007800000 (usable) > BIOS-e820: 00000000fffc0000 - 0000000100000000 (reserved) > 120MB LOWMEM available. > On node 0 totalpages: 30720 > zone(0): 4096 pages. > zone(1): 26624 pages. > zone(2): 0 pages. > Kernel command line: root=/dev/hda2 console=ttyS0,115200n8 > Initializing CPU#0 > Detected 800.050 MHz processor. > Console: colour dummy device 80x25 > Calibrating delay loop... 1595.80 BogoMIPS > Memory: 118616k/122880k available (1172k kernel code, 3880k reserved, 788k data, > 244k init, 0k highmem) > > Checking if this processor honours the WP bit even in supervisor mode... Ok. > kdb version 2.3 by Scott Lurndal, Keith Owens. Copyright SGI, All Rights > Reserved > > Dentry cache hash table entries: 16384 (order: 5, 131072 bytes) > Inode cache hash table entries: 8192 (order: 4, 65536 bytes) > Mount-cache hash table entries: 2048 (order: 2, 16384 bytes) > Buffer-cache hash table entries: 4096 (order: 2, 16384 bytes) > Page-cache hash table entries: 32768 (order: 5, 131072 bytes) > CPU: L1 I Cache: 64K (32 bytes/line), D cache 64K (32 bytes/line) > CPU: L2 Cache: 64K (32 bytes/line) > CPU: Centaur VIA Ezra stepping 08 > Checking 'hlt' instruction... OK. > POSIX conformance testing by UNIFIX > mtrr: v1.40 (20010327) Richard Gooch (rgooch at atnf.csiro.au) > mtrr: detected mtrr type: Intel > PCI: Using configuration type 1 > PCI: Probing PCI hardware > PCI: IDE base address fixup for 00:11.1 > PCI: Scanning for ghost devices on bus 0 > PCI: Scanning for ghost devices on bus 1 > Unknown bridge resource 0: assuming transparent > PCI: IRQ init > PCI: Interrupt Routing Table found at 0xc00fd000 > PCI: IRQ pirq_table found > 00:11 slot=00 0:00/1eb8 1:00/1eb8 2:00/1eb8 3:05/1eb8 > 00:11 slot=00 0:00/1eb8 1:00/1eb8 2:00/1eb8 3:05/1eb8 > 00:11 slot=00 0:00/1eb8 1:00/1eb8 2:03/1eb8 3:00/1eb8 > 00:11 slot=00 0:00/1eb8 1:00/1eb8 2:03/1eb8 3:00/1eb8 > 00:12 slot=00 0:05/1eb8 1:01/1eb8 2:02/1eb8 3:03/1eb8 > 00:14 slot=01 0:05/1eb8 1:01/1eb8 2:02/1eb8 3:03/1eb8 > 00:16 slot=02 0:03/1eb8 1:05/1eb8 2:01/1eb8 3:02/1eb8 > 00:18 slot=03 0:02/1eb8 1:03/1eb8 2:05/1eb8 3:01/1eb8 > 01:00 slot=04 0:01/1eb8 1:02/1eb8 2:03/1eb8 3:05/1eb8 > PCI: Attempting to find IRQ router for 1106:8231 > PCI: Using IRQ router VIA [1106/8231] at 00:11.0 > PCI: IRQ fixup > IRQ for 00:11.5:2 -> not routed > IRQ for 00:11.6:2 -> not routed > IRQ for 00:12.0:0 -> PIRQ 05, mask 1eb8, excl 0000 -> newirq=0 -> got IRQ 9 > PCI: Found IRQ 9 for device 00:12.0 > IRQ for 01:00.0:0 -> PIRQ 01, mask 1eb8, excl 0000 -> newirq=0 -> got IRQ 5 > PCI: Found IRQ 5 for device 01:00.0 > PCI: Allocating resources > PCI: Resource f8000000-fbffffff (f=1208, d=0, p=0) > PCI: Resource 00001820-0000182f (f=101, d=0, p=0) > PCI: Resource 00001000-000010ff (f=101, d=0, p=0) > PCI: Resource 00001830-00001833 (f=101, d=0, p=0) > PCI: Resource 00001840-00001843 (f=101, d=0, p=0) > PCI: Resource 00001100-000011ff (f=101, d=0, p=0) > PCI: Resource 00001400-000014ff (f=101, d=0, p=0) > PCI: Resource fc100000-fc1000ff (f=200, d=0, p=0) > PCI: Resource fc000000-fc07ffff (f=200, d=0, p=0) > PCI: Resource f0000000-f7ffffff (f=1208, d=0, p=0) > Linux NET4.0 for Linux 2.4 > Based upon Swansea University Computer Society NET3.039 > Initializing RT netlink socket > Starting kswapd > Journalled Block Device driver loaded > savagefb: savagefb_init > savagefb: savage_init > savagefb: savagefb_probe > IRQ for 01:00.0:0 -> PIRQ 01, mask 1eb8, excl 0000 -> newirq=5 -> got IRQ 5 > PCI: Found IRQ 5 for device 01:00.0 > savagefb: savage_map_mmio > savagefb: mapped io at c8000000 > savagefb: savage_enable_mmio > > savagefb: savage_init_hw > savagefb: probed videoram: 0k > savagefb: Detected current MCLK value of 14 MHz > savagefb: savage_map_video > savagefb: frame buffer in use > savagefb: savage_unmap_video > savagefb: savage_unmap_mmio > savagefb: savage_disable_mmio > > Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI > enabled > > ttyS00 at 0x03f8 (irq = 4) is a 16550A > Uniform Multi-Platform E-IDE driver Revision: 6.31 > ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx > VP_IDE: IDE controller on PCI bus 00 dev 89 > VP_IDE: chipset revision 6 > VP_IDE: not 100% native mode: will probe irqs later > ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx > VP_IDE: VIA vt8231 (rev 10) IDE UDMA100 controller on pci00:11.1 > ide0: BM-DMA at 0x1820-0x1827, BIOS settings: hda:pio, hdb:pio > ide1: BM-DMA at 0x1828-0x182f, BIOS settings: hdc:pio, hdd:pio > hda: IBM-DJNA-351520, ATA DISK drive > hdc: CRD-8523B, ATAPI CD/DVD-ROM drive > ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 > ide1 at 0x170-0x177,0x376 on irq 15 > da: 30033360 sectors (15377 MB) w/430KiB Cache, CHS=29795/16/63, UDMA(33) > hdc: ATAPI 52X CD-ROM drive, 128kB Cache, DMA > Uniform CD-ROM driver Revision: 3.12 > Partition check: > hda: [PTBL] [1869/255/63] hda1 hda2 hda3 > RAMDISK driver initialized: 16 RAM disks of 20420K size 1024 blocksize > VIA Rhine Farmily Fast Ethernet Adapter Driver Ver. 4.11 > Copyright (c) 2002 VIA Technologies, Inc. > IRQ for 00:12.0:0 -> PIRQ 05, mask 1eb8, excl 0000 -> newirq=9 -> got IRQ 9 > PCI: Found IRQ 9 for device 00:12.0 > eth0: VIA VT6102 Rhine II Fast Ethernet Adapter > eth0: MAC=AB:CD:10:92:EF:EF IO=0x1400 Mem=0xc8000000 IRQ=9 > NET4: Linux TCP/IP 1.0 for NET4.0 > IP Protocols: ICMP, UDP, TCP, IGMP > IP: routing cache hash table of 512 buckets, 4Kbytes > TCP: Hash tables configured (established 8192 bind 8192) > NET4: Unix domain sockets 1.0/SMP for Linux NET4.0. > kjournald starting. Commit interval 5 seconds > EXT3 FS 2.4-0.9.17, 10 Jan 2002 on ide0(3,2), internal journal > EXT3-fs: recovery complete. > EXT3-fs: mounted filesystem with ordered data mode. > VFS: Mounted root (ext3 filesystem). > Freeing unused kernel memory: 244k freed > attempt to access beyond end of device > 03:02: rw=0, want=2147481940, limit=14651280 > attempt to access beyond end of device > 03:02: rw=0, want=738197788, limit=14651280 > kmod: failed to exec /sbin/modprobe -s -k char-major-9, errno = 2 > Unable to handle kernel paging request at virtual address 05196224 > printing eip: > c012c04c > *pde = 00000000 > Oops: 0000 > CPU: 0 > EIP: 0010:[] Not tainted > EFLAGS: 00010002 > eax: 0f66f883 ebx: 00000000 ecx: 0000002c edx: 00000000 > esi: c77d8180 edi: c77d8000 ebp: c77dbf64 esp: c77dbf58 > ds: 0018 es: 0018 ss: 0018 > Process swapper (pid: 8, stackpage=c77db000) > Stack: c77d8184 c77d8000 c77d81a8 c77dbf90 c012c5b1 c115e0c0 c77d8000 c77d8180 > c01189f3 c77d8180 00000246 c77d8184 c115e0c0 c77da000 c77dbfac c0119048 > c115e0c0 c77d8184 c77da000 c11edea0 00000009 c77dbfb8 c0119151 00000000 > Call Trace: [] [] [] [] [] > [] [] > > Code: 8b 44 87 18 83 f8 ff 75 eb 5b 31 c0 5e 5f 5d c3 8d 74 26 00 > > Entering kdb (current=0xc77da000, pid 8) Oops: Oops > due to oops @ 0xc012c04c > eax = 0x0f66f883 ebx = 0x00000000 ecx = 0x0000002c edx = 0x00000000 > esi = 0xc77d8180 edi = 0xc77d8000 esp = 0xc77dbf58 eip = 0xc012c04c > ebp = 0xc77dbf64 xss = 0x00000018 xcs = 0x00000010 eflags = 0x00010002 > xds = 0x00000018 xes = 0x00000018 origeax = 0xffffffff ®s = 0xc77dbf24 > kdb> > > > > > > > ---------------------------------------- > > Munjun Kang > Pinetron Co., Ltd > malas at pinetron.com > Phone: +82 2 856 6501 Fax: +82 2 856 6522 > > #ICQ : 65838018 > MSN : anmalas at hotmail.com > > Rm. 601, Haejun Bldg., 954-4 Doksan-dong, > Kumchun-gu, Seoul, Korea, 153-823 > > ---------------------------------------- From ollie at sis.com.tw Sun Oct 20 22:57:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Sun Oct 20 22:57:01 2002 Subject: more gcc In-Reply-To: References: Message-ID: <1035170232.8510.4.camel@ollie> On Mon, 2002-10-21 at 10:40, Ronald G Minnich wrote: > On 21 Oct 2002, ollie lho wrote: > > > On Sat, 2002-10-19 at 01:55, Ronald G Minnich wrote: > > > gcc ... -o mptable.o > > > /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c > > > /home/rminnich/src/linuxbios-p4dpr-1.0.0.8/freebios/src/mainboard/supermicro/p4dpe/mptable.c:106:22: > > > warning: multi-line string literals are deprecated > > > > > > > > > I wonder how much code I've seen in the last while (Emacs for example) > > > that uses this one. > > > > > > > which gcc version is it ?? > > 3.2, the latest greatest that ships with red hat. The API changed too, > which caused headaches for bproc etc. > I don't have much problem with 3.1 (which only differs form 3.2 by some C++ ABI stuff). Ollie From rminnich at lanl.gov Sun Oct 20 22:58:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sun Oct 20 22:58:01 2002 Subject: boot the kernel 2.4.19 from linuxbios In-Reply-To: Message-ID: I think I would like to see this output: > Partition check: > hda: [PTBL] [1869/255/63] hda1 hda2 hda3 Is it identical under the normal bios? What does the normal BIOS show? Many times this problem occurs with weird hard drive PTBL setups. I assume your hard drive is: hda1 -> /boot hda2 -> / hda3 -> swap ron From rminnich at lanl.gov Sun Oct 20 23:12:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sun Oct 20 23:12:01 2002 Subject: Welcome Steven James of Linux Labs as a LinuxBIOS developer Message-ID: Steven James of Linux Labs has been a linuxbios supporter and participant from very early in the game, ALS 2000 in fact, and he is now a LinuxBIOS developer. I'm very glad to have him on board. Thanks Ron From drwho8 at worldnet.att.net Sun Oct 20 23:16:01 2002 From: drwho8 at worldnet.att.net (Gregg C Levine) Date: Sun Oct 20 23:16:01 2002 Subject: Welcome Steven James of Linux Labs as a LinuxBIOS developer References: Message-ID: <000601c278b2$b97d3ea0$5657580c@who> Hello from Gregg C Levine and the Jedi Knights So, am I. I have enjoyed reading his messages, with enthusiasm, now with more. Welcome aboard! Gregg C Levine drwho8 at worldnet.att.net "Oh my!" The Second Doctor's nearly favorite phrase. ----- Original Message ----- From: "Ronald G Minnich" To: Sent: Sunday, October 20, 2002 11:29 PM Subject: Welcome Steven James of Linux Labs as a LinuxBIOS developer > Steven James of Linux Labs has been a linuxbios supporter and participant > from very early in the game, ALS 2000 in fact, and he is now a LinuxBIOS > developer. I'm very glad to have him on board. > > Thanks > > Ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From stepan at suse.de Mon Oct 21 02:42:00 2002 From: stepan at suse.de (Stefan Reinauer) Date: Mon Oct 21 02:42:00 2002 Subject: more gcc In-Reply-To: References: Message-ID: <20021021065947.GA24748@suse.de> * Eric W. Biederman [021021 04:55]: > > > which gcc version is it ?? > > > > 3.2, the latest greatest that ships with red hat. The API changed too, > > which caused headaches for bproc etc. > > The API changed, or the ABI changed? > > The API should be stable. And only for C++ should the ABI have noticeably > changed. it's the C++ ABI that changed. It's likely that this one changes again with the gcc 3.2.1 release :-/ Stefan -- The x86 isn't all that complex - it just doesn't make a lot of sense. -- Mike Johnson, Leader of 80x86 Design at AMD Microprocessor Report (1994) From P.Lister at sychron.com Mon Oct 21 09:43:00 2002 From: P.Lister at sychron.com (Peter Lister) Date: Mon Oct 21 09:43:00 2002 Subject: m810clmr (SiS730S) Plan Of Attack In-Reply-To: Your message of "Thu, 17 Oct 2002 07:39:04 CDT." <400A070D6312A14BB126A4061C51AFAA03D4941B@mail.oc.edu> Message-ID: > - Is my cost analysis fairly complete and realistic? Remember to budget for the PSU, and the per-node cost of getting the power to the PSU, a UPS to keep it going, a means of extracting the power again after it has been recycled as heat, the physical space, the rack, the Ethernet switch + cabling, something to talk to the console (whether serial or KVM) and a way to press the reset button remotely. All of which costs money, and some of which you may already have or be able to scrounge. But it has to go into your budget: if you spend everything on the nodes, you'll end up having to buy the cable out of your own pocket... From rminnich at lanl.gov Mon Oct 21 10:55:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 21 10:55:00 2002 Subject: A question on mptable and irq table Message-ID: It seems to me if you have an MP table you should not have an IRQ table, is this right or am I nuts. Do you really need both? ron From rminnich at lanl.gov Mon Oct 21 14:50:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 21 14:50:01 2002 Subject: GCC 3.2 ABI changes Message-ID: OK, it turns out one change involves structure packing. I'm not sure of the others, but I have confirmed that 3.2 will not build a working linuxbios and 2.96 will (on Redhat 8.0). The problems are in the MP table creation and/or parsing. ron From stepan at suse.de Mon Oct 21 15:32:01 2002 From: stepan at suse.de (Stefan Reinauer) Date: Mon Oct 21 15:32:01 2002 Subject: GCC 3.2 ABI changes In-Reply-To: ; from rminnich@lanl.gov on Mon, Oct 21, 2002 at 01:08:01PM -0600 References: Message-ID: <20021021214949.A354@suse.de> * Ronald G Minnich [021021 21:08]: > OK, it turns out one change involves structure packing. > > I'm not sure of the others, but I have confirmed that 3.2 will not > build a working linuxbios and 2.96 will (on Redhat 8.0). The problems are > in the MP table creation and/or parsing. Have you tried to play with the strict aliasing option in gcc? This should change gcc's behavior on packing data into structs or unions. Stefan -- The x86 isn't all that complex - it just doesn't make a lot of sense. -- Mike Johnson, Leader of 80x86 Design at AMD Microprocessor Report (1994) From steve at nexpath.com Mon Oct 21 16:10:01 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Mon Oct 21 16:10:01 2002 Subject: GCC 3.2 ABI changes In-Reply-To: <20021021214949.A354@suse.de> Message-ID: > > I'm not sure of the others, but I have confirmed that 3.2 will not > > build a working linuxbios and 2.96 will (on Redhat 8.0). The > problems are > > in the MP table creation and/or parsing. > gcc 2.96 is not a real release, more of a redhat branch off the 3.0 dev tree that gnu disavows. There are notes somewhere about this but I couldn't quickly find the link. I would consider anything that 2.96 does or does not do, to be a laboratory curiosity. Can you compile a linux kernel with either 2.96 or 3.2? I think debian installs 2.95.4, but also has a 3.0 version. I use 2.95.x and have no problems. -Steve From stepan at suse.de Mon Oct 21 16:37:01 2002 From: stepan at suse.de (Stefan Reinauer) Date: Mon Oct 21 16:37:01 2002 Subject: GCC 3.2 ABI changes In-Reply-To: ; from steve@nexpath.com on Mon, Oct 21, 2002 at 01:34:50PM -0700 References: <20021021214949.A354@suse.de> Message-ID: <20021021225510.A16750@suse.de> * Steve M. Gehlbach [021021 22:34]: > gcc 2.96 is not a real release, more of a redhat branch off the 3.0 dev tree > that gnu disavows. There are notes somewhere about this but I couldn't > quickly find the link. Which is understandable from their point of view, keeping the user base at a certain level to gain reliable input. On the other hand back when Redhat started using gcc 2.96, it was the only compiler that was actually usable on most no-x86 platforms. (This does not apply for the first release they packed with their distribution, but anything later proved to be worlds better than gcc 2.95, i.e. on Alpha, Sparc, ... gcc 2.96 was also the first compiler to support Itanium) > I would consider anything that 2.96 does or does not > do, to be a laboratory curiosity. Can you compile a linux kernel with > either 2.96 or 3.2? The 2.2 kernel needs a lot of fixes to go through 3.2, but compiles and works great with 2.96. For Kernel 2.4 both are perfectly ok. > I think debian installs 2.95.4, but also has a 3.0 version. I use 2.95.x > and have no problems. If LinuxBIOS is up to support non-intel platforms, gcc 3 should be considered a must. If you get anywhere with 2.95.x on those platforms, you are really lucky. Stefan -- The x86 isn't all that complex - it just doesn't make a lot of sense. -- Mike Johnson, Leader of 80x86 Design at AMD Microprocessor Report (1994) From steve at nexpath.com Mon Oct 21 17:23:00 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Mon Oct 21 17:23:00 2002 Subject: GCC 3.2 ABI changes In-Reply-To: <20021021225510.A16750@suse.de> Message-ID: > > gcc 2.96 is not a real release, more of a redhat branch off the > 3.0 dev tree > > that gnu disavows. There are notes somewhere about this but I couldn't > > quickly find the link. > > Which is understandable from their point of view, keeping the user base > at a certain level to gain reliable input. On the other hand back when > Redhat started using gcc 2.96, it was the only compiler that was > actually usable on most no-x86 platforms. (This does not apply for the > first release they packed with their distribution, but anything later > proved to be worlds better than gcc 2.95, i.e. on Alpha, Sparc, ... > gcc 2.96 was also the first compiler to support Itanium) > Thanks for the explanation. I think I got the first release of 2.96. Didn't work very well and caused quite a ruckus on the net. I've since stuck with debian without problems, but I only compile for x86. -Steve From David.Barr at student.oc.edu Mon Oct 21 19:21:01 2002 From: David.Barr at student.oc.edu (David Barr) Date: Mon Oct 21 19:21:01 2002 Subject: freebios.org redirect is DOWN Message-ID: As of 18:38 CST, the redirect from freebios.org to http://www.acl.lanl.gov/linuxbios/ is DOWN. Do I know what happened? Nope. Do you? -dBarr. From ebiederman at lnxi.com Mon Oct 21 19:40:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 21 19:40:01 2002 Subject: GCC 3.2 ABI changes In-Reply-To: <20021021225510.A16750@suse.de> References: <20021021214949.A354@suse.de> <20021021225510.A16750@suse.de> Message-ID: Stefan Reinauer writes: > > I think debian installs 2.95.4, but also has a 3.0 version. I use 2.95.x > > and have no problems. > > If LinuxBIOS is up to support non-intel platforms, gcc 3 should be > considered a must. If you get anywhere with 2.95.x on those platforms, > you are really lucky. I have only avoided it because of the code bloat relative to egcs-2.91.66. Not that we have upx a minor increase in the amount of space consumed should not be a major issue. I am already using binutils 2.12.90.0.9 so I am half way there. Eric From ebiederman at lnxi.com Mon Oct 21 19:46:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 21 19:46:00 2002 Subject: A question on mptable and irq table In-Reply-To: References: Message-ID: Ronald G Minnich writes: > It seems to me if you have an MP table you should not have an IRQ table, > is this right or am I nuts. Do you really need both? A non SMP table will use the pirq tables. Eric From rminnich at lanl.gov Mon Oct 21 20:51:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 21 20:51:00 2002 Subject: GCC 3.2 ABI changes In-Reply-To: Message-ID: On Mon, 21 Oct 2002, Steve M. Gehlbach wrote: > gcc 2.96 is not a real release, more of a redhat branch off the 3.0 dev tree > that gnu disavows. There are notes somewhere about this but I couldn't > quickly find the link. I would consider anything that 2.96 does or does not > do, to be a laboratory curiosity. Can you compile a linux kernel with > either 2.96 or 3.2? I understand. But linuxbios has worked fine for several years on several platforms with several gcc versions. Something bad has happened in 3.2 which we'll have to figure out. ron From ebiederman at lnxi.com Mon Oct 21 22:44:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 21 22:44:01 2002 Subject: LinuxBIOS Questions..... In-Reply-To: References: Message-ID: Mark Weinstein writes: > Eric, > > Can you help me? I was reading an article about the LinuxBIOS and had a few > questions. Your name was at the bottom of the article, so I thought I would > drop you a line. I hope you don?t mind and if you do, please disregard this > message. :) Bear with me here... I am new to the whole LinuxBIOS thing and > am having a hard time trying to find answers. Asking on the LinuxBIOS list is probably the best way, questions and some answers forwarded there. > 1) I use Linux boxes in a clustering environment and would LOVE to have the > nodes boot themselves without having to load images from the network, etc. > Is this doable? Personally I think booting from a local hard driver is a less manageable way to do things. I have booted a 1000 node cluster over the network in under a minute. But there is support for booting from a hard drive. > 2) I use a RedHat 2.4.18 based kernel with quite a few kernel mods. How > much space is on the DOC (is it 8mb?) and will the OS fit on it? The DOC has 8MByte of space, yes. I don't use it and I don't see the need you can load a kernel from other places. And in fact I consider it a poor choice for any but an embedded user to hard code their kernel, into the ROM. > 3) If the answer to #2 is yes, then can you reflash the chips from a server > or some other machine and then have them reboot without taking the machines > apart each time? Yes. Though I try and keep reflashing down to just BIOS upgrades and not kernel upgrades. > 4) If you can coot the OS from he chip, how do you have access to all of > your libraries, etc? Would you simply mount SOME file shares with libraries > and apps via NFS? > > I am VERY interested in building some servers with LinuxBIOS, but I am also > very confused. :) Any help you can give me would be GREATLY > appreciated! Talk to the other people on the list. I have provided the answers I can, but you are coming from an extremely different perspective than I am. Eric From ebiederman at lnxi.com Mon Oct 21 23:00:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 21 23:00:01 2002 Subject: LinuxBIOS Questions..... In-Reply-To: References: Message-ID: Mark Weinstein writes: > Eric, > > Thanks for the replies. I must no have made my intentions clear. I > actually do NOT want to boot from a local hard drive, but I wasn?t sure if > the network boot would be way to taxing on the network. I will be using a > 100MB switched network and I didn?t know how much bandwidth it would take to > remote boot the nodes. On top of that, what about any swap space that might > be needed? Note, while I reply to people when I am in a friendly mood, many times I too busy to talk to people, so please talk to the list. With multicast booting the scalability is fine. I actually would have booted faster if the cisco switches had not been in slow port mode delaying the inferface boot speed by 30 seconds or so. As for swap if you are seriously using that on a compute cluster you have problems. Although a little swapping to throw unused programs out is o.k. If your main filesystem is on NFS you probably have problems unless you have a small cluster. At the moment there is not a mature general purpose solution to the bandwidth limitation problems. But it depends a lot on your application, and your NFS servers where you see limitations, or which of the partial solutions are right for you. Eric From rminnich at lanl.gov Mon Oct 21 23:37:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 21 23:37:00 2002 Subject: LinuxBIOS Questions..... In-Reply-To: Message-ID: On 21 Oct 2002, Eric W. Biederman wrote: > Personally I think booting from a local hard driver is a less > manageable way to do things. I have booted a 1000 node cluster over > the network in under a minute. yep. > The DOC has 8MByte of space, yes. I don't use it and I don't see the > need you can load a kernel from other places. And in fact I consider > it a poor choice for any but an embedded user to hard code their > kernel, into the ROM. Here is where Eric and I agree to disagree :-) We really like having a kernel in DoC or IDE flash for our bproc Single System Image clusters. We boot a linux from these things and it lets us do all our cluster management over myrinet ... no ethernet needed. I don't think it is really possible to do this type of thing via (e.g.) etherboot for a long time. Note, however, that all we do with that Linux in DoC is use it to boot another linux. On our Alpha cluster, once we had flashed the Linux and Initrd into flash, it stayed that way for a year (until we turned it off in fact). > Yes. Though I try and keep reflashing down to just BIOS upgrades and > not kernel upgrades. That's for sure. But several companies (including lnxi.com) have done a great job of making flash less failure-prone with a jumperless backup scheme. > > 4) If you can coot the OS from he chip, how do you have access to all of > > your libraries, etc? Would you simply mount SOME file shares with libraries > > and apps via NFS? We are done with NFS here. We are using V9FS, which in conjunction with Viro's changes to Linux (2.4.19 and later) give you private name spaces for Linux, which are just incredibly nice. We're finding this to be pretty robust, see http://v9fs.sourceforge.net. ron From rminnich at lanl.gov Mon Oct 21 23:39:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 21 23:39:01 2002 Subject: LinuxBIOS Questions..... In-Reply-To: Message-ID: On 21 Oct 2002, Eric W. Biederman wrote: > As for swap if you are seriously using that on a compute cluster you > have problems. Although a little swapping to throw unused programs > out is o.k. no swap. It's that simple. no NFS either. Just avoid it like the plague. I really think you ought to check out http://www.clustermatic.org ... ron From ebiederman at lnxi.com Mon Oct 21 23:52:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 21 23:52:00 2002 Subject: LinuxBIOS Questions..... In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On 21 Oct 2002, Eric W. Biederman wrote: > > > Personally I think booting from a local hard driver is a less > > manageable way to do things. I have booted a 1000 node cluster over > > the network in under a minute. > > yep. > > > The DOC has 8MByte of space, yes. I don't use it and I don't see the > > need you can load a kernel from other places. And in fact I consider > > it a poor choice for any but an embedded user to hard code their > > kernel, into the ROM. > > > Here is where Eric and I agree to disagree :-) More or less. I think having a kernel that is part of your bootloader in flash as a reasonable thing to do, beoboot is currently quite heavy for a bootloader though. > We really like having a kernel in DoC or IDE flash for our bproc Single > System Image clusters. We boot a linux from these things and it lets us do > all our cluster management over myrinet ... no ethernet needed. I don't > think it is really possible to do this type of thing via (e.g.) > etherboot for a long time. Actually I suspect I could get it running in a week or two. It should not take too much to strip down the myrinet driver... Ron you want to follow the linux kernel list and help me test the linux booting linux code? Eric From mark at dotcomlive.net Tue Oct 22 00:05:00 2002 From: mark at dotcomlive.net (Mark Weinstein) Date: Tue Oct 22 00:05:00 2002 Subject: Tyan Supported Motherboard Message-ID: I read the the LinuxBIOS supports the Tyan S2462UNG and the Tyan S2462UNGM, however, being that I do not need SCSI support, will it also support the Tyan S2462NG ? It definitely seems to be the same motherboard without the SCSI support. Mark From Antony at Soft-Solutions.co.uk Tue Oct 22 03:52:01 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Tue Oct 22 03:52:01 2002 Subject: LinuxBIOS In-Reply-To: References: Message-ID: <20021022080955.SYBU27697.mta05-svc.ntlworld.com@there> On Tuesday 22 October 2002 2:56 am, Mark Weinstein wrote: > Antony, > > Can you help me? I was reading your FAQ about the LinuxBIOS installation > and had a few questions. Bear with me here... I am new to the whole > LinuxBIOS thing and am having a hard time trying to find answers. Hi Mark. I see you asked Eric much the same questions, which have been discussed on the list overnight, however here are my answers to your questions, since I'm sure I too have a slightly different perspective than both Eric and Ron... > 1) I use Linux boxes in a clustering environment and would LOVE to have > the nodes boot themselves without having to load images from the network, > etc. Is this doable? You can certainly boot the kernel image from DoC for example, and you can then pick up your root file system from local HD, local Flash IDE, or the network. However, what's your reason for not wanting to load the images across the network ? If it's speed or performance, I think you might be surprised how well something like etherboot can do... > 2) I use a RedHat 2.4.18 based kernel with quite a few kernel mods. How > much space is on the DOC (is it 8mb?) and will the OS fit on it? Yes, the DoC I used is 8 megabytes - you typically need under 1 megabyte for the kernel image, so if you can fit the rest of your root fs into 7 megabytes you can build a totally self-contained (ie embedded) system. I doubt this is the best way of setting up a cluster though ? > 3) If the answer to #2 is yes, then can you reflash the chips from a > server or some other machine and then have them reboot without taking the > machines apart each time? Yes, the fact that you programmed the DoC on the target motherboard in the first place means you could do it again once the system is running if you wanted to. Just bear in mind that if you get it wrong, you have a dead machine until you open it up and swap the Bios chip back in to reprogram your DoC with something known to work. Changing the contents of the root fs on any sort of flash device is about as likely as reformatting and reinstalling your hard drive after booting from it and mounting it, though. > 4) If you can boot the OS from the chip, how do you have access to all of > your libraries, etc? Would you simply mount SOME file shares with > libraries and apps via NFS? You have three choices in effect: 1) Local flash "disk" storage - expensive and slow but it sounds cool 2) Local real disk storage - cheaper than flash, gets hotter and needs more power, but standard and plenty big enough 3) Remote mount across a network - no extra cost per node at all, shouldn't cause too much bandwidth problem depending on what applications you end up running, however don't just go for NFS because you've heard of it - it's really not that efficient - there are better network filing systems out there, but it's debatable whether there are any good ones :-) Take a look at something like Tom's Root Boot to see how it's possible to create a workable system in a very small space. > I am VERY interested in building some servers with LinuxBIOS, but I am also > very confused. :) Any help you can give me would be GREATLY appreciated! Okay, now I'll tell you my interest in LinuxBios, whihc might help to put some of my comments in perspective. I'm not (professionally) interested in clusters. I intend to play with clustering as a hobby someday, but for now I want to use LinuxBios: a) for security, to prevent anyone from being able to boot a machine from floppy disk or CD Rom when I'm not looking b) for speed, to get from power-on to login prompt (well, actually to NIC up and services running) as fast as possible c) for novelty, so that when somebody switches one of my machines on it doesn't look like a standard PC about to boot Windows - it's obviously something different from the word go d) (possibly) for cost - I have a particular application in mind which doesn't require much on the root fs, and I think it will fit into 7Mbytes on a DoC, so I may be able to build a useful "appliance"-type device without HDD at all Hope this helps, Antony. -- The difference between theory and practice is that in theory there is no difference, whereas in practice there is. From jalton at olsh.cx Tue Oct 22 05:48:01 2002 From: jalton at olsh.cx (James Alton) Date: Tue Oct 22 05:48:01 2002 Subject: 810LMR LinuxBIOS setup Message-ID: <1035281140.3988.12.camel@localhost.localdomain> Hello everyone, I'm new to this list, so let me explain where I'm at. I just visited the LinuxBIOS page and noticed it had 810LR (810L now?) support and a nice HOWTO-ish sort of document. I was looking at the type of Disk on Chip to use. In the 810LR document, he says to use an MD-2800-D08, and later says that a MD-2802 will work as it's the newer version of a practically identical chip. I am wondering anyone has gotten the MD-2810-D08 working with LinuxBIOS and if there is any reason it shouldn't? (The specs look very similar for MD-2802 and MD-2810) I looked the the http://www.m-sys.com/ website under the DiskOnChip Millenium and it seems like the MD-2810 should work... P.S. the MD-2810 is about $10 cheaper per chip, this is why I am asking if there are any important differences. James Alton jalton at olsh.cx From Antony at Soft-Solutions.co.uk Tue Oct 22 07:33:01 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Tue Oct 22 07:33:01 2002 Subject: Fwd: Re: 810LMR LinuxBIOS setup Message-ID: <200210221151.g9MBpDL00775@vulcan.rissington.net> On Tuesday 22 October 2002 11:05 am, James Alton wrote: > Hello everyone, > > I'm new to this list, so let me explain where I'm at. I just visited the > LinuxBIOS page and noticed it had 810LR (810L now?) support and a nice > HOWTO-ish sort of document. I was looking at the type of Disk on Chip to > use. In the 810LR document, he says to use an MD-2800-D08, and later > says that a MD-2802 will work as it's the newer version of a practically > identical chip. I am wondering anyone has gotten the MD-2810-D08 working > with LinuxBIOS and if there is any reason it shouldn't? > > P.S. the MD-2810 is about $10 cheaper per chip, this is why I am asking > if there are any important differences. MD-2810 is a TSOP - Thin Small Outline Package - which is a surface-mount device, therefore it's electrically identical to MD-2800 but physically it won't fit in your Bios socket.... Antony. -- There are only 10 types of people in the world: those who understand binary notation, and those who don't. From rminnich at lanl.gov Tue Oct 22 10:23:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 22 10:23:01 2002 Subject: Tyan Supported Motherboard In-Reply-To: Message-ID: On Mon, 21 Oct 2002, Mark Weinstein wrote: > I read the the LinuxBIOS supports the Tyan S2462UNG and the Tyan S2462UNGM, > however, being that I do not need SCSI support, will it also support the > Tyan S2462NG ? It definitely seems to be the same motherboard without the > SCSI support. I think that will work. I don't like SCSI either, I have the SCSI one by mistake. ron From David.Barr at student.oc.edu Tue Oct 22 13:00:01 2002 From: David.Barr at student.oc.edu (David Barr) Date: Tue Oct 22 13:00:01 2002 Subject: Fastest Standalone Boot Solution? Message-ID: First of all, kudos to Andrew Ip for blazing a trail exactly where I want to go :-) After reading two years' worth of mailing list archives (!), I see what kind of struggle it's been to get the m810 walkthrough where it is today. My question, after looking over the various alternatives, is this: What Is Going to Provide the Fastest Boot Solution? I'm going with the pcchips m810clmr (Duron 1.2) board, with 2 generic 512 MB sticks on it. This will be a standalone full-distro machine, at least to start with. Every other piece of hardware that I purchase and install will be based on whatever is going to produce the shortest power-up/init/ready-to-rock time. I believe someone (Eric?) mentioned a month or two ago that a lot of their machines ended up being solo jobs. I would be very interested to hear what that person had to say about speed comparisons. Regards, -dBarr. PS: ca. 3-5 months ago, it was noted that the pcchips m810 line had a bit of trouble just hanging for no apparent reason. I assume this was taken care of, since the discussion dropped off the list. Anyone care to deny or confirm? From rminnich at lanl.gov Tue Oct 22 19:43:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 22 19:43:01 2002 Subject: interesting thing I've noticed on E7500 Message-ID: This is with fallback and normal LinuxBIOS images on E7500 mainboards. They're loaded with the identical etherboot image, 5.1.2rc4.eb5. On fallback, etherboot goes right to the IDE disk after finding no good ethernet link: Etherboot 5.1.2rc4.eb5 (GPL) ELF64 ELF (Multiboot) for [EEPRO100][IDE] Relocating _text from: [00024524,00034674) to [7ffefeb0,80000000) CPU 2469 Mhz Boot from (N)etwork (D)isk (F)loppy or from (L)ocal? Probing pci...Found EEPRO100 ROM address 0x0000 [EEPRO100]The PCI BIOS has not enabled this device! Updating PCI command 0003->0007. pci_bus 04 pci_device_fn 10 Ethernet addr: 00:30:48:23:B8:2D Valid link not established Probing isa... Probing pci...Found IDE ROM address 0x0000 [IDE]The PCI BIOS has not enabled this device! Updating PCI command 0003->0007. pci_bus 00 pci_device_fn F9 PCI latency timer (CFLT) is unreasonably low at 0. Setting to 32 clocks. disk-1 16000k cap: 0200 Searching for image... ................................(ELF)... Loading image. On normal, etherboot just loops forever until I tell it to go to disk: Etherboot 5.1.2rc4.eb5 (GPL) ELF64 ELF (Multiboot) for [EEPRO100][IDE] Relocating _text from: [00024524,00034674) to [7ffefeb0,80000000) CPU 2470 Mhz Boot from (N)etwork (D)isk (F)loppy or from (L)ocal? Probing pci...Found EEPRO100 ROM address 0x0000 [EEPRO100]The PCI BIOS has not enabled this device! Updating PCI command 0003->0007. pci_bus 04 pci_device_fn 10 Ethernet addr: 00:30:48:23:AD:1B Valid link not established Probing isa... No adapter found Boot from (N)etwork (D)isk (F)loppy or from (L)ocal? Note there is no 'probing pci' step. If I hit 'D' for disk it does probe pci: Boot from (N)etwork (D)isk (F)loppy or from (L)ocal? D Probing pci...Found IDE ROM address 0x0000 [IDE]The PCI BIOS has not enabled this device! I'm curious if this is correct behaviour (in which case I need to change it) or some unintended consequence of a variable setting (CMOS)? Why would etherboot probe or not probe PCI? Why would telling it to load from disk cause it to then probe PCI? I'm guessing I'm not the first person who will hit this, hence this message to various lists. Thanks ron From ebiederman at lnxi.com Tue Oct 22 20:27:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Tue Oct 22 20:27:00 2002 Subject: [Etherboot-developers] interesting thing I've noticed on E7500 In-Reply-To: References: Message-ID: Ronald G Minnich writes: > This is with fallback and normal LinuxBIOS images on E7500 mainboards. > They're loaded with the identical etherboot image, 5.1.2rc4.eb5. > > On fallback, etherboot goes right to the IDE disk after finding no good > ethernet link: [snip] > On normal, etherboot just loops forever until I tell it to go to disk: [snip] It is a bug. And it is fixed in the etherboot source tree. Ron for your cluster I just need to make a new build of LinuxBIOS and put the new etherboot in there. The boot order code was just broken, and I don't know how it lasted as long as it did. Ron can you check to see what your boot order is. As I recall it only happened with boot_first=Network boot_second=Network boot_third=Network In which case there is a work around available. I need to track this down before we start building up Pink. > I'm guessing I'm not the first person who will hit this, hence this > message to various lists. The code was fixed a little while ago, when I completed the e1000 support. As the bug also it prevented fail over from one nic to another. Eric From rminnich at lanl.gov Tue Oct 22 22:42:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 22 22:42:01 2002 Subject: [Etherboot-developers] interesting thing I've noticed on E7500 In-Reply-To: Message-ID: Eric, which etherboot do you recommend I get at this point? just cvs update from the latest? ron From aip at cwlinux.com Tue Oct 22 23:22:00 2002 From: aip at cwlinux.com (Andrew Ip) Date: Tue Oct 22 23:22:00 2002 Subject: versioning on same model but different irq table Message-ID: <20021023113949.A8586@mail.cwlinux.com> I just found some newer m758lr+ has different irq table from the old one. How should we take care of different version of the same board? -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From rminnich at lanl.gov Tue Oct 22 23:41:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 22 23:41:01 2002 Subject: versioning on same model but different irq table In-Reply-To: <20021023113949.A8586@mail.cwlinux.com> Message-ID: On Wed, 23 Oct 2002, Andrew Ip wrote: > I just found some newer m758lr+ has different irq table from the old one. > How should we take care of different version of the same board? This is so messy. I wonder if we shouldn't have a compile-time option? CONFIG_IRQTABLE_1 CONFIG_IRQTABLE_2 then in one irq_tables.c file we can try to pick the right one. These vendors are a mess. It looks to only get worse (MUCH WORSE) with TCPA. ron From adam at www.missl.cs.umd.edu Wed Oct 23 09:37:00 2002 From: adam at www.missl.cs.umd.edu (adam at www.missl.cs.umd.edu) Date: Wed Oct 23 09:37:00 2002 Subject: PIC question. (fwd) Message-ID: <20021023095713.J63646-100000@www.missl.cs.umd.edu> [PS: Can I somehow tell mailman to accept my email from multiple addresses?] hello I'm trying to set "bios classic/dos" like state on the winfast 6300max/sis630 motherboard. one of the issues I'm having is that it seems that interrupt 9 (keyboard) is not beging tiggered. (this is after linuxbios finish booting and I start bochs bios). Initially I have suspected that the PIC in the sis630 is not getting programmed. However, going over boch's bios sources I found out that it does DO program PIC..so it is not the issue here. (relevant code at end of email). Thus the question is : What is the extra step I'm missing that has to be run after linuxbios finish but before attempting to program PIC for bios/dos style interrupt mapping? Ideas? ;; PIC mov al, #0x11 ; send initialisation commands out 0x20, al out 0xa0, al mov al, #0x08 out 0x21, al mov al, #0x70 out 0xa1, al mov al, #0x04 out 0x21, al mov al, #0x02 out 0xa1, al mov al, #0x01 out 0x21, al out 0xa1, al -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From bob at drzyzgula.org Wed Oct 23 09:54:01 2002 From: bob at drzyzgula.org (Bob Drzyzgula) Date: Wed Oct 23 09:54:01 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023095713.J63646-100000@www.missl.cs.umd.edu> References: <20021023095713.J63646-100000@www.missl.cs.umd.edu> Message-ID: <20021023101219.Y8132@www2> On Wed, Oct 23, 2002 at 09:59:17AM -0400, adam at www.missl.cs.umd.edu wrote: > > [PS: Can I somehow tell mailman to accept my email from multiple > addresses?] You need separate subscription at each address. Then, using the mailman control panel http://www.clustermatic.org/mailman/options/linuxbios/ disable delivery to addresses you just want to be able to post from. --Bob From Jean-Francois.Hammond at mindready.com Wed Oct 23 10:35:01 2002 From: Jean-Francois.Hammond at mindready.com (=?iso-8859-1?Q?=22Hammond=2C_Jean-Fran=E7ois=22?=) Date: Wed Oct 23 10:35:01 2002 Subject: Questions about directory tree Message-ID: Hi, I am looking at the directory tree in linux bios project and I got some things I don't understand. Directory structure: - arch - boot - cpu - mainboard - northbridge - northsouthbridge - southbridge - pcibridge Since I am devolepping on a SBC8240, this board has not much on it. All the processor has almost everything inside. What section of my code I should put in those directories ? Thanks, Jean-Fran?ois Hammond Software Designer Mindready Solutions inc. 2800, avenue Marie-Curie Saint-Laurent (Qu?bec) Canada H4S 2C2 Tel. : (1) 514-339-1394 ext. 2121 Fax. : (1) 514-339-1376 mailto:jean-francois.hammond at mindready.com www.mindready.com From adam at cfar.umd.edu Wed Oct 23 10:59:00 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Oct 23 10:59:00 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023101219.Y8132@www2> Message-ID: <20021023112046.N63646-100000@www.missl.cs.umd.edu> > > [PS: Can I somehow tell mailman to accept my email from multiple > > addresses?] > > You need separate subscription at each address. Then, > disable delivery to addresses you just want to be > able to post from. thanks. now if only it was so easy to solve the PIC problem. still stuck on it :/ -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From christopher at bergeron.com Wed Oct 23 11:05:01 2002 From: christopher at bergeron.com (Christopher Bergeron) Date: Wed Oct 23 11:05:01 2002 Subject: DOC vs. IDE References: Message-ID: <3DB6BEE5.8070906@bergeron.com> you can't fit X onto the DoC you can buy today. Fasted boot I've seen is with the kernel in DoC, then mount /dev/hda1 as /. ron Even an X like Qt embedded? My Zaurus only has 32Mb on it, and it boots into X in about 4 seconds. While I don't expect _that_ speedy of a boot, I would think I could achieve significantly less than 35(ish) seconds it takes now. Also, did you factor in the IDE spinup boot delay of having an IDE /. directory? If the DOC+IDE is faster, do you mean throughput wise or time wise? I'm referring to an earlier message that you replied to Todd Johnson and his boot times (message below). It seemed as if the 2 emails conflict in what they're saying, so I just wanted to ask for a little clarification (not doubting you, just a little unclear on the principle). Essentially what I'm wondering is if a small footprint X could be booted into via DOC and if it would be faster than DOC+IDE (considering the IDE spinup delay). Your thoughts? Ronald G Minnich wrote: >On Sun, 29 Sep 2002, Christopher Bergeron wrote: > > > >>Can anyone give me advice on what will acheive the fastest boot time? >> My options are the LinuxBIOS coupled with a DOC root or with root >> configured on hda1 (IDE). I boot into X and I'll need standard >> modules loaded. I'd like to fit the entire install on a DOC but only >> IF I'll get a faster load/boot. >> >> > >you can't fit X onto the DoC you can buy today. > >Fasted boot I've seen is with the kernel in DoC, then mount /dev/hda1 as >/. > >ron > > On Fri, 4 Oct 2002, Todd E. Johnson wrote: > BTW, it seems that there is no booting action (Based on the Serial >> output) until the HDD spins up. Is this a result of me keeping my root >> file system on the HDD? > > you can't do anything until the HDD spins up, and yes it's because you've god file system on the HDD. There's not much to be done for this. ron -------------- next part -------------- An HTML attachment was scrubbed... URL: From christopher at bergeron.com Wed Oct 23 11:44:01 2002 From: christopher at bergeron.com (Christopher Bergeron) Date: Wed Oct 23 11:44:01 2002 Subject: AW: DOC vs. IDE References: <1F6206BC53BCD3119059009027D1D3A206FDA725@OEKAEX01.becker.de> Message-ID: <3DB6C801.4000709@bergeron.com> That actually sounds like a brilliant idea. I wonder if anyone on the list can confirm performance... does the CFcard appear as a standard IDE disk or is there a driver or anything necessary? -CB Baab, Ingo wrote: >Hello Christopher, >mounting a CF-2-IDE-Adapter /w CF-Card would be >a little bit faster than the rotating thing, or? >--ingo > > >-----Urspr?ngliche Nachricht----- >Von: Christopher Bergeron [mailto:christopher at bergeron.com] >Gesendet: Mittwoch, 23. Oktober 2002 17:23 >An: linuxbios at clustermatic.org >Betreff: Re: DOC vs. IDE > > >you can't fit X onto the DoC you can buy today. > >Fasted boot I've seen is with the kernel in DoC, then mount /dev/hda1 as >/. > >ron > > >Even an X like Qt embedded? My Zaurus only has 32Mb on it, and it boots >into X in about 4 seconds. While I don't expect _that_ speedy of a boot, I >would think I could achieve significantly less than 35(ish) seconds it takes >now. Also, did you factor in the IDE spinup boot delay of having an IDE /. >directory? If the DOC+IDE is faster, do you mean throughput wise or time >wise? I'm referring to an earlier message that you replied to Todd Johnson >and his boot times (message below). It seemed as if the 2 emails conflict >in what they're saying, so I just wanted to ask for a little clarification >(not doubting you, just a little unclear on the principle). > >Essentially what I'm wondering is if a small footprint X could be booted >into via DOC and if it would be faster than DOC+IDE (considering the IDE >spinup delay). > >Your thoughts? > > > > >Ronald G Minnich wrote: > >On Sun, 29 Sep 2002, Christopher Bergeron wrote: > > >Can anyone give me advice on what will acheive the fastest boot time? > My options are the LinuxBIOS coupled with a DOC root or with root > configured on hda1 (IDE). I boot into X and I'll need standard > modules loaded. I'd like to fit the entire install on a DOC but only > IF I'll get a faster load/boot. > > >you can't fit X onto the DoC you can buy today. > >Fasted boot I've seen is with the kernel in DoC, then mount /dev/hda1 as >/. > >ron > > > > >On Fri, 4 Oct 2002, Todd E. Johnson wrote: > > BTW, it seems that there is no booting action (Based on the Serial > > >>output) until the HDD spins up. Is this a result of me keeping my root >>file system on the HDD? >> >> > > >you can't do anything until the HDD spins up, and yes it's because you've >god file system on the HDD. There's not much to be done for this. > >ron > > > > -------------- next part -------------- An HTML attachment was scrubbed... URL: From steve at nexpath.com Wed Oct 23 12:09:01 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Wed Oct 23 12:09:01 2002 Subject: AW: DOC vs. IDE In-Reply-To: <3DB6C801.4000709@bergeron.com> Message-ID: > That actually sounds like a brilliant idea. I wonder if anyone on the list can > confirm performance... does the CFcard appear as a standard IDE disk or is there > a driver or anything necessary? > -CB Same as IDE, just a mechanical issue to convert the wiring to IDE connector and add power. There are a number available, here's one: http://www.pcengines.com/cflash.htm. The current code (maybe changed recently don't know) uses a rough time delay for spin up that needs to be tinkered with. Boots pretty quickly with CF, but, as Linux boots, "Calibrating CPU..." takes a lot of time (several seconds). Anyone know if this is necessary? -Steve From mark at dotcomlive.net Wed Oct 23 15:35:01 2002 From: mark at dotcomlive.net (Mark Weinstein) Date: Wed Oct 23 15:35:01 2002 Subject: RLX 800i Info? Message-ID: <200210231554.AA95092780@dotcomlive.net> Does anyone have any specific info on teh RLX 800i port of LinuxBIOS? I have the immediate need to get one of these blades up and running with Etherboot, but would like a little more information. Does linuxBIOS actually reaplce the BIOS on the blade itself? If so, does the original functionality of the blade change at all? Ay information would be greatly appreciated! Mark From bari at onelabs.com Wed Oct 23 16:00:01 2002 From: bari at onelabs.com (Bari Ari) Date: Wed Oct 23 16:00:01 2002 Subject: RLX 800i Info? References: <200210231554.AA95092780@dotcomlive.net> Message-ID: <3DB7040E.5040205@onelabs.com> Mark Weinstein wrote: >Does linuxBIOS actually reaplce the BIOS on the blade itself? If so, does the original functionality of the blade change at all? > > Yes. LinuxBIOS actually replaces the BIOS in the ROM/Flash on the blade. Functionality does change. LinuxBIOS does not currently support Windowz or any OS that makes BIOS calls. Other function changes are based on obvious differences between bits set during config and init in the OEM BIOS and what's set in LinuxBIOS. With LinuxBIOS you can make any mods you wish, not just the few settings typically allowed in the OEM BIOS setup. Bari From rminnich at lanl.gov Wed Oct 23 16:10:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 16:10:01 2002 Subject: AW: DOC vs. IDE In-Reply-To: <3DB6C801.4000709@bergeron.com> Message-ID: On Wed, 23 Oct 2002, Christopher Bergeron wrote: > That actually sounds like a brilliant idea. I wonder if anyone on the > list can confirm performance... does the CFcard appear as a standard IDE > disk or is there a driver or anything necessary? we're doing it here on the PCM-5823-A2 geode cards. We use CF as /dev/hdc, there is no /dev/hd1. Works fine. ron From rsmith at bitworks.com Wed Oct 23 17:11:01 2002 From: rsmith at bitworks.com (Richard A. Smith) Date: Wed Oct 23 17:11:01 2002 Subject: AW: DOC vs. IDE In-Reply-To: Message-ID: On Wed, 23 Oct 2002 14:28:23 -0600 (MDT), Ronald G Minnich wrote: > On Wed, 23 Oct 2002, Christopher Bergeron wrote: > > > That actually sounds like a brilliant idea. I wonder if anyone on the > > list can confirm performance... does the CFcard appear as a standard IDE > > disk or is there a driver or anything necessary? > > we're doing it here on the PCM-5823-A2 geode cards. We use CF as /dev/hdc, > there is no /dev/hd1. Works fine. > I'll pipe in a little bit of personal experience here. If you are _just_ using a CF with an IDE adapter then all is well and things will work great. During bringup and debug though its nice to have a big HD with a full linux distribution on on it so you can develope on your target. However if you are using a CF _and_ a normal IDE drive you may run into a gotcha. In the 2.2 linux IDE code there are clauses that if a CF device is dectected on hda it will NOT probe for hdb. Same goes for hdc and hdd. There is no output telling you its skipping it either. Apparently there were some early CF devices that did some funky stuff with the diag signal (drive dection) and Andre (the 2.2 IDE maintainer) chose to blacklist all CF devices. The fix is to feed the kernel some parameter like ide0=flash or something similar to make it go ahead and probe. I haven't looked at the 2.4.x IDE code so I don't know if it carried over or not. But if you mysteriously don't have an hdb with a CF hooked up in your system go check the IDE probing code before you pull you hair out trying to figure out whats wrong with your hardware like I did. -- Richard A. Smith Bitworks, Inc. rsmith at bitworks.com 479.846.5777 x104 Sr. Design Engineer http://www.bitworks.com From rminnich at lanl.gov Wed Oct 23 19:15:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 19:15:01 2002 Subject: booting ide flash from latest etherboot (CVS) Message-ID: It has a problem getting to flash, but it actually got worse. It doesn't see the flash disk at all in this version. To sum up: fallback + rc4.eb5 -- finds disk, boots it automatically normal + rc4.eb5 -- type 'D' to it, then it finds disk and boots normal + rc5 -- never finds the disk, although BBOT_FIRST is to to BOOT_DISK I bet there's some other config thing I've missed. ron From ollie at sis.com.tw Wed Oct 23 20:51:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 23 20:51:01 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023095713.J63646-100000@www.missl.cs.umd.edu> References: <20021023095713.J63646-100000@www.missl.cs.umd.edu> Message-ID: <1035421939.1464.2.camel@ollie> On Wed, 2002-10-23 at 21:59, adam at www.missl.cs.umd.edu wrote: > > > [PS: Can I somehow tell mailman to accept my email from multiple > addresses?] > > hello > I'm trying to set "bios classic/dos" like state > on the winfast 6300max/sis630 motherboard. > > one of the issues I'm having is that it seems that > interrupt 9 (keyboard) is not beging tiggered. > (this is after linuxbios finish booting and I > start bochs bios). > > Initially I have suspected that the PIC in the sis630 > is not getting programmed. > > However, going over boch's bios sources I found out that it > does DO program PIC..so it is not the issue here. > (relevant code at end of email). > > Thus the question is : > > What is the extra step I'm missing that has to be run after > linuxbios finish but before attempting to program PIC for > bios/dos style interrupt mapping? > I don't quite understand your question, but LinuxBIOS does program the PIC to map IRQ 0-15 to INT 0x20-0x30. So the keyboard interrupt (IRQ 1) is routed to INT0x21. This is how Linux does for its interrupt handling. Ollie From adam at cfar.umd.edu Wed Oct 23 20:58:00 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Oct 23 20:58:00 2002 Subject: PIC question. (fwd) In-Reply-To: <1035421939.1464.2.camel@ollie> Message-ID: <20021023211714.X65410-100000@www.missl.cs.umd.edu> > I don't quite understand your question, but LinuxBIOS does program > the PIC to map IRQ 0-15 to INT 0x20-0x30. So the keyboard interrupt > (IRQ 1) is routed to INT0x21. This is how Linux does for its interrupt > handling. yes, but I'm trying to add support to "legacy applications" (such as Windows XP) to LinuxBIOS. for example right now I can run unmodified lilo from linuxbios with all its bios interrupts calls, and lilo is able to start some other application. but weirdly enough the keyboard is not working under lilo. as far as I can tell the PIC gets reprogrammed by bios to remap the IRQ1 to INT 0x09, yet I still do not get the interrupt 9 tiggered. So I'm sort of lost as to why. -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From ollie at sis.com.tw Wed Oct 23 21:24:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 23 21:24:01 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023211714.X65410-100000@www.missl.cs.umd.edu> References: <20021023211714.X65410-100000@www.missl.cs.umd.edu> Message-ID: <1035423950.1464.4.camel@ollie> On Thu, 2002-10-24 at 09:20, Adam Sulmicki wrote: > > I don't quite understand your question, but LinuxBIOS does program > > the PIC to map IRQ 0-15 to INT 0x20-0x30. So the keyboard interrupt > > (IRQ 1) is routed to INT0x21. This is how Linux does for its interrupt > > handling. > > yes, but I'm trying to add support to "legacy applications" (such as > Windows XP) to LinuxBIOS. for example right now I can run unmodified lilo > from linuxbios with all its bios interrupts calls, and lilo is able to > start some other application. > > but weirdly enough the keyboard is not working under lilo. > > as far as I can tell the PIC gets reprogrammed by bios to remap > the IRQ1 to INT 0x09, yet I still do not get the interrupt 9 > tiggered. So I'm sort of lost as to why. > Is it possible that your BIOS reprogrammed the keyboard controller in the wrong way ?? Ollie From jalton at olsh.cx Wed Oct 23 21:26:01 2002 From: jalton at olsh.cx (James Alton) Date: Wed Oct 23 21:26:01 2002 Subject: 810LMR LinuxBIOS setup Message-ID: <1035423831.1145.23.camel@localhost.localdomain> Hello again, I had previously written about which BIOS chip to use, I am wondering now if video and sound will work on the 810LR. I have examined the CVS code and it seems that it doesn't really do anything but set up irq tables for vid/snd, and I figure the linux kernel does the rest. I am pretty sure vid/snd will work but I am wondering if I am wrong in assuming that. Oh, and also, is there a way for LinuxBIOS to just have etherboot and have etherboot load the kernel over the network as it usually does? (Could I use the onboard 2megabit BIOS?) James Alton jalton at olsh.cx From adam at cfar.umd.edu Wed Oct 23 21:36:01 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Oct 23 21:36:01 2002 Subject: PIC question. (fwd) In-Reply-To: <1035423950.1464.4.camel@ollie> Message-ID: <20021023215451.U65410-100000@www.missl.cs.umd.edu> > Is it possible that your BIOS reprogrammed the keyboard controller > in the wrong way ?? it is possible, in fact it the only unchecked list on my To Check List: PIC not getting (re) programmed CHECK PIC interrupt mask is wrong CHECK IF flag being cleared CHECK keyboard controller ???? so I guess that leaves the keyboard controller only. That brings me to the point, what sort of references did you use to write cvs-freebios/freebios/src/pc80/keyboard.c -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From rminnich at lanl.gov Wed Oct 23 21:56:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 21:56:01 2002 Subject: 810LMR LinuxBIOS setup In-Reply-To: <1035423831.1145.23.camel@localhost.localdomain> Message-ID: On 23 Oct 2002, James Alton wrote: > assuming that. Oh, and also, is there a way for LinuxBIOS to just have > etherboot and have etherboot load the kernel over the network as it > usually does? (Could I use the onboard 2megabit BIOS?) that's the default mode for just about any FLASH part nowadays, as they are all so small. Get the latest cvs from etherboot.org, build allelf, and you can use one of the elf images as the payload instead of a linux kernel. ron From rminnich at lanl.gov Wed Oct 23 21:57:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 21:57:00 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023215451.U65410-100000@www.missl.cs.umd.edu> Message-ID: On Wed, 23 Oct 2002, Adam Sulmicki wrote: > cvs-freebios/freebios/src/pc80/keyboard.c Ollie, didn't KM Liu tell us how that was done? ron From bari at onelabs.com Wed Oct 23 21:57:05 2002 From: bari at onelabs.com (Bari Ari) Date: Wed Oct 23 21:57:05 2002 Subject: RLX 800i Info? References: <200210231623.AA99418156@dotcomlive.net> Message-ID: <3DB757A0.2040201@onelabs.com> Mark Weinstein wrote: >I don't think that should be a problem. What I am concerned about the most is that from what I understand, since teh RLX can remotely manage/monitor their blades, I didnt know if you would still be able to poll or information or not. > >Have you done one of these installs? Is it a simple pop-in chip or do you have to REALLY hack the board and resolder, etc? That worries me a little. :) > >Also, is there any possible way to remotely reboot a LinuxBIOS machine from a master server other than the obsious shutdown or reboot commands? > > > According to Ron: "we committed support for the RLX 800i blades. There are PIII-based blades that use the Micron 21PAD northbridge. The 21PAD is a fantastic design and the company has been very helpful with information. The RLX blade is also quite nice. Due to space limitations on the flash, we can only fit Etherboot or 9load; Linux kernel is too large at present" Maybe Ron can shed more light on the RLX port. Bari. From ollie at sis.com.tw Wed Oct 23 21:58:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 23 21:58:00 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023215451.U65410-100000@www.missl.cs.umd.edu> References: <20021023215451.U65410-100000@www.missl.cs.umd.edu> Message-ID: <1035425958.1464.7.camel@ollie> On Thu, 2002-10-24 at 09:58, Adam Sulmicki wrote: > > Is it possible that your BIOS reprogrammed the keyboard controller > > in the wrong way ?? > > it is possible, in fact it the only unchecked list on my To Check > List: > PIC not getting (re) programmed CHECK > PIC interrupt mask is wrong CHECK > IF flag being cleared CHECK > keyboard controller ???? > > so I guess that leaves the keyboard controller only. > That brings me to the point, what sort of references did you > use to write > Some part of it comes form old sample code by our BIOS guy. Most of it from "The undocumented PC" by Van Gilluwe. Ollie From rminnich at lanl.gov Wed Oct 23 22:01:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 22:01:01 2002 Subject: RLX 800i Info? In-Reply-To: <200210231554.AA95092780@dotcomlive.net> Message-ID: On Wed, 23 Oct 2002, Mark Weinstein wrote: > Does anyone have any specific info on teh RLX 800i port of LinuxBIOS? > I have the immediate need to get one of these blades up and running > with Etherboot, but would like a little more information. We did that work here and I have a 6-node 800i rack that uses linuxbios. Suravee did the job in a week, which I thought was pretty fast. It works fine. > Does linuxBIOS actually reaplce the BIOS on the blade itself? If so, > does the original functionality of the blade change at all? LinuxBIOS replaces the BIOS completely. Functionality: well, they boot much faster, and you don't need that crazy VGA-over-serial stuff. We load etherboot. There is no resoldering or anything. We load linuxbios into the main flash partition and if you don't like it, you can flip the jumper on the board and use the original bios. ron From adam at cfar.umd.edu Wed Oct 23 22:01:08 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Oct 23 22:01:08 2002 Subject: PIC question. (fwd) In-Reply-To: <1035425958.1464.7.camel@ollie> Message-ID: <20021023222249.C65410-100000@www.missl.cs.umd.edu> > Some part of it comes form old sample code by our BIOS guy. Most of it > from "The undocumented PC" by Van Gilluwe. sigh. I hoped for a datascheet. so there's no a definite reference then? -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From ollie at sis.com.tw Wed Oct 23 22:02:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 23 22:02:01 2002 Subject: 810LMR LinuxBIOS setup In-Reply-To: <1035423831.1145.23.camel@localhost.localdomain> References: <1035423831.1145.23.camel@localhost.localdomain> Message-ID: <1035426170.1484.11.camel@ollie> On Thu, 2002-10-24 at 09:43, James Alton wrote: > Hello again, > > I had previously written about which BIOS chip to use, I am wondering > now if video and sound will work on the 810LR. I have examined the CVS > code and it seems that it doesn't really do anything but set up irq > tables for vid/snd, and I figure the linux kernel does the rest. I am > pretty sure vid/snd will work but I am wondering if I am wrong in > assuming that. Yes, both video and sound works perfectly underl LinuxBIOS. > Oh, and also, is there a way for LinuxBIOS to just have > etherboot and have etherboot load the kernel over the network as it > usually does? (Could I use the onboard 2megabit BIOS?) > Yes, this is how Eric do for their cluster in lnxi.com. Ollie From rminnich at lanl.gov Wed Oct 23 22:02:07 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 22:02:07 2002 Subject: RLX 800i Info? In-Reply-To: <3DB757A0.2040201@onelabs.com> Message-ID: On Wed, 23 Oct 2002, Bari Ari wrote: > >I don't think that should be a problem. What I am concerned about > the most is that from what I understand, since teh RLX can remotely > manage/monitor their blades, I didnt know if you would still be able > to poll or information or not. What kind of info? we did not find the RLX remote admin stuff particularly useful. > >Have you done one of these > installs? Is it a simple pop-in chip or do you have to REALLY hack > the board and resolder, etc? That worries me a little. :) ZERO resoldering. >Also, is > there any possible way to remotely reboot a LinuxBIOS machine from a > master server other than the obsious shutdown or reboot commands? I think you can via the I2C chain that is on the RLX. Although we have never needed this. kron From ollie at sis.com.tw Wed Oct 23 22:09:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 23 22:09:01 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023215451.U65410-100000@www.missl.cs.umd.edu> References: <20021023215451.U65410-100000@www.missl.cs.umd.edu> Message-ID: <1035426618.1484.16.camel@ollie> On Thu, 2002-10-24 at 09:58, Adam Sulmicki wrote: > > Is it possible that your BIOS reprogrammed the keyboard controller > > in the wrong way ?? > > it is possible, in fact it the only unchecked list on my To Check > List: > PIC not getting (re) programmed CHECK > PIC interrupt mask is wrong CHECK > IF flag being cleared CHECK > keyboard controller ???? > > so I guess that leaves the keyboard controller only. > That brings me to the point, what sort of references did you > use to write > > cvs-freebios/freebios/src/pc80/keyboard.c > Here is the more solid and well documented version which is used in our internal version of etherboot. void pc_keyboard_init() { volatile unsigned char regval; /* ------------------- controller side ----------------------*/ printf("reset keyboard \n"); /* send cmd = 0xAA, self test 8042 */ outb(0xaa, 0x64); /* empty input buffer or any other command/data will be lost */ while ((inb(0x64) & 0x02)) post_code(0); /* empty output buffer or any other command/data will be lost */ while ((inb(0x64) & 0x01) == 0) post_code(1); /* read self-test result, 0x55 should be returned form 0x60 */ if ((regval = inb(0x60) != 0x55)) printf("self test failed\n"); /* send cmd = 0xAA, keyboard interface test */ outb(0xab, 0x64); /* empty input buffer or any other command/data will be lost */ while ((inb(0x64) & 0x02)) post_code(0); /* empty output buffer or any other command/data will be lost */ while ((inb(0x64) & 0x01) == 0) post_code(1); /* read keyboard interface test result, 0x00 should be returned form 0x60 */ if ((regval = inb(0x60) != 0x00)) printf("keyboard interface test failed\n"); /* Enable Keyboard clock */ outb(0xae, 0x64); outb(0xa8, 0x64); /* ------------------- keyboard side ------------------------*/ /* reset kerboard and self test (keyboard side) */ outb(0xff, 0x60); /* empty inut buffer or any other command/data will be lost */ while ((inb(0x64) & 0x02)) post_code(4); /* empty output buffer or any other command/data will be lost */ while ((inb(0x64) & 0x01) == 0) post_code(5); /* keyboard should return ACK */ if ((regval = inb(0x60) != 0xfa)) printf("keyboard self test failed\n"); while ((inb(0x64) & 0x01) == 0) post_code(6); if ((regval = inb(0x60) != 0xaa)) printf("keyboard self test failed\n"); /* Disable keyboard */ outb(0xf5, 0x60); /* empty inut buffer or any other command/data will be lost */ while ((inb(0x64) & 0x02)) post_code(4); /* empty output buffer or any other command/data will be lost */ while ((inb(0x64) & 0x01) == 0) post_code(5); /* keyboard should return ACK */ if ((regval = inb(0x60) != 0xfa)) printf("disable keyboard failed\n"); /* Write Keyboard Mode */ outb(0x60, 0x64); while ((inb(0x64) & 0x02)) post_code(2); /* send cmd: scan code convert, disable mouse, enable IRQ 1 */ outb(0x61, 0x60); while ((inb(0x64) & 0x02)) post_code(3); /* Enable keyboard */ outb(0xf4, 0x60); /* empty inut buffer or any other command/data will be lost */ while ((inb(0x64) & 0x02)) post_code(4); /* empty output buffer or any other command/data will be lost */ while ((inb(0x64) & 0x01) == 0) post_code(5); /* keyboard should return ACK */ if ((regval = inb(0x60) != 0xfa)) printf("enable keyboard failed\n"); } From ollie at sis.com.tw Wed Oct 23 22:12:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 23 22:12:00 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023222249.C65410-100000@www.missl.cs.umd.edu> References: <20021023222249.C65410-100000@www.missl.cs.umd.edu> Message-ID: <1035426813.1464.20.camel@ollie> On Thu, 2002-10-24 at 10:23, Adam Sulmicki wrote: > > Some part of it comes form old sample code by our BIOS guy. Most of it > > from "The undocumented PC" by Van Gilluwe. > > sigh. I hoped for a datascheet. > > so there's no a definite reference then? > It is legacy device which remain unchanged over the 80s and 90s. I think the original datasheet were all gone. Ollie From adam at cfar.umd.edu Wed Oct 23 22:16:00 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Oct 23 22:16:00 2002 Subject: PIC question. (fwd) In-Reply-To: <1035426813.1464.20.camel@ollie> Message-ID: <20021023223718.S65410-100000@www.missl.cs.umd.edu> > > sigh. I hoped for a datascheet. > > so there's no a definite reference then? > It is legacy device which remain unchanged over the 80s and 90s. > I think the original datasheet were all gone. intel still has still has those two on their web site, if this is what you are refering to: Intel 8742 Keyboard Controller Intel 80C42 Keyboard Controller http://developer.intel.com/design/periphrl/datashts/290256.htm http://developer.intel.com/design/periphrl/datashts/290414.htm -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From bari at onelabs.com Wed Oct 23 22:25:01 2002 From: bari at onelabs.com (Bari Ari) Date: Wed Oct 23 22:25:01 2002 Subject: PIC question. (fwd) References: <20021023223718.S65410-100000@www.missl.cs.umd.edu> Message-ID: <3DB75E3D.2030509@onelabs.com> Adam Sulmicki wrote: >>>sigh. I hoped for a datasheets. >>>so there's no a definite reference then? >>> >>> Try a quick search on Google. I came up with a number of links that detail the legacy PC XT and AT keyboard controllers from scan codes and programming to emulation and interface specifications. Bari From rminnich at lanl.gov Wed Oct 23 22:34:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 22:34:00 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023222249.C65410-100000@www.missl.cs.umd.edu> Message-ID: On Wed, 23 Oct 2002, Adam Sulmicki wrote: > so there's no a definite reference then? the original PC bios is useful for almost anything you see in the pc80 directory. ron From rminnich at lanl.gov Wed Oct 23 22:35:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 22:35:00 2002 Subject: PIC question. (fwd) In-Reply-To: <1035426618.1484.16.camel@ollie> Message-ID: should we put that better version of keyboard init into linuxbios? ron From ollie at sis.com.tw Wed Oct 23 22:58:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 23 22:58:01 2002 Subject: PIC question. (fwd) In-Reply-To: References: Message-ID: <1035429588.1464.24.camel@ollie> On Thu, 2002-10-24 at 10:53, Ronald G Minnich wrote: > should we put that better version of keyboard init into linuxbios? > > ron > The code was used to debug one of our customer's prototype which wired Keyboard and Mouse signal. I have no idea why I didn't commit it to freebios cvs at that time. Ollie From davedworin at msn.com Wed Oct 23 23:06:01 2002 From: davedworin at msn.com (Dave Dworin) Date: Wed Oct 23 23:06:01 2002 Subject: AW: DOC vs. IDE Message-ID: I doubt if CF is reliable to replace IDE disks. I own a CF digital camera and have experienced data loss. It seems that data loss/file corruption is quite common on CF. Any different experience? Dave >From: "Richard A. Smith" >Reply-To: "Richard A. Smith" >To: "linuxbios at clustermatic.org" >Subject: Re: AW: DOC vs. IDE >Date: Wed, 23 Oct 2002 16:28:28 -0500 > >On Wed, 23 Oct 2002 14:28:23 -0600 (MDT), Ronald G Minnich wrote: > > > On Wed, 23 Oct 2002, Christopher Bergeron wrote: > > > > > That actually sounds like a brilliant idea. I wonder if anyone on the > > > list can confirm performance... does the CFcard appear as a standard >IDE > > > disk or is there a driver or anything necessary? > > > > we're doing it here on the PCM-5823-A2 geode cards. We use CF as >/dev/hdc, > > there is no /dev/hd1. Works fine. > > > >I'll pipe in a little bit of personal experience here. If you are >_just_ using a CF with an IDE adapter then all is well and things >will work great. > >During bringup and debug though its nice to have a big HD with a full >linux distribution on on it so you can develope on your target. > >However if you are using a CF _and_ a normal IDE drive you may run >into a gotcha. In the 2.2 linux IDE code there are clauses that if a >CF device is dectected on hda it will NOT probe for hdb. Same goes >for hdc and hdd. There is no output telling you its skipping it >either. Apparently there were some early CF devices that did some >funky stuff with the diag signal (drive dection) and Andre (the 2.2 >IDE maintainer) chose to blacklist all CF devices. > >The fix is to feed the kernel some parameter like ide0=flash or >something similar to make it go ahead and probe. > >I haven't looked at the 2.4.x IDE code so I don't know if it carried >over or not. > >But if you mysteriously don't have an hdb with a CF hooked up in your >system go check the IDE probing code before you pull you hair out >trying to figure out whats wrong with your hardware like I did. > >-- >Richard A. Smith Bitworks, Inc. >rsmith at bitworks.com 479.846.5777 x104 >Sr. Design Engineer http://www.bitworks.com > > >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios _________________________________________________________________ Unlimited Internet access for only $21.95/month.? Try MSN! http://resourcecenter.msn.com/access/plans/2monthsfree.asp From rminnich at lanl.gov Wed Oct 23 23:30:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 23 23:30:01 2002 Subject: AW: DOC vs. IDE In-Reply-To: Message-ID: On Wed, 23 Oct 2002, Dave Dworin wrote: > I doubt if CF is reliable to replace IDE disks. I own a CF digital camera > and have experienced data loss. It seems that data loss/file corruption is > quite common on CF. Any different experience? I don't think your sample set is really exhaustive enough to say it is CF, your camera type, your specific camera, etc. But we have had very little trouble with CF here. ron From adam at cfar.umd.edu Wed Oct 23 23:37:00 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Oct 23 23:37:00 2002 Subject: PIC question. (fwd) In-Reply-To: <1035429588.1464.24.camel@ollie> Message-ID: <20021023235829.Y65410-100000@www.missl.cs.umd.edu> yay, keyboard works. now I have fully functional "lilo classic" from under LinuxBIOS. Thanks to everyone for help. (the "fix" was to remove the broken keyboard init code from the bios). -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From christopher at bergeron.com Thu Oct 24 00:25:01 2002 From: christopher at bergeron.com (Christopher Bergeron) Date: Thu Oct 24 00:25:01 2002 Subject: AW: DOC vs. IDE In-Reply-To: References: Message-ID: <153146103150.20021024004250@bergeron.com> Are you using CFdisks with WinXP? WinXP has a nasty habit (WINDOWS? NASTY HABIT??? NOOO!!!) of formatting CFdisks with Fat32 by default whereas most cameras use Fat16 (from what I've heard). As such, I've heard quite a few horror stories of data loss "because of CFdisks" when the actual problem was a faulty OS vendor. I just can't seem to remember the name of that vendor right now, oh well. :) All other indications of CompactFlash are that it's a realiable medium (unless you can document otherwise). I will provide documentation to the Fat32/Fat16/Xp issue upon request [or just search google]. -CB Wednesday, October 23, 2002, 11:48:30 PM, you wrote: RGM> On Wed, 23 Oct 2002, Dave Dworin wrote: >> I doubt if CF is reliable to replace IDE disks. I own a CF digital camera >> and have experienced data loss. It seems that data loss/file corruption is >> quite common on CF. Any different experience? RGM> I don't think your sample set is really exhaustive enough to say it is CF, RGM> your camera type, your specific camera, etc. RGM> But we have had very little trouble with CF here. RGM> ron RGM> _______________________________________________ RGM> Linuxbios mailing list RGM> Linuxbios at clustermatic.org RGM> http://www.clustermatic.org/mailman/listinfo/linuxbios From hill91 at peoplemail.com.cn Thu Oct 24 01:54:01 2002 From: hill91 at peoplemail.com.cn (hill91) Date: Thu Oct 24 01:54:01 2002 Subject: (no subject) Message-ID: <002901c27b24$7948f9e0$1d7ba8c0@zhanggq> -------------- next part -------------- An HTML attachment was scrubbed... URL: From OliverArnold at via.com.tw Thu Oct 24 03:51:00 2002 From: OliverArnold at via.com.tw (OliverArnold at via.com.tw) Date: Thu Oct 24 03:51:00 2002 Subject: via information Message-ID: <7BD8956C4C0394468AABA9BD2D52BF7E4570B4@exchtp05.taipei.via.com.tw> hey, nice to see, that you are working on projects wirth our epia mainboard. what information do you need for the port? perhaps i can organise something ... oliver From linuxbios at hello.org Thu Oct 24 05:05:00 2002 From: linuxbios at hello.org (CMZ) Date: Thu Oct 24 05:05:00 2002 Subject: via information (PEL133 / CLE266) References: <7BD8956C4C0394468AABA9BD2D52BF7E4570B4@exchtp05.taipei.via.com.tw> Message-ID: <00ae01c27b3e$ebd440e0$0401a8c0@minibm> Hi Oliver, nice to hear someone from VIA interesting on LinuxBios, Company that I work for has those files but due NDA I can't share with LinuxBios project, could be fantastic if all we can have those informations... Could be nice to have latest revision of those files: BIOS Porting Guide and DataSheet: C3 BIOS Porting Guide (It's availeble at web site already, but maybe something new?...) PLE133: (Actual EPIA 6010 mini-ITX) VT8231 (SouthBridge) VT8601(a) (NorthBridge) VT6103 (PHY)(Ethernet) CLE266: (coming soon, http://www.viavpsd.com/product/epia_m_spec.jsp?motherboardId=81) VT8235 (SouthBridge, USB2, ATA133) VT8623 (NorthBridge, DDR, V-Link) VT1211 (Super I/O) VT6105M (Manageble Ethernet) VT1616 On VT8623 has DDR / V-link that needs to play with... Regards. CMZ. ----- Original Message ----- From: To: Sent: Thursday, October 24, 2002 4:09 PM Subject: via information > hey, > nice to see, that you are working on projects wirth our > epia mainboard. what information do you need for the port? > perhaps i can organise something ... > > oliver > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -------------- next part -------------- An HTML attachment was scrubbed... URL: From ebiederman at lnxi.com Thu Oct 24 05:26:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Thu Oct 24 05:26:01 2002 Subject: LinuxBIOS PCBIOS emulation... In-Reply-To: <20021023235829.Y65410-100000@www.missl.cs.umd.edu> References: <20021023235829.Y65410-100000@www.missl.cs.umd.edu> Message-ID: Adam Sulmicki writes: > yay, keyboard works. now I have fully functional "lilo classic" > from under LinuxBIOS. > > Thanks to everyone for help. > > (the "fix" was to remove the broken keyboard init code from > the bios). Cool. I am interested to see how far, and where this goes. I have been working to get kexec into the kernel and figuring out how to use it to build interesting bootloaders. What I have been stumbling over is how do I put in support for booting windows. As I do not trust BIOS calls that talk to hardware device drivers after a Linux kernel has run. Long term does running your code on a machine with a normal BIOS sound like a possibility? If so then a very interesting bootloader can be built on top of kexec, and the linux kernel. Eric From adam at cfar.umd.edu Thu Oct 24 06:01:01 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Thu Oct 24 06:01:01 2002 Subject: LinuxBIOS PCBIOS emulation... In-Reply-To: Message-ID: <20021024061834.G66729-100000@www.missl.cs.umd.edu> > > yay, keyboard works. now I have fully functional "lilo classic" > > from under LinuxBIOS. > > > > Thanks to everyone for help. > > > > (the "fix" was to remove the broken keyboard init code from > > the bios). > > Cool. I am interested to see how far, and where this goes. I'm fairly optimistic. However, I'm sort of reluctant to go into details before the stuff are released. Either way. For now, can anyone recommend any "bios tester". something other than dos (windows), and linux? The only other thing I can think of right now is freebsd. Basically, I Think, there's going on some sort of corruption shortly after the control is passed off from LILO. It happens at semi-random points and when I stop ICE it usually is in undetermined state giving me "reboot" as the only option. Right now I don't have many good ideas how to attack this problem short of lots of OUT ax, 0x80 and lots of hand stepping thru code. -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From rminnich at lanl.gov Thu Oct 24 09:47:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 24 09:47:00 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023235829.Y65410-100000@www.missl.cs.umd.edu> Message-ID: will you be contributing your mods back to linuxbios for booting etc? ron From rminnich at lanl.gov Thu Oct 24 09:47:52 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Thu Oct 24 09:47:52 2002 Subject: PIC question. (fwd) In-Reply-To: <20021023235829.Y65410-100000@www.missl.cs.umd.edu> Message-ID: On Thu, 24 Oct 2002, Adam Sulmicki wrote: > (the "fix" was to remove the broken keyboard init code from > the bios). well we're going to need a replacement. That code has worked for a few years so it would be good to know what's broken and how to fix it. ron From kok at surfbest.net Thu Oct 24 10:56:00 2002 From: kok at surfbest.net (Jan Kok) Date: Thu Oct 24 10:56:00 2002 Subject: LinuxBIOS PCBIOS emulation... References: <20021024061834.G66729-100000@www.missl.cs.umd.edu> Message-ID: <000d01c27b70$35bb0dc0$128495ce@duron> ----- Original Message ----- From: "Adam Sulmicki" > Either way. For now, can anyone recommend any "bios tester". something > other than dos (windows), and linux? The only other thing I can think of > right now is freebsd. Another OS you could try is BeOS. BeOS is interesting in that it has its own loader (sort of like LILO). And if the disk is already spun up, BeOS boots up and is ready to use in about 5 seconds. Does NT supply its own loader? NT is based on a different code stream than Windows 98, so it may exercise different parts of the BIOS. Oh, and there's OS2. And Minix. A look at the file system types listed in the linux fdisk utility may give some clues to other OSs that run on PCs. Cheers, - Jan From steve at nexpath.com Thu Oct 24 11:40:01 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Thu Oct 24 11:40:01 2002 Subject: PIC question. (fwd) In-Reply-To: Message-ID: > (the "fix" was to remove the broken keyboard init code from > > the bios). > > well we're going to need a replacement. That code has worked for a few > years so it would be good to know what's broken and how to fix it. > > ron The keyboard init code works for me. I remember looking through it a while ago, I didn't see anything wrong AFAIR. You of course have to setup the superio properly first. My biggest problem initially was that the init code was _not_ running, due to needing to set "keyboard=1" in the nsuperio config line. Otherwise I have used it in both the stpc and the m787cl+ and it works fine for me (smc-fdc37b78x and Sis/950 superio). -Steve From rsmith at bitworks.com Thu Oct 24 13:19:00 2002 From: rsmith at bitworks.com (Richard A. Smith) Date: Thu Oct 24 13:19:00 2002 Subject: AW: DOC vs. IDE In-Reply-To: <153146103150.20021024004250@bergeron.com> Message-ID: On Thu, 24 Oct 2002 00:42:50 -0400, Christopher Bergeron wrote: > > All other indications of CompactFlash are that it's a realiable medium > (unless you can document otherwise). I will provide documentation to Well I don't know that I can "document" but I've had numerious problems with CF devices. I've got 5 seperate CFs with Sector 0 CRC problems. 3 of them are SanDisk but I also have 2 from SST. They are various sizes. This topic has come up on the Linux-embedded list as well. Others have experienced the same type of issues we have. I've spoken with an app engineer at SanDisk and his explaniation was under certian conditions, like say if your 5V power glitches. The internal write state machine gets confused/reset or whatever and it ends up munging sector 0. After which the CF won't work in any OS (including Linux) because it throws and error reading the partition table. The SanDisk guy told me I sould be able to recover sector 0 by writing all zeros to it which will reset the crc but I haven't been able to find an application that is 1) Freeware and 2) Will do raw sector writes. -- Richard A. Smith Bitworks, Inc. rsmith at bitworks.com 479.846.5777 x104 Sr. Design Engineer http://www.bitworks.com From spyro at f2s.com Thu Oct 24 16:09:00 2002 From: spyro at f2s.com (Ian Molton) Date: Thu Oct 24 16:09:00 2002 Subject: AW: DOC vs. IDE In-Reply-To: References: <153146103150.20021024004250@bergeron.com> Message-ID: <20021024212721.6c06e9d2.spyro@f2s.com> On Thu, 24 Oct 2002 12:36:48 -0500 "Richard A. Smith" wrote: > The SanDisk guy told me I sould be able to recover sector 0 by > writing all zeros to it which will reset the crc but I haven't been > able to find an application that is 1) Freeware and 2) Will do raw > sector writes. 'dd' ? From rsmith at bitworks.com Thu Oct 24 16:59:00 2002 From: rsmith at bitworks.com (Richard A. Smith) Date: Thu Oct 24 16:59:00 2002 Subject: AW: DOC vs. IDE In-Reply-To: <20021024212721.6c06e9d2.spyro@f2s.com> Message-ID: On Thu, 24 Oct 2002 21:27:21 +0100, Ian Molton wrote: > > The SanDisk guy told me I sould be able to recover sector 0 by > > writing all zeros to it which will reset the crc but I haven't been > > able to find an application that is 1) Freeware and 2) Will do raw > > sector writes. > > 'dd' ? dd would work if the device was present. But you can't dd to a device you don't have. When the IDE code attempts to read the partition table of the disk it chokes and never inserts the device into the device tree. I guess that probally should be considered a bug in the IDE code but some might call it a feature. Note all this info is from 2.2.x.. Stand by.. Yep just checked with 2.4.18 and its still the same. Well almost, it actually does have the device in the device tree but on any access to the device it attempts to read the partition table and thus gets an IO error and fails. Suposedly there are some IDE low level raw access IOCTLS that can send commands directly to the IDE controller but I've not investigated it yet. -- Richard A. Smith Bitworks, Inc. rsmith at bitworks.com 479.846.5777 x104 Sr. Design Engineer http://www.bitworks.com From stuge-linuxbios at cdy.org Thu Oct 24 17:10:01 2002 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Thu Oct 24 17:10:01 2002 Subject: AW: DOC vs. IDE In-Reply-To: ; from rsmith@bitworks.com on Thu, Oct 24, 2002 at 04:17:47PM -0500 References: <20021024212721.6c06e9d2.spyro@f2s.com> Message-ID: <20021024232736.G1873@foo.birdnet.se> On Thu, Oct 24, 2002 at 04:17:47PM -0500, Richard A. Smith wrote: > Suposedly there are some IDE low level raw access IOCTLS that can > send commands directly to the IDE controller but I've not > investigated it yet. Check out "IDE Taskfile Access" CONFIG_IDE_TASK_IOCTL in 2.4.19. //Peter From ebiederman at lnxi.com Thu Oct 24 19:35:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Thu Oct 24 19:35:00 2002 Subject: [Etherboot-developers] booting ide flash from latest etherboot (CVS) In-Reply-To: References: Message-ID: Ronald G Minnich writes: > It has a problem getting to flash, but it actually got worse. It doesn't > see the flash disk at all in this version. > > To sum up: > fallback + rc4.eb5 -- finds disk, boots it automatically > normal + rc4.eb5 -- type 'D' to it, then it finds disk and boots > normal + rc5 -- never finds the disk, although BBOT_FIRST is to to > BOOT_DISK > > I bet there's some other config thing I've missed. make ide_disk.elf Or in the normal case of wanting the nic driver as well. make eepro100--ide_disk.nrv2belf (nrv2b is the upx compression algorithm) Oops I forget to hit send yesterday... Eric From McMechanJW at navair.navy.mil Thu Oct 24 20:36:00 2002 From: McMechanJW at navair.navy.mil (McMechan, James) Date: Thu Oct 24 20:36:00 2002 Subject: AW: DOC vs. IDE Message-ID: Actually it was worse even in 2.4, the flash detection will disable the other device e.g. hda=harddisk hdb=flash core probes hda prints out hda detection everything seems fine core probes hdb prints out hdb detection *** silently disables hda *** system tries to boot from hda dies as device is not present. user goes insane because it is printed in the log as being detected see about line 169 of linux-2.4.19/drivers/ide/ide-probe.c I have a system with soldered in flash that with a hard disk is hdb I have to pass hdb=noprobe to prevent that system from failing The comments indicate that this is put in to prevent wasting time on probing non existent slave device but it is disabling the master device if the slave is flash :( > ---------- > From: Richard A. Smith > Reply To: Richard A. Smith > Sent: Wednesday, October 23, 2002 14:28 > To: linuxbios at clustermatic.org > Subject: Re: AW: DOC vs. IDE > > On Wed, 23 Oct 2002 14:28:23 -0600 (MDT), Ronald G Minnich wrote: > > > On Wed, 23 Oct 2002, Christopher Bergeron wrote: > > > > > That actually sounds like a brilliant idea. I wonder if anyone on the > > > list can confirm performance... does the CFcard appear as a standard > IDE > > > disk or is there a driver or anything necessary? > > > > we're doing it here on the PCM-5823-A2 geode cards. We use CF as > /dev/hdc, > > there is no /dev/hd1. Works fine. > > > > I'll pipe in a little bit of personal experience here. If you are > _just_ using a CF with an IDE adapter then all is well and things > will work great. > > During bringup and debug though its nice to have a big HD with a full > linux distribution on on it so you can develope on your target. > > However if you are using a CF _and_ a normal IDE drive you may run > into a gotcha. In the 2.2 linux IDE code there are clauses that if a > CF device is dectected on hda it will NOT probe for hdb. Same goes > for hdc and hdd. There is no output telling you its skipping it > either. Apparently there were some early CF devices that did some > funky stuff with the diag signal (drive dection) and Andre (the 2.2 > IDE maintainer) chose to blacklist all CF devices. > > The fix is to feed the kernel some parameter like ide0=flash or > something similar to make it go ahead and probe. > > I haven't looked at the 2.4.x IDE code so I don't know if it carried > over or not. > > But if you mysteriously don't have an hdb with a CF hooked up in your > system go check the IDE probing code before you pull you hair out > trying to figure out whats wrong with your hardware like I did. > > -- > Richard A. Smith Bitworks, Inc. > rsmith at bitworks.com 479.846.5777 x104 > > Sr. Design Engineer http://www.bitworks.com > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > > From OliverArnold at via.com.tw Fri Oct 25 03:14:00 2002 From: OliverArnold at via.com.tw (OliverArnold at via.com.tw) Date: Fri Oct 25 03:14:00 2002 Subject: root file system where Message-ID: <7BD8956C4C0394468AABA9BD2D52BF7E4B2C41@exchtp05.taipei.via.com.tw> Hello World, I try to set up a LinuxBIOS System. What i really can not understand is the following: When I Flash the root filesystem into the BIOS Flash rom, where do i tell the kernel to mount it? How does that work? Thank you Oliver From Antony at Soft-Solutions.co.uk Fri Oct 25 05:02:01 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Fri Oct 25 05:02:01 2002 Subject: root file system where Message-ID: <200210250921.g9P9L0e05554@vulcan.rissington.net> On Friday 25 October 2002 8:32 am, OliverArnold at via.com.tw wrote: > Hello World, > > I try to set up a LinuxBIOS System. What i really can not understand is the > following: When I Flash the root filesystem into the BIOS Flash rom, where > do i tell the kernel to mount it? How does that work? If you mean you are putting a kernel into Disk On Chip, along with a root filing system as well, then the answer is that the root fs should be on /dev/nftla1 If, on the other hand, you are actually only putting the kernel onto flash (DoC or some other flash device) then your root fs will still be /dev/hda1 or wherever you have all your system files (maybe somewhere across a network...). Does this tell you what you need ? Antony. -- Normal people think "if it ain't broke, don't fix it". Engineers think "if it ain't broke, it doesn't have enough features yet". From pyro at linuxlabs.com Fri Oct 25 10:33:00 2002 From: pyro at linuxlabs.com (steven james) Date: Fri Oct 25 10:33:00 2002 Subject: movnti Message-ID: Greetings, Recent ramtest and spotcheck.inc use the movnti instruction to bypass the cache when writing. gas 2.9.5 handles everything but that instruction. options: 1. don't use movnti 2. make it configurable 3. shut up and update binutils :-) Comments? G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From davej at suse.de Fri Oct 25 10:58:01 2002 From: davej at suse.de (Dave Jones) Date: Fri Oct 25 10:58:01 2002 Subject: movnti In-Reply-To: ; from pyro@linuxlabs.com on Fri, Oct 25, 2002 at 08:51:09AM -0400 References: Message-ID: <20021025171622.A15812@suse.de> On Fri, Oct 25, 2002 at 08:51:09AM -0400, steven james wrote: > gas 2.9.5 handles everything but that instruction. > > options: > 1. don't use movnti > 2. make it configurable > 3. shut up and update binutils :-) 4. use the hex values of the opcode in the source. (Ugly, but compatable). Dave -- | Dave Jones. http://www.codemonkey.org.uk | SuSE Labs From pyro at linuxlabs.com Fri Oct 25 11:04:02 2002 From: pyro at linuxlabs.com (steven james) Date: Fri Oct 25 11:04:02 2002 Subject: RFC tagged payload Message-ID: Greetings, I've been working with a tagging system so that multiple payloads in firmware can be selected from serial at boot time. The scheme adds a 16 byte tag block in front of each payload containing a $TAG$ signature, additional block count, a payload length (optional, may be 0), and a name string. The idea is to search for tags in the ROM, present the name strings in a list and allow selection of a particular target. The stream is then positioned just past the tag and passed to elfboot. changes: elfboot no longer calls stream->init(), it presumes that has been done already. add stream methods: searchtags gettags loadtag search tags performs the search and specifies the neded buffer size to hold the result. gettags loads the tags into a provided buffer for presentation loadtag positions the stream just after the selected tag index (0 based) for backwards compatability: Where no tags are found, the stream is positioned at the beginning where the stream->searchtags == NULL, presume the stream object doesn't support tags. Just call init and pass it to elfboot. Yes, No, Comments? G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From pyro at linuxlabs.com Fri Oct 25 11:09:50 2002 From: pyro at linuxlabs.com (steven james) Date: Fri Oct 25 11:09:50 2002 Subject: movnti In-Reply-To: <20021025171622.A15812@suse.de> Message-ID: On Fri, 25 Oct 2002, Dave Jones wrote: > On Fri, Oct 25, 2002 at 08:51:09AM -0400, steven james wrote: > > gas 2.9.5 handles everything but that instruction. > > > > options: > > 1. don't use movnti > > 2. make it configurable > > 3. shut up and update binutils :-) > > 4. use the hex values of the opcode in the source. > (Ugly, but compatable). > > Dave I suppose not TOO ugly if hidden behind a #define G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From ebiederman at lnxi.com Fri Oct 25 12:58:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Oct 25 12:58:00 2002 Subject: movnti In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > Recent ramtest and spotcheck.inc use the movnti instruction to bypass the > cache when writing. > > gas 2.9.5 handles everything but that instruction. One version of binutils had a bug where it would put junk at the end of assembly language files. I think it was 2.9.5 I upgraded to avoid that problem, and to be able to easily use the new instricutions. > options: > 1. don't use movnti > 2. make it configurable > 3. shut up and update binutils :-) Currently this code is set to only be used on a P4. We are writing code in assembly. Not having tools that work on the machine is a royal pain, so I figure updating binutils is worth it. Eric From ebiederman at lnxi.com Fri Oct 25 13:11:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Oct 25 13:11:00 2002 Subject: RFC tagged payload In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > > I've been working with a tagging system so that multiple payloads in > firmware can be selected from serial at boot time. > > The scheme adds a 16 byte tag block in front of each payload containing a > $TAG$ signature, additional block count, a payload length (optional, may > be 0), and a name string. > > The idea is to search for tags in the ROM, present the name strings in a > list and allow selection of a particular target. The stream is then > positioned just past the tag and passed to elfboot. My memory is that tags don't rewind, because it could be something like a serial port... > changes: > elfboot no longer calls stream->init(), it presumes that has been done > already. > > add stream methods: > searchtags > gettags > loadtag > > search tags performs the search and specifies the neded buffer size to > hold the result. > > gettags loads the tags into a provided buffer for presentation > > loadtag positions the stream just after the selected tag index (0 based) > > for backwards compatability: > Where no tags are found, the stream is positioned at the beginning > > where the stream->searchtags == NULL, presume the stream object doesn't > support tags. Just call init and pass it to elfboot. > > Yes, No, Comments? The tags can be done as ELF notes, so an extra header is unnecessary. Whatever happens in LinuxBIOS itself should be non interactive, and unconditional. There are a whole lot of ideas about interactive bootloaders, and accepting them all into the core opens us to all kinds of bloat and feature creep. So the interactive code needs to be a seperate payload. If it can be done without penalizing the rest of the code it is ok to put that ELF payload into the tree. But not into the core. Eric From bari at onelabs.com Fri Oct 25 14:03:00 2002 From: bari at onelabs.com (Bari Ari) Date: Fri Oct 25 14:03:00 2002 Subject: a board with SA1110 References: Message-ID: <3DB988A7.2010508@onelabs.com> Look at the ITE8152 by ITE. It works with SA-1110 and PXA. They have a complete design kit. http://www.iteusa.com/ Bari Deprun, Jean-Francois wrote: >Hi, > >After the lart project, I would like to know if some one has done a board >with SA1110 and where I can found: >1) schematic, gerber, orcad files.... >2) Bios and Linux software >3) tools (compilator, linker, debugger)... >4) Application (do you know if there is a list of Lart/SA1110 applications ) >4) vendor board. > >Thank you for your help. > >When I will have answers I send you back. > >Jean-Francois >-- >To unsubscribe from this list: send the line "unsubscribe lart" in >the body of a message to majordomo at lart.tudelft.nl >Please read the LART FAQ at http://www.lart.tudelft.nl/faq.php3 > > > > From pyro at linuxlabs.com Fri Oct 25 20:23:01 2002 From: pyro at linuxlabs.com (steven james) Date: Fri Oct 25 20:23:01 2002 Subject: COMMIT: intel/Clearwater Message-ID: Greetings, Support for the Intel Clearwater mainboard has been committed. Clearwater is a dual PIV Xeon board based on the E7500 chipset. G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From ebiederman at lnxi.com Fri Oct 25 20:30:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Oct 25 20:30:00 2002 Subject: COMMIT: intel/Clearwater In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > Support for the Intel Clearwater mainboard has been committed. > Clearwater is a dual PIV Xeon board based on the E7500 chipset. And just to give you a hard time, I have already committed an update to src/northbridge/intel/E7500/raminit.inc Earlier today I had missed a couple of bugfixes, that should have been checked in. Eric From pyro at linuxlabs.com Fri Oct 25 20:41:00 2002 From: pyro at linuxlabs.com (steven james) Date: Fri Oct 25 20:41:00 2002 Subject: COMMIT: intel/Clearwater In-Reply-To: Message-ID: Greetings, I get undefined reference to mo_memory_bad_smbus now. I see the jump in raminit, but not the label. G'day, sjames On 25 Oct 2002, Eric W. Biederman wrote: > steven james writes: > > > Greetings, > > > > Support for the Intel Clearwater mainboard has been committed. > > Clearwater is a dual PIV Xeon board based on the E7500 chipset. > > And just to give you a hard time, I have already committed an update > to src/northbridge/intel/E7500/raminit.inc > > Earlier today I had missed a couple of bugfixes, that should have been > checked in. > > Eric > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From ebiederman at lnxi.com Fri Oct 25 23:57:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Oct 25 23:57:00 2002 Subject: [COMMIT] upx E7500 etc Message-ID: I have committed so many files today I can barely track what I am doing. The result is that all of my oustanding code has now been pushed to the LinuxBIOS tree. So the supermicro/p4dpr and supermicro/p4dpe should now be stable ports of linuxBIOS. I would say so in the status file, but there isn't a single one in the whole tree. Things other people will notice. The upx compressor code was integrated and is on by default. So you will get smaller linuxbios rom images. I accomplished this by explicitly factoring linuxbios into a C part that runs in ram and an assembly part that runs directly out of flash. The seperation was there before but now it is explicit. This greatly simplifies the linker scripts, so we are actually less likely to run into LD bugs now than before. The config option is CONFIG_COMPRESS if you want to turn it off. Other things of note. cmos.conf was renamed cmos.layout to reduce confusion. And a new checksum entry was added to the LinuxBIOS table so external programs can find the checksum that protects the LinuxBIOS options. My code has been synced with the changes Steve James made for the Clearwater port. There are microcode updates in the tree, and some other cpu fixups for the pentium 4. Have fun, and hopefully nothing broke except the p4dc6, as they way it utilized the cache as ram trick depended on the muddy watters between code that ran in rom and ram. The code is fixable, if I turn off compression. It just requires a little magic to find the cache as ram entry point... Eric From adam at cfar.umd.edu Sat Oct 26 08:09:01 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Sat Oct 26 08:09:01 2002 Subject: copy extended memory. Message-ID: <20021026082507.V75579-100000@www.missl.cs.umd.edu> hello, can anyone point me to an documenation on bios's interrupt 15, ah=87. It is 'copy extended memory'. I suspect the implementation I have is wrong, and thus stops me from adding support for legacy applications under LinuxBIOS. Going over phoenix manual and Ralf Browns's interrupt list, I know that CX = counter ES:SI = pointer to GDT what is not clear to me is what does determine source and destination of the copy. Would it just copy between first and second segment (if so why it is not documented). -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From ebiederman at lnxi.com Sat Oct 26 11:02:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sat Oct 26 11:02:00 2002 Subject: copy extended memory. In-Reply-To: <20021026082507.V75579-100000@www.missl.cs.umd.edu> References: <20021026082507.V75579-100000@www.missl.cs.umd.edu> Message-ID: Adam Sulmicki writes: > hello, > can anyone point me to an documenation on bios's > interrupt 15, ah=87. It is 'copy extended memory'. > > I suspect the implementation I have is wrong, and > thus stops me from adding support for legacy > applications under LinuxBIOS. > > Going over phoenix manual and Ralf Browns's > interrupt list, I know that > > CX = counter > ES:SI = pointer to GDT > > what is not clear to me is what does determine source and destination > of the copy. Would it just copy between first and second segment > (if so why it is not documented). I have in my documentation the following addtional information. CX is a count of works (2 byte quantities) With the max being 0x8000 And the format of the GDT is: dummy GDT location source GDT entry target GDT entry BIOS CS BIOS SS This code works for a 286 so it has a 16MB limit. And segments are limted to 64K, if my memory serves me correctly. Eric From pyro at linuxlabs.com Sat Oct 26 11:44:00 2002 From: pyro at linuxlabs.com (steven james) Date: Sat Oct 26 11:44:00 2002 Subject: [COMMIT] upx E7500 etc In-Reply-To: Message-ID: Greetings, I just tried an update/build/test for Clearwater and all is well there (except that slow spot check I still can't explain). G'day, sjames On 25 Oct 2002, Eric W. Biederman wrote: > > I have committed so many files today I can barely track what I am > doing. The result is that all of my oustanding code has now been > pushed to the LinuxBIOS tree. So the supermicro/p4dpr and > supermicro/p4dpe should now be stable ports of linuxBIOS. I would say > so in the status file, but there isn't a single one in the whole tree. > > Things other people will notice. The upx compressor code was > integrated and is on by default. So you will get smaller linuxbios > rom images. I accomplished this by explicitly factoring linuxbios into > a C part that runs in ram and an assembly part that runs directly out > of flash. The seperation was there before but now it is explicit. > This greatly simplifies the linker scripts, so we are actually less > likely to run into LD bugs now than before. > > The config option is CONFIG_COMPRESS if you want to turn it off. > > Other things of note. cmos.conf was renamed cmos.layout to reduce > confusion. And a new checksum entry was added to the LinuxBIOS table > so external programs can find the checksum that protects the LinuxBIOS > options. > > My code has been synced with the changes Steve James made for the > Clearwater port. > > There are microcode updates in the tree, and some other cpu fixups > for the pentium 4. > > Have fun, and hopefully nothing broke except the p4dc6, as they way > it utilized the cache as ram trick depended on the muddy watters > between code that ran in rom and ram. The code is fixable, if I turn > off compression. It just requires a little magic to find the cache as > ram entry point... > > Eric > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From pyro at linuxlabs.com Sat Oct 26 11:56:01 2002 From: pyro at linuxlabs.com (steven james) Date: Sat Oct 26 11:56:01 2002 Subject: Building LinuxBIOS in Debian Potato Message-ID: Greetings, If anyone (besides me) is still using a Debian Potato based development machine, here's quick instructions to get things going: There are a few places that call for a newer version of binutils (at least to handle the use of the movnti instruction in PIV builds) Building Woody's binutils package from source will take care of it. If you prefer not to change everything, The minimum impact approach seems to be: 1.fetch binutils source package from Woody. 2.unpack and apply Debian patch 3. chmod +x debian/rules 4. cd build-tree/binutils-2.12.90.0.1 do configure and make in opcodes. do configure, make, and make install in libiberty and bfd do configure --enable-shared, make, make install in binutils, and gas All of that will go into /usr/local cd /usr/bin mv as as.old (just in case) ln -s /usr/local/bin/as as LinuxBIOS will now build successfully. G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From ebiederman at lnxi.com Sat Oct 26 12:49:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sat Oct 26 12:49:01 2002 Subject: [COMMIT] upx E7500 etc In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > I just tried an update/build/test for Clearwater and all is well there > (except that slow spot check I still can't explain). A couple of thoughts - What is your memory configuration? - Is ECC SDRAM being scrubbed? - Have you run memtest86? - Have you tried other ram? - Are you certain there is not a mux on the i2c channel to memory? Enough checks are present so you should not see a problem but... - Does it only go fast for me because I am caching the ROM chip someplace? And you do not have that code? Eric From pyro at linuxlabs.com Sat Oct 26 13:48:00 2002 From: pyro at linuxlabs.com (steven james) Date: Sat Oct 26 13:48:00 2002 Subject: [COMMIT] upx E7500 etc In-Reply-To: Message-ID: Greetings, Thanks! I had early_mtrr turned off at one point, and never re-included it. The spot check flies right through now. G'day, sjames On 26 Oct 2002, Eric W. Biederman wrote: > steven james writes: > > > Greetings, > > > > I just tried an update/build/test for Clearwater and all is well there > > (except that slow spot check I still can't explain). > > A couple of thoughts > - What is your memory configuration? > - Is ECC SDRAM being scrubbed? > - Have you run memtest86? > - Have you tried other ram? > - Are you certain there is not a mux on the i2c channel to memory? > Enough checks are present so you should not see a problem but... > - Does it only go fast for me because I am caching the ROM chip > someplace? And you do not have that code? > > Eric > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Sat Oct 26 15:12:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 26 15:12:00 2002 Subject: COMMIT: intel/Clearwater In-Reply-To: Message-ID: On 25 Oct 2002, Eric W. Biederman wrote: > And just to give you a hard time, I have already committed an update > to src/northbridge/intel/E7500/raminit.inc This is the kind of "hard time" we can deal with :-) ron From rminnich at lanl.gov Sat Oct 26 15:18:59 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 26 15:18:59 2002 Subject: [COMMIT] upx E7500 etc In-Reply-To: Message-ID: On 25 Oct 2002, Eric W. Biederman wrote: > I have committed so many files today I can barely track what I am > doing. The result is that all of my oustanding code has now been > pushed to the LinuxBIOS tree. So the supermicro/p4dpr and > supermicro/p4dpe should now be stable ports of linuxBIOS. I would say > so in the status file, but there isn't a single one in the whole tree. I hope to get that in this week, sorry. Eric I assume you have my mptable in for the p4dpe? Has to be different from the p4dpr. many thanks for this, this is terrific news. ron From bmacy at macykids.net Sat Oct 26 16:56:00 2002 From: bmacy at macykids.net (Brian Macy) Date: Sat Oct 26 16:56:00 2002 Subject: PPC support goals? Message-ID: <3DBB05EF.8000606@macykids.net> I have a couple of old world MAC clones I've been planning to sell on eBay... mostly because they are too much of a pain to boot Linux with their old OpenPROMs. Is the goal for the PPC support solely for new world MACs? Brian Macy From ebiederman at lnxi.com Sat Oct 26 17:02:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sat Oct 26 17:02:00 2002 Subject: [COMMIT] upx E7500 etc In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On 25 Oct 2002, Eric W. Biederman wrote: > > > I have committed so many files today I can barely track what I am > > doing. The result is that all of my oustanding code has now been > > pushed to the LinuxBIOS tree. So the supermicro/p4dpr and > > supermicro/p4dpe should now be stable ports of linuxBIOS. I would say > > so in the status file, but there isn't a single one in the whole tree. > > I hope to get that in this week, sorry. > > Eric I assume you have my mptable in for the p4dpe? Has to be different > from the p4dpr. I have the mptable for the p4dpe I have hear, that is mcr, and that I know works. My memory is that it was substatially similiar to the p4dpr it just had more interrupts. If you have a different p4dpe we need to add another directory something like p4dpe-xyz (To match the motherboard) and add that to the tree. But I haven't a clue how stable that will be. When I did the initial port I thought there was only one p4dpe variant. Eric From rminnich at lanl.gov Sat Oct 26 21:33:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 26 21:33:00 2002 Subject: PPC support goals? In-Reply-To: <3DBB05EF.8000606@macykids.net> Message-ID: On Sat, 26 Oct 2002, Brian Macy wrote: > I have a couple of old world MAC clones I've been planning to sell on > eBay... mostly because they are too much of a pain to boot Linux with > their old OpenPROMs. Is the goal for the PPC support solely for new > world MACs? no, the PPC support goal is for any PPC system. ron From rminnich at lanl.gov Sat Oct 26 21:39:08 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 26 21:39:08 2002 Subject: STATUS files added Message-ID: Those of you who own a mainboard, put your name in and set in the details, and either commit or send me the corrected file. I'll try to work up the little script to create a status page next week. thanks ron From rminnich at lanl.gov Sat Oct 26 21:45:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sat Oct 26 21:45:00 2002 Subject: [COMMIT] upx E7500 etc In-Reply-To: Message-ID: On 26 Oct 2002, Eric W. Biederman wrote: > I have the mptable for the p4dpe I have hear, that is mcr, and that I > know works. My memory is that it was substatially similiar to the p4dpr > it just had more interrupts. OK I will compare and see. I'll just build for dpe and see what happens. ron From stuge-linuxbios at cdy.org Sun Oct 27 19:47:01 2002 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Sun Oct 27 19:47:01 2002 Subject: copy extended memory. In-Reply-To: <20021026082507.V75579-100000@www.missl.cs.umd.edu>; from adam@cfar.umd.edu on Sat, Oct 26, 2002 at 08:32:48AM -0400 References: <20021026082507.V75579-100000@www.missl.cs.umd.edu> Message-ID: <20021028005245.A10831@foo.birdnet.se> On Sat, Oct 26, 2002 at 08:32:48AM -0400, Adam Sulmicki wrote: > > hello, > can anyone point me to an documenation on bios's > interrupt 15, ah=87. It is 'copy extended memory'. This is such a bitch. I simply could not get this to work and I didn't have proper tools to debug what was going on. Here's what RB says anyway: --------B-1587------------------------------- INT 15 - SYSTEM - COPY EXTENDED MEMORY AH = 87h CX = number of words to copy (max 8000h) ES:SI -> global descriptor table (see #0393) Return: CF set on error CF clear if successful AH = status (see #0392) Notes: copy is done in protected mode with interrupts disabled by the default BIOS handler; many 386 memory managers perform the copy with interrupts enabled this function is incompatible with the OS/2 compatibility box SeeAlso: AH=88h,AH=89h,INT 1F/AH=90h (Table 0392) Values for extended-memory copy status: 00h source copied into destination 01h parity error 02h interrupt error 03h address line 20 gating failed 80h invalid command (PC,PCjr) 86h unsupported function (XT,PS30) Format of global descriptor table: Offset Size Description (Table 0393) 00h 16 BYTEs zeros (used by BIOS) 10h WORD source segment length in bytes (2*CX-1 or greater) 12h 3 BYTEs 24-bit linear source address, low byte first 15h BYTE source segment access rights (93h) 16h WORD zero 18h WORD destination segment length in bytes (2*CX-1 or greater) 1Ah 3 BYTEs 24-bit linear destination address, low byte first 1Dh BYTE destination segment access rights (93h) 1Eh 18 BYTEs zeros (used by BIOS) It should all be pretty straight forward. The 16 bytes at 00h and the 18 bytes at 1Eh are probably best used by BIOS to set up it's own segments for usage during the copy. And don't forget the 32-bit opcodes when in pmode. //Peter From adam at cfar.umd.edu Sun Oct 27 19:55:02 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Sun Oct 27 19:55:02 2002 Subject: copy extended memory. In-Reply-To: <20021028005245.A10831@foo.birdnet.se> Message-ID: <20021027190140.F77980-100000@www.missl.cs.umd.edu> > This is such a bitch. yeah. > I simply could not get this to work you can find nice example how to use it in linux sources (some file in linux/arch/i386/boot, head.S IIRC) > Here's what RB says anyway: > > [snip] > > It should all be pretty straight forward. The 16 bytes at 00h and the 18 > bytes at 1Eh are probably best used by BIOS to set up it's own segments for > usage during the copy. yeah, but I hoped for more authoritative answer than DB. For example the description in Phoenix's user manual is just plain wrong :/ It will describe an single GDT entry, but it will not say how many entries and what is meaning of each entry. http://www.phoenix.com/resources/userman.pdf > And don't forget the 32-bit opcodes when in pmode. Isn't that dependent on D/B flag in appropriate GDT entry? So if I set 16 b it D/B flag in the CS entry, I still should be able to use 16 bit code, even if in 32 bit mode. -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From adam at cfar.umd.edu Sun Oct 27 20:01:00 2002 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Sun Oct 27 20:01:00 2002 Subject: copy extended memory. In-Reply-To: Message-ID: <20021026223056.E77121-100000@www.missl.cs.umd.edu> FWIW, here's summary what I was able to gather so far > And the format of the GDT is: > dummy > GDT location > source GDT entry > target GDT entry > BIOS CS > BIOS SS ok, I think I got it nailed down, how about the way it is below? I'm not quite sure of your interpretation of #2 (GDT location), can you elaborate? Ie what would it be used for by BIOS. It seems to me like I already get this info from ES:SI. CX = counter of 2-byte words ES:SI = pointer to to a structure of size of 0x30 which contains 6 GDT entries. 1 0x00 Reserved GDT (all 0's) 2 0x08 FS & GS GDT 3 0x10 DS (src) GDT 4 0x18 ES (dst) GDT 5 0x20 CS (bios) GDT 6 0x28 SS (bios) GDT of all those caller of the interrupt is required to only fill out #3 and #4 and leave all other blank. Because we are not passed indirect link with (size of GDT,ptr to GDT) we can't use it directly in our LGDT call (after filling out missing info). We have to either copy it over or add another level of indirection. -- Adam http://www.eax.com The Supreme Headquarters of the 32 bit registers From rminnich at lanl.gov Sun Oct 27 23:49:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Sun Oct 27 23:49:00 2002 Subject: Forwarded mail.... Message-ID: This person is not on the list but if anyone can help him that would be nice. ron ---------- Forwarded message ---------- Date: Mon, 28 Oct 2002 10:04:39 +0800 From: xu xuning To: rminnich at acl.lanl.gov Mr.Rom Minnich: hello,I have sereval question : 1: I used the kernel CWLINUX_4 (from www.cwlinux.com) and their pre-made doc images to do LinuxBIOS project , all things seems good at first ,but when i halt and reboot again ,it can't enter into the mini-system,the last screen is : C W L I N U X (a picture) mount root filesystem Obviously,i have probed doc (the adress is 0xc8000) and built /dev/mtd* and /dev/nftla* partition, So i want to know the reason . BTW: I run : $ mount -o loop /dev/nftla1 /home/myfile I found the system is there,i can edit many .conf files freely ,and i success to burn IPL and LinuxBIOS kernel,but i can't enter into system too! 2: Last I used kernel CWLINUX_3 (form http://www.cwlinux.com) by the mannual,but also failed ,the last screen is : D e b i a n mount root filesystem I think it must the same reason as 1:,so can you tell me how to do next step? my machine is: Winfast6300 MA Pro Red Hat Linux7.2 (kernel 2.4.7-10) DOC( MD2800-D08) Thanks and best wishes! XuNing _________________________________________________________________ ???????????????????????????? MSN Messenger: http://messenger.msn.com/lccn/ From xuning1979 at hotmail.com Mon Oct 28 02:13:01 2002 From: xuning1979 at hotmail.com (xu xuning) Date: Mon Oct 28 02:13:01 2002 Subject: SOS Message-ID: hello,I have sereval question : 1: I used the kernel CWLINUX_4 (from www.cwlinux.com) and their pre-made doc images to do LinuxBIOS project , all things seems good at first ,but when i halt and reboot again ,it can't enter into the mini-system,the last screen is : C W L I N U X (a picture) mount root filesystem Obviously,i have probed doc (the adress is 0xc8000) and built /dev/mtd* and /dev/nftla* partition, So i want to know the reason . BTW: I run : $ mount -o loop /dev/nftla1 /home/myfile I found the system is there,i can edit many .conf files freely ,and i success to burn IPL and LinuxBIOS kernel,but i can't enter into system too! 2: Last I used kernel CWLINUX_3 (form http://www.cwlinux.com) by the mannual,but also failed ,the last screen is : D e b i a n mount root filesystem I think it must the same reason as 1:,so can you tell me how to do next step? my machine is: Winfast6300 MA Pro Red Hat Linux7.2 (kernel 2.4.7-10) DOC( MD2800-D08) Thanks and best wishes! XuNing My Email: xuning1979 at hotmail.com _________________________________________________________________ ???? MSN Explorer: http://explorer.msn.com/lccn/ From aip at cwlinux.com Mon Oct 28 02:27:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Mon Oct 28 02:27:01 2002 Subject: via information (PEL133 / CLE266) In-Reply-To: <00ae01c27b3e$ebd440e0$0401a8c0@minibm>; from linuxbios@hello.org on Thu, Oct 24, 2002 at 05:22:45PM +0800 References: <7BD8956C4C0394468AABA9BD2D52BF7E4570B4@exchtp05.taipei.via.com.tw> <00ae01c27b3e$ebd440e0$0401a8c0@minibm> Message-ID: <20021028143256.A17052@mail.cwlinux.com> CMZ, > Hi Oliver, nice to hear someone from VIA interesting on LinuxBios, Company that I work for has those files but due NDA I can't share with LinuxBios project, could be fantastic if all we can have those informations... > > Could be nice to have latest revision of those files: BIOS Porting Guide and DataSheet: > > C3 BIOS Porting Guide (It's availeble at web site already, but maybe something new?...) Where is it? -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From aip at cwlinux.com Mon Oct 28 03:41:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Mon Oct 28 03:41:01 2002 Subject: [COMMIT] epia, c_start.S Message-ID: <20021028154705.A18040@mail.cwlinux.com> src/arch/i386/lib/c_start.S - fixed problem where #if smp included extra lines. src/mainboard/via/epia/Config src/mainboard/via/epia/mainboard.c - epia can now boot from ide and see via-rhine, but still have problem with irq tables even irq_tables is being setup correctly. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From ollie at sis.com.tw Mon Oct 28 04:34:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Mon Oct 28 04:34:00 2002 Subject: How to set irq_tables.c if a pci-to-pci bridge needed In-Reply-To: <000a01c27e5b$c9942c50$dc01a8c0@notebook> References: <000a01c27e5b$c9942c50$dc01a8c0@notebook> Message-ID: <1035794274.1842.2.camel@ollie> On Mon, 2002-10-28 at 16:27, David Xiong wrote: > Hello, > The irq_tables.c dumped from normal BIOS only have information about the pci bus 0. > I have a multimedia card which has a pci-to-pci bridge on itself. There are 2 pci devices > on that card. So the two devices locate at bus 2. The slot_name is 02:04.0 and 02:05.0. > > This means I have to add two devices into the irq_tables.c. > I added two lines like this: > {0x2,0x20,{0x41,0xceb8},{0x42,0xceb8},{0x43,0xceb8},{0x44,0xceb8}},0,0}, > {0x2,0x28,{0x42,0xceb8},{0x43,0xceb8},{0x44,0xceb8},{0x41,0xceb8}},0,0}, > > Then I make linuxbios again , it seems everything is OK when I boot. The two devices are > assigned interrupt numbers successfully. But they can't work. > Did you recalculate the checksum ?? > The chipset is SiS630e and the mother board is elite p6vem3. I guess the problem is in the two lines added into irq_tables.c as above. > So I modify them to > {0x2,0x20,{0x44,0xceb8},{0x41,0xceb8},{0x42,0xceb8},{0x43,0xceb8}},0,0}, > {0x2,0x28,{0x41,0xceb8},{0x42,0xceb8},{0x43,0xceb8},{0x44,0xceb8}},0,0}, > but g the two devices still did not work. > Where did you get the idea to set the the table like this. Do you have any documentation about your bridge ?? How did you know if your bridge does not re-route IRQs in some other ways ?? Ollie From xw at chinahost.com Mon Oct 28 05:12:00 2002 From: xw at chinahost.com (David Xiong) Date: Mon Oct 28 05:12:00 2002 Subject: =?gb2312?B?tPC4tDogSG93IHRvIHNldCBpcnFfdGFibGVzLmMgaWYgYSBwY2ktdA==?= =?gb2312?B?by1wY2kgYnJpZGdlIG5lZWRlZA==?= In-Reply-To: <1035794274.1842.2.camel@ollie> Message-ID: <012a01c27e62$782b8cd0$dc01a8c0@notebook> >Did you recalculate the checksum ?? Yes, the checksum has been recalculated. >Where did you get the idea to set the the table like this? I do not know how the irqs routed. So I guess I can set the irq table. It is intresting that this way work on Elite K7SEM. So I take it for granted it will work on the new mother board. Am I wrong? Sorry for newbie questions like this. >Do you have any documentation about your bridge ?? How did you know if your bridge >does not re-route IRQs in some other ways ?? I do not have any documentation. Can you tell me where can I start? Thanks for your help. David Xiong -----????----- ???: ollie lho [mailto:ollie at sis.com.tw] ????: 2002?10?28? 16:38 ???: David Xiong ??: linuxbios at clustermatic.org ??: Re: How to set irq_tables.c if a pci-to-pci bridge needed On Mon, 2002-10-28 at 16:27, David Xiong wrote: > Hello, > The irq_tables.c dumped from normal BIOS only have information about the pci bus 0. > I have a multimedia card which has a pci-to-pci bridge on itself. There are 2 pci devices > on that card. So the two devices locate at bus 2. The slot_name is 02:04.0 and 02:05.0. > > This means I have to add two devices into the irq_tables.c. > I added two lines like this: > {0x2,0x20,{0x41,0xceb8},{0x42,0xceb8},{0x43,0xceb8},{0x44,0xceb8}},0,0}, > {0x2,0x28,{0x42,0xceb8},{0x43,0xceb8},{0x44,0xceb8},{0x41,0xceb8}},0,0}, > > Then I make linuxbios again , it seems everything is OK when I boot. The two devices are > assigned interrupt numbers successfully. But they can't work. > Did you recalculate the checksum ?? > The chipset is SiS630e and the mother board is elite p6vem3. I guess the problem is in the two lines added into irq_tables.c as above. > So I modify them to > {0x2,0x20,{0x44,0xceb8},{0x41,0xceb8},{0x42,0xceb8},{0x43,0xceb8}},0,0}, > {0x2,0x28,{0x41,0xceb8},{0x42,0xceb8},{0x43,0xceb8},{0x44,0xceb8}},0,0}, > but g the two devices still did not work. > Where did you get the idea to set the the table like this. Do you have any documentation about your bridge ?? How did you know if your bridge does not re-route IRQs in some other ways ?? Ollie From linuxbios at hello.org Mon Oct 28 05:20:01 2002 From: linuxbios at hello.org (CMZ) Date: Mon Oct 28 05:20:01 2002 Subject: via information (PEL133 / CLE266) References: <7BD8956C4C0394468AABA9BD2D52BF7E4570B4@exchtp05.taipei.via.com.tw> <00ae01c27b3e$ebd440e0$0401a8c0@minibm> <20021028143256.A17052@mail.cwlinux.com> Message-ID: <00f401c27e64$0e6f9be0$0401a8c0@minibm> on google, search for "VIA C3 datasheet PDF" : http://216.239.53.100/search?q=cache:cjUXYbexFz4C:www.via.com.tw/en/viac3/c3 .jsp+VIA+C3+Processor+Datasheets&hl=zh-TW&ie=UTF-8 Regards! CMZ ----- Original Message ----- From: "Andrew Ip" To: "CMZ" Cc: Sent: Monday, October 28, 2002 2:32 PM Subject: Re: via information (PEL133 / CLE266) From ollie at sis.com.tw Mon Oct 28 05:30:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Mon Oct 28 05:30:01 2002 Subject: =?UTF-8?Q?=E7=AD=94=E5=A4=8D=3A?= How to set irq_tables.c if a pci-to-pci bridge needed In-Reply-To: <012a01c27e62$782b8cd0$dc01a8c0@notebook> References: <012a01c27e62$782b8cd0$dc01a8c0@notebook> Message-ID: <1035797687.1522.9.camel@ollie> On Mon, 2002-10-28 at 17:14, David Xiong wrote: > >Did you recalculate the checksum ?? > Yes, the checksum has been recalculated. > > >Where did you get the idea to set the the table like this? > I do not know how the irqs routed. So I guess I can set the irq table. It is intresting that this way work on Elite K7SEM. > So I take it for granted it will work on the new mother board. Am I wrong? Sorry for newbie questions like this. > > >Do you have any documentation about your bridge ?? How did you know if your bridge > >does not re-route IRQs in some other ways ?? > I do not have any documentation. Can you tell me where can I start? > The way a PCI-PCI bridge should route the IRQs behind is defined in the PCI-PCI bridge spec. For you case, it IRQs are re-routed twice, one is by the bridge, the other is the southbridge IRQ router. Ollie From xw at chinahost.com Mon Oct 28 06:18:00 2002 From: xw at chinahost.com (David Xiong) Date: Mon Oct 28 06:18:00 2002 Subject: =?gb2312?B?16q3ojogtPC4tDogSG93IHRvIHNldCBpcnFfdGFibGVzLmMgaWYgYQ==?= =?gb2312?B?cGNpLXRvLXBjaSBicmlkZ2UgbmVlZGVk?= Message-ID: <013701c27e6b$c2ab1e70$dc01a8c0@notebook> When I boot Red Hat 7.2 with the normal BIOS of the Elite P6VEM3 mother board, the BIOS will set the irqs into the multimedia card and the card can work. I think the BIOS has no knowledge about the PCI-PCI bridge specs. When I boot from linuxbios, if I don't set the irq_tables.c , nobody will set the irqs into the multimedia card. I will get the message: No IRQ Known for interrupt pin A of device 02:04.0. Please try using pci=biosirq So I added that two lines into irq_tables.c blindly. And it works on Elite K7SEM. Now I want to use Elite P6VEM3, this time it does not work. The chipset of K7SEM is SiS730 and one of P6VEM3 is SiS630E. Is there some diffrent between the two southbridge of them? Will working on the irq_tables.c solve the problem or I am on the wrong way ? Can you tell me what shall I do? Thanks for your help. David Xiong -----????----- ???: ollie lho [mailto:ollie at sis.com.tw] ????: 2002?10?28? 17:35 ???: David Xiong ??: 'David Xiong'; linuxbios at clustermatic.org ??: Re: ??: How to set irq_tables.c if apci-to-pci bridge needed On Mon, 2002-10-28 at 17:14, David Xiong wrote: > >Did you recalculate the checksum ?? > Yes, the checksum has been recalculated. > > >Where did you get the idea to set the the table like this? > I do not know how the irqs routed. So I guess I can set the irq table. It is intresting that this way work on Elite K7SEM. > So I take it for granted it will work on the new mother board. Am I wrong? Sorry for newbie questions like this. > > >Do you have any documentation about your bridge ?? How did you know if your bridge > >does not re-route IRQs in some other ways ?? > I do not have any documentation. Can you tell me where can I start? > The way a PCI-PCI bridge should route the IRQs behind is defined in the PCI-PCI bridge spec. For you case, it IRQs are re-routed twice, one is by the bridge, the other is the southbridge IRQ router. Ollie From aip at cwlinux.com Mon Oct 28 10:00:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Mon Oct 28 10:00:01 2002 Subject: [COMMIT] vt8231 southbridge.c Message-ID: <20021028220631.A22549@mail.cwlinux.com> freebios/src/southbridge/via/vt8231/southbridge.c - updated to use pci_find_device -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From agnew at cs.umd.edu Mon Oct 28 10:15:00 2002 From: agnew at cs.umd.edu (Adam Agnew) Date: Mon Oct 28 10:15:00 2002 Subject: (no subject) Message-ID: <20021028092410.Y81247-100000@www.missl.cs.umd.edu> This is mostly for Adam Sulmicki for the benefit of our current project, but it's been about a year since it was mentioned last so I felt it wouldn't help to reiterate (i know i forgot) that there exists another open source bios, tinyBIOS http://www.pcengines.com/tinybios.htm and since his zip file is difficult to uncompress due to patents or some such non-sense, i repackaged it at http://www.missl.cs.umd.edu/~agnew/anopenbios.zip - Adam Agnew From agnew at cs.umd.edu Mon Oct 28 10:32:00 2002 From: agnew at cs.umd.edu (Adam Agnew) Date: Mon Oct 28 10:32:00 2002 Subject: (no subject) In-Reply-To: <20021028152816.A24646@suse.de> Message-ID: <20021028094248.U81340-100000@www.missl.cs.umd.edu> On Mon, 28 Oct 2002, Stefan Reinauer wrote: > > http://www.missl.cs.umd.edu/~agnew/anopenbios.zip > The requested URL /~agnew/anopenbios.zip was not found on this server. My mistake. Fixed. From hansolofalcon at worldnet.att.net Mon Oct 28 11:02:00 2002 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Mon Oct 28 11:02:00 2002 Subject: (no subject) In-Reply-To: <20021028092410.Y81247-100000@www.missl.cs.umd.edu> Message-ID: <000901c27e94$0463bca0$b15e580c@who> Hello from Gregg C Levine Adam, please define that none-sense for me. I have most of the things here, from that guy's site. My only objections are for the assembler he chose. I felt he should have used the assembler that's at the core of the binary utilities of the GNU set of tools, instead of A86. Or even Turbo Assembler from Borland, at least they understand proper licensing. Oh, and thank you for repackaging the whole material in that form. I didn't have any problems unzipping any of it here, just a darned nuisance to make it work here. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of Adam Agnew > Sent: Monday, October 28, 2002 9:27 AM > To: adam at cfar.umd.edu > Cc: linuxbios at clustermatic.org; rminnich at lanl.gov > Subject: (no subject) > > This is mostly for Adam Sulmicki for the benefit of our current project, > but it's been about a year since it was mentioned last so I felt it > wouldn't help to reiterate (i know i forgot) that there exists another > open source bios, tinyBIOS > > http://www.pcengines.com/tinybios.htm > > and since his zip file is difficult to uncompress due to patents or some > such non-sense, i repackaged it at > http://www.missl.cs.umd.edu/~agnew/anopenbios.zip > > - Adam Agnew > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From hansolofalcon at worldnet.att.net Mon Oct 28 11:29:01 2002 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Mon Oct 28 11:29:01 2002 Subject: (no subject) In-Reply-To: <000901c27e94$0463bca0$b15e580c@who> Message-ID: <001601c27e97$b2e356c0$b15e580c@who> Hello again from Gregg C Levine Sorry, Adam, small typo in that statement. It should be "non-sense", not, "none-sense". Same for all of us. I just looked at his site, and it still says that other assemblers are not supported. I wonder what he means by that? ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of Gregg C Levine > Sent: Monday, October 28, 2002 10:10 AM > To: 'Adam Agnew' > Cc: Linuxbios > Subject: RE: (no subject) > > Hello from Gregg C Levine > Adam, please define that none-sense for me. I have most of the things > here, from that guy's site. My only objections are for the assembler he > chose. I felt he should have used the assembler that's at the core of > the binary utilities of the GNU set of tools, instead of A86. Or even > Turbo Assembler from Borland, at least they understand proper licensing. > Oh, and thank you for repackaging the whole material in that form. I > didn't have any problems unzipping any of it here, just a darned > nuisance to make it work here. > ------------------- > Gregg C Levine hansolofalcon at worldnet.att.net > ------------------------------------------------------------ > "The Force will be with you...Always." Obi-Wan Kenobi > "Use the Force, Luke."? Obi-Wan Kenobi > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > (This company dedicates this E-Mail to Master Yoda ) > > > > > -----Original Message----- > > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > > admin at clustermatic.org] On Behalf Of Adam Agnew > > Sent: Monday, October 28, 2002 9:27 AM > > To: adam at cfar.umd.edu > > Cc: linuxbios at clustermatic.org; rminnich at lanl.gov > > Subject: (no subject) > > > > This is mostly for Adam Sulmicki for the benefit of our current > project, > > but it's been about a year since it was mentioned last so I felt it > > wouldn't help to reiterate (i know i forgot) that there exists another > > open source bios, tinyBIOS > > > > http://www.pcengines.com/tinybios.htm > > > > and since his zip file is difficult to uncompress due to patents or > some > > such non-sense, i repackaged it at > > http://www.missl.cs.umd.edu/~agnew/anopenbios.zip > > > > - Adam Agnew > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From agnew at cs.umd.edu Mon Oct 28 11:32:01 2002 From: agnew at cs.umd.edu (Adam Agnew) Date: Mon Oct 28 11:32:01 2002 Subject: (no subject) In-Reply-To: <000901c27e94$0463bca0$b15e580c@who> Message-ID: <20021028103201.L81483-100000@www.missl.cs.umd.edu> This is pretty off topic, but... (this applies to the unzip that ships with most linux distributions) "Why does UnZip say "`shrink' method not supported"? The `shrink' compression method is encumbered by a patent. Although it appears that stand-alone unshrinking is not covered, the owner has claimed otherwise in public statements, and the matter has never been tested in court. (For what it's worth, the same algorithm is used in other utilities that have been included in every Linux and FreeBSD distribution that has ever shipped or been downloaded, and no one has ever complained about that. So the public statements may simply be the usual legal posturing. On the other hand, Info-ZIP has no particular desire to become the test case.) Thus, by default, unshrinking is not enabled in newer releases of Info-ZIP's distributed binaries. Those who wish to download older binaries or compile their own versions may still do so. See UnZip's COPYING and INSTALL files for more information. " So, yeah, I just repackaged it. Other non-sense you speak of. "Why do you use A386 rather than MASM/NASM/TASM ? Prior versions of tinyBIOS were based on an assembler I wrote in 1987. While ridiculously fast, it did have its limitations. A386 is the closest replacement I could find, easy to get through www.eji.com, and fairly priced at $90. Please, please do not attempt to use MASM, NASM or TASM. Your time is worth more than that." It is quite a pain to go and buy A386. But then, the man wrote it himself and its pretty hard to find a good open source bios, so I'm not going to complain. Luckily, the reason we're looking at it is really just to steal some interrupt implementations, not to try and use his bios in full. We're experiencing a bit of trouble with INT15 86 and 87 specifically, and every source helps. - Adam Agnew On Mon, 28 Oct 2002, Gregg C Levine wrote: > Hello from Gregg C Levine > Adam, please define that none-sense for me. I have most of the things > here, from that guy's site. My only objections are for the assembler he > chose. I felt he should have used the assembler that's at the core of > the binary utilities of the GNU set of tools, instead of A86. Or even > Turbo Assembler from Borland, at least they understand proper licensing. > Oh, and thank you for repackaging the whole material in that form. I > didn't have any problems unzipping any of it here, just a darned > nuisance to make it work here. > ------------------- > Gregg C Levine hansolofalcon at worldnet.att.net > ------------------------------------------------------------ > "The Force will be with you...Always." Obi-Wan Kenobi > "Use the Force, Luke."? Obi-Wan Kenobi > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > (This company dedicates this E-Mail to Master Yoda ) > > > > > -----Original Message----- > > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > > admin at clustermatic.org] On Behalf Of Adam Agnew > > Sent: Monday, October 28, 2002 9:27 AM > > To: adam at cfar.umd.edu > > Cc: linuxbios at clustermatic.org; rminnich at lanl.gov > > Subject: (no subject) > > > > This is mostly for Adam Sulmicki for the benefit of our current > project, > > but it's been about a year since it was mentioned last so I felt it > > wouldn't help to reiterate (i know i forgot) that there exists another > > open source bios, tinyBIOS > > > > http://www.pcengines.com/tinybios.htm > > > > and since his zip file is difficult to uncompress due to patents or > some > > such non-sense, i repackaged it at > > http://www.missl.cs.umd.edu/~agnew/anopenbios.zip > > > > - Adam Agnew > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From rminnich at lanl.gov Mon Oct 28 11:38:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 28 11:38:00 2002 Subject: [Etherboot-developers] booting ide flash from latest etherboot (CVS) In-Reply-To: Message-ID: On 24 Oct 2002, Eric W. Biederman wrote: > make ide_disk.elf > Or in the normal case of wanting the nic driver as well. > make eepro100--ide_disk.nrv2belf (nrv2b is the upx compression algorithm) no target like that exists in the latest cvs for the 5.1 tree. Also, it seems to me that if I set up BOOT_xyz to be BOOT_DISK, that stuff should get turned on, so that the Principle of Least Surprise is honored. ron ron From hansolofalcon at worldnet.att.net Mon Oct 28 11:39:00 2002 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Mon Oct 28 11:39:00 2002 Subject: (no subject) In-Reply-To: <20021028103201.L81483-100000@www.missl.cs.umd.edu> Message-ID: <001701c27e99$15fea060$b15e580c@who> Hello again from Gregg C Levine Point taken. I did go over his website the first time I heard about his product. And that point you found was found, but I completely forgot it, until now. That sticky issue that Info-Zip is grouching about sounds about right. However, the folks at WinZip Computing, Inc, as they are calling themselves must have struck some kind of bargain with the actual patent holder. But how did Info-Zip accomplish everything else? Say Adam? Which e-mail did you catch? The first? Or second, with my corrections? ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) > -----Original Message----- > From: Adam Agnew [mailto:agnew at cs.umd.edu] > Sent: Monday, October 28, 2002 10:44 AM > To: Gregg C Levine > Cc: Linuxbios > Subject: RE: (no subject) > > > This is pretty off topic, but... > > > (this applies to the unzip that ships with most linux distributions) > > "Why does UnZip say "`shrink' method not supported"? > > The `shrink' compression method is encumbered by a patent. Although it > appears that stand-alone unshrinking is not covered, the owner has claimed > otherwise in public statements, and the matter has never been tested in > court. (For what it's worth, the same algorithm is used in other utilities > that have been included in every Linux and FreeBSD distribution that has > ever shipped or been downloaded, and no one has ever complained about > that. So the public statements may simply be the usual legal posturing. On > the other hand, Info-ZIP has no particular desire to become the test > case.) > > Thus, by default, unshrinking is not enabled in newer releases of > Info-ZIP's distributed binaries. Those who wish to download older binaries > or compile their own versions may still do so. See UnZip's COPYING and > INSTALL files for more information. " > > So, yeah, I just repackaged it. > > Other non-sense you speak of. > > > "Why do you use A386 rather than MASM/NASM/TASM ? > Prior versions of tinyBIOS were based on an assembler I wrote in 1987. > While ridiculously fast, it did have its limitations. A386 is the closest > replacement I could find, easy to get through www.eji.com, and fairly > priced at $90. Please, please do not attempt to use MASM, NASM or TASM. > Your time is worth more than that." > > It is quite a pain to go and buy A386. But then, the man wrote it himself > and its pretty hard to find a good open source bios, so I'm not going to > complain. Luckily, the reason we're looking at it is really just to steal > some interrupt implementations, not to try and use his bios in full. We're > experiencing a bit of trouble with INT15 86 and 87 specifically, and > every source helps. > > - Adam Agnew > > On Mon, 28 Oct 2002, Gregg C Levine wrote: > > > Hello from Gregg C Levine > > Adam, please define that none-sense for me. I have most of the things > > here, from that guy's site. My only objections are for the assembler he > > chose. I felt he should have used the assembler that's at the core of > > the binary utilities of the GNU set of tools, instead of A86. Or even > > Turbo Assembler from Borland, at least they understand proper licensing. > > Oh, and thank you for repackaging the whole material in that form. I > > didn't have any problems unzipping any of it here, just a darned > > nuisance to make it work here. > > ------------------- > > Gregg C Levine hansolofalcon at worldnet.att.net > > ------------------------------------------------------------ > > "The Force will be with you...Always." Obi-Wan Kenobi > > "Use the Force, Luke."? Obi-Wan Kenobi > > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > > (This company dedicates this E-Mail to Master Yoda ) > > > > > > > > > -----Original Message----- > > > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > > > admin at clustermatic.org] On Behalf Of Adam Agnew > > > Sent: Monday, October 28, 2002 9:27 AM > > > To: adam at cfar.umd.edu > > > Cc: linuxbios at clustermatic.org; rminnich at lanl.gov > > > Subject: (no subject) > > > > > > This is mostly for Adam Sulmicki for the benefit of our current > > project, > > > but it's been about a year since it was mentioned last so I felt it > > > wouldn't help to reiterate (i know i forgot) that there exists another > > > open source bios, tinyBIOS > > > > > > http://www.pcengines.com/tinybios.htm > > > > > > and since his zip file is difficult to uncompress due to patents or > > some > > > such non-sense, i repackaged it at > > > http://www.missl.cs.umd.edu/~agnew/anopenbios.zip > > > > > > - Adam Agnew > > > > > > _______________________________________________ > > > Linuxbios mailing list > > > Linuxbios at clustermatic.org > > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > From ricardo_strauch at yahoo.com Mon Oct 28 11:49:00 2002 From: ricardo_strauch at yahoo.com (=?iso-8859-1?q?Ricardo=20Strauch?=) Date: Mon Oct 28 11:49:00 2002 Subject: LTSP + LinuxBios Message-ID: <20021028155508.33397.qmail@web40309.mail.yahoo.com> Hi: Someone has experience working with LTSP and Linuxbios? Ltsp (www.ltsp.org) is a powerfull Thin Client solution, were the server makes the hard work. LinuxBios looks like the perfetc tool to buil expensive cluster servers for LTSP solutions. Regards Ricardo Strauch --------------------------------- Do You Yahoo!? Todo lo que quieres saber de Estados Unidos, Am?rica Latina y el resto del Mundo. Vis?ta Yahoo! Noticias. -------------- next part -------------- An HTML attachment was scrubbed... URL: From aip at cwlinux.com Mon Oct 28 12:00:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Mon Oct 28 12:00:01 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021028155508.33397.qmail@web40309.mail.yahoo.com>; from ricardo_strauch@yahoo.com on Mon, Oct 28, 2002 at 09:55:08AM -0600 References: <20021028155508.33397.qmail@web40309.mail.yahoo.com> Message-ID: <20021029000637.A24298@mail.cwlinux.com> Ricardo, > Someone has experience working with LTSP and Linuxbios? > Ltsp (www.ltsp.org) is a powerfull Thin Client solution, were the server makes the hard work. > LinuxBios looks like the perfetc tool to buil expensive cluster servers for LTSP solutions. LinuxBIOS does work with LTSP. I have tested it with m758 and m810 boards. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From Antony at Soft-Solutions.co.uk Mon Oct 28 12:11:00 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Mon Oct 28 12:11:00 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021028155508.33397.qmail@web40309.mail.yahoo.com> References: <20021028155508.33397.qmail@web40309.mail.yahoo.com> Message-ID: <200210281617.g9SGHWe08887@vulcan.rissington.net> On Monday 28 October 2002 3:55 pm, Ricardo Strauch wrote: > Hi: > > Someone has experience working with LTSP and Linuxbios? > > Ltsp (www.ltsp.org) is a powerfull Thin Client solution, were the server > makes the hard work. > > LinuxBios looks like the perfetc tool to buil expensive cluster servers for > LTSP solutions. I think LinuxBios is probably the perfect tool for building inexpensive clients. Whether you can cluster the server end of LTSP I have no idea. Antony. -- This email was created using 100% recycled electrons. From rminnich at lanl.gov Mon Oct 28 12:13:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 28 12:13:01 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021029000637.A24298@mail.cwlinux.com> Message-ID: On Tue, 29 Oct 2002, Andrew Ip wrote: > LinuxBIOS does work with LTSP. I have tested it with m758 and m810 boards. what failed? I have been talking to the ltsp guys for a while about doing this; what's missing? ron From rminnich at lanl.gov Mon Oct 28 12:17:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 28 12:17:01 2002 Subject: P4DPR CONFIRMED Message-ID: I just built a working bios from the cvs tree for P4DPR! This is the normal, not the fallback. I might just take the final step ... once I resolve the etherboot problems. ron From aip at cwlinux.com Mon Oct 28 12:22:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Mon Oct 28 12:22:01 2002 Subject: LTSP + LinuxBios In-Reply-To: ; from rminnich@lanl.gov on Mon, Oct 28, 2002 at 09:20:00AM -0700 References: <20021029000637.A24298@mail.cwlinux.com> Message-ID: <20021029002847.A24590@mail.cwlinux.com> Ron, > > LinuxBIOS does work with LTSP. I have tested it with m758 and m810 boards. > what failed? I have been talking to the ltsp guys for a while about doing > this; what's missing? It works!!! -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From rminnich at lanl.gov Mon Oct 28 12:53:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 28 12:53:00 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021029002847.A24590@mail.cwlinux.com> Message-ID: On Tue, 29 Oct 2002, Andrew Ip wrote: > > > > LinuxBIOS does work with LTSP. I have tested it with m758 and m810 boards. Ron can'g read! So andrew I know you have lots of spare time but can you give me a hint of what you did for LTSP? etherboot? thanks ron From rminnich at lanl.gov Mon Oct 28 13:15:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 28 13:15:00 2002 Subject: P4DPR fully hosted now from the CVS tree Message-ID: This is great. Our little lnxi cluster is totally supported from CVS. Many thanks to Eric for the port, and to Steve James who shook out some final nits. Also, note that Steve James has integrated the Intel motherboard into LinuxBIOS as well. ron From randall at tdl.com Mon Oct 28 13:42:01 2002 From: randall at tdl.com (Randall Craig) Date: Mon Oct 28 13:42:01 2002 Subject: LTSP + LinuxBios In-Reply-To: <200210281617.g9SGHWe08887@vulcan.rissington.net>; from Antony@Soft-Solutions.co.uk on Mon, Oct 28, 2002 at 04:17:27PM +0000 References: <20021028155508.33397.qmail@web40309.mail.yahoo.com> <200210281617.g9SGHWe08887@vulcan.rissington.net> Message-ID: <20021028094845.B29558@tdl.com> I have been doing Ltsp for over 1 year in production. Using linuxbios on ltsp clients has many advantages, especially the quick boot time. There should be no problem using linuxbios for ltsp since all ltsp needs is etherboot. Clustering for the servers would also be favorable. The most efficient way of clustering the ltsp servers is to use the xdmcp chooser protocol. This allows the ltsp client user to choose which server he/she wants to use base on the server load or other criteria. If the load gets too high then linuxbios could quickly fireup another server. Sounds pretty cool, I have not done this. -- Randall * Antony Stone (Antony at Soft-Solutions.co.uk) [021028 08:24]: > On Monday 28 October 2002 3:55 pm, Ricardo Strauch wrote: > > > Hi: > > > > Someone has experience working with LTSP and Linuxbios? > > > > Ltsp (www.ltsp.org) is a powerfull Thin Client solution, were the server > > makes the hard work. > > > > LinuxBios looks like the perfetc tool to buil expensive cluster servers for > > LTSP solutions. > > I think LinuxBios is probably the perfect tool for building inexpensive > clients. > > Whether you can cluster the server end of LTSP I have no idea. > > Antony. > > -- > > This email was created using 100% recycled electrons. > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Mon Oct 28 14:26:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 28 14:26:01 2002 Subject: [Etherboot-developers] booting ide flash from latest etherboot (CVS) In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On 24 Oct 2002, Eric W. Biederman wrote: > > > make ide_disk.elf > > Or in the normal case of wanting the nic driver as well. > > make eepro100--ide_disk.nrv2belf (nrv2b is the upx compression algorithm) > > no target like that exists in the latest cvs for the 5.1 tree. Try it. It is there. > Also, it seems to me that if I set up BOOT_xyz to be BOOT_DISK, that stuff > should get turned on, so that the Principle of Least Surprise is honored. It is honoured you don't have the IDE driver compiled in. Eric From ebiederman at lnxi.com Mon Oct 28 15:32:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 28 15:32:00 2002 Subject: copy extended memory. In-Reply-To: <20021026223056.E77121-100000@www.missl.cs.umd.edu> References: <20021026223056.E77121-100000@www.missl.cs.umd.edu> Message-ID: Adam Sulmicki writes: > FWIW, here's summary what I was able to gather so far > > > And the format of the GDT is: > > dummy > > GDT location > > source GDT entry > > target GDT entry > > BIOS CS > > BIOS SS > > ok, I think I got it nailed down, how about the way it is below? > > I'm not quite sure of your interpretation of #2 (GDT location), can you > elaborate? Ie what would it be used for by BIOS. It seems to me like I > already get this info from ES:SI. > > CX = counter of 2-byte words > ES:SI = pointer to to a structure of size of 0x30 which > contains 6 GDT entries. > > 1 0x00 Reserved GDT (all 0's) > 2 0x08 FS & GS GDT (I think this is actually for the indirect link) > 3 0x10 DS (src) GDT > 4 0x18 ES (dst) GDT > 5 0x20 CS (bios) GDT > 6 0x28 SS (bios) GDT > > of all those caller of the interrupt is required to only fill out > #3 and #4 and leave all other blank. > > Because we are not passed indirect link with (size of GDT,ptr to GDT) we > can't use it directly in our LGDT call (after filling out missing info). > We have to either copy it over or add another level of indirection. I would put the indirect link in table entry 0x00. That way you can trivially call lgdt with the address of the gdt... Table entry 0x01 would do as well, and I think that is what my documentation was suggesting. Eric From rminnich at lanl.gov Mon Oct 28 16:04:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 28 16:04:00 2002 Subject: [Etherboot-developers] booting ide flash from latest etherboot (CVS) In-Reply-To: Message-ID: On 28 Oct 2002, Eric W. Biederman wrote: > > > make ide_disk.elf > > > Or in the normal case of wanting the nic driver as well. > > > make eepro100--ide_disk.nrv2belf (nrv2b is the upx compression algorithm) > > > > no target like that exists in the latest cvs for the 5.1 tree. > > Try it. It is there. [rminnich at brain src]$ pwd /home/rminnich/src/etherboot/etherboot-5.1/src [rminnich at brain src]$ make ide_disk.elf make: *** No rule to make target `ide_disk.elf'. Stop. [rminnich at brain src]$ make eepro100--ide_disk.nrv2belf make: *** No rule to make target `eepro100--ide_disk.nrv2belf'. Stop. [rminnich at brain src]$ ?? > > Also, it seems to me that if I set up BOOT_xyz to be BOOT_DISK, that stuff > > should get turned on, so that the Principle of Least Surprise is honored. > > It is honoured you don't have the IDE driver compiled in. I'll look at how to do this, but IMHO if you set BOOT_DISK it should force the IDE driver to get compiled in. Is there a reason not to do this (i.e you're going to support all kinds of non-IDE disks). ron From ebiederman at lnxi.com Mon Oct 28 16:23:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Oct 28 16:23:00 2002 Subject: [Etherboot-developers] booting ide flash from latest etherboot (CVS) In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On 28 Oct 2002, Eric W. Biederman wrote: > > > > > make ide_disk.elf > > > > Or in the normal case of wanting the nic driver as well. > > > > make eepro100--ide_disk.nrv2belf (nrv2b is the upx compression algorithm) > > > > > > no target like that exists in the latest cvs for the 5.1 tree. > > > > Try it. It is there. > > [rminnich at brain src]$ pwd > /home/rminnich/src/etherboot/etherboot-5.1/src > [rminnich at brain src]$ make ide_disk.elf > make: *** No rule to make target `ide_disk.elf'. Stop. Hmm. Very strange. I just did a fresh check out and it worked without error. Oh, duh. The difference is: make bin32/ide_disk.elf ^^^^^^ > [rminnich at brain src]$ make eepro100--ide_disk.nrv2belf > make: *** No rule to make target `eepro100--ide_disk.nrv2belf'. Stop. > [rminnich at brain src]$ Do make bin32/eepro100--ide_disk.nrv2belf Should also work. > > > Also, it seems to me that if I set up BOOT_xyz to be BOOT_DISK, that stuff > > > should get turned on, so that the Principle of Least Surprise is honored. > > > > It is honoured you don't have the IDE driver compiled in. > > I'll look at how to do this, but IMHO if you set BOOT_DISK it should force > the IDE driver to get compiled in. Is there a reason not to do this (i.e > you're going to support all kinds of non-IDE disks). The BOOT_FIRST etc options just control the boot order. And yes the code structure is such that putting in a non-ide disk driver should be straight forward. I just have not done anything except the floppy driver yet. The driver structure for disks, and nics is the same there is just a different tag indicating which kind of device they are. There is a distinction made between floppies and ide disk in the boot order code simply because you normall want to distiguish between them. The code to boot from disk is the same in both cases. I do admit having a better way to specify drivers than: make bin32/driver1--driver2--driver3--driver4--driver5--driver6--driver7.elf make bin32/etherboot.elf would be nice, but no one has implemented anything better yet. Eric From rminnich at lanl.gov Mon Oct 28 16:34:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 28 16:34:01 2002 Subject: [Etherboot-developers] booting ide flash from latest etherboot (CVS) In-Reply-To: Message-ID: On 28 Oct 2002, Eric W. Biederman wrote: > Oh, duh. The difference is: > make bin32/ide_disk.elf Sorry! Should have tried that :-( thanks ron From ebiederm at xmission.com Mon Oct 28 17:22:00 2002 From: ebiederm at xmission.com (Eric W. Biederman) Date: Mon Oct 28 17:22:00 2002 Subject: boot the kernel 2.4.19 from linuxbios In-Reply-To: <002a01c278e7$5ef072b0$2800a8c0@MALXP> References: <002001c278a2$a6ae96d0$2800a8c0@MALXP> <002a01c278e7$5ef072b0$2800a8c0@MALXP> Message-ID: "Munjun Kang" writes: > Dear Eric W. Biederman. > > First of all, thanks for your reply. > I apply some other schem to linuxbios. > This is my boot process. An unreliable scheme, that does not provide the opportunity for running anything except the linux kernel. This is why I suggested a change. [snip current boot process] > Do you have any idea to solve this problem? Already provided but let me reiterate. Many times I have seen a problem like this it has been due to an improper memory controller setup, or a corrupted kernel image. At the very least those two problems should be ruled out before progressing farther. You have not provided the output of ksymoops from your kernel so I have no clue if the crash is related to a specific piece of hardware. memtest86 is good at catching most cases of memory corruption, so please run it and let me know what happens. mkelfImage puts a checksum on the image so there is some verification the image transfered across the network correctly. The latest versions of etherboot check the checksum. The version of etherboot in the linuxbios tree is actively dangerous as it does not call the network card disable routine, so you could receive packets after the kernel is loaded, but before the kernel has initialized the card. Causing your kernel image to be corrupted. And now that I think about it very weird problems may also be caused by only initializing one cpu in a dual cpu setup. So there may be something in the cpu setup that doesn't quite work. I don't know if anyone has worked with the via centaur cpus before. Let alone set them up in a dual cpu configuration. Or is this a single cpu in a dual cpu motherboard? Eric From Missudm at aol.com Mon Oct 28 17:22:11 2002 From: Missudm at aol.com (Missudm at aol.com) Date: Mon Oct 28 17:22:11 2002 Subject: asus p5a Message-ID: <14.873f1f.2ae5fd9e@aol.com> I got such a card , does LinuxBios work on it ? -------------- next part -------------- An HTML attachment was scrubbed... URL: From jean-francois.deprun at mdc.nec.fr Mon Oct 28 17:22:15 2002 From: jean-francois.deprun at mdc.nec.fr (Deprun, Jean-Francois) Date: Mon Oct 28 17:22:15 2002 Subject: a board with SA1110 Message-ID: Hi, After the lart project, I would like to know if some one has done a board with SA1110 and where I can found: 1) schematic, gerber, orcad files.... 2) Bios and Linux software 3) tools (compilator, linker, debugger)... 4) Application (do you know if there is a list of Lart/SA1110 applications ) 4) vendor board. Thank you for your help. When I will have answers I send you back. Jean-Francois From pyro at linuxlabs.com Mon Oct 28 18:24:00 2002 From: pyro at linuxlabs.com (steven james) Date: Mon Oct 28 18:24:00 2002 Subject: RFC (again) Message-ID: Greetings, I have built a firmware chooser as a standalone elf image. Currently, it only concerns itself with tagged ELF flash images, but there is no reason it can't be generalized. The idea is that multiple choices of payloads are pre-pended with a tag including a signature and an ascii description. The chooser finds the tagged payloads and presents a list of descriptions for the user to select from. Since I was doing that anyway, I put together a bare metal toolkit for building elf payloads for LinuxBIOS (and other). It is composed of many pieces of LinuxBIOS itself, bits of Etherboot, and a linker script. The question: Although mostly composed OF LinuxBIOS, and certainly meant for LinuxBIOS, it is standalone. Does any of this belong in the LinuxBIOS tree? (utils, contrib, other)? G'day, sjames -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From stuge-linuxbios at cdy.org Mon Oct 28 18:28:00 2002 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Mon Oct 28 18:28:00 2002 Subject: copy extended memory. In-Reply-To: <20021027190140.F77980-100000@www.missl.cs.umd.edu>; from adam@cfar.umd.edu on Sun, Oct 27, 2002 at 07:05:58PM -0500 References: <20021028005245.A10831@foo.birdnet.se> <20021027190140.F77980-100000@www.missl.cs.umd.edu> Message-ID: <20021028233352.E10831@foo.birdnet.se> On Sun, Oct 27, 2002 at 07:05:58PM -0500, Adam Sulmicki wrote: > you can find nice example how to use it in linux sources > (some file in linux/arch/i386/boot, head.S IIRC) Using it is the easy part, I had to implement it. Fortunately that project got dropped before I tore all my hair off. :) > For example the description in Phoenix's user manual is just plain wrong > :/ It will describe an single GDT entry, but it will not say how many > entries and what is meaning of each entry. > > http://www.phoenix.com/resources/userman.pdf Some resource, huh? Good thing we have RB. > > And don't forget the 32-bit opcodes when in pmode. > > Isn't that dependent on D/B flag in appropriate GDT entry? So if I set 16 > b it D/B flag in the CS entry, I still should be able to use 16 bit code, > even if in 32 bit mode. Yes! This is, of course, absolutely correct. I just wasn't familiar enough with the descriptor flags. Now I actually know enough to make my own DOS extender. :) (Well, probably not, but a little closer.) I haven't found a complete descriptor description so I'll post an attempt here. It's basically just different parts of 386intel.txt put together. (That file sure isn't very well structured. Much like the architecture itself I guess. :) DESC STRUC lim_0_15 DW 0 ; limit bits (0..15) bas_0_15 DW 0 ; base bits (0..15) bas_16_23 DB 0 ; base bits (16..23) access DB 0 ; access byte ; access := P DPL RES1 TYPE [A] ; P:1 Segment present (eg. for swapping to disk) ; DPL:2 Descriptor Privilege Level ; RES1:1 Means this is an application (as opposed to system) segment #if RES1.value ; TYPE:3 Indicates what kind of segment this is and the intended use ; A:1 Accessed bit, set by CPU when the segment is used #else ; TYPE:4 Indicates what kind of segment this is and the intended use #endif gran DB 0 ; granularity byte ; gran := G (B|D|X) O AVL lim_16_19 ; G:1 0=>byte granularity, 1=>page(4k) granularity #if RES1.value #if IS_DATA_SEGMENT ; B:1 Big segment (affects segment bounds) #else ; D:1 Default, determines default operand-size for code segments #endif /* IS_DATA_SEGMENT */ #else ; X:1 unknown, unused? #endif /* RES1.value */ ; O:1 unknown, used for protection? ; AVL:1 Available for use by systems programmers ; lim_16_19:4 limit bits (16..19) bas_24_31 DB 0 ; base bits (24..31) DESC ENDS //Peter From rminnich at lanl.gov Mon Oct 28 18:33:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Mon Oct 28 18:33:00 2002 Subject: RFC (again) In-Reply-To: Message-ID: On Mon, 28 Oct 2002, steven james wrote: > Does any of this belong in the LinuxBIOS tree? (utils, contrib, other)? it seems to me that you have built a useful utility, so if you want to name it, put a man page in there, and commit it, that would be fine by me. ron From hansolofalcon at worldnet.att.net Mon Oct 28 18:33:12 2002 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Mon Oct 28 18:33:12 2002 Subject: RFC (again) In-Reply-To: Message-ID: <004d01c27ed2$ffa91c20$b15e580c@who> Hello from Gregg C Levine Well, ah, I can't think of any. For my part, you've put in everything it needs, except the hardware itself. Right now that is. Later? I won't know until I try out Linux BIOS on an appropriate platform, and I'm still selecting one of those. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of steven james > Sent: Monday, October 28, 2002 3:30 PM > To: LinusBIOS mailing list > Subject: RFC (again) > > Greetings, > > I have built a firmware chooser as a standalone elf image. Currently, it > only concerns itself with tagged ELF flash images, but there is no reason > it can't be generalized. The idea is that multiple choices of payloads are > pre-pended with a tag including a signature and an ascii description. > > The chooser finds the tagged payloads and presents a list of > descriptions for the user to select from. > > Since I was doing that anyway, I put together a bare metal toolkit for > building elf payloads for LinuxBIOS (and other). It is composed of many > pieces of LinuxBIOS itself, bits of Etherboot, and a linker script. > > The question: Although mostly composed OF LinuxBIOS, and certainly meant > for LinuxBIOS, it is standalone. > > Does any of this belong in the LinuxBIOS tree? (utils, contrib, other)? > > G'day, > sjames > > -- > -------------------------steven james, director of research, linux labs > ... ........ ..... .... 230 peachtree st nw ste 701 > the original linux labs atlanta.ga.us 30303 > -since 1995 http://www.linuxlabs.com > office 404.577.7747 fax 404.577.7743 > ----------------------------------------------------------------------- > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From bari at onelabs.com Mon Oct 28 23:59:01 2002 From: bari at onelabs.com (Bari Ari) Date: Mon Oct 28 23:59:01 2002 Subject: Intel 845 Message-ID: <3DBE0900.3040605@onelabs.com> Has anyone started on LinuxBIOS support for any flavor of the Intel 845 chipsets? The 845E and the 845GV are my interests. Bari From aip at cwlinux.com Tue Oct 29 08:17:00 2002 From: aip at cwlinux.com (Andrew Ip) Date: Tue Oct 29 08:17:00 2002 Subject: LTSP + LinuxBios In-Reply-To: ; from rminnich@lanl.gov on Mon, Oct 28, 2002 at 09:59:10AM -0700 References: <20021029002847.A24590@mail.cwlinux.com> Message-ID: <20021029202341.B5389@mail.cwlinux.com> > So andrew I know you have lots of spare time but can you give me a hint of > what you did for LTSP? etherboot? I have got the some rom images in ftp://pub/downloads/linuxbios-sdk/images/romimages You also need an elf kernel with sis_lite fb driver patch and follows the ltsp installation guide. Then, you are pretty much set. With recent kernel, the video problem doesn't appear when running X. I think it is a very good news. If I have time, I'll post the my ltsp distro and kernel for people who are interested. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From Antony at Soft-Solutions.co.uk Tue Oct 29 09:03:01 2002 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Tue Oct 29 09:03:01 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021029202341.B5389@mail.cwlinux.com> References: <20021029002847.A24590@mail.cwlinux.com> <20021029202341.B5389@mail.cwlinux.com> Message-ID: <200210291309.g9TD9le10087@vulcan.rissington.net> On Tuesday 29 October 2002 12:23 pm, Andrew Ip wrote: > > So andrew I know you have lots of spare time but can you give me a hint > > of what you did for LTSP? etherboot? > > I have got the some rom images in > ftp://pub/downloads/linuxbios-sdk/images/romimages Which server is this on :-) ? Antony. -- There are two possible outcomes. If the result confirms the hypothesis, then you've made a measurement. If the result is contrary to the hypothesis, then you've made a discovery. - Enrico Fermi From aip at cwlinux.com Tue Oct 29 09:17:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Tue Oct 29 09:17:01 2002 Subject: LTSP + LinuxBios In-Reply-To: <200210291309.g9TD9le10087@vulcan.rissington.net>; from Antony@Soft-Solutions.co.uk on Tue, Oct 29, 2002 at 01:09:41PM +0000 References: <20021029002847.A24590@mail.cwlinux.com> <20021029202341.B5389@mail.cwlinux.com> <200210291309.g9TD9le10087@vulcan.rissington.net> Message-ID: <20021029212321.A6188@mail.cwlinux.com> > > I have got the some rom images in > > ftp://pub/downloads/linuxbios-sdk/images/romimages > Which server is this on :-) ? Oops. My brain and my fingers just had parity error. :) ftp://ftp.cwlinux.com/pub/downloads/linuxbios-sdk/images/romimages -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From ricardo_strauch at yahoo.com Tue Oct 29 11:06:01 2002 From: ricardo_strauch at yahoo.com (=?iso-8859-1?q?Ricardo=20Strauch?=) Date: Tue Oct 29 11:06:01 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021029202341.B5389@mail.cwlinux.com> Message-ID: <20021029151305.54718.qmail@web40308.mail.yahoo.com> Andrew: Thats a good news!!!!! I'm interesting to make probes of LTSP + Linux Bios working together, please let me know when your LTSP distro is available. Ricardo Strauch Andrew Ip wrote: > So andrew I know you have lots of spare time but can you give me a hint of > what you did for LTSP? etherboot? I have got the some rom images in ftp://pub/downloads/linuxbios-sdk/images/romimages You also need an elf kernel with sis_lite fb driver patch and follows the ltsp installation guide. Then, you are pretty much set. With recent kernel, the video problem doesn't appear when running X. I think it is a very good news. If I have time, I'll post the my ltsp distro and kernel for people who are interested. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. > ATTACHMENT part 2 application/pgp-signature --------------------------------- Do You Yahoo!? Todo lo que quieres saber de Estados Unidos, Am?rica Latina y el resto del Mundo. Vis?ta Yahoo! Noticias. -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Tue Oct 29 11:14:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 29 11:14:00 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021029151305.54718.qmail@web40308.mail.yahoo.com> Message-ID: If somebody has the time and could write a nice HOWTO I think the ltsp guys would be interested. I talk to them every once in a while and we all think LTSP+linuxbios is a good idea. ron From brugolsky at telemetry-investments.com Tue Oct 29 13:36:00 2002 From: brugolsky at telemetry-investments.com (Bill Rugolsky Jr.) Date: Tue Oct 29 13:36:00 2002 Subject: Flashing the Tyan S2642? Message-ID: <20021029124256.A29798@ti19> [ This is a resend; I inadvertently posted it the first time from a defunct e-mail acct. ] Last weekend I was looking at installing LinuxBIOS on my Tyan S2462, and got to the point of building the romimage, but couldn't figure out how to flash it. devbios (from CVS) reported (in /proc/bios) that it was an unsupported Macronix part, and flash_rom (from linuxbios CVS) didn't appear to recognize it either. Am I doing something really stupid or simply looking in the wrong place? Thanks, Bill Rugolsky From gnuorder at tampabay.rr.com Tue Oct 29 13:39:01 2002 From: gnuorder at tampabay.rr.com (GNUOrder) Date: Tue Oct 29 13:39:01 2002 Subject: root file system where In-Reply-To: <200210250921.g9P9L0e05554@vulcan.rissington.net> References: <200210250921.g9P9L0e05554@vulcan.rissington.net> Message-ID: <200210291745.g9THja1d000024@smtp-server4.tampabay.rr.com> On Friday 25 October 2002 05:20, Antony Stone wrote: > On Friday 25 October 2002 8:32 am, OliverArnold at via.com.tw wrote: > > Hello World, > > > > I try to set up a LinuxBIOS System. What i really can not understand is > > the following: When I Flash the root filesystem into the BIOS Flash rom, > > where do i tell the kernel to mount it? How does that work? > > If you mean you are putting a kernel into Disk On Chip, along with a root > filing system as well, then the answer is that the root fs should be on > /dev/nftla1 You can also mount a root image on ramdisk. You create a ramdisk on boot up and use loop devices to mount files there. There are many mini linux distros that do this from floppy, cdrom and cflash. GO > > If, on the other hand, you are actually only putting the kernel onto flash > (DoC or some other flash device) then your root fs will still be /dev/hda1 > or wherever you have all your system files (maybe somewhere across a > network...). > > Does this tell you what you need ? > > Antony. From kevinh at ispiri.com Tue Oct 29 13:41:00 2002 From: kevinh at ispiri.com (Kevin Hester) Date: Tue Oct 29 13:41:00 2002 Subject: Want these patches? In-Reply-To: <20021029212321.A6188@mail.cwlinux.com> References: <20021029002847.A24590@mail.cwlinux.com> <200210291309.g9TD9le10087@vulcan.rissington.net> <20021029212321.A6188@mail.cwlinux.com> Message-ID: Hi All, I recently played around with getting Linuxbios running on a VIA Eden/8601 northbridge/8231 southbridge. Linuxbios is damn cool! I'm happy to contribute the changes back to the project, who should I send the patches to? My changes: * Add instructions on building for a VIA mainboard * Make a new mainboard type for the Eden board * Fix a number of small mistakes in the vt8231 southbridge code * Fix the vt8601 raminit code to setup DRAM correctly. I presume this is a good thing? The existing comments implied it wasn't yet working. I've only fixed the non SMBus based version - i.e. this file has to be hand tuned for whatever RAM you are using. * Change the vt8231 setup to optionally enable the built in ethernet. The linux bios will now boot through to a shell prompt - IDE etc is happy. I haven't completed testing on Ethernet. Kevin From rminnich at lanl.gov Tue Oct 29 14:07:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 29 14:07:00 2002 Subject: Want these patches? In-Reply-To: Message-ID: Kevin, I think you may have fixed some of our problems with this board and chipset. We've had our troubles but if you're booting to IDE you have saved our neck. Can you pull down the latest cvs and then coordinate with Andrew Ip on your patches? This is really great news! ron From rminnich at lanl.gov Tue Oct 29 14:14:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 29 14:14:00 2002 Subject: Flashing the Tyan S2642? In-Reply-To: <20021029124256.A29798@ti19> Message-ID: On Tue, 29 Oct 2002, Bill Rugolsky Jr. wrote: > Last weekend I was looking at installing LinuxBIOS on my Tyan S2462, > and got to the point of building the romimage, but couldn't figure out how > to flash it. devbios (from CVS) reported (in /proc/bios) that it was an > unsupported Macronix part, and flash_rom (from linuxbios CVS) didn't > appear to recognize it either. you're going to love this. You have to use the setpci command to set the write enable for flash. Better than that, what you should do is figure out how to make MTD work on this board and then tell me what you did, as I can never get it to work. ron From kevinh at ispiri.com Tue Oct 29 14:36:01 2002 From: kevinh at ispiri.com (Kevin Hester) Date: Tue Oct 29 14:36:01 2002 Subject: More details on the Eden support Message-ID: In case ya'll are curious, here is a typical startup for the Eden/vt8601/vt8231. Debugging messages are a bit verbose, because I have POST codes redirected to the serial port. Yay! LinuxBIOS-1.0.0 Tue Oct 29 10:35:58 PST 2002 starting... <35><36>Copying LinuxBIOS to ram. <11><12>Jumping to LinuxBIOS. POST: 0x39 LinuxBIOS-1.0.0 Tue Oct 29 10:35:58 PST 2002 booting... POST: 0x40 Finding PCI configuration type. PCI: Using configuration type 1 POST: 0x5f Scanning PCI bus...PCI: pci_scan_bus for bus 0 POST: 0x24 PCI: 00:00.0 [1106/0601] PCI: 00:01.0 [1106/8601] PCI: 00:11.0 [1106/8231] PCI: 00:11.1 [1106/0571] PCI: 00:11.2 [1106/3038] PCI: 00:11.3 [1106/3038] PCI: 00:11.4 [1106/8235] PCI: 00:11.5 [1106/3058] PCI: 00:11.6 [1106/3068] PCI: 00:12.0 [1106/3065] PCI: 00:14.0 [1033/0035] PCI: 00:14.1 [1033/0035] PCI: 00:14.2 [1033/00e0] POST: 0x25 PCI: pci_scan_bus for bus 1 POST: 0x24 POST: 0x25 PCI: pci_scan_bus returning with max=01 POST: 0x55 PCI: pci_scan_bus returning with max=01 POST: 0x55 done POST: 0x66 Allocating PCI resources... PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 ???????io PCI: 00:01.0 24 <- [0xfeb00000 - 0xfeafffff] bus 1 ???????prefmem PCI: 00:01.0 20 <- [0xfeb00000 - 0xfeafffff] bus 1 ???????mem PCI: 00:11.1 10 <- [0x00001c50 - 0x00001c57] io PCI: 00:11.1 14 <- [0x00001c70 - 0x00001c73] io PCI: 00:11.1 18 <- [0x00001c60 - 0x00001c67] io PCI: 00:11.1 1c <- [0x00001c80 - 0x00001c83] io PCI: 00:11.1 20 <- [0x00001c40 - 0x00001c4f] io PCI: 00:11.2 20 <- [0x00001c00 - 0x00001c1f] io PCI: 00:11.3 20 <- [0x00001c20 - 0x00001c3f] io PCI: 00:11.5 10 <- [0x00001000 - 0x000010ff] io PCI: 00:11.5 14 <- [0x00001c90 - 0x00001c93] io PCI: 00:11.5 18 <- [0x00001ca0 - 0x00001ca3] io PCI: 00:11.6 10 <- [0x00001400 - 0x000014ff] io PCI: 00:12.0 10 <- [0x00001800 - 0x000018ff] io PCI: 00:12.0 14 <- [0xfeb02000 - 0xfeb020ff] mem PCI: 00:14.0 10 <- [0xfeb00000 - 0xfeb00fff] mem PCI: 00:14.1 10 <- [0xfeb01000 - 0xfeb01fff] mem PCI: 00:14.2 10 <- [0xfeb03000 - 0xfeb030ff] mem done. POST: 0x88 Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:11.0 cmd <- 87 PCI: 00:11.1 cmd <- 81 PCI: 00:11.2 cmd <- 01 PCI: 00:11.3 cmd <- 01 PCI: 00:11.4 cmd <- 00 PCI: 00:11.5 cmd <- 01 PCI: 00:11.6 cmd <- 01 PCI: 00:12.0 cmd <- 83 PCI: 00:14.0 cmd <- 02 PCI: 00:14.1 cmd <- 02 PCI: 00:14.2 cmd <- 02 done. Initializing PCI devices... PCI devices initialized POST: 0x89 sizeram: returning 0xfc00 KB sizeram: NOT returning 0xfc00 KB sizeram: there are still some SPD problems ... sizeram: SO we return only 0x10000 KB POST: 0x70 totalram: 64M Initializing CPU #0 POST: 0x60 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs POST: 0x6a done. Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x03 Feature flags : 0x00803035 POST: 0x92 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled POST: 0x93 Disabling local apic...done. POST: 0x9b CPU #0 Initialized POST: 0x75 POST: 0x77 IDE enable in reg. 50 is 0x7 set IDE reg. 50 to 0x7 IRQs in reg. 4c are 0x4 setting reg. 4c to 0x4 enables in reg 0x40 0x8 enables in reg 0x40 read back as 0xb enables in reg 0x9 0x8f enables in reg 0x9 read back as 0x8f command in reg 0x4 0x81 command in reg 0x4 reads back as 0x85 Mainboard fixup POST: 0x91 POST: 0x92 POST: 0x05 POST: 0x05 POST: 0x05 POST: 0x06 POST: 0x95 POST: 0xec POST: 0x9a Copying IRQ routing tables to 0xf0000...done. POST: 0x96 Wrote linuxbios table at: 00000500 - 00000670 checksum bcd2 Jumping to linuxbiosmain()... POST: 0xed Welcome to start32, the open sourced starter. This space will eventually hold more diagnostic information. January 2000, James Hendricks, Dale Webster, and Ron Minnich. Version 0.1 POST: 0xf1 37:init_bytes() - zkernel_start:0xfff80000 zkernel_mask:0x0000ffff Gunzip setup gunzip_setup output data is 0x00100000 Gunzipping boot code flush 0x00100000 count 0x00008000 flush 0x00108000 count 0x00008000 flush 0x00110000 count 0x00008000 flush 0x00118000 count 0x00008000 flush 0x00120000 count 0x00008000 flush 0x00128000 count 0x00008000 flush 0x00130000 count 0x00008000 flush 0x00138000 count 0x00008000 flush 0x00140000 count 0x00008000 flush 0x00148000 count 0x00008000 flush 0x00150000 count 0x00008000 flush 0x00158000 count 0x00008000 flush 0x00160000 count 0x00008000 flush 0x00168000 count 0x00008000 flush 0x00170000 count 0x00008000 flush 0x00178000 count 0x00008000 flush 0x00180000 count 0x00008000 flush 0x00188000 count 0x00008000 flush 0x00190000 count 0x00008000 flush 0x00198000 count 0x00008000 flush 0x001a0000 count 0x00008000 flush 0x001a8000 count 0x00008000 flush 0x001b0000 count 0x00008000 flush 0x001b8000 count 0x00008000 flush 0x001c0000 count 0x00005670 <973> POST: 0xf8 POST: 0xf9 POST: 0xfa command line - [root=/dev/hda1 single console=ttyS0,115200n8] Jumping to boot code POST: 0xfe Linux version 2.4.17 (kevinh at bumpy) (gcc version 2.95.4 20011002 (Debian prerelease)) #1 Tue Oct 29 10:15:10 PST 2002 BIOS-provided physical RAM map: BIOS-e801: 0000000000000000 - 000000000009f000 (usable) BIOS-e801: 0000000000100000 - 0000000003f00000 (usable) On node 0 totalpages: 16128 zone(0): 4096 pages. zone(1): 12032 pages. zone(2): 0 pages. Kernel command line: root=/dev/hda1 single console=ttyS0,115200n8 Initializing CPU#0 Detected 533.359 MHz processor. Calibrating delay loop... 1064.96 BogoMIPS Memory: 62104k/64512k available (530k kernel code, 2020k reserved, 167k data, 68k init, 0k highmem) Checking if this processor honours the WP bit even in supervisor mode... Ok. Dentry-cache hash table entries: 8192 (order: 4, 65536 bytes) Inode-cache hash table entries: 4096 (order: 3, 32768 bytes) Mount-cache hash table entries: 1024 (order: 1, 8192 bytes) Buffer-cache hash table entries: 1024 (order: 0, 4096 bytes) Page-cache hash table entries: 16384 (order: 4, 65536 bytes) CPU: L1 I Cache: 64K (32 bytes/line), D cache 64K (32 bytes/line) CPU: L2 Cache: 64K (32 bytes/line) CPU: Centaur VIA Samuel 2 stepping 03 Checking 'hlt' instruction... OK. Checking for popad bug... OK. POSIX conformance testing by UNIFIX PCI: Using configuration type 1 PCI: Probing PCI hardware Scanning bus 00 Found 00:00 [1106/0601] 000600 00 Found 00:08 [1106/8601] 000604 01 Found 00:88 [1106/8231] 000601 00 Found 00:89 [1106/0571] 000101 00 Found 00:8c [1106/8235] 000000 00 Found 00:8d [1106/3058] 000401 00 Found 00:8e [1106/3068] 000780 00 Found 00:90 [1106/3065] 000200 00 Found 00:a0 [1033/0035] 000c03 00 Found 00:a1 [1033/0035] 000c03 00 Found 00:a2 [1033/00e0] 000c03 00 Fixups for bus 00 Scanning behind PCI bridge 00:01.0, config 010100, pass 0 Scanning bus 01 Fixups for bus 01 Unknown bridge resource 0: assuming transparent Unknown bridge resource 1: assuming transparent Unknown bridge resource 2: assuming transparent Bus scan for 01 returning with max=01 Scanning behind PCI bridge 00:01.0, config 010100, pass 1 Bus scan for 00 returning with max=01 PCI: Using IRQ router default [1106/0601] at 00:00.0 isapnp: Scanning for PnP cards... isapnp: No Plug & Play device found Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Starting kswapd Journalled Block Device driver loaded Serial driver version 5.05c (2001-07-08) with MANY_PORTS SHARE_IRQ SERIAL_PCI ISAPNP enabled ttyS00 at 0x03f8 (irq = 4) is a 16550A block: 128 slots per queue, batch=32 Uniform Multi-Platform E-IDE driver Revision: 6.31 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx VP_IDE: IDE controller on PCI bus 00 dev 89 VP_IDE: chipset revision 6 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx VP_IDE: VIA vt8231 (rev 10) IDE UDMA100 controller on pci00:11.1 VP_IDE: 100% native mode on irq 14 VP_IDE: LINUXBIOS, so Jammed the enable on! ide0: BM-DMA at 0x0cc0-0x0cc7, BIOS settings: hda:pio, hdb:pio ide_init_via82cxxx: c01ae4d4 VP_IDE: LINUXBIOS, so Jammed the enable on! ide1: BM-DMA at 0x0cc8-0x0ccf, BIOS settings: hdc:pio, hdd:pio ide_init_via82cxxx: c01ae4d4 hda: C/H/S=0/0/0 from BIOS ignored jamming drive present for hda hda: WDC WD800BB-75CAA0, ATA DISK drive ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 hda: 156250000 sectors (80000 MB) w/2048KiB Cache, CHS=155009/16/63, UDMA(33) Partition check: hda: hda1 hda2 hda3 hda4 < hda5 hda6 > kjournald starting. Commit interval 5 seconds EXT3-fs: mounted filesystem with ordered data mode. VFS: Mounted root (ext3 filesystem) readonly. Freeing unused kernel memory: 68k freed INIT: version 2.84 booting mount: proc has wrong device number or fs type proc not supported Loading /etc/console/boottime.kmap.gz Couldnt get a file descriptor referring to the console mount: proc has wrong device number or fs type proc not supported Activating swap. Adding Swap: 980268k swap-space (priority -1) Checking root file system... fsck 1.27 (8-Mar-2002) /dev/hda1: clean, 21565/488640 files, 99406/976247 blocks EXT3 FS 2.4-0.9.16, 02 Dec 2001 on ide0(3,1), internal journal System time was Tue Oct 29 18:23:17 UTC 2002. Setting the System Clock using the Hardware Clock as reference... System Clock set. System local time is now Tue Oct 29 18:23:18 UTC 2002. Checking all file systems... fsck 1.27 (8-Mar-2002) /dev/hda2: clean, 21548/488640 files, 98781/976248 blocks /dev/hda3: clean, 2009/122624 files, 45566/245070 blocks /dev/hda6: clean, 2461/8552448 files, 406944/17088497 blocks Setting kernel variables. Loading the saved-state of the serial devices... /dev/ttyS0 at 0x03f8 (irq = 4) is a 16550A grep: /proc/filesystems: No such file or directory grep: /proc/mounts: No such file or directory grep: /proc/mounts: No such file or directory /etc/init.d/rcS: [: =: unary operator expected Mounting local filesystems... kjournald starting. Commit interval 5 seconds EXT3 FS 2.4-0.9.16, 02 Dec 2001 on ide0(3,2), internal journal EXT3-fs: mounted filesystem with ordered data mode. /dev/hda2 on /altroot type ext3 (rw) kjournald starting. Commit interval 5 seconds EXT3 FS 2.4-0.9.16, 02 Dec 2001 on ide0(3,3), internal journal EXT3-fs: mounted filesystem with ordered data mode. /dev/hda3 on /var type ext3 (rw) kjournald starting. Commit interval 5 seconds EXT3 FS 2.4-0.9.16, 02 Dec 2001 on ide0(3,6), internal journal EXT3-fs: mounted filesystem with ordered data mode. /dev/hda6 on /user type ext3 (rw) Starting hotplug subsystem: usb. Running 0dns-down to make sure resolv.conf is ok...done. Cleaning: /etc/network/ifstate. No usable address families found. socket: Address family not supported by protocol Setting up IP spoofing protection: FAILED Configuring network interfaces: No usable address families found. socket: Address family not supported by protocol done. grep: /proc/filesystems: No such file or directory Setting the System Clock using the Hardware Clock as reference... System Clock set. Local time: Tue Oct 29 18:23:25 UTC 2002 Recovering jove files ... Done. Running ntpdate to synchronize clock. Cleaning: /tmp /var/lock /var/run. Initializing random number generator... done. Recovering nvi editor sessions... done. Give root password for maintenance (or type Control-D for normal startup): hardlife:~# From belkajm at aardvark-ss.com Tue Oct 29 15:24:01 2002 From: belkajm at aardvark-ss.com (Jody Belka) Date: Tue Oct 29 15:24:01 2002 Subject: bios savior for via eden Message-ID: <200210292023.g9TKNWI11592@nwn.definitive.org> Hi, Does anyone know which model of the bios savior is needed for via eden motherboards? I would like to try out LinuxBIOS, but would like to have an easy way back if anything goes wrong. Jody From kevinh at ispiri.com Tue Oct 29 16:46:00 2002 From: kevinh at ispiri.com (Kevin Hester) Date: Tue Oct 29 16:46:00 2002 Subject: bios savior for via eden In-Reply-To: <200210292023.g9TKNWI11592@nwn.definitive.org> References: <200210292023.g9TKNWI11592@nwn.definitive.org> Message-ID: On my motherboard the stock BIOS was 256K. So I just used: dumpdevmem 0xfffc 0x40000 > stockbios Dumpdevmem was just some tool that came with linuxbios and did a mmap from /dev/mem. I was using a Grammar Engine ROM ICE for my development, so this was handy. I could easily go back and forth between the linuxbios and stock by changing the load I placed into the ICE. Kevin On Tuesday 29 October 2002 19:42, Jody Belka wrote: > Hi, > > Does anyone know which model of the bios savior is needed for via eden > motherboards? I would like to try out LinuxBIOS, but would like to have an > easy way back if anything goes wrong. > > Jody > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From randall at tdl.com Tue Oct 29 18:02:00 2002 From: randall at tdl.com (Randall Craig) Date: Tue Oct 29 18:02:00 2002 Subject: More details on the Eden support In-Reply-To: ; from kevinh@ispiri.com on Tue, Oct 29, 2002 at 11:42:05AM -0800 References: Message-ID: <20021029140854.A28303@tdl.com> Are you using a eeprom burner for the bios on the via? From ebiederman at lnxi.com Tue Oct 29 18:10:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Tue Oct 29 18:10:00 2002 Subject: Flashing the Tyan S2642? In-Reply-To: References: Message-ID: Ronald G Minnich writes: > On Tue, 29 Oct 2002, Bill Rugolsky Jr. wrote: > > > Last weekend I was looking at installing LinuxBIOS on my Tyan S2462, > > and got to the point of building the romimage, but couldn't figure out how > > to flash it. devbios (from CVS) reported (in /proc/bios) that it was an > > unsupported Macronix part, and flash_rom (from linuxbios CVS) didn't > > appear to recognize it either. > > you're going to love this. You have to use the setpci command to set the > write enable for flash. > > Better than that, what you should do is figure out how to make MTD work on > this board and then tell me what you did, as I can never get it to work. The drivers should appear to be in 2.4.19. So compile the mtdchar support, and the jedec_probe support, and the amd766rom support and it should work... Eric From kevinh at ispiri.com Tue Oct 29 18:22:00 2002 From: kevinh at ispiri.com (Kevin Hester) Date: Tue Oct 29 18:22:00 2002 Subject: More details on the Eden support In-Reply-To: <20021029140854.A28303@tdl.com> References: <20021029140854.A28303@tdl.com> Message-ID: I've used an ICE and also a burner to write the FLASH. I haven't yet tried to burn the flash "in system" from some linux app, but it should be pretty straightforard MTD futzing. (On Tuesday 29 October 2002 14:08, Randall Craig wrote: > Are you using a eeprom burner for the bios on the via? From kevinh at ispiri.com Tue Oct 29 18:27:01 2002 From: kevinh at ispiri.com (Kevin Hester) Date: Tue Oct 29 18:27:01 2002 Subject: More details on the Eden support References: <20021029140854.A28303@tdl.com> Message-ID: This is the ROMICE I used: http://www.romtools.com/romtools/p116045.html However it is pricy. The following smaller model would also work: http://www.romtools.com/romtools/p104045.html If you are not futzing with the internals of the BIOS a lot, then using a MTD driver and burning from a PC is fine. I only used the romICE because I had it laying around and it makes things very quick (i.e. when the build is done, the device downloads for two seconds and automatically hits reset on the board). Kevin On Tuesday 29 October 2002 15:27, Kevin Hester wrote: > I've used an ICE and also a burner to write the FLASH. I haven't yet tried > to burn the flash "in system" from some linux app, but it should be pretty > straightforard MTD futzing. > > (On Tuesday 29 October 2002 14:08, Randall Craig wrote: > > Are you using a eeprom burner for the bios on the via? From belkajm at aardvark-ss.com Tue Oct 29 18:54:01 2002 From: belkajm at aardvark-ss.com (belkajm) Date: Tue Oct 29 18:54:01 2002 Subject: bios size Message-ID: <200210292353.g9TNrqI12304@nwn.definitive.org> Hi, How big is the linuxbios? and how much space is available on the epia boards? if it's not enough, what is the cheapest chip that can be used? Jody From rminnich at lanl.gov Tue Oct 29 19:05:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 29 19:05:00 2002 Subject: bios size In-Reply-To: <200210292353.g9TNrqI12304@nwn.definitive.org> Message-ID: On Wed, 30 Oct 2002, belkajm wrote: > How big is the linuxbios? and how much space is available on the epia > boards? if it's not enough, what is the cheapest chip that can be used? linuxbios is something like 32-47K, depending on options. The part on the epia is quite large enough. ron From bob at drzyzgula.org Tue Oct 29 19:33:00 2002 From: bob at drzyzgula.org (Bob Drzyzgula) Date: Tue Oct 29 19:33:00 2002 Subject: [COMMIT] upx E7500 etc In-Reply-To: References: Message-ID: <20021029184003.C8014@www2> Has anyone tackled the Westville (SE7500WV2)? Is there likely to be much difference between that and the Clearwater? I'm considering using some of these boards. Thanks, --Bob On Sat, Oct 26, 2002 at 10:02:55AM -0400, steven james wrote: > > Greetings, > > I just tried an update/build/test for Clearwater and all is well there > (except that slow spot check I still can't explain). > > G'day, > sjames From agnew at cs.umd.edu Tue Oct 29 19:35:00 2002 From: agnew at cs.umd.edu (Adam Agnew) Date: Tue Oct 29 19:35:00 2002 Subject: Shadow ROM memory PROBLEM Message-ID: <20021029184737.M85892-100000@www.missl.cs.umd.edu> Hello. In our PCBIOS efforts, we're running into a snag. We're experience corruption of our shadow memory region, even after we've set it to read only (using the sis630). mov eax, #0x80000070 mov dx, #0x0cf8 out dx, eax mov eax, #0x0000FFFF mov dx, #0x0cfc out dx, eax we're not doing any pci writes at this point (once we've set it to read only), so does anyone else have any theories on what could cause this? Here's an example of the insanity going on: Here, the bios has finished and we're ready to run lilo. The shadow memory is correct: 000F3189L 260F015408 LGDT fword ptr ES:[SI]+08 000F318EL 2E0F011E69F8 LIDT fword ptr CS:[f869] 000F3194L B002 MOV AL,02 000F3196L E680 OUT 80,AL Then, we run lilo and we load an unmodified linux kernel. After a random amount of calls to int13 and int15 to copy the kernel into memory (sometimes it just takes 20 or so, sometimes 58, and sometimes it doesn't happen at all) the shadow memory gets corrupted. and we get stuff like this: 000F3199L 260F01B002E6 LMSW word ptr ES:[BX+SI]+e602 000F319FL 80011E ADD byte ptr [BX+DI],1e 000F31A2L 69F883C8 IMUL DI,AX,c883 As you see, its all scrambled. The op codes get into a weird order. I'll try to illustrate with this mapping.. 260F015408 2E0F011E69F8 B002 E680 1111111111 222222222222 3333 4444 260F01B002E6 80011E 69F883C8 111111333344 442222 2222 and the addresses in general are all shifted down. Any ideas, suggestions, insights? - Adam Agnew From ollie at sis.com.tw Tue Oct 29 20:29:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Tue Oct 29 20:29:00 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021029202341.B5389@mail.cwlinux.com> References: <20021029002847.A24590@mail.cwlinux.com> <20021029202341.B5389@mail.cwlinux.com> Message-ID: <1035938045.11052.0.camel@ollie> On Tue, 2002-10-29 at 20:23, Andrew Ip wrote: > > > So andrew I know you have lots of spare time but can you give me a hint of > > what you did for LTSP? etherboot? > I have got the some rom images in > ftp://pub/downloads/linuxbios-sdk/images/romimages > You also need an elf kernel with sis_lite fb driver patch and follows the ltsp > installation guide. Then, you are pretty much set. With recent kernel, the > video problem doesn't appear when running X. I think it is a very good news. What kind of video problem ?? Ollie From drwho8 at worldnet.att.net Tue Oct 29 20:40:01 2002 From: drwho8 at worldnet.att.net (Gregg C Levine) Date: Tue Oct 29 20:40:01 2002 Subject: [Etherboot-developers] LinuxWorld NY 2003 References: Message-ID: <002001c27fad$e2edcbe0$0a5c580c@who> Hello again from Gregg C Levine Any that works will be good. I am rather board agnostic at this point, so all is necessary, as that it works, with out a complaint from itself, rather then the actual vendor. Gregg C Levine drwho8 at worldnet.att.net "Oh my!" The Second Doctor's nearly favorite phrase. ----- Original Message ----- From: "Ronald G Minnich" To: Cc: "Gregg C Levine" ; "Marty Connor" ; "Etherboot Users" ; "Etherboot Developers" Sent: Tuesday, October 29, 2002 6:48 PM Subject: Re: [Etherboot-developers] LinuxWorld NY 2003 > On Tue, 29 Oct 2002 jam at McQuil.com wrote: > > > How about an EPIA running linuxbios, etherboot and booting up LTSP ? > > That would be *really* fine, but what about graphics? Do graphics work > easily on that board? > > I could try to set that up on an M810LMR I have here? > > ron > > From aip at cwlinux.com Tue Oct 29 21:33:00 2002 From: aip at cwlinux.com (Andrew Ip) Date: Tue Oct 29 21:33:00 2002 Subject: bios savior for via eden In-Reply-To: <200210292023.g9TKNWI11592@nwn.definitive.org>; from belkajm@aardvark-ss.com on Wed, Oct 30, 2002 at 03:31:10AM +0000 References: <200210292023.g9TKNWI11592@nwn.definitive.org> Message-ID: <20021030093924.A13464@mail.cwlinux.com> Jody, > Does anyone know which model of the bios savior is needed for via eden > motherboards? I would like to try out LinuxBIOS, but would like to have an > easy way back if anything goes wrong. RD1-PL is fine. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From aip at cwlinux.com Tue Oct 29 21:49:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Tue Oct 29 21:49:01 2002 Subject: bios size In-Reply-To: <200210292353.g9TNrqI12304@nwn.definitive.org>; from belkajm@aardvark-ss.com on Wed, Oct 30, 2002 at 07:01:32AM +0000 References: <200210292353.g9TNrqI12304@nwn.definitive.org> Message-ID: <20021030095526.D13566@mail.cwlinux.com> Jody, > How big is the linuxbios? and how much space is available on the epia > boards? if it's not enough, what is the cheapest chip that can be used? 2Mb is fine. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From aip at cwlinux.com Tue Oct 29 21:54:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Tue Oct 29 21:54:01 2002 Subject: LTSP + LinuxBios In-Reply-To: <1035938045.11052.0.camel@ollie>; from ollie@sis.com.tw on Wed, Oct 30, 2002 at 08:34:00AM +0800 References: <20021029002847.A24590@mail.cwlinux.com> <20021029202341.B5389@mail.cwlinux.com> <1035938045.11052.0.camel@ollie> Message-ID: <20021030100113.E13566@mail.cwlinux.com> Ollie, > What kind of video problem ?? messed up screen http://www.cwlinux.com/~aip/pub -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From belkajm at aardvark-ss.com Tue Oct 29 22:00:01 2002 From: belkajm at aardvark-ss.com (belkajm) Date: Tue Oct 29 22:00:01 2002 Subject: bios savior for via eden Message-ID: <200210300259.g9U2xJI13101@nwn.definitive.org> Andrew, Thanks. This is all completely new to me, as i haven't messed about with bios's before at all. I have a via epia system being used as an adsl router, and when i get the time, will be creating my own linux system to run it (atm it's running on nt4 :( ), with a CF card being used as the hd. After coming across the linuxbios site, i thought it would be quite nice to use that as well, reducing boot time to an absolute minimum. Jody From aip at cwlinux.com Tue Oct 29 22:00:05 2002 From: aip at cwlinux.com (Andrew Ip) Date: Tue Oct 29 22:00:05 2002 Subject: More details on the Eden support In-Reply-To: <20021029140854.A28303@tdl.com>; from randall@tdl.com on Tue, Oct 29, 2002 at 02:08:54PM -0800 References: <20021029140854.A28303@tdl.com> Message-ID: <20021030100656.F13566@mail.cwlinux.com> Randall, > Are you using a eeprom burner for the bios on the via? flash_rom, from the linuxbios project, supports quite a few flash. To turn on epia flash write, you can $ setpci -s 0:11.0 40.b=54 After this you can run $ flash_rom romimage -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From ollie at sis.com.tw Tue Oct 29 22:12:01 2002 From: ollie at sis.com.tw (ollie lho) Date: Tue Oct 29 22:12:01 2002 Subject: LTSP + LinuxBios In-Reply-To: <20021030100113.E13566@mail.cwlinux.com> References: <20021029002847.A24590@mail.cwlinux.com> <20021029202341.B5389@mail.cwlinux.com> <1035938045.11052.0.camel@ollie> <20021030100113.E13566@mail.cwlinux.com> Message-ID: <1035944219.11093.2.camel@ollie> On Wed, 2002-10-30 at 10:01, Andrew Ip wrote: > Ollie, > > > What kind of video problem ?? > messed up screen > http://www.cwlinux.com/~aip/pub > O.K. that one. Do you have any idea how does the problem magically disappear "in recent kernel" ?? Ollie From rminnich at lanl.gov Tue Oct 29 23:54:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 29 23:54:00 2002 Subject: bios size In-Reply-To: <20021030095526.D13566@mail.cwlinux.com> Message-ID: On Wed, 30 Oct 2002, Andrew Ip wrote: > Jody, > > > How big is the linuxbios? and how much space is available on the epia > > boards? if it's not enough, what is the cheapest chip that can be used? > 2Mb is fine. Let me restate that since people are always getting Mb and MB confused (me too!). 2 Mb means 2 Mbits (256 Kbytes) which means parts with numbers like 29f020 or 28sf020 etc. ron From rminnich at lanl.gov Tue Oct 29 23:55:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Tue Oct 29 23:55:01 2002 Subject: bios savior for via eden In-Reply-To: <200210300259.g9U2xJI13101@nwn.definitive.org> Message-ID: On Wed, 30 Oct 2002, belkajm wrote: > Thanks. This is all completely new to me, as i haven't messed about > with bios's before at all. I have a via epia system being used as an > adsl router, and when i get the time, will be creating my own linux > system to run it (atm it's running on nt4 :( ), with a CF card being > used as the hd. After coming across the linuxbios site, i thought it > would be quite nice to use that as well, reducing boot time to an > absolute minimum. and if you send me pictures and text and such I will gladly give you major real estate on the linuxbios page. This offer is open to all of you good hackers out there! ron From steve at nexpath.com Wed Oct 30 00:07:01 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Wed Oct 30 00:07:01 2002 Subject: More details on the Eden support In-Reply-To: <20021030100656.F13566@mail.cwlinux.com> Message-ID: > After this you can run > > $ flash_rom romimage > Aren't the bios chips soldered down on some of these boards? I was wondering what alternatives you have, short of unsoldering the chip and finding a programmer, if something goes wrong in the flashing process or the linuxbios code has a bug. -Steve From aip at cwlinux.com Wed Oct 30 00:20:01 2002 From: aip at cwlinux.com (Andrew Ip) Date: Wed Oct 30 00:20:01 2002 Subject: More details on the Eden support In-Reply-To: ; from steve@nexpath.com on Tue, Oct 29, 2002 at 08:27:58PM -0800 References: <20021030100656.F13566@mail.cwlinux.com> Message-ID: <20021030122716.A19157@mail.cwlinux.com> > Aren't the bios chips soldered down on some of these boards? I was wondering > what alternatives you have, short of unsoldering the chip and finding a > programmer, if something goes wrong in the flashing process or the linuxbios > code has a bug. The one I have doesn't soldered on board, so I can use Bios Savior to do development. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From rminnich at lanl.gov Wed Oct 30 00:50:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 30 00:50:01 2002 Subject: More details on the Eden support In-Reply-To: Message-ID: On Tue, 29 Oct 2002, Steve M. Gehlbach wrote: > Aren't the bios chips soldered down on some of these boards? I was wondering > what alternatives you have, short of unsoldering the chip and finding a > programmer, if something goes wrong in the flashing process or the linuxbios > code has a bug. you really should not buy a board with a bios soldered down ... there are very few of them because failed bios flashes in essence destroy a board. ron From hcyun at etri.re.kr Wed Oct 30 02:42:01 2002 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Wed Oct 30 02:42:01 2002 Subject: Bug in etherboot 5.1.2rc7 Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD54C@cms3.etri.re.kr> I recently check out etherboot from the cvs to do boot from ide. At the first try, It could't found ide controller with saying "No adaptor found" After tracking down the codes I found the reason in scan_bus() function in pci.c The problem was that it skips to probe my ide controller. My board is organized as follows. 00:02.3 <-- UBS controller 00:02.4 <-- empty 00:02.5 <-- IDE controller When scan_bus probes all devfn, after reading PCI_VENDOR_ID from empty 00:02.4 it set hdr_type=0. therefore it skip to probe rest of functions including 00:02.5. To avoid this situation I modified the code as follows to prevent to set hdr_type = 0. I'm not sure why original code set hdr_type = 0 when the slot return null vendor_id. But anyway I can boot from the disk by just removing this line. static void scan_bus(int type, struct pci_device *dev) { . . buses=256; for (bus = first_bus; bus < buses; ++bus) { for (devfn = first_devfn; devfn < 0xff; ++devfn) { if (PCI_FUNC (devfn) == 0) pcibios_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type); else if (!(hdr_type & 0x80)) /* not a multi- function device */ continue; pcibios_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l); /* some broken boards return 0 if a slot is empty: */ if (l == 0xffffffff || l == 0x00000000) { // hdr_type = 0; // <- I removed this line. hcyun. continue; } . . Now I can boot from IDE. but I have a question. It seems that current etherboot ide support doesn't support partition or filesystem. So now I just installed kernel image without creating any partition (dd kernel.elf of=/dev/hda), but it is too wasteful. Is there any way to place both kernel and root filesystem on the same ide disk? - HeeChul Yun, Embedded S/W Team at ETRI e-mail: hcyun at etri.re.kr phone: +82-42-860-1673 -------------- next part -------------- An HTML attachment was scrubbed... URL: From ebiederman at lnxi.com Wed Oct 30 04:01:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Oct 30 04:01:00 2002 Subject: Bug in etherboot 5.1.2rc7 In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD54C@cms3.etri.re.kr> References: <8470181DABD5D511B3E700D0B7A8AC4A9CD54C@cms3.etri.re.kr> Message-ID: hcyun at etri.re.kr writes: > I recently check out etherboot from the cvs to do boot from ide. > At the first try, It could't found ide controller with saying "No adaptor > found" > After tracking down the codes I found the reason in scan_bus() function in > pci.c Interesting bug. The fix looks sane. Committed. > The problem was that it skips to probe my ide controller. > My board is organized as follows. > 00:02.3 <-- UBS controller > 00:02.4 <-- empty > 00:02.5 <-- IDE controller > > When scan_bus probes all devfn, after reading PCI_VENDOR_ID from empty > 00:02.4 it set hdr_type=0. therefore it skip to probe rest of functions > including 00:02.5. > > To avoid this situation I modified the code as follows to prevent to set > hdr_type = 0. > I'm not sure why original code set hdr_type = 0 when the slot return null > vendor_id. > But anyway I can boot from the disk by just removing this line. > > static void scan_bus(int type, struct pci_device *dev) > { > . > . > buses=256; > for (bus = first_bus; bus < buses; ++bus) { > for (devfn = first_devfn; devfn < 0xff; ++devfn) { > if (PCI_FUNC (devfn) == 0) > pcibios_read_config_byte(bus, devfn, > PCI_HEADER_TYPE, &hdr_type); > else if (!(hdr_type & 0x80)) /* not a multi- > function device */ > continue; > > pcibios_read_config_dword(bus, devfn, > PCI_VENDOR_ID, &l); > /* some broken boards return 0 if a slot is empty: > */ > if (l == 0xffffffff || l == 0x00000000) { > // hdr_type = 0; // <- I removed this line. > hcyun. > continue; > } > . > . > > > Now I can boot from IDE. but I have a question. > It seems that current etherboot ide support doesn't support partition or > filesystem. > So now I just installed kernel image without creating any partition > (dd kernel.elf of=/dev/hda), but it is too wasteful. Is there any way to > place both kernel > and root filesystem on the same ide disk? As long as the ELF header is within the first 8K of the disk it will work. So just make certain your first partition starts at sector 1, and is big enough to hold your boot elf image, and you can use the disk for multiple things. Eric From hcyun at etri.re.kr Wed Oct 30 05:04:01 2002 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Wed Oct 30 05:04:01 2002 Subject: Bug in etherboot 5.1.2rc7 Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD54E@cms3.etri.re.kr> Strange.. I tried to put kernel.elf on the first partition but it failed. I organized my 1G hdd as follows. Disk /dev/hda: 16 heads, 63 sectors, 2100 cylinders Units = cylinders of 1008 * 512 bytes Device Boot Start End Blocks Id System /dev/hda1 1 3 1480+ 83 Linux /dev/hda2 4 2100 1056888 83 Linux In the hda1 I placed kernel.elf with dd if=kernel.elf of=/dev/hda1 and placed rootfs on hda2 But It fails to find elf image. What did I wrong? I make kernel.elf with mkelfImage version 1.16. ---------- LinuxBIOS-1.0.0 ?????????????????????????????????????????????????????????????????????????????????????????????????????????????????? adjusted_boot_notes = 0x0fdb9d54 HEECHUL:esp = 0x11968 ROM segment 0x0000 length 0x0000 reloc 0x00020000 Etherboot 5.1.2rc7 (GPL) Tagged ELF for [EEPRO100][IDE] CPU 2052 Mhz Boot from (N)etwork (D)isk (F)loppy or from (L)ocal? D Probing pci disk... [IDE]disk-1 1058400k cap: 0f00 Searching for image... ................................ Probing pci disk... [IDE] Probing isa disk... - HeeChul Yun, Embedded S/W Team at ETRI e-mail: hcyun at etri.re.kr phone: +82-42-860-1673 > > Now I can boot from IDE. but I have a question. > > It seems that current etherboot ide support doesn't support > partition or > > filesystem. > > So now I just installed kernel image without creating any partition > > (dd kernel.elf of=/dev/hda), but it is too wasteful. Is > there any way to > > place both kernel > > and root filesystem on the same ide disk? > > As long as the ELF header is within the first 8K of the disk it will > work. So just make certain your first partition starts at sector 1, > and is big enough to hold your boot elf image, and you can use > the disk for multiple things. > > Eric > -------------- next part -------------- An HTML attachment was scrubbed... URL: From ebiederman at lnxi.com Wed Oct 30 07:12:01 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Oct 30 07:12:01 2002 Subject: [Etherboot-developers] RE: Bug in etherboot 5.1.2rc7 In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD54E@cms3.etri.re.kr> References: <8470181DABD5D511B3E700D0B7A8AC4A9CD54E@cms3.etri.re.kr> Message-ID: hcyun at etri.re.kr writes: > Strange.. > > I tried to put kernel.elf on the first partition but it failed. > I organized my 1G hdd as follows. > > Disk /dev/hda: 16 heads, 63 sectors, 2100 cylinders > Units = cylinders of 1008 * 512 bytes > > Device Boot Start End Blocks Id System > /dev/hda1 1 3 1480+ 83 Linux > /dev/hda2 4 2100 1056888 83 Linux > > In the hda1 I placed kernel.elf with dd if=kernel.elf of=/dev/hda1 and > placed rootfs on hda2 > But It fails to find elf image. > What did I wrong? > I make kernel.elf with mkelfImage version 1.16. Try that in units of sectors. If you are not careful some versions of fdisk will cylinder align your partitions, and will start your first partition at 63 sectors. Which is a little to far on the disk. You should be able to force it though using units of sectors. Eric From pyro at linuxlabs.com Wed Oct 30 08:53:01 2002 From: pyro at linuxlabs.com (steven james) Date: Wed Oct 30 08:53:01 2002 Subject: Flashing the Tyan S2642? In-Reply-To: <20021029124256.A29798@ti19> Message-ID: Greetings, I hope to find that out shortly. I was going to do it Monday, but the board I had turned out to be bad :-( Hopefullt today's board will be better! G'day, sjames On Tue, 29 Oct 2002, Bill Rugolsky Jr. wrote: > [ This is a resend; I inadvertently posted it the first time from a defunct > e-mail acct. ] > > Last weekend I was looking at installing LinuxBIOS on my Tyan S2462, > and got to the point of building the romimage, but couldn't figure out how > to flash it. devbios (from CVS) reported (in /proc/bios) that it was an > unsupported Macronix part, and flash_rom (from linuxbios CVS) didn't > appear to recognize it either. > > Am I doing something really stupid or simply looking in the wrong place? > > Thanks, > > Bill Rugolsky > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From brugolsky at telemetry-investments.com Wed Oct 30 10:40:01 2002 From: brugolsky at telemetry-investments.com (Bill Rugolsky Jr.) Date: Wed Oct 30 10:40:01 2002 Subject: Flashing the Tyan S2642? In-Reply-To: ; from ebiederman@lnxi.com on Tue, Oct 29, 2002 at 03:16:59PM -0700 References: Message-ID: <20021030094620.A11876@ti19> On Tue, Oct 29, 2002 at 03:16:59PM -0700, Eric W. Biederman wrote: > The drivers should appear to be in 2.4.19. So compile the mtdchar support, > and the jedec_probe support, and the amd766rom support and it should work... Thank you; I thought to look in MTD after firing off the e-mail and saw your code and commit messages in the MTD CVS tree. I will try with MTD next weekend and report back. Regards, Bill Rugolsky From kevinh at ispiri.com Wed Oct 30 15:29:01 2002 From: kevinh at ispiri.com (Kevin Hester) Date: Wed Oct 30 15:29:01 2002 Subject: Linuxbios nrv2b missing? In-Reply-To: <200210292023.g9TKNWI11592@nwn.definitive.org> References: <200210292023.g9TKNWI11592@nwn.definitive.org> Message-ID: Hi, Does anyone know what util/nrv2b/nrv2b.c is supposed to be? I did a CVS update to pull in the latest linuxbios code (so I can send in a patch). However, it seems that the build now needs this tool (somehow related to the new BIOS compression?). Did someone forget to check this file in? Kevin From kevinh at ispiri.com Wed Oct 30 15:36:01 2002 From: kevinh at ispiri.com (Kevin Hester) Date: Wed Oct 30 15:36:01 2002 Subject: Linuxbios nrv2b missing? References: <200210292023.g9TKNWI11592@nwn.definitive.org> Message-ID: Never mind - my cvs install was on crack. ;-) On Wednesday 30 October 2002 11:34, Kevin Hester wrote: > Hi, > > Does anyone know what util/nrv2b/nrv2b.c is supposed to be? I did a CVS > update to pull in the latest linuxbios code (so I can send in a patch). > However, it seems that the build now needs this tool (somehow related to > the new BIOS compression?). > > Did someone forget to check this file in? > > Kevin From ebiederman at lnxi.com Wed Oct 30 15:44:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Oct 30 15:44:00 2002 Subject: Linuxbios nrv2b missing? In-Reply-To: References: <200210292023.g9TKNWI11592@nwn.definitive.org> Message-ID: Kevin Hester writes: > Hi, > > Does anyone know what util/nrv2b/nrv2b.c is supposed to be? I did a CVS > update to pull in the latest linuxbios code (so I can send in a patch). > However, it seems that the build now needs this tool (somehow related to the > new BIOS compression?). That is the compressor. > Did someone forget to check this file in? Yes, but not this last round. do a cvs update -d? To get the new directories. Recommended is to always use cvs update -d -P which will also prune out empty directories. Eric From rminnich at lanl.gov Wed Oct 30 15:46:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 30 15:46:00 2002 Subject: Linuxbios nrv2b missing? In-Reply-To: Message-ID: you did a cvs update -d, right? it's in there in my tree. ron From ebiederman at lnxi.com Wed Oct 30 16:15:00 2002 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Oct 30 16:15:00 2002 Subject: Shadow ROM memory PROBLEM In-Reply-To: <20021029184737.M85892-100000@www.missl.cs.umd.edu> References: <20021029184737.M85892-100000@www.missl.cs.umd.edu> Message-ID: Adam Agnew writes: > Hello. In our PCBIOS efforts, we're running into a snag. > We're experience corruption of our shadow memory region, even after we've > set it to read only (using the sis630). > > mov eax, #0x80000070 > mov dx, #0x0cf8 > out dx, eax > mov eax, #0x0000FFFF > mov dx, #0x0cfc > out dx, eax > > we're not doing any pci writes at this point (once we've set it to read > only), so does anyone else have any theories on what could cause this? Things to check. 1) Is it really read only from software. 2) Is the shadow area really setup as ram. 3) How the fixed and variable mtrrs are setup over your code. > Here's an example of the insanity going on: > > Here, the bios has finished and we're ready to run lilo. The shadow memory > is correct: > > 000F3189L 260F015408 LGDT fword ptr ES:[SI]+08 > 000F318EL 2E0F011E69F8 LIDT fword ptr CS:[f869] > 000F3194L B002 MOV AL,02 > 000F3196L E680 OUT 80,AL > > Then, we run lilo and we load an unmodified linux kernel. After a random > amount of calls to int13 and int15 to copy the kernel into memory > (sometimes it just takes 20 or so, sometimes 58, and sometimes it doesn't > happen at all) the shadow memory gets corrupted. and we get stuff like > this: > > 000F3199L 260F01B002E6 LMSW word ptr ES:[BX+SI]+e602 > 000F319FL 80011E ADD byte ptr [BX+DI],1e > 000F31A2L 69F883C8 IMUL DI,AX,c883 > > As you see, its all scrambled. The op codes get into a weird order. > I'll try to illustrate with this mapping.. > > 260F015408 2E0F011E69F8 B002 E680 > 1111111111 222222222222 3333 4444 > > 260F01B002E6 80011E 69F883C8 > 111111333344 442222 2222 > > and the addresses in general are all shifted down. > > Any ideas, suggestions, insights? Unless the memory is not actually read only this does not sound at all like memory correction (except possibly a random mem move). I would verify the read-only ness of your data, and I would check to see if you might be changing a segment register you should not be. I would be especially suspicious of your interrupt routines, assuming you are talking with interrupts to the IDE drive. Eric From rminnich at lanl.gov Wed Oct 30 16:57:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 30 16:57:01 2002 Subject: smartcore PIII is up; G2 & G4 efforts started. Message-ID: This is a PIII?750 in a PC/104 form factor. Fast! This one was a pain. Where it stands: - it is up, but I have to set IOBASE to 0x2000. There is hardware (ACPI) at 0x1000 that I can't get to turn off, it seems. This problem has never cropped up on piix4e before, so I'm not sure what happened here - etherboot still can't work the ethernet interface. But it can load from IDE, and Linux has no troubles at all, so we put a beoboot Phase 1 boot in CF and let etherboot load Linux, which then boots. Other than that it works fine. I'm working on a better solution to these problems. On another note, we have several folks starting G2 and G4 work. Just FYI. ron From steve at nexpath.com Wed Oct 30 18:31:01 2002 From: steve at nexpath.com (Steve M. Gehlbach) Date: Wed Oct 30 18:31:01 2002 Subject: More details on the Eden support In-Reply-To: Message-ID: > > Aren't the bios chips soldered down on some of these boards? I > was wondering > > what alternatives you have, short of unsoldering the chip and finding a > > programmer, if something goes wrong in the flashing process or > the linuxbios > > code has a bug. > > you really should not buy a board with a bios soldered down ... there are > very few of them because failed bios flashes in essence destroy a board. > > ron A number of the Giga-byte boards seem to have the bios soldered, in particular the the GA-6VEML (the Walmart $199 computer). The Via Eden appears to also but I am just looking at the photo. For the EPIA, if you bongo the PLCC (socketed), you'll need another PLCC bios mobo to fix it and hot swapping a PLCC has got to require a deft touch. Personally I prefer to use my Needham's programmer and I have never flashed on the mobo. In the case of the GA-6VEML, I intend to install an SM socket (PLCC) if I ever get to putting linuxbios on that one. But anyone considering linuxbios that does not have a programmer should think of their backup plan if there is a bug or flashing failure. The main point of my question, though, was if anyone was aware of another way to program the flash short of unsoldering it. I wasn't aware of any, and maybe it seemed like a silly question, but if the mobo mfrs would start using the LPC interface flash, and put a header on the mobo to access it, you could program it from a PC-LPT interface with a specially wired cable (plus a few R's and D's). This has been done on the Xbox and the software is available on the net. The LPC flash would also allow much larger memory in the same footprint, which is really useful. The success of this can depend somewhat on how the other chips behave, though, while programming (mobo power is off). -Steve From spyro at f2s.com Wed Oct 30 18:51:00 2002 From: spyro at f2s.com (Ian Molton) Date: Wed Oct 30 18:51:00 2002 Subject: More details on the Eden support In-Reply-To: References: Message-ID: <20021030225757.402ee194.spyro@f2s.com> On Wed, 30 Oct 2002 14:44:02 -0800 "Steve M. Gehlbach" wrote: > > The main point of my question, though, was if anyone was aware of > another way to program the flash short of unsoldering it. JTAG ;-) From belkajm at aardvark-ss.com Wed Oct 30 19:21:01 2002 From: belkajm at aardvark-ss.com (Jody Belka) Date: Wed Oct 30 19:21:01 2002 Subject: More details on the Eden support Message-ID: <200210310020.g9V0K9I17694@nwn.definitive.org> My eden motherboard has a PLCC socket, and the image of an eden motherboard on the via website (http://www.viavpsd.com/product/4/8/epia_mini_itx_H.jpg) shows a socket as well, so i'm assuming that all of the eden boards do. I'm also going to get a bios savior for it which will make hot-swapping as easy as pie. This only costs about ?30, so is well worth getting. Jody ------- Original Message -------- From: steve at nexpath.com Subject: RE: More details on the Eden support Date: 30/10/02 10:10 A number of the Giga-byte boards seem to have the bios soldered, in particular the the GA-6VEML (the Walmart $199 computer). The Via Eden appears to also but I am just looking at the photo. For the EPIA, if you bongo the PLCC (socketed), you'll need another PLCC bios mobo to fix it and hot swapping a PLCC has got to require a deft touch. -Steve From rminnich at lanl.gov Wed Oct 30 20:48:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 30 20:48:01 2002 Subject: More details on the Eden support In-Reply-To: Message-ID: On Wed, 30 Oct 2002, Steve M. Gehlbach wrote: > A number of the Giga-byte boards seem to have the bios soldered, in > particular the the GA-6VEML (the Walmart $199 computer). The Via Eden > appears to also but I am just looking at the photo. For the EPIA, if > you bongo the PLCC (socketed), you'll need another PLCC bios mobo to > fix it and hot swapping a PLCC has got to require a deft touch. A very clumsy touch is fine. I do this many times a day. The chips are very hardy. I think I may have lost one out of literally many dozens over the last few years. ron From PhilB at olymed.com Wed Oct 30 20:54:00 2002 From: PhilB at olymed.com (Phil Brooks) Date: Wed Oct 30 20:54:00 2002 Subject: smartcore PIII is up; G2 & G4 efforts started. Message-ID: <682FBAAE0A65E1448C5048B7CCEA920F06A3BF@exchange55.olymed_nt.com> Ron, Is this the Advanced Digital Logic MSMP3-S? I had been talking to Gary Karns at ADL about getting the Linuxbios running on our system. We are using the MSMP5 (PII/266) - Gary tells me they use the same board, only the processor and graphics chip are different - and I don't know how this will interact with linuxbios. We are looking to use linuxbios on our medical monitoring system, mainly for (boot) speed issues. I am happy to help out with development tasks, provided I am comfortable with level of effort needed. I will touch bases with Gary on this. Thanks Phil Phil Brooks - Software Engineer Olympic Medical 206-268-5119 philb at olymed.com -----Original Message----- From: Ronald G Minnich [mailto:rminnich at lanl.gov] Sent: Wednesday, October 30, 2002 12:47 PM To: linuxbios at clustermatic.org Subject: smartcore PIII is up; G2 & G4 efforts started. This is a PIII?750 in a PC/104 form factor. Fast! This one was a pain. Where it stands: - it is up, but I have to set IOBASE to 0x2000. There is hardware (ACPI) at 0x1000 that I can't get to turn off, it seems. This problem has never cropped up on piix4e before, so I'm not sure what happened here - etherboot still can't work the ethernet interface. But it can load from IDE, and Linux has no troubles at all, so we put a beoboot Phase 1 boot in CF and let etherboot load Linux, which then boots. Other than that it works fine. I'm working on a better solution to these problems. On another note, we have several folks starting G2 and G4 work. Just FYI. ron _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ollie at sis.com.tw Wed Oct 30 20:57:00 2002 From: ollie at sis.com.tw (ollie lho) Date: Wed Oct 30 20:57:00 2002 Subject: smartcore PIII is up; G2 & G4 efforts started. In-Reply-To: References: Message-ID: <1036026087.11093.5.camel@ollie> On Thu, 2002-10-31 at 04:46, Ronald G Minnich wrote: > > > On another note, we have several folks starting G2 and G4 work. Just FYI. > Cool, are you working on an off the shelf MAC ?? Ollie From Jean-Francois.Hammond at mindready.com Wed Oct 30 21:16:00 2002 From: Jean-Francois.Hammond at mindready.com (=?iso-8859-1?Q?=22Hammond=2C_Jean-Fran=E7ois=22?=) Date: Wed Oct 30 21:16:00 2002 Subject: smartcore PIII is up; G2 & G4 efforts started. Message-ID: Hi, I am porting the linux bios to the evaluation board SBC8240. This is almost the same processor has the MAC but a little bit smaller. This board looks like a PC without a box, keyboard and mouse. Have a nice day! Jean-Fran?ois Hammond Software Designer Mindready Solutions inc. 2800, avenue Marie-Curie Saint-Laurent (Qu?bec) Canada H4S 2C2 Tel. : (1) 514-339-1394 ext. 2121 Fax. : (1) 514-339-1376 mailto:jean-francois.hammond at mindready.com www.mindready.com -----Original Message----- From: ollie lho [mailto:ollie at sis.com.tw] Sent: Wednesday, October 30, 2002 8:01 PM To: Ronald G Minnich Cc: linuxbios at clustermatic.org Subject: Re: smartcore PIII is up; G2 & G4 efforts started. On Thu, 2002-10-31 at 04:46, Ronald G Minnich wrote: > > > On another note, we have several folks starting G2 and G4 work. Just FYI. > Cool, are you working on an off the shelf MAC ?? Ollie _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Wed Oct 30 23:07:01 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 30 23:07:01 2002 Subject: smartcore PIII is up; G2 & G4 efforts started. In-Reply-To: <1036026087.11093.5.camel@ollie> Message-ID: On 31 Oct 2002, ollie lho wrote: > Cool, are you working on an off the shelf MAC ?? First efforts are with a development board from motorola. ron From rminnich at lanl.gov Wed Oct 30 23:08:00 2002 From: rminnich at lanl.gov (Ronald G Minnich) Date: Wed Oct 30 23:08:00 2002 Subject: smartcore PIII is up; G2 & G4 efforts started. In-Reply-To: <682FBAAE0A65E1448C5048B7CCEA920F06A3BF@exchange55.olymed_nt.com> Message-ID: On Wed, 30 Oct 2002, Phil Brooks wrote: > Is this the Advanced Digital Logic MSMP3-S? yes. > I had been talking to Gary Karns at ADL about getting the Linuxbios > running on our system. We are using the MSMP5 (PII/266) - Gary tells > me they use the same board, only the processor and graphics chip are > different - and I don't know how this will interact with linuxbios. It also runs on that and I owe you a romimage for it. ron From kevinh at ispiri.com Thu Oct 31 22:16:01 2002 From: kevinh at ispiri.com (Kevin Hester) Date: Thu Oct 31 22:16:01 2002 Subject: Getting kernels to boot other kernels? In-Reply-To: References: Message-ID: Hi, I recall reading a white paper about Linuxbios and patches so that the kernel can boot other kernels? Does anyone know where this code is? I've poked around with no luck. For our application, I'd like to place a minimal kernel into the FLASH with the BIOS. That kernel would either use IP or IDE to read in the 'real' kernel. I considered chaining into Etherboot, but I need to boot from IDE drives in addition to Ethernet. The Etherboot CAN_BOOT_DISK flag seems to require IDE read funtionality in the BIOS (a no-no with linuxbios?). Thanks for any advice. I've only been futzing with linuxbios since last Friday so I'm still new at this. Kevin