cannot initialize ide controller
marcus wimmer
wimmer at decomsys.com
Mon Oct 7 12:03:00 CEST 2002
Hi there,
I'm working on employing linuxbios for my emnbedded system.
loading my kernel image from hda1 seems to be
the best solution for my purposes.
unfortunately I stick with some problems accessing the ide device
for a whole while now.
thus I don't seem to get around asking for help again and giving
a description of my proceeding 'though I hate to bore busy people with details
my target hardware:
digitallogic smartcore-p5 SEN
ROM MTD: 256k flash
IDE device: 128MB disk on module
what I did so far is:
dos files converted:
some time ago I reportet some building problems
and nobody seemed to have stepped into that trap
before.
in the meantime the reason turned out to be several
files containing dos like line terminators.
(a greenhorns mistake, you may say ;) )
dos2unix helped.
for a list of those files see addendum
linker script changed:
when running linuxbios first time on my target
it got hung since some functions weren't found
at the addresses where they're supposed to be.
I solved this by setting the last alignment of
every output section in ldscript.base to 32
my environment:
both of the above difficulties may be specific
for my particular environment:
suse 7.3: gcc version 2.95.3
ln version 4.1
as version 2.11.90.0.29
I reported them anyway since someone might
happen to have the same.
config file changed to p5:
many thanks to ron for the config file.
was it meant to be for the p5?
I changed all the 'p3's to 'p5's
but left all the opions unchanged.
(see addendum)
what keeps me from proceeding now is:
IDE initializing fails.
when booting I recieve the message:
(see addendum for full bootmessages)
"I am now initializing the ide system
Controller 0: detect FAILED (1)
Initializing the main controller failed!
Could not initialize driver..."
which as far as I figured out means that the
write and confirm read operation on the
ide legacy port failed.
The mentioned errormessage led me to try calling
southbridge_fixup right after mainboard_fixup
in hardwaremain.c
(just like in the smartcore_p3 code)
- without any effect.
I wonder if a slightly different mainboard type could
be responsible for that (smartcore-p5 SEN or SEV)
or if the ide initialization
might work for boards with compact flash but not for
those with disk on module?
Can someone help me to deal with that problem?
regards,
marc
ADDENDUM:
list of CRLF containing file in freebios:
(additional ones may have been added
since my last checkout)
./src/northbridge/acer/m1631/ipl.S
./src/northbridge/acer/m1631/ipl.h
./src/northbridge/intel/430tx/raminit.inc
./src/superio/SMC/fdc37c67x/setup_serial.inc
./src/mainboard/asus/cua/ipl.S
./src/mainboard/asus/cua/ipl.h
./src/mainboard/digitallogic/smartcore-p3/Config
./src/mainboard/digitallogic/smartcore-p5/Config
./util/config/l440gx.config
./util/config/l440bx-test12.config
./HOWTO/ALIM1631_M1535D
adapted config file:
This will make a target directory of ./smartcore-p5
target smartcore-p5
mainboard digitallogic/smartcore-p5
# Enable Serial Console for debugging
option SERIAL_CONSOLE=1
option NO_KEYBOARD=1
option INBUF_COPY=1
option DEFAULT_CONSOLE_LOGLEVEL=7
option MAXIMUM_CONSOLE_LOGLEVEL=7
option DEBUG=1
option BOOT_IDE=1
dir /src/pc80/ide
option USE_ELF_BOOT=1
option RAMTEST=1
option CONFIG_LINUXBIOS_ENABLE_IDE=1
option CONFIG_LINUXBIOS_LEGACY_IDE=1
payload /dev/null
bootmessages:
LinuxBIOS-1.0.0 Fri Oct 4 12:14:31 CEST 2002 starting...
Testing SDRAM : 00000000-0009ffff
SDRAM fill:
00000009ffff
SDRAM verify:
00000009ffff
Done.
LinuxBIOS-1.0.0 Fri Oct 4 12:14:31 CEST 2002 booting...
Finding PCI configuration type.
Scanning PCI bus...done
totalram: 128M
Initializing CPU #0
Enabling cache...done.
done.
CPU #0 Initialized
Allocating PCI resources...done.
Enabling PCI resourcess...done.
Initializing PCI devices...
PCI devices initialized
Enabling extended BIOS access...done.
Checking IRQ routing tables...done.
Copying IRQ routing tables to 0xf0000...done.
Welcome to elfboot, the open sourced starter.
January 2002, Eric Biederman.
Version 1.2
end 0:70ab2326, start 0:651b22f2
32-bit delta 185
calibrate_tsc 32-bit result is 24
clocks_per_usec: 185
I am now initializing the ide system
Controller 0: detect FAILED (1)
Initializing the main controller failed!
Could not initialize driver...
Cannot Load ELF Image
adapted ldscript:
/*
* Memory map:
*
* _RAMBASE
* : data segment
* : bss segment
* : heap
* : stack
* _ROMBASE
* : linuxbios text
* : readonly text
*/
/*
* Bootstrap code for the STPC Consumer
* Copyright (c) 1999 by Net Insight AB. All Rights Reserved.
*
* $Id: ldscript.base,v 1.13 2002/07/25 20:50:52 ebiederm Exp $
*
*/
/*
* Written by Johan Rydberg, based on work by Daniel Kahlin.
* Rewritten by Eric Biederman
*/
/*
* We use ELF as output format. So that we can
* debug the code in some form.
*/
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH(i386)
ENTRY(_start)
SECTIONS
{
. = DEFINED(_ROMBASE)? _ROMBASE : _RAMBASE;
/* This section might be better named .setup */
.rom . : {
_rom = .;
*(.rom.text);
*(.rom.data);
. = ALIGN(32);
_erom = .;
}
_lrom = LOADADDR(.rom);
_elrom = LOADADDR(.rom) + SIZEOF(.rom);
. = DEFINED(_ROMBASE)? _RAMBASE : . ;
/*
* First we place the code and read only data (typically const declared).
* This get placed in rom.
*/
.text . : AT (_elrom) {
_text = .;
*(.text);
*(.text.*);
. = ALIGN(32);
_etext = .;
}
_ltext = LOADADDR(.text);
_eltext = LOADADDR(.text) + SIZEOF(.text);
.rodata . : AT(_eltext){
_rodata = .;
. = ALIGN(4);
streams = . ;
*(.rodata.streams)
estreams = .;
. = ALIGN(4);
pci_drivers = . ;
*(.rodata.pci_drivers)
epci_drivers = . ;
*(.rodata)
*(.rodata.*)
. = ALIGN(32);
_erodata = .;
}
_lrodata = LOADADDR(.rodata);
_elrodata = LOADADDR(.rodata) + SIZEOF(.rodata);
/*
* After the code we place initialized data (typically initialized
* global variables). This gets copied into ram by startup code.
* __data_start and __data_end shows where in ram this should be placed,
* whereas __data_loadstart and __data_loadend shows where in rom to
* copy from.
*/
.data . : AT(_elrodata) {
_data = .;
*(.data)
. = ALIGN(32);
_edata = .;
}
_ldata = LOADADDR(.data);
_eldata = LOADADDR(.data) + SIZEOF(.data);
/* The initialized data segment.
* This is all of the data that we copy from rom into the ram.
*/
_iseg = _text;
_eiseg = _edata;
_liseg = _ltext;
_eliseg = _eldata;
/*
* bss does not contain data, it is just a space that should be zero
* initialized on startup. (typically uninitialized global variables)
* crt0.S fills between _bss and _ebss with zeroes.
*/
_bss = .;
.bss . : {
*(.bss)
*(.sbss)
*(COMMON)
}
_ebss = .;
_end = .;
_stack = .;
.stack . : {
/* Reserve a stack for each possible cpu, +1 extra */
. = ((MAX_CPUS * STACK_SIZE) + STACK_SIZE) ;
}
_estack = .;
_heap = .;
.heap . : {
/* Reserve 256K for the heap */
. = HEAP_SIZE ;
. = ALIGN(4);
}
_eheap = .;
/* The ram segment
* This is all address of the memory resident copy of linuxBIOS.
*/
_ram_seg = _text;
_eram_seg = _eheap;
/DISCARD/ : {
*(.comment)
*(.note)
}
}
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