From mwilkinson at ndirect.co.uk Sat Mar 1 10:42:01 2003 From: mwilkinson at ndirect.co.uk (Mark Wilkinson) Date: Sat Mar 1 10:42:01 2003 Subject: flash_rom.c In-Reply-To: References: Message-ID: <200303011556.34492.mwilkinson@ndirect.co.uk> Hi Ron, I've updated the patch slightly to add a routine to enable flash writes on the epia mainboard with out the need for the seperate setpci command. Mark On Friday 28 Feb 2003 22:13, Ronald G. Minnich wrote: > thanks for the patch! > > I'll try to get it in today or monday. > > ron --- freebios/util/flash_and_burn/flash_rom.c Fri Feb 28 17:21:37 2003 +++ mod-freebios/util/flash_and_burn/flash_rom.c Sat Mar 1 15:37:40 2003 @@ -146,6 +146,30 @@ return 0; } +int +enable_flash_epia(struct pci_dev *dev, char *name) { +/* register 40.b gets bit 4 set to enable flash access + * information from README file for epia mainboard + * + * Should I put a check to make sure it only gets set on device 0:11.0 ? + * + */ + unsigned char old, new; + int ok; + + old = pci_read_byte(dev, 0x40); + + new = old | 0x10; + + ok = pci_write_byte(dev, 0x40, new); + if (!ok) { + printf("Failed to set 0x%x to 0x%x on %s and got 0x%x (WARNING ONLY)\n", + old, new, name, ok); + return -1; + } + return 0; +} + struct flashchip * probe_flash(struct flashchip * flash) { int fd_mem; @@ -260,6 +284,7 @@ {0x1, 0x1, "sis630 -- what's the ID?", enable_flash_sis630}, {0x8086, 0x2480, "E7500", enable_flash_e7500}, + {0x1106, 0x8231, "Via EPIA", enable_flash_epia}, }; int @@ -291,7 +316,8 @@ } /* now do the deed. */ - enable->doit(dev, enable->name); + if ( enable ) + enable->doit(dev, enable->name); return 0; } From rminnich at lanl.gov Sat Mar 1 20:44:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Sat Mar 1 20:44:00 2003 Subject: flash_rom.c In-Reply-To: <200303011556.34492.mwilkinson@ndirect.co.uk> Message-ID: Thanks for that too anyone who has an 'enable write' patch for the flash_rom.c program, I'll take it. ron From agnew at cs.umd.edu Sat Mar 1 22:03:00 2003 From: agnew at cs.umd.edu (Adam Agnew) Date: Sat Mar 1 22:03:00 2003 Subject: About ADLO In-Reply-To: <3E5F5438.7040604@telepolis.es> Message-ID: <20030301224150.P98436-100000@www.missl.cs.umd.edu> You add the Bochs BIOS and the video BIOS to the ROM, NOT replacing the LinuxBIOS. In this set up, LinuxBIOS does all the hardware initialization, and the Bochs BIOS does all the legacy BIOS support. ADLO is just a small glue that holds them together. At start up, LinuxBIOS runs to initialize the hardware, then it passes control to ADLO. ADLO sets up an environment which Bochs BIOS will understand a bit better. Than Bochs BIOS gets control, and it populates the BIOS interrupt table and passes control to your bootloader (such as Grub). From there, things function for the most part as you're used to on a commercial desktop BIOS. - Adam Agnew On Fri, 28 Feb 2003, Xavier Pegenaute wrote: > Hi again, > > i'm not sure of how ADLO work ..., to work with ADLO, i need a Matsonic > motherboard with a LinuxBios installed, once time i have this, i make > the new elf file with a bios of Bochs and a Video Bios, and after i put > these files overwriting the LinuxBios ..? or Adding these files to rom > bios ?, if i add i'll have two bios code runing (first of the LinuxBios, > and after of Bochs) is not there problems with it ?. > > Really is possible make work the Bochs Bios like a normal Bios ..?, they > have code that only work with Bochs, like an outport to INFO_PORT ... > > Regards. > Xavi. > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From linuxbios at cmmail.com Sun Mar 2 09:55:01 2003 From: linuxbios at cmmail.com (linuxbios) Date: Sun Mar 2 09:55:01 2003 Subject: ÎÞ±êÌâ Message-ID: <03030218142400.03340@www3> Can I use DiskOnChip 2000 16M ,part no is MD2202-D16, on linuxbios? I can't find DOC Millennium . My mainborad is pcchips 810. --------------------------------------------- ???????? http://www.cmmail.com From hansolofalcon at worldnet.att.net Sun Mar 2 20:04:00 2003 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Sun Mar 2 20:04:00 2003 Subject: PCD-897-Bare with one DOC Message-ID: <000001c2e124$08ab1fe0$03a6580c@who5> Hello from Gregg C Levine Here's a question that I think someone can answer. I've recently obtained a PCD-897-Bare from an individual that I know on the Linux-MTD list. The Disk On Chip was formatted as a 2MB device, with the first 4K as the boot code, and at that I'm guessing. Now here is the question: How can I reset it from being reported as a Drive C device, to a Drive D device? I can provide the details of the host computer, on request, and off list. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) From felix at allot.com Mon Mar 3 10:18:01 2003 From: felix at allot.com (Felix Radensky) Date: Mon Mar 3 10:18:01 2003 Subject: VxWorks boot Message-ID: <3E6377B8.9000506@allot.com> Hi, folks After a break I'm back to my task of using LinuxBios to boot VxWorks and I have the following problem. As I mentioned in my previous posts, VxWorks loader insists on beeing loaded at physical address 0x8000. The loader image size is 576K, and when loaded to 0x8000 it overrides areas used by LinuxBios itself, so I cannot even reach the code in LinuxBios that jumps to kernel entry point. I have verified that 68000 bytes can be copied to 0x8000, but 70000 cannot. If I'm reading ldscript.ld correctly, LinuxBios uses memory at 0x4000 for its data+bss, heap and stack. My question is: how can I modify this file to allow loading of VxWorks bootloader. Any other ideas are also welcome. TIA. Felix. From rminnich at lanl.gov Mon Mar 3 10:31:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 10:31:01 2003 Subject: VxWorks boot In-Reply-To: <3E6377B8.9000506@allot.com> Message-ID: remind me: are you using elf image boot format or the old fashioned stuff. the elf image boot stuff that Eric did will handle the problems you are having. The old stuff is too primitive to do that. ron From felix at allot.com Mon Mar 3 11:05:01 2003 From: felix at allot.com (Felix Radensky) Date: Mon Mar 3 11:05:01 2003 Subject: VxWorks boot References: Message-ID: <3E6382BA.2010006@allot.com> Hi, Ron Currently I'm using the old stuff. Thanks. Felix. Ronald G. Minnich wrote: >remind me: are you using elf image boot format or the old fashioned stuff. > >the elf image boot stuff that Eric did will handle the problems you are >having. The old stuff is too primitive to do that. > >ron > > > From rminnich at lanl.gov Mon Mar 3 11:07:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 11:07:01 2003 Subject: VxWorks boot In-Reply-To: <3E6382BA.2010006@allot.com> Message-ID: On Mon, 3 Mar 2003, Felix Radensky wrote: > Currently I'm using the old stuff. that's going to take some work then. I had to make a stupid, simple tool to convert plan9 kernels to elfimage, and if I can find it I will send it to you. ron From nathanael at gnat.ca Mon Mar 3 12:11:01 2003 From: nathanael at gnat.ca (Nathanael Noblet) Date: Mon Mar 3 12:11:01 2003 Subject: Suggestions In-Reply-To: <3E5E4081.8090608@nexpath.com> Message-ID: <5BEC842C-4D9E-11D7-80AB-0003931B4D6A@gnat.ca> On Thursday, February 27, 2003, at 09:44 AM, Steve Gehlbach wrote: > > Linuxbios support of vga on boot is not there yet, work ongoing. Does vga come up after the kernel takes control?? Is that what you mean vga on boot? Seeing the LinuxBios stuff through the VGA adapter? -- Nathanael Noblet Gnat Solutions 4604 Monterey Ave NW Calgary, AB T3B 5K4 T/F 403.288.5360 C 403.809.5368 http://www.gnat.ca/ From steve at nexpath.com Mon Mar 3 12:25:00 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Mon Mar 3 12:25:00 2003 Subject: Suggestions In-Reply-To: <5BEC842C-4D9E-11D7-80AB-0003931B4D6A@gnat.ca> References: <5BEC842C-4D9E-11D7-80AB-0003931B4D6A@gnat.ca> Message-ID: <3E639706.2030806@nexpath.com> Nathanael Noblet wrote: > > On Thursday, February 27, 2003, at 09:44 AM, Steve Gehlbach wrote: > >> >> Linuxbios support of vga on boot is not there yet, work ongoing. > > > Does vga come up after the kernel takes control?? Is that what you mean > vga on boot? Seeing the LinuxBios stuff through the VGA adapter? > I am referring to vga console with linuxbios messages, long before the kernel loads. When the kernel loads you will get the basic text mode vga screen. Without the linuxbios vga, you can get vga in Linux with the appropriate framebuffer driver, which will initialize vga, but of course, this gives you the screen much later in the boot process. The idea of linuxbios vga initialization is to get a vga screen almost immediately on boot, for those that want that sort of thing (like me, for example). It is not very useful to cluster users, but it is very important to manufacturers of customized embedded systems. -Steve From rminnich at lanl.gov Mon Mar 3 12:44:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 12:44:01 2003 Subject: simple question on fallback/normal images Message-ID: I need to build a bios for the clearwater with no fallback/normal images. Just a single image. I find myself unsure how to do this, I've not looked in depth at the fallback/normal build stuff. Is there a simple option so I can build an image w/o the fallback/normal stuff on systems like clearwater that are configured for fallback/normal? thanks ron From pyro at linuxlabs.com Mon Mar 3 13:17:01 2003 From: pyro at linuxlabs.com (steven james) Date: Mon Mar 3 13:17:01 2003 Subject: simple question on fallback/normal images In-Reply-To: Message-ID: Greetings, The fallback/normal all hinges on weather it's built with cmos_failover.inc or noop_failover.inc in the southbridge. cmos_failover looks at index 0x30 in the CMOS to decide if it should jump into the normal image or not. It copies bit 0 to bit 1, zeros bit 0, and validates the checksum. IFF the CMOS checksum is valid, the RTC indicates no power failure and bit 1 (the value from bit 0) is set, it will jump to the normal image. Otherwise it will fall through. The checksum is just the summation of index 0x31 - 0x7d then complemented. That is stored in 0x7e-7f. So you can either set USE_FALLBACK_IMAGE and edit Config to use noop_failover.inc, or just don't set 0x30 bit 0 and the checksum. G'day, sjames On Mon, 3 Mar 2003, Ronald G. Minnich wrote: > > I need to build a bios for the clearwater with no fallback/normal images. > Just a single image. > > I find myself unsure how to do this, I've not looked in depth at the > fallback/normal build stuff. > > Is there a simple option so I can build an image w/o the fallback/normal > stuff on systems like clearwater that are configured for fallback/normal? > > thanks > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Mon Mar 3 13:19:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 13:19:00 2003 Subject: simple question on fallback/normal images In-Reply-To: Message-ID: On Mon, 3 Mar 2003, steven james wrote: > So you can either set USE_FALLBACK_IMAGE and edit Config to use > noop_failover.inc, or just don't set 0x30 bit 0 and the checksum. yes but ... if I build with normal, and it uses noop_failover, it still builds an image that is 1M-64K, leaving room for the fallback. How do I change this behaviour? I have told it hte ROM_SIZE is 1M ron From pyro at linuxlabs.com Mon Mar 3 13:26:01 2003 From: pyro at linuxlabs.com (steven james) Date: Mon Mar 3 13:26:01 2003 Subject: simple question on fallback/normal images In-Reply-To: Message-ID: Greetings, The trick is to build a fallback image! The idea is that at least a fallback image is necessary. A normal image is optional. The normal image doesn't have the power on reset vector at 0xffff0 anyway, only the protected vector at 0xffff8. Also, the normal image gets linked to reside at 0xfffe0000. G'day, sjames On Mon, 3 Mar 2003, Ronald G. Minnich wrote: > On Mon, 3 Mar 2003, steven james wrote: > > > So you can either set USE_FALLBACK_IMAGE and edit Config to use > > noop_failover.inc, or just don't set 0x30 bit 0 and the checksum. > > yes but ... if I build with normal, and it uses noop_failover, it still > builds an image that is 1M-64K, leaving room for the fallback. How do I > change this behaviour? I have told it hte ROM_SIZE is 1M > > ron > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Mon Mar 3 13:29:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 13:29:01 2003 Subject: simple question on fallback/normal images In-Reply-To: Message-ID: On Mon, 3 Mar 2003, steven james wrote: > The trick is to build a fallback image! The idea is that at least a > fallback image is necessary. A normal image is optional. The normal image > doesn't have the power on reset vector at 0xffff0 anyway, only the > protected vector at 0xffff8. Also, the normal image gets linked to reside > at 0xfffe0000. > my only concern: what if the fallback decides to boot a normal image? That's the only reason I did not do it this way. ron From xpegenaute at telepolis.es Mon Mar 3 13:33:01 2003 From: xpegenaute at telepolis.es (Xavier Pegenaute) Date: Mon Mar 3 13:33:01 2003 Subject: Flashroms of more tha 2Mbits Message-ID: <3E63C032.1050409@telepolis.es> Hi all, is possible to find flashroms with at least 6 o 8 Mbits of Memory to substitute the normal flashrom ..?, i prefer don't use DoC ... if it's possible, why you use DoC ? by price, by the possibiliti of Disk ? These days i was asking for many things about LinuxBios ..., this is because i'm studing the possibility to make my final thesis over LinuxBios ..., my objective is enlarge the capacities of kernel that is running into flashrom, just like manage hardware directly, and other things ..., for this reason i need more space in flashrom ..., and understand rombios functionality ..., at the moment i only knew about Linux Kernel ... Thanks. Xavi. From pyro at linuxlabs.com Mon Mar 3 13:37:00 2003 From: pyro at linuxlabs.com (steven james) Date: Mon Mar 3 13:37:00 2003 Subject: simple question on fallback/normal images In-Reply-To: Message-ID: Greetings, You can disable that in the Config by changing: mainboardinit southbridge/intel/82801/cmos_failover.inc USE_FALLBACK_IMAGE to mainboardinit southbridge/intel/82801/noop_failover.inc USE_FALLBACK_IMAGE That's where the decision gets made. G'day, sjames On Mon, 3 Mar 2003, Ronald G. Minnich wrote: > On Mon, 3 Mar 2003, steven james wrote: > > > The trick is to build a fallback image! The idea is that at least a > > fallback image is necessary. A normal image is optional. The normal image > > doesn't have the power on reset vector at 0xffff0 anyway, only the > > protected vector at 0xffff8. Also, the normal image gets linked to reside > > at 0xfffe0000. > > > > > my only concern: what if the fallback decides to boot a normal image? > That's the only reason I did not do it this way. > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Mon Mar 3 13:43:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 13:43:00 2003 Subject: simple question on fallback/normal images In-Reply-To: Message-ID: On Mon, 3 Mar 2003, steven james wrote: > You can disable that in the Config by changing: > mainboardinit southbridge/intel/82801/cmos_failover.inc USE_FALLBACK_IMAGE > to > mainboardinit southbridge/intel/82801/noop_failover.inc USE_FALLBACK_IMAGE ouch. There ought to be a way to do this from a user config file without beating on those files. OK, I'll keep thinking about it. ron From pyro at linuxlabs.com Mon Mar 3 13:44:49 2003 From: pyro at linuxlabs.com (steven james) Date: Mon Mar 3 13:44:49 2003 Subject: Flashroms of more tha 2Mbits In-Reply-To: <3E63C032.1050409@telepolis.es> Message-ID: Greetings, Unfortunatly, on the older boards, it's physically impossible to have more than a 4Mbit flash (many boards are limited to 2Mbit) because of not enough address lines. The DoC gets around that by being able to page in bits of the ROM kind of like EMM from the bad old days. Newer boards that use LPC or Firmware Hub flashes usually come with 4 or 8Mbit and can (in theory) accept up to 32Mbit. In practice, the chipsets may impose limits on that. G'day, sjames On Mon, 3 Mar 2003, Xavier Pegenaute wrote: > Hi all, > > is possible to find flashroms with at least 6 o 8 Mbits of Memory to > substitute the normal flashrom ..?, i prefer don't use DoC ... > if it's possible, why you use DoC ? by price, by the possibiliti of Disk ? > > > These days i was asking for many things about LinuxBios ..., this is > because i'm studing the possibility to make my final thesis over > LinuxBios ..., my objective is enlarge the capacities of kernel that is > running into flashrom, just like manage hardware directly, and other > things ..., for this reason i need more space in flashrom ..., and > understand rombios functionality ..., at the moment i only knew about > Linux Kernel ... > > Thanks. > Xavi. > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From bari at onelabs.com Mon Mar 3 13:48:01 2003 From: bari at onelabs.com (Bari Ari) Date: Mon Mar 3 13:48:01 2003 Subject: Flashroms of more tha 2Mbits References: <3E63C032.1050409@telepolis.es> Message-ID: <3E63A90D.4020508@onelabs.com> Xavier Pegenaute wrote: > Hi all, > > is possible to find flashroms with at least 6 o 8 Mbits of Memory to > substitute the normal flashrom ..?, i prefer don't use DoC ... > if it's possible, why you use DoC ? by price, by the possibiliti of > Disk ? There are Flash parts available with densities up to 256Mbits. The problem is that motherboard layouts (and chipsets) have only enough address lines to access 2 Mbits of memory. So just replacing a 2Mb part with a larger one won't help. Bari From rminnich at lanl.gov Mon Mar 3 13:53:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 13:53:01 2003 Subject: building a single image ... Message-ID: ok, it gets more complex. There are hard-coded constants which I'm going to need to try to make less hardcoded. Going offline for a while to work this out. ron From pyro at linuxlabs.com Mon Mar 3 13:57:00 2003 From: pyro at linuxlabs.com (steven james) Date: Mon Mar 3 13:57:00 2003 Subject: simple question on fallback/normal images In-Reply-To: Message-ID: Greetings, Agreed. I really want to simplify the Config files. Truthfully, I don't so much understand them as just copy and change what looks like needs changing. G'day, sjames On Mon, 3 Mar 2003, Ronald G. Minnich wrote: > On Mon, 3 Mar 2003, steven james wrote: > > > You can disable that in the Config by changing: > > mainboardinit southbridge/intel/82801/cmos_failover.inc USE_FALLBACK_IMAGE > > to > > mainboardinit southbridge/intel/82801/noop_failover.inc USE_FALLBACK_IMAGE > > > ouch. There ought to be a way to do this from a user config file without > beating on those files. OK, I'll keep thinking about it. > > ron > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Mon Mar 3 14:07:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 14:07:00 2003 Subject: Flashroms of more tha 2Mbits In-Reply-To: <3E63A90D.4020508@onelabs.com> Message-ID: On Mon, 3 Mar 2003, Bari Ari wrote: > There are Flash parts available with densities up to 256Mbits. The > problem is that motherboard layouts (and chipsets) have only enough > address lines to access 2 Mbits of memory. So just replacing a 2Mb part > with a larger one won't help. Except for these lovely intel parts, the 82802? series. I am using one now that is low pin count, but 1 Mbyte. how does intel do it? they use address/address multiplexing, which in the limit by design will allow parts of up to 256 MBYTES (or 28 bits of address if my math is wrong :-0) Thus we will in the small low pin count package be able to fit linux kernels once again. Lots of them! Very nice. DoC parts just don't seem to be keeping up with these trends, and the company has been hard to work with, which is why FreeBSD is dropping DoC support in 6.0. Given the higher densities to come in LPC packages, and the uncooperative attitude of the DoC vendor, I would say that the 82802? series is going to be very popular. ron From bari at onelabs.com Mon Mar 3 17:20:00 2003 From: bari at onelabs.com (Bari Ari) Date: Mon Mar 3 17:20:00 2003 Subject: Flashroms of more tha 2Mbits References: Message-ID: <3E63DB23.6000700@onelabs.com> Ronald G. Minnich wrote: >Except for these lovely intel parts, the 82802? series. I am using one now >that is low pin count, but 1 Mbyte. how does intel do it? they use >address/address multiplexing, which in the limit by design will allow >parts of up to 256 MBYTES (or 28 bits of address if my math is wrong :-0) > >Thus we will in the small low pin count package be able to fit linux >kernels once again. Lots of them! Very nice. > > > Linux kernels, EFI and all types of bloatware :-) if this silliness wins out. The firmware hubs with LPC interfaces will be the only way to go. Bari From rminnich at lanl.gov Mon Mar 3 17:22:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 17:22:01 2003 Subject: simple question on fallback/normal images In-Reply-To: Message-ID: I am reworking the Clearwater config to use a few constants so that fallback image size can be varied from 64K. The whole fallback scheme is so well designed that this looks pretty easy, basically a few tweaks. Nice work Eric :-) ron From rminnich at lanl.gov Mon Mar 3 17:24:22 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 3 17:24:22 2003 Subject: Flashroms of more tha 2Mbits In-Reply-To: <3E63DB23.6000700@onelabs.com> Message-ID: so the one thing we may have to thank EFI for is large flash. I knew that some big bios would require that someday. ron From hcyun at etri.re.kr Tue Mar 4 00:41:01 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Tue Mar 4 00:41:01 2003 Subject: Question about DoC Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD691@cms3> I have a dumb question about DoC with LinuxBIOS. Today, I have requested to port LinuxBIOS on EPIA-M board equipped with DoC module. Though I have ported LinuxBIOS to several boards, I have no knowledge and experience regarding DoC. The board have seperated 2Mbit flash for BIOS and 32MByte DoC connected to ISA bus. Therefore I want to put LinuxBIOS on the normal flash part and put linux on the DoC. My question is 'What should I do to do this?'. After reading some documents from M-sys and this mailling list about DoC, I'm a little confused. M-sys claim it is compatible with normal HDD and recognized as disk drive without any software. Then what is the problem when it comes with LinuxBIOS? If my understanding is correct, it has built in software driver which must be executed from the normal BIOS environment. Is that correct?. Then again, what should I do to fetch kernel from DoC. should I use ALDO or Do I need something like BDK from M-Sys? Any comment, help will be very thankful. Heechul - HeeChul Yun, Embedded S/W Team at ETRI phone: +82-42-860-1673 -------------- next part -------------- An HTML attachment was scrubbed... URL: From aip at cwlinux.com Tue Mar 4 01:38:01 2003 From: aip at cwlinux.com (Andrew Ip) Date: Tue Mar 4 01:38:01 2003 Subject: simple question on fallback/normal images In-Reply-To: ; from Ronald G. Minnich on Mon, Mar 03, 2003 at 11:06:54AM -0700 References: Message-ID: <20030304150050.A32126@mail.cwlinux.com> Ron, > I need to build a bios for the clearwater with no fallback/normal images. > Just a single image. > I find myself unsure how to do this, I've not looked in depth at the > fallback/normal build stuff. > Is there a simple option so I can build an image w/o the fallback/normal > stuff on systems like clearwater that are configured for fallback/normal? I have attached a config for a custom e7500 board which uses a single image instead of fallback image. It should be pretty similar to Clearwater. Hope this help. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- # This will make a target directory of ./winfast # Note that this is RELATIVE TO WHERE YOU ARE WHEN YOU RUN THE # CONFIG TOOL. Make it absolute if you like target /opt/cwlinux/buildrom/cw7600 mainboard cwlinux/cw7600 # option ROM_SIZE=524288 # option ROM_IMAGE_SIZE=65536 option DEBUG=1 option DEFAULT_CONSOLE_LOGLEVEL=9 # Enable Serial Console for debugging # It will come up at 115200,8n1 option SERIAL_CONSOLE=1 ## Select the serial console baud rate. option TTYS0_BAUD=115200 #option TTYS0_BAUD=57600 #option TTYS0_BAUD=38400 #option TTYS0_BAUD=19200 #option TTYS0_BAUD=9600 #option TTYS0_BAUD=4800 #option TTYS0_BAUD=2400 #option TTYS0_BAUD=1200 # Select the serial console base port option TTYS0_BASE=0x3f8 # Select the serial protocol # This (much better!) to 8 data bits, 1 stop bit, and no parity option TTYS0_LCS=0x3 # Enable MicroCode update and L2 Cache init for PII and PIII option UPDATE_MICROCODE=1 # option CONFIGURE_L2_CACHE=1 # Use the internal VGA frame buffer device #option HAVE_FRAMEBUFFER=1 option USE_ELF_BOOT=1 option USE_GENERIC_ROM=1 option STD_FLASH=1 option USE_FALLBACK_IMAGE=0 option HAVE_PIRQ_TABLE=1 option NO_KEYBOARD=0 # payload /opt/cwlinux/etherboot/src/bin32/eepro100.elf payload /opt/cwlinux/etherboot/src/bin32/eepro100.ebi # payload /opt/cwlinux/memtest86/memtest ## ## Cpu Speed ## #option CPU_CLOCK_MULTIPLIER=XEON_X8 #option CPU_CLOCK_MULTIPLIER=XEON_X9 #option CPU_CLOCK_MULTIPLIER=XEON_X10 #option CPU_CLOCK_MULTIPLIER=XEON_X11 #option CPU_CLOCK_MULTIPLIER=XEON_X12 #option CPU_CLOCK_MULTIPLIER=XEON_X13 #option CPU_CLOCK_MULTIPLIER=XEON_X14 #option CPU_CLOCK_MULTIPLIER=XEON_X15 #option CPU_CLOCK_MULTIPLIER=XEON_X16 #option CPU_CLOCK_MULTIPLIER=XEON_X17 #option CPU_CLOCK_MULTIPLIER=XEON_X18 #option CPU_CLOCK_MULTIPLIER=XEON_X19 #option CPU_CLOCK_MULTIPLIER=XEON_X19 option CPU_CLOCK_MULTIPLIER=XEON_X20 #option CPU_CLOCK_MULTIPLIER=XEON_X21 #option CPU_CLOCK_MULTIPLIER=XEON_X22 #option CPU_CLOCK_MULTIPLIER=XEON_X23 ## ## Select power on after power fail setting option MAINBOARD_POWER_ON_AFTER_POWER_FAIL=MAINBOARD_POWER_ON #option MAINBOARD_POWER_ON_AFTER_POWER_FAIL=MAINBOARD_POWER_ON # makerule romimage: linuxbios.rom payload.block ; # addaction romimage cat payload.block linuxbios.rom linuxbios.rom > romimage From jerj at coplanar.net Tue Mar 4 11:02:01 2003 From: jerj at coplanar.net (Jeremy Jackson) Date: Tue Mar 4 11:02:01 2003 Subject: Ram initialization and small c. In-Reply-To: <3E5D928C.7020000@nexpath.com> References: <3E5BB166.3070807@kesa.com> <1046217433.1662.79.camel@contact.skynet.coplanar.net> <3E5C3D91.3080601@nexpath.com> <3E5D739A.4070106@nexpath.com> <3E5D928C.7020000@nexpath.com> Message-ID: <1046795118.1263.19.camel@contact.skynet.coplanar.net> Another idea on the subject: On some chipsets, the entire range of supported processors have MMX and maybe SSE/SSE2. MMX gives 8 extra 64 bit registers (nobody uses floating-point in LinuxBIOS, right?) that can be used as 32bit. They can't be used as address/index/base, but only for data. See the MOVD instruction. Newer versions of gcc offer to produce code which uses them with -mmmx, -m3dnow, or at least inline asm can use the registers. Might be nice for checksums with the vector instructions also. On Wed, 2003-02-26 at 23:22, Steve Gehlbach wrote: -- Jeremy Jackson From ebiederman at lnxi.com Tue Mar 4 12:31:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Tue Mar 4 12:31:01 2003 Subject: Ram initialization and small c. In-Reply-To: <3E5D928C.7020000@nexpath.com> References: <3E5BB166.3070807@kesa.com> <1046217433.1662.79.camel@contact.skynet.coplanar.net> <3E5C3D91.3080601@nexpath.com> <3E5D739A.4070106@nexpath.com> <3E5D928C.7020000@nexpath.com> Message-ID: Steve Gehlbach writes: > Eric W. Biederman wrote: > > > Oh. I think I can have some answers in less than a month. That is > > just what I have allocated for investigation. But it will take a week > > or so to get something working well enough to compare with the inline > > tweaking approach. > > Plus write now I am enjoying the change of pace. > > Cool, let's see how it goes. Feed it the decode routine from nrv2b.c and see > how it likes that. I will try that when the time comes.. > gcc is a long ways from doing this in registers without a > major re-write, which is probably about as much work as your implementation in > assy. Very clever assy code, BTW. I just picked that code along with the nrv2b algorithm out of libucl. But I can at least recognize a good thing when I see it. > Also I think the .S files don't have to be kept if we use a trivial post > processing program like below. That looks reasonable. Well there is now a backup plan. Eric From ebiederman at lnxi.com Tue Mar 4 12:40:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Tue Mar 4 12:40:00 2003 Subject: Ram initialization and small c. In-Reply-To: <1046795118.1263.19.camel@contact.skynet.coplanar.net> References: <3E5BB166.3070807@kesa.com> <1046217433.1662.79.camel@contact.skynet.coplanar.net> <3E5C3D91.3080601@nexpath.com> <3E5D739A.4070106@nexpath.com> <3E5D928C.7020000@nexpath.com> <1046795118.1263.19.camel@contact.skynet.coplanar.net> Message-ID: Jeremy Jackson writes: > Another idea on the subject: > > On some chipsets, the entire range of supported processors have MMX and > maybe SSE/SSE2. MMX gives 8 extra 64 bit registers (nobody uses > floating-point in LinuxBIOS, right?) that can be used as 32bit. They > can't be used as address/index/base, but only for data. See the MOVD > instruction. > > Newer versions of gcc offer to produce code which uses them with -mmmx, > -m3dnow, or at least inline asm can use the registers. Might be nice > for checksums with the vector instructions also. Nice I had missed the fact that you can use MOVD with MMX registers. I have used it just a little bit when debugging to access the SSE registers but I didn't need them in production so they did not get used. I think this is almost justification enough to write a new compiler. 16 extra 32 bit registers that you can use for scratch values on modern cpus. And 8 extra registers on the older cpus. And using them can be a compile option so the code does not get polluted with strange assumptions. I won't support those in the very first pass but that is definitely where I am going to work on as soon as I can produce code. Can you see a way to stuff more than 32bit in there? Eric From bendany at mistdl.com Wed Mar 5 05:24:00 2003 From: bendany at mistdl.com (bendany) Date: Wed Mar 5 05:24:00 2003 Subject: help: about kesem & xwindows Message-ID: <000d01c2e38a$faac40e0$2a00a8c0@live> currently , i use a k7sem mainboard. it work's fine with linuxbios. I replace the the BIOS with the linuxbios+etherboot. now i want to use the Xwindows. i want a embedded movie player, since mplayer use the fbdev output, and can't play it full screen. (sometimes play VCD) so i want to use the Xwindows to play the movie. my host system is Debian unstable. i works fine when i use a normal BIOS. i have strip the system, and get a 14M base system . i test it under the normal BIOS , i works fine. But when i turn it into linuxbios, and start the Xwindows. i get a blank screen. :( what can I do next? can you give me some tips? Best wishes! bendany at TW From steve at nexpath.com Wed Mar 5 11:35:00 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Wed Mar 5 11:35:00 2003 Subject: Ram initialization and small c. In-Reply-To: References: <3E5BB166.3070807@kesa.com> <1046217433.1662.79.camel@contact.skynet.coplanar.net> <3E5C3D91.3080601@nexpath.com> <3E5D739A.4070106@nexpath.com> <3E5D928C.7020000@nexpath.com> Message-ID: <3E662E6B.5060207@nexpath.com> Eric W. Biederman wrote: >>gcc is a long ways from doing this in registers without a >>major re-write, which is probably about as much work as your implementation in >>assy. Very clever assy code, BTW. > > > I just picked that code along with the nrv2b algorithm out of libucl. > But I can at least recognize a good thing when I see it. > Yeah, I figured that out after staring at it and the C code for a while, and then found it in the ucl library. After manipulating the decompression C-code for a while, I'm pretty convinced that compiling this without spilling registers is a hard problem, even with a lot of re-arraranging. The assy code appears to take into account additional information about the algorithm that is not readily apparent from the C code, at least, that is the conclusion I came to after an hour or so of analyzing it. -Steve From stuge-linuxbios at cdy.org Wed Mar 5 21:24:01 2003 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Wed Mar 5 21:24:01 2003 Subject: Ram initialization and small c. In-Reply-To: <1046795118.1263.19.camel@contact.skynet.coplanar.net> References: <3E5BB166.3070807@kesa.com> <1046217433.1662.79.camel@contact.skynet.coplanar.net> <3E5C3D91.3080601@nexpath.com> <3E5D739A.4070106@nexpath.com> <3E5D928C.7020000@nexpath.com> <1046795118.1263.19.camel@contact.skynet.coplanar.net> Message-ID: <20030306024307.GA30960@foo.birdnet.se> On Tue, Mar 04, 2003 at 11:25:18AM -0500, Jeremy Jackson wrote: > Another idea on the subject: > > On some chipsets, the entire range of supported processors have MMX and > maybe SSE/SSE2. MMX gives 8 extra 64 bit registers (nobody uses > floating-point in LinuxBIOS, right?) that can be used as 32bit. They > can't be used as address/index/base, but only for data. See the MOVD > instruction. Likewise, st0..st7 in the FPU could be used as a stack-like 8x64bit data storage, IIRC. I seem to remember that Pentium MMX CPUs share st* space with MMX registers however, so for those platforms one of them will have to do. //Peter From ebiederman at lnxi.com Wed Mar 5 23:28:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Mar 5 23:28:01 2003 Subject: Ram initialization and small c. In-Reply-To: <20030306024307.GA30960@foo.birdnet.se> References: <3E5BB166.3070807@kesa.com> <1046217433.1662.79.camel@contact.skynet.coplanar.net> <3E5C3D91.3080601@nexpath.com> <3E5D739A.4070106@nexpath.com> <3E5D928C.7020000@nexpath.com> <1046795118.1263.19.camel@contact.skynet.coplanar.net> <20030306024307.GA30960@foo.birdnet.se> Message-ID: Peter Stuge writes: > On Tue, Mar 04, 2003 at 11:25:18AM -0500, Jeremy Jackson wrote: > > Another idea on the subject: > > > > On some chipsets, the entire range of supported processors have MMX and > > maybe SSE/SSE2. MMX gives 8 extra 64 bit registers (nobody uses > > floating-point in LinuxBIOS, right?) that can be used as 32bit. They > > can't be used as address/index/base, but only for data. See the MOVD > > instruction. > > Likewise, st0..st7 in the FPU could be used as a stack-like 8x64bit data > storage, IIRC. There are no register to register moves from the integer registers to the floating point registers, unless I missed some. The data we care about is integer data, and so any extra registers just act as overflow locations that are used instead of the stack. > I seem to remember that Pentium MMX CPUs share st* space > with MMX registers however, so for those platforms one of them will have > to do. As I recall you can only access one of them at a time, but it doesn't matter if there are no register->register transfers. Anyway for those wondering where I am at. I currently have a compiler that gets as far as intermediate code for a useful subset of C expressions. Now I just have to do some optimizer work, and an actual code generator. Mostly for the optimizer side I am initially concerned about doing a good job of register allocation. Hopefully I can have something someone else can play with by the start of next week... Eric From riskin at 263.net Fri Mar 7 01:11:01 2003 From: riskin at 263.net (riskin at 263.net) Date: Fri Mar 7 01:11:01 2003 Subject: (no subject) Message-ID: <20030307062307.255DA1C01E@mta4.x263.net> Hi,ron After I turn off framebuffer in linuxbios,I still get 60M memory, But in fact, my memory size is 64M. How to get another 4M memory? Thanks, riskin ========================== 263??????????? From riskin at 263.net Fri Mar 7 01:16:01 2003 From: riskin at 263.net (riskin at 263.net) Date: Fri Mar 7 01:16:01 2003 Subject: why does memory reduce? Message-ID: <20030307062502.B8E2D1C02B@mta4.x263.net> Hi ron, After I turn off framebuffer in linuxbios,I still get 60M memory, But in fact, my memory size is 64M. How to get another 4M memory? Thanks, riskin ========================== 263??????????? ========================== 263??????????? From riskin at 263.net Fri Mar 7 01:21:00 2003 From: riskin at 263.net (riskin at 263.net) Date: Fri Mar 7 01:21:00 2003 Subject: (no subject) Message-ID: <20030307063259.EF34D1C028@mta4.x263.net> Because the IPL area in doc2000 can't be rewrited, DiskOnChip 2000 16M doesn't support linuxbios. You may use Doc Milliennium 16M. ========================== 263??????????? From shubhangi.jadhav at patni.com Fri Mar 7 05:34:01 2003 From: shubhangi.jadhav at patni.com (Shubhangi Jadhav) Date: Fri Mar 7 05:34:01 2003 Subject: Help needed to understand code Message-ID: Hi, I'm a LinuxBIOS newbie. I have downloaded the source code for the same and was trying to understand it. Looks too complicated to me. I'd started with the code for Intel440gx mainboard, but failed to understand how the northbridge and southbridge intialization routines are invoked. Can someone tell me how to go about understanding the code? Thanks, Shubhangi From pyro at linuxlabs.com Fri Mar 7 07:36:01 2003 From: pyro at linuxlabs.com (steven james) Date: Fri Mar 7 07:36:01 2003 Subject: Help needed to understand code In-Reply-To: Message-ID: Greetings, Probably the first thing to understand is the overall flow of control. On powerup, the reset vector at f000:fff0 jumps to the start of the assembly code. The assembly code consists of a series of modular units that the config files paste together using include directives. It just starts at the beginning, and new pieces are tacked on as encountered in the config files. The config files are invoked by directives like northbridge and southbridge. The master config file is in the mainboard directory and is invoked by the user's config file. Most mainboard directory have example user configs. The c code is linked together seperatly and then compressed. The last part of the asm code decompresses it into RAM and calls hardwaremain (found in src/arch//lib/hardwaremain.c currently, can be alpha, i386 or ppc). The remainder of the C code is all invoked from there. G'day, sjames On Fri, 7 Mar 2003, Shubhangi Jadhav wrote: > Hi, > > I'm a LinuxBIOS newbie. I have downloaded the source code for the same and > was trying to understand it. Looks too complicated to me. > I'd started with the code for Intel440gx mainboard, but failed to > understand how the northbridge and southbridge intialization routines are > invoked. > Can someone tell me how to go about understanding the code? > > Thanks, > Shubhangi > > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From shubhangi.jadhav at patni.com Fri Mar 7 08:39:00 2003 From: shubhangi.jadhav at patni.com (Shubhangi Jadhav) Date: Fri Mar 7 08:39:00 2003 Subject: Help needed to understand code In-Reply-To: Message-ID: Hi, However according to the LinuxBIOS readme the assembly code calls intel_main in freebios/chip/intel/intel_main.c which in turn calls linuxbios_main in linuxbios/inflate/main.c. So is intel_main called first or hardwaremain. Am I missing something Please elaborate more on the flow. Thanks, Shubhangi -----Original Message----- From: steven james [mailto:pyro at linuxlabs.com] Sent: Friday, March 07, 2003 6:29 PM To: Shubhangi Jadhav Cc: linuxbios at clustermatic.org Subject: Re: Help needed to understand code Greetings, Probably the first thing to understand is the overall flow of control. On powerup, the reset vector at f000:fff0 jumps to the start of the assembly code. The assembly code consists of a series of modular units that the config files paste together using include directives. It just starts at the beginning, and new pieces are tacked on as encountered in the config files. The config files are invoked by directives like northbridge and southbridge. The master config file is in the mainboard directory and is invoked by the user's config file. Most mainboard directory have example user configs. The c code is linked together seperatly and then compressed. The last part of the asm code decompresses it into RAM and calls hardwaremain (found in src/arch//lib/hardwaremain.c currently, can be alpha, i386 or ppc). The remainder of the C code is all invoked from there. G'day, sjames On Fri, 7 Mar 2003, Shubhangi Jadhav wrote: > Hi, > > I'm a LinuxBIOS newbie. I have downloaded the source code for the same and > was trying to understand it. Looks too complicated to me. > I'd started with the code for Intel440gx mainboard, but failed to > understand how the northbridge and southbridge intialization routines are > invoked. > Can someone tell me how to go about understanding the code? > > Thanks, > Shubhangi > > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From pyro at linuxlabs.com Fri Mar 7 09:06:01 2003 From: pyro at linuxlabs.com (steven james) Date: Fri Mar 7 09:06:01 2003 Subject: Help needed to understand code In-Reply-To: Message-ID: Greetings, By chance, are you looking at a snapshot tarball? If so, that's very old. The best bet is to check out the CVS tree from sourceforge. These days, intel_main is gone and there's nothing in the chip directory. G'day, sjames On Fri, 7 Mar 2003, Shubhangi Jadhav wrote: > Hi, > > However according to the LinuxBIOS readme the assembly code calls > intel_main in freebios/chip/intel/intel_main.c which in turn calls > linuxbios_main in linuxbios/inflate/main.c. So is intel_main called first or > hardwaremain. Am I missing something > Please elaborate more on the flow. > > Thanks, > Shubhangi > > -----Original Message----- > From: steven james [mailto:pyro at linuxlabs.com] > Sent: Friday, March 07, 2003 6:29 PM > To: Shubhangi Jadhav > Cc: linuxbios at clustermatic.org > Subject: Re: Help needed to understand code > > > Greetings, > > Probably the first thing to understand is the overall flow of control. > > On powerup, the reset vector at f000:fff0 jumps to the start of the > assembly code. The assembly code consists of a series of modular units > that the config files paste together using include directives. It just > starts at the beginning, and new pieces are tacked on as encountered in > the config files. The config files are invoked by directives like > northbridge and southbridge. The master config file is in the mainboard > directory and is invoked by the user's config file. Most mainboard > directory have example user configs. > > The c code is linked together seperatly and then compressed. The last part > of the asm code decompresses it into RAM and calls hardwaremain > (found in src/arch//lib/hardwaremain.c currently, can be > alpha, i386 or ppc). The remainder of the C code is all invoked from > there. > > G'day, > sjames > > On Fri, 7 Mar 2003, Shubhangi Jadhav wrote: > > > Hi, > > > > I'm a LinuxBIOS newbie. I have downloaded the source code for the same > and > > was trying to understand it. Looks too complicated to me. > > I'd started with the code for Intel440gx mainboard, but failed to > > understand how the northbridge and southbridge intialization routines are > > invoked. > > Can someone tell me how to go about understanding the code? > > > > Thanks, > > Shubhangi > > > > > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > -- > -------------------------steven james, director of research, linux labs > ... ........ ..... .... 230 peachtree st nw ste 701 > the original linux labs atlanta.ga.us 30303 > -since 1995 http://www.linuxlabs.com > office 404.577.7747 fax 404.577.7743 > ----------------------------------------------------------------------- > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From russell at abc9986.demon.co.uk Fri Mar 7 09:50:01 2003 From: russell at abc9986.demon.co.uk (Russell Gower) Date: Fri Mar 7 09:50:01 2003 Subject: Via 8231 - printer port Message-ID: <010f01c2e40f$56cf3e20$0f01a8c0@winxp> Can anyone please help me with configureing the printer port on a Via Epia boards. Thanks Russell ICQ 4186920 From hcyun at etri.re.kr Sun Mar 9 19:58:01 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Sun Mar 9 19:58:01 2003 Subject: ADLO for EPIA Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD69D@cms3> Hello, I'm trying to bring up VGA on EPIA board. From shubhangi.jadhav at patni.com Sun Mar 9 23:37:01 2003 From: shubhangi.jadhav at patni.com (Shubhangi Jadhav) Date: Sun Mar 9 23:37:01 2003 Subject: Help needed to understand code In-Reply-To: Message-ID: Hi, Yes I downloaded the snapshot from the website, since it mentions that it's the daily snapshot of the source. Can you please update the snapshot on the website. Thanks, Shubhangi -----Original Message----- From: steven james [mailto:pyro at linuxlabs.com] Sent: Friday, March 07, 2003 8:00 PM To: Shubhangi Jadhav Cc: linuxbios at clustermatic.org Subject: RE: Help needed to understand code Greetings, By chance, are you looking at a snapshot tarball? If so, that's very old. The best bet is to check out the CVS tree from sourceforge. These days, intel_main is gone and there's nothing in the chip directory. G'day, sjames On Fri, 7 Mar 2003, Shubhangi Jadhav wrote: > Hi, > > However according to the LinuxBIOS readme the assembly code calls > intel_main in freebios/chip/intel/intel_main.c which in turn calls > linuxbios_main in linuxbios/inflate/main.c. So is intel_main called first or > hardwaremain. Am I missing something > Please elaborate more on the flow. > > Thanks, > Shubhangi > > -----Original Message----- > From: steven james [mailto:pyro at linuxlabs.com] > Sent: Friday, March 07, 2003 6:29 PM > To: Shubhangi Jadhav > Cc: linuxbios at clustermatic.org > Subject: Re: Help needed to understand code > > > Greetings, > > Probably the first thing to understand is the overall flow of control. > > On powerup, the reset vector at f000:fff0 jumps to the start of the > assembly code. The assembly code consists of a series of modular units > that the config files paste together using include directives. It just > starts at the beginning, and new pieces are tacked on as encountered in > the config files. The config files are invoked by directives like > northbridge and southbridge. The master config file is in the mainboard > directory and is invoked by the user's config file. Most mainboard > directory have example user configs. > > The c code is linked together seperatly and then compressed. The last part > of the asm code decompresses it into RAM and calls hardwaremain > (found in src/arch//lib/hardwaremain.c currently, can be > alpha, i386 or ppc). The remainder of the C code is all invoked from > there. > > G'day, > sjames > > On Fri, 7 Mar 2003, Shubhangi Jadhav wrote: > > > Hi, > > > > I'm a LinuxBIOS newbie. I have downloaded the source code for the same > and > > was trying to understand it. Looks too complicated to me. > > I'd started with the code for Intel440gx mainboard, but failed to > > understand how the northbridge and southbridge intialization routines are > > invoked. > > Can someone tell me how to go about understanding the code? > > > > Thanks, > > Shubhangi > > > > > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > -- > -------------------------steven james, director of research, linux labs > ... ........ ..... .... 230 peachtree st nw ste 701 > the original linux labs atlanta.ga.us 30303 > -since 1995 http://www.linuxlabs.com > office 404.577.7747 fax 404.577.7743 > ----------------------------------------------------------------------- > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From adam at cfar.umd.edu Mon Mar 10 13:24:00 2003 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Mon Mar 10 13:24:00 2003 Subject: ADLO for EPIA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD69D@cms3> Message-ID: <20030310141033.W32626-100000@www.missl.cs.umd.edu> > I'm trying to bring up VGA on EPIA board. > >From the list, EPIA board is supported and I've tested with Angrew's image. > However, due to full support of VGA is necessary, I'm trying to figure out > ADLO to run binary only > VGABIOS rom image. > Can I acomplish this with ADLO?. If yes, how much extra work will be needed > you think? I'm not familar with EPIA. Wasn't that the motherboard that had all this video emulation code (whatever you would call it). what's the gfx card anyway? anyway. if you can separate out the vga bios from rest of the bios (and it can function standalone), then there's no reason why it would not work. as for "how much extra work" depends on what you want to use it for. for example IDE code in bochs-bios could use some more work (last time I looked at it). -- Adam Sulmicki http://www.eax.com The Supreme Headquarters of the 32 bit registers From ebiederman at lnxi.com Mon Mar 10 15:56:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 10 15:56:01 2003 Subject: E7500 Question In-Reply-To: <002601c2e2cf$3ee52ef0$6601a8c0@cary> References: <002601c2e2cf$3ee52ef0$6601a8c0@cary> Message-ID: "Cary Jardin" writes: > Eric, > > I saw your threads on LinuxBIOS and I hope you don't mind me asking a > question. > > > I am running into a problem with the E7500 remapping of PCI space above > system space. It only remaps memory not pci space. > Optimally, I would like it to map below for my specific > application. Unfortunately I am using an AMI bios that I can't just > crack open and look at. > > >From you experience, can this be done on the E7500? It does not sound correct: The docs for this part of the chipset are available at developer.intel.com Eric From pyro at linuxlabs.com Mon Mar 10 16:31:00 2003 From: pyro at linuxlabs.com (steven james) Date: Mon Mar 10 16:31:00 2003 Subject: E7500 Question In-Reply-To: Message-ID: Greetings, To the best of my knowledge, the 7500 will always map RAM, then PCI, then APICs and flash, finally, any RAM that wouldn't fit below the PCI hardware maps will go above 4GB and be accessable through PAE mode only. G'day, sjames On 10 Mar 2003, Eric W. Biederman wrote: > "Cary Jardin" writes: > > > Eric, > > > > I saw your threads on LinuxBIOS and I hope you don't mind me asking a > > question. > > > > > > I am running into a problem with the E7500 remapping of PCI space above > > system space. > It only remaps memory not pci space. > > > Optimally, I would like it to map below for my specific > > application. Unfortunately I am using an AMI bios that I can't just > > crack open and look at. > > > > >From you experience, can this be done on the E7500? > > It does not sound correct: > The docs for this part of the chipset are available at developer.intel.com > > Eric > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From john-at-thinman at nyc.rr.com Mon Mar 10 17:20:00 2003 From: john-at-thinman at nyc.rr.com (John van Vlaanderen) Date: Mon Mar 10 17:20:00 2003 Subject: ADLO for EPIA In-Reply-To: <20030310141033.W32626-100000@www.missl.cs.umd.edu> References: <20030310141033.W32626-100000@www.missl.cs.umd.edu> Message-ID: <1047336479.3848.9.camel@localhost.localdomain> Here are some links I gathered: sourceforge.net/projects/epiafb http://www.viavpsd.com/product/epia_m_spec.jsp?motherboardId=81 The VIA EPIA Mini-ITX mainboard brings the industry's smallest, most highly integrated, and most flexible x86 platform to OEMs and System Integrators Measuring just 6.7 x 6.7 in. (see photo), the VIA EPIA Mini-ITX mainboard is 30% smaller than the smallest Flex-ATX platforms, while maintaining Micro ATX chassis compliancy. http://www.linuxdevices.com/cgi-bin/printerfriendly.cgi?id=PD9266751279 http://www.linuxbios.org/index.html http://news.gmane.org/thread.php?group=gmane.linux.bios http://www.cwlinux.com/eng/products/products_sbc.php http://www.linux-eden.org/content-pages/home.html http://www.minervatech.net/reviews/silent_demo/ On Mon, 2003-03-10 at 14:13, Adam Sulmicki wrote: > > I'm trying to bring up VGA on EPIA board. > > >From the list, EPIA board is supported and I've tested with Angrew's image. > > However, due to full support of VGA is necessary, I'm trying to figure out > > ADLO to run binary only > > VGABIOS rom image. > > Can I acomplish this with ADLO?. If yes, how much extra work will be needed > > you think? > > I'm not familar with EPIA. Wasn't that the motherboard that had all this > video emulation code (whatever you would call it). what's the gfx card > anyway? > > anyway. if you can separate out the vga bios from rest of the bios (and it > can function standalone), then there's no reason why it would not work. > > as for "how much extra work" depends on what you want to use it for. for > example IDE code in bochs-bios could use some more work (last time I > looked at it). > > > -- > Adam Sulmicki > http://www.eax.com The Supreme Headquarters of the 32 bit registers > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From hcyun at etri.re.kr Tue Mar 11 06:12:00 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Tue Mar 11 06:12:00 2003 Subject: ADLO for EPIA Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A1@cms3> I tested ADLO on EPIA but it failed on the first try. I grapped vgabios using your Makefile target and modified loader.s to enable shadow ram control registers of EPIA. However, it hang around post code 0x96 and nothing is shown on the CRT. Do you have any idea what 0x96 post code means. Is it a bochs post code or vgabios postcode? > -----Original Message----- > From: Adam Sulmicki [mailto:adam at cfar.umd.edu] > Sent: Tuesday, March 11, 2003 4:13 AM > To: hcyun at etri.re.kr > Cc: linuxbios at clustermatic.org > Subject: Re: ADLO for EPIA > > > > I'm trying to bring up VGA on EPIA board. > > >From the list, EPIA board is supported and I've tested > with Angrew's image. > > However, due to full support of VGA is necessary, I'm > trying to figure out > > ADLO to run binary only > > VGABIOS rom image. > > Can I acomplish this with ADLO?. If yes, how much extra > work will be needed > > you think? > > I'm not familar with EPIA. Wasn't that the motherboard that > had all this > video emulation code (whatever you would call it). what's the gfx card > anyway? > > anyway. if you can separate out the vga bios from rest of the > bios (and it > can function standalone), then there's no reason why it would > not work. > > as for "how much extra work" depends on what you want to use > it for. for > example IDE code in bochs-bios could use some more work (last time I > looked at it). > > > -- > Adam Sulmicki > http://www.eax.com The Supreme Headquarters of the 32 bit registers > -------------- next part -------------- An HTML attachment was scrubbed... URL: From adam at cfar.umd.edu Tue Mar 11 09:40:01 2003 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Tue Mar 11 09:40:01 2003 Subject: ADLO for EPIA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A1@cms3> Message-ID: <20030311102716.Q32626-100000@www.missl.cs.umd.edu> it possibly may be bochs. Are both keyboard and mouse plugged in? does it work without ADLO/BOCHS BIOS? ie can you run linux from LinuxBIOS stanalone? On Tue, 11 Mar 2003 hcyun at etri.re.kr wrote: > I tested ADLO on EPIA but it failed on the first try. > > I grapped vgabios using your Makefile target and modified loader.s to > enable > shadow ram control registers of EPIA. > However, it hang around post code 0x96 and nothing is shown on the CRT. > > Do you have any idea what 0x96 post code means. > Is it a bochs post code or vgabios postcode? > > > > -----Original Message----- > > From: Adam Sulmicki [mailto:adam at cfar.umd.edu] > > Sent: Tuesday, March 11, 2003 4:13 AM > > To: hcyun at etri.re.kr > > Cc: linuxbios at clustermatic.org > > Subject: Re: ADLO for EPIA > > > > > > > I'm trying to bring up VGA on EPIA board. > > > >From the list, EPIA board is supported and I've tested > > with Angrew's image. > > > However, due to full support of VGA is necessary, I'm > > trying to figure out > > > ADLO to run binary only > > > VGABIOS rom image. > > > Can I acomplish this with ADLO?. If yes, how much extra > > work will be needed > > > you think? > > > > I'm not familar with EPIA. Wasn't that the motherboard that > > had all this > > video emulation code (whatever you would call it). what's the gfx card > > anyway? > > > > anyway. if you can separate out the vga bios from rest of the > > bios (and it > > can function standalone), then there's no reason why it would > > not work. > > > > as for "how much extra work" depends on what you want to use > > it for. for > > example IDE code in bochs-bios could use some more work (last time I > > looked at it). > > > > > > -- > > Adam Sulmicki > > http://www.eax.com The Supreme Headquarters of the 32 bit registers > > > -- Adam Sulmicki http://www.eax.com The Supreme Headquarters of the 32 bit registers From rminnich at lanl.gov Tue Mar 11 09:52:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Mar 11 09:52:01 2003 Subject: linuxbios on PPC (fwd) Message-ID: Greg Watson almost has it done. It required a few changes to linuxbios build procedures, but not many. It has small impact. ron ---------- Forwarded message ---------- Date: Mon, 10 Mar 2003 20:51:39 -0700 From: Greg Watson To: Ron Minnich Subject: linuxbios on PPC Here's what I get so far (running from ram). Very close! The malloc error is because the jump to linuxbiosmain code is missing... Greg DINK32 [MPC7410] >>go 700100 bsp_init_memory... i2c testing Part Number: M4 64S0824DT1-L1L Linuxbios release sandpoint (compiled Mar 10 2003) Memory from 0x00000000 to 0x04000000 handle_superio start, nsuperio 1 handle_superio Pass 0, check #0, s 0070a234 s->super 0070a0dc handle_superio: Pass 0, Superio NSC 87307 handle_superio port 0x0, defaultport 0x3f8 handle_superio Using port 0x3f8 handle_superio Pass 0, done #0 handle_superio done Registered flash Am29LV800BB Unknown flash ID: 0x60 0x00 Scanning PCI bus...PCI: pci_scan_bus for bus 0 POST: 0x24 PCI: 00:00.0 [1057/0004] PCI: 00:0b.0 [10ad/0565] POST: 0x25 PCI: pci_scan_bus returning with max=00 POST: 0x55 done Allocating PCI resources... PCI: 00:00.0 register 10(00000008), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:00.0 14 <- [0xfebff000 - 0xfebfffff] mem ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:0b.0 cmd <- 07 done. Initializing PCI devices... PCI devices initialized Sandpoint BSP PowerPC 7410 CPU, version 17.4 NVRAM size is 8191 Error! malloc: Free_mem_ptr >= free_mem_end_ptrPOST: 0xff From ebiederman at lnxi.com Tue Mar 11 10:36:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Tue Mar 11 10:36:00 2003 Subject: linuxbios on PPC (fwd) In-Reply-To: References: Message-ID: "Ronald G. Minnich" writes: > Greg Watson almost has it done. > > It required a few changes to linuxbios build procedures, but not many. It > has small impact. Cool. I would think the problem would be a missing call to elf_boot, not jump to linuxbiosmain. Has anyone worked out how to boot a PPC kernel yet? There is not a standard PPC firmware so it should be some easier. Do we need to talk about an etherboot port to PPC? Is it time to start considering an ADLO like tool that implements openfirmware? Ron I don't know if we will have time but I will see if I can ring a demo out of you this afternoon, since I'm going to be down there anyway. Eric From rminnich at lanl.gov Tue Mar 11 10:42:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Mar 11 10:42:01 2003 Subject: linuxbios on PPC (fwd) In-Reply-To: Message-ID: On 11 Mar 2003, Eric W. Biederman wrote: > I would think the problem would be a missing call to elf_boot, > not jump to linuxbiosmain. I leave that one to Greg. > Do we need to talk about an etherboot port to PPC? don't know yet. > Is it time to start considering an ADLO like tool > that implements openfirmware? That's what Stefan Reinauer has been working on. Also steve james has in fact done a forth boot project that is almost there. > Ron I don't know if we will have time but I will see if I can > ring a demo out of you this afternoon, since I'm going to be down > there anyway. the node is off-site, but maybe Greg can bring it in tomorrow. ron From ebiederman at lnxi.com Tue Mar 11 10:59:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Tue Mar 11 10:59:00 2003 Subject: linuxbios on PPC (fwd) In-Reply-To: References: Message-ID: "Ronald G. Minnich" writes: > On 11 Mar 2003, Eric W. Biederman wrote: > > > I would think the problem would be a missing call to elf_boot, > > not jump to linuxbiosmain. > > I leave that one to Greg. > > > Do we need to talk about an etherboot port to PPC? > > don't know yet. It works on Itanium so porting should not be too bad. > > Is it time to start considering an ADLO like tool > > that implements openfirmware? > > That's what Stefan Reinauer has been working on. Also steve james has in > fact done a forth boot project that is almost there. Right. > > Ron I don't know if we will have time but I will see if I can > > ring a demo out of you this afternoon, since I'm going to be down > > there anyway. > > the node is off-site, but maybe Greg can bring it in tomorrow. Darn. Maybe I can just hope to meet Greg. I'm pretty certain I won't have time to do more than drive to the airport tomorrow. Eric From hcyun at etri.re.kr Tue Mar 11 19:05:01 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Tue Mar 11 19:05:01 2003 Subject: ADLO for EPIA Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A3@cms3> Both keyboard and mouse are plugged and of cause I can boot linux with LinuxBIOS. Is there any board depedent part other than shadow memory control? For now, I just want to see screen output from VGABIOS or BOCHS BIOS. Thanks.. > -----Original Message----- > From: Adam Sulmicki [mailto:adam at cfar.umd.edu] > Sent: Wednesday, March 12, 2003 12:29 AM > To: hcyun at etri.re.kr > Cc: linuxbios at clustermatic.org > Subject: RE: ADLO for EPIA > > > > it possibly may be bochs. Are both keyboard and mouse plugged in? > > does it work without ADLO/BOCHS BIOS? ie can you run linux > from LinuxBIOS > stanalone? > > On Tue, 11 Mar 2003 hcyun at etri.re.kr wrote: > > > I tested ADLO on EPIA but it failed on the first try. > > > > I grapped vgabios using your Makefile target and modified > loader.s to > > enable > > shadow ram control registers of EPIA. > > However, it hang around post code 0x96 and nothing is > shown on the CRT. > > > > Do you have any idea what 0x96 post code means. > > Is it a bochs post code or vgabios postcode? > > > > > > > -----Original Message----- > > > From: Adam Sulmicki [mailto:adam at cfar.umd.edu] > > > Sent: Tuesday, March 11, 2003 4:13 AM > > > To: hcyun at etri.re.kr > > > Cc: linuxbios at clustermatic.org > > > Subject: Re: ADLO for EPIA > > > > > > > > > > I'm trying to bring up VGA on EPIA board. > > > > >From the list, EPIA board is supported and I've tested > > > with Angrew's image. > > > > However, due to full support of VGA is necessary, I'm > > > trying to figure out > > > > ADLO to run binary only > > > > VGABIOS rom image. > > > > Can I acomplish this with ADLO?. If yes, how much extra > > > work will be needed > > > > you think? > > > > > > I'm not familar with EPIA. Wasn't that the motherboard that > > > had all this > > > video emulation code (whatever you would call it). what's > the gfx card > > > anyway? > > > > > > anyway. if you can separate out the vga bios from rest of the > > > bios (and it > > > can function standalone), then there's no reason why it would > > > not work. > > > > > > as for "how much extra work" depends on what you want to use > > > it for. for > > > example IDE code in bochs-bios could use some more work > (last time I > > > looked at it). > > > > > > > > > -- > > > Adam Sulmicki > > > http://www.eax.com The Supreme Headquarters of the > 32 bit registers > > > > > > > > -- > Adam Sulmicki > http://www.eax.com The Supreme Headquarters of the 32 bit registers > -------------- next part -------------- An HTML attachment was scrubbed... URL: From adam at cfar.umd.edu Tue Mar 11 20:46:00 2003 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Tue Mar 11 20:46:00 2003 Subject: ADLO for EPIA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A3@cms3> Message-ID: <20030311213305.Y41145-100000@www.missl.cs.umd.edu> > Both keyboard and mouse are plugged > I can boot linux with LinuxBIOS. good. > Is there any board depedent part other than shadow memory control? no. > For now, I just want to see screen output from VGABIOS or BOCHS BIOS. hmm can you try warm boot? ie first boot with your classic pc bios, then warm boot into the linuxbios+adlo and all other stuff. If you have ICE, you could try to see how far it goes. u could setup execution break point at 0x7C00 as it is used repeately during the boot. -- Adam Sulmicki http://www.eax.com The Supreme Headquarters of the 32 bit registers From hcyun at etri.re.kr Tue Mar 11 21:59:00 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Tue Mar 11 21:59:00 2003 Subject: ADLO for EPIA Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A4@cms3> > hmm can you try warm boot? ie first boot with your classic pc > bios, then > warm boot into the linuxbios+adlo and all other stuff. I tried but no success. > > If you have ICE, you could try to see how far it goes. u could setup > execution break point at 0x7C00 as it is used repeately > during the boot. I don't have ICE (Could you recommend one ?) . Therefore I printed post code at several point of bochs code. And I think it stop during VGABIOS execution because it works before option rom scan procedure. I think EPIA bios do something on northbridge settings which VGABIOS require. How do you think? I found some VGA related registers on northbridge such as 0xfb register which have 'VGA Enable' disable bit. However When I enable it, strangely etherboot doesn't works and system restarted. (My boot configuration is linuxbios -> etherboot -> ADLO payload ) Hmm.. > > -- > Adam Sulmicki > http://www.eax.com The Supreme Headquarters of the 32 bit registers > -------------- next part -------------- An HTML attachment was scrubbed... URL: From aip at cwlinux.com Tue Mar 11 22:57:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Tue Mar 11 22:57:00 2003 Subject: ADLO for EPIA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A4@cms3>; from hcyun@etri.re.kr on Wed, Mar 12, 2003 at 12:24:14PM +0900 References: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A4@cms3> Message-ID: <20030312122137.A19391@mail.cwlinux.com> > I tried but no success. In the current cvs tree, vga is not enabled. Have you enabled it yet? -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From hcyun at etri.re.kr Tue Mar 11 23:15:00 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Tue Mar 11 23:15:00 2003 Subject: ADLO for EPIA Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A5@cms3> I mean I did as Slumicki suggested. First I booted with original EPIA bios. Then changed image with linuxbios and did soft-reset while power is on. This can be done because I have rom-emulator. > -----Original Message----- > From: Andrew Ip [mailto:aip at cwlinux.com] > Sent: Wednesday, March 12, 2003 1:22 PM > To: hcyun at etri.re.kr > Cc: adam at cfar.umd.edu; linuxbios at clustermatic.org > Subject: Re: ADLO for EPIA > > > > I tried but no success. > In the current cvs tree, vga is not enabled. Have you > enabled it yet? > > -Andrew > > -- > Andrew Ip > Email: aip at cwlinux.com > Tel: (852) 2542 2046 > Fax: (852) 2542 2036 > Mobile: (852) 9201 9866 > > Cwlinux Limited > Unit 202B 2/F Lai Cheong Factory Building, > 479-479A Castle Peak Road, > Lai Chi Kok, Kowloon, > Hong Kong. > > Tel: (852)2542 2046 > Fax: (852)2542 2036 > > For public pgp key, please obtain it from http://www.keyserver.net/en. > -------------- next part -------------- An HTML attachment was scrubbed... URL: From adam at cfar.umd.edu Tue Mar 11 23:23:00 2003 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Tue Mar 11 23:23:00 2003 Subject: ADLO for EPIA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A4@cms3> Message-ID: <20030311233422.Q41145-100000@www.missl.cs.umd.edu> > I don't have ICE (Could you recommend one ?). I suppose Ron knows much more about them than I do. All we have here is American Arium ECM 20. > Therefore I printed post code at several point of bochs code. And I > think it stop during VGABIOS execution because it works before option > rom scan procedure. I think EPIA bios do something on northbridge > settings which VGABIOS require. How do you think? It is possible. It was one of those things that I hoped warm boot would take care of. Another idea to try. I'm not actually sure if BOCHS BIOS would boot without the VGABIOS but it should be possible, so. ( I assume u have here Port 80 card.) First unboundle vga bios. ie does not include it at all. Then write a simple boot sector which sets port 80 to something and see if you can get that far. Also this way you sould be able to take care problems in bochs bios which are not related to video. It could potentially make trying to take care of video easier. if the binary only vga bios comes out to be useless you could grab video bios from boch's project and try to adapt that one instead. > I found some VGA related registers on northbridge such as 0xfb register > which have 'VGA Enable' > disable bit. However When I enable it, strangely etherboot doesn't works > and system restarted. > (My boot configuration is linuxbios -> etherboot -> ADLO payload ) I guess ICE makes life easier. -- Adam Sulmicki http://www.eax.com The Supreme Headquarters of the 32 bit registers From shubhangi.jadhav at patni.com Wed Mar 12 01:13:00 2003 From: shubhangi.jadhav at patni.com (Shubhangi Jadhav) Date: Wed Mar 12 01:13:00 2003 Subject: Problem downloading code from cvs Message-ID: Hi, I was downloading the LinuxBIOS source from the cvs and got the following error : cvs [checkout aborted]: could not chdir to freebios/src/arch/alpha/config: Invalid argument Could you please fix the problem with the cvs or update the snapshot on the website with the latest source. Given below are the operation details : C:\Program Files\GNU\WinCvs 1.2>cvs -d:pserver:anonymous at cvs.freebios.sourceforg e.net:/cvsroot/freebios login (Logging in to anonymous at cvs.freebios.sourceforge.net) CVS password: C:\Program Files\GNU\WinCvs 1.2>cvs -z3 -d:pserver:anonymous at cvs.freebios.source forge.net:/cvsroot/freebios co freebios cvs server: Updating freebios U freebios/.cvsignore U freebios/AUTHORS U freebios/COPYING U freebios/ChangeLog U freebios/NEWS U freebios/README cvs server: Updating freebios/Documentation U freebios/Documentation/Config U freebios/Documentation/LinuxBIOSDoc.config U freebios/Documentation/configmanual.lyx U freebios/Documentation/configmanual.ps U freebios/Documentation/flashfaq.txt cvs server: Updating freebios/HOWTO U freebios/HOWTO/ALIM1631_M1535D U freebios/HOWTO/K7SEM U freebios/HOWTO/L440GX U freebios/HOWTO/SiS630 cvs server: Updating freebios/chip cvs server: Updating freebios/chip/intel cvs server: Updating freebios/chip/stpc cvs server: Updating freebios/device cvs server: Updating freebios/doc cvs server: Updating freebios/fs cvs server: Updating freebios/include cvs server: Updating freebios/include/northsouthbridge cvs server: Updating freebios/include/northsouthbridge/sis cvs server: Updating freebios/include/northsouthbridge/sis/630 cvs server: Updating freebios/include/rom cvs server: Updating freebios/include/rom/bus cvs server: Updating freebios/include/sys cvs server: Updating freebios/lib cvs server: Updating freebios/linuxbios cvs server: Updating freebios/linuxbios/440BX cvs server: Updating freebios/linuxbios/GA-6BXC cvs server: Updating freebios/linuxbios/L440GX cvs server: Updating freebios/linuxbios/MS440GX cvs server: Updating freebios/linuxbios/MVP4 cvs server: Updating freebios/linuxbios/PM133 cvs server: Updating freebios/linuxbios/SIS630 cvs server: Updating freebios/linuxbios/STPC cvs server: Updating freebios/linuxbios/include cvs server: Updating freebios/linuxbios/inflate cvs server: Updating freebios/linuxbios/kernel_patches cvs server: Updating freebios/linuxbios/lib cvs server: Updating freebios/mkrom cvs server: Updating freebios/rom cvs server: Updating freebios/rom/device cvs server: Updating freebios/rom/devices cvs server: Updating freebios/romimages cvs server: Updating freebios/romimages/MS7308E U freebios/romimages/MS7308E/Makefile U freebios/romimages/MS7308E/ldscript.ld cvs server: Updating freebios/romimages/MS7308E_FLASHROOT U freebios/romimages/MS7308E_FLASHROOT/Makefile U freebios/romimages/MS7308E_FLASHROOT/ldscript.ld cvs server: Updating freebios/romimages/RON_ASUS_CUA U freebios/romimages/RON_ASUS_CUA/Makefile U freebios/romimages/RON_ASUS_CUA/ldscript.ld cvs server: Updating freebios/romimages/RON_ASUS_CUA_DOC U freebios/romimages/RON_ASUS_CUA_DOC/Makefile U freebios/romimages/RON_ASUS_CUA_DOC/ldscript.ld cvs server: Updating freebios/romimages/RON_ASUS_CUA_DOC2 U freebios/romimages/RON_ASUS_CUA_DOC2/Makefile U freebios/romimages/RON_ASUS_CUA_DOC2/ipl.S U freebios/romimages/RON_ASUS_CUA_DOC2/ldscript.ld cvs server: Updating freebios/romimages/RON_GA6-BXC U freebios/romimages/RON_GA6-BXC/Makefile cvs server: Updating freebios/romimages/RON_L440GX U freebios/romimages/RON_L440GX/Makefile cvs server: Updating freebios/romimages/RON_L440GX_SCSI U freebios/romimages/RON_L440GX_SCSI/Makefile cvs server: Updating freebios/romimages/RON_TYAN_S1834 U freebios/romimages/RON_TYAN_S1834/Makefile cvs server: Updating freebios/romimages/RON_VIA_SPD U freebios/romimages/RON_VIA_SPD/Makefile U freebios/romimages/RON_VIA_SPD/crt0.S U freebios/romimages/RON_VIA_SPD/ldscript.ld cvs server: Updating freebios/romimages/RON_VT5259A U freebios/romimages/RON_VT5259A/Makefile U freebios/romimages/RON_VT5259A/crt0.S U freebios/romimages/RON_VT5259A/ldscript.ld cvs server: Updating freebios/romimages/RON_VT5426 U freebios/romimages/RON_VT5426/Makefile U freebios/romimages/RON_VT5426/crt0.S U freebios/romimages/RON_VT5426/ldscript.ld cvs server: Updating freebios/romimages/RON_WINFAST6300 U freebios/romimages/RON_WINFAST6300/Makefile U freebios/romimages/RON_WINFAST6300/crt0.S U freebios/romimages/RON_WINFAST6300/ldscript.ld cvs server: Updating freebios/romimages/WINFAST6300_FLASHROOT U freebios/romimages/WINFAST6300_FLASHROOT/Makefile U freebios/romimages/WINFAST6300_FLASHROOT/crt0.S U freebios/romimages/WINFAST6300_FLASHROOT/ldscript.ld cvs server: Updating freebios/romimages/WINFAST6300_SERCONS U freebios/romimages/WINFAST6300_SERCONS/Makefile U freebios/romimages/WINFAST6300_SERCONS/ldscript.ld cvs server: Updating freebios/src cvs server: Updating freebios/src/DoCipl cvs server: Updating freebios/src/arch cvs server: Updating freebios/src/arch/alpha U freebios/src/arch/alpha/Config cvs server: Updating freebios/src/arch/alpha/boot U freebios/src/arch/alpha/boot/Config U freebios/src/arch/alpha/boot/boot.c U freebios/src/arch/alpha/boot/linuxbios_table.c cvs [checkout aborted]: could not chdir to freebios/src/arch/alpha/config: Inval id argument Regards, Shubhangi From ts1 at cma.co.jp Wed Mar 12 08:43:01 2003 From: ts1 at cma.co.jp (SONE Takeshi) Date: Wed Mar 12 08:43:01 2003 Subject: Patch to flash_rom Message-ID: <20030312140819.GB9848@cma.co.jp> Hi, I modified the flash_rom program a little and it might be useful for others. - Add "enable" for VIA VT8231 (southbridge of EPIA board) This does same thing as what is in src/mainboard/via/epia/README. (Btw, I downloaded the datasheet for VT8231 from here: http://www.google.com/search?q=vt8231+application%2Fpdf It's publically online ;-) - Fixed segfault when no "enable" is defined for a board. - Fixed delay calibration so it really finishes in a second (original code takes up to 100 seconds theoretically, >10 seconds on my box) - Support for -r (read), -w (write), and -v (verify). Writing is not really tested since I don't have my BIOS Savior yet. Looking forward to trying out LinuxBIOS on my box. Thanks for the great work. -- Takeshi Index: flash_rom.c =================================================================== RCS file: /cvsroot/freebios/freebios/util/flash_and_burn/flash_rom.c,v retrieving revision 1.16 diff -u -r1.16 flash_rom.c --- flash_rom.c 28 Feb 2003 17:21:37 -0000 1.16 +++ flash_rom.c 12 Mar 2003 14:03:11 -0000 @@ -136,6 +136,9 @@ new = old | 1; + if (new == old) + return 0; + ok = pci_write_byte(dev, 0x4e, new); if (ok != new) { @@ -146,6 +149,28 @@ return 0; } +int +enable_flash_vt8231(struct pci_dev *dev, char *name) { + unsigned char old, new; + int ok; + + old = pci_read_byte(dev, 0x40); + + new = old | 0x10; + + if (new == old) + return 0; + + ok = pci_write_byte(dev, 0x40, new); + + if (ok != 0) { + printf("tried to set 0x%x to 0x%x on %s failed (WARNING ONLY)\n", + old, new, name); + return -1; + } + return 0; +} + struct flashchip * probe_flash(struct flashchip * flash) { int fd_mem; @@ -227,8 +252,8 @@ timeusec = 1000000 * (end.tv_sec - start.tv_sec ) + (end.tv_usec - start.tv_usec); fprintf(stderr, "timeusec is %d\n", timeusec); - count *= 100; - if (timeusec < 1000000) + count *= 2; + if (timeusec < 1000000/3) continue; ok = 1; } @@ -260,6 +285,7 @@ {0x1, 0x1, "sis630 -- what's the ID?", enable_flash_sis630}, {0x8086, 0x2480, "E7500", enable_flash_e7500}, + {0x1106, 0x8231, "VT8231", enable_flash_vt8231}, }; int @@ -291,10 +317,25 @@ } /* now do the deed. */ - enable->doit(dev, enable->name); + if (enable) { + printf("Enabling flash write on %s...", enable->name); + if (enable->doit(dev, enable->name) == 0) + printf("OK\n"); + } return 0; } +void usage(const char *name) +{ + printf("usage: %s [-rwv] [file]\n", name); + printf("-r: read flash and save into file\n" + "-w: write file into flash (default when file is specified)\n" + "-v: verify flash against file\n" + " If no file is specified, then all that happens\n" + " is that flash info is dumped\n"); + exit(1); +} + int main (int argc, char * argv[]) { @@ -302,12 +343,36 @@ unsigned long size; FILE * image; struct flashchip * flash; - - if (argc > 2){ - printf("usage: %s [romimage]\n", argv[0]); - printf(" If no romimage is specified, then all that happens\n"); - printf(" is that flash info is dumped\n"); + int opt; + int read_it = 0, write_it = 0, verify_it = 0; + char *filename = NULL; + while ((opt = getopt(argc, argv, "rwv")) != EOF) { + switch (opt) { + case 'r': + read_it = 1; + break; + case 'w': + write_it = 1; + break; + case 'v': + verify_it = 1; + break; + default: + usage(argv[0]); + break; + } } + if (read_it && write_it) { + printf("-r and -w are mutually exclusive\n"); + usage(argv[0]); + } + + if (optind < argc) + filename = argv[optind++]; + + printf("Calibrating timer since microsleep sucks ... takes a second\n"); + myusec_calibrate_delay(); + printf("OK, calibrated, now do the deed\n"); /* try to enable it. Failure IS an option, since not all motherboards * really need this to be done, etc., etc. It sucks. @@ -320,25 +385,35 @@ } printf("Part is %s\n", flash->name); - if (argc < 2){ + if (!filename){ printf("OK, only ENABLING flash write, but NOT FLASHING\n"); return 0; } size = flash->total_size * 1024; - - if ((image = fopen (argv[1], "r")) == NULL) { - perror("Error opening image file"); - exit(1); - } - buf = (char *) calloc (size, sizeof(char)); - fread (buf, sizeof(char), size, image); - printf("Calibrating timer since microsleep sucks ... takes a second\n"); - myusec_calibrate_delay(); - printf("OK, calibrated, now do the deed\n"); + if (read_it) { + if ((image = fopen (filename, "w")) == NULL) { + perror("Error opening image file"); + exit(1); + } + printf("Reading Flash..."); + memcpy(buf, (const char *) flash->virt_addr, size); + fwrite(buf, sizeof(char), size, image); + fclose(image); + printf("done\n"); + } else { + if ((image = fopen (filename, "r")) == NULL) { + perror("Error opening image file"); + exit(1); + } + fread (buf, sizeof(char), size, image); + fclose(image); + } - flash->write (flash, buf); - verify_flash (flash, buf, /* verbose = */ 0); + if (write_it) + flash->write (flash, buf); + if (verify_it) + verify_flash (flash, buf, /* verbose = */ 0); return 0; } From felix at allot.com Wed Mar 12 08:56:01 2003 From: felix at allot.com (Felix Radensky) Date: Wed Mar 12 08:56:01 2003 Subject: Booting VxWorks from LinuxBios - success Message-ID: <3E6F4288.70006@allot.com> Hi, I've finally managed to boot VxWorks from linuxbios using old (non-elfboot) method. This required placing linuxbios itself to other memory location (0xC0000 instead of 0x4000) and reducing it's heap size to 64K, so that data, bss, heap and stack could be placed between 0xC0000 and 0xF0000. To make these areas mapped as DRAM and not PCI, I had to initalize PAM registers differently. After I've managed to relocate linuxbios code, booting vxworks was easy. The VxWorks bootloader is uncompressed to 0x8000 and jump is performed to 0x8010 (protected mode entry point). If anyone is interested in more details, I'll be glad to provide them. I'd like to specially thank Peter Fox and Cristopher Stutts for their help. Felix. From rminnich at lanl.gov Wed Mar 12 10:17:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 12 10:17:01 2003 Subject: ADLO for EPIA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6A4@cms3> Message-ID: I wish I could work on this but I don't have time. What you ought to do: - bring the node up with serial console - run the linuxbios utility for vga bios emulation (vgabios) and try to use it with a known-good vga bios image to see if you can get vga up I think that's the easiest way. ron From rminnich at lanl.gov Wed Mar 12 10:20:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 12 10:20:01 2003 Subject: Problem downloading code from cvs In-Reply-To: Message-ID: On Wed, 12 Mar 2003, Shubhangi Jadhav wrote: > Hi, > > I was downloading the LinuxBIOS source from the cvs and got the following > error : > > cvs [checkout aborted]: could not chdir to freebios/src/arch/alpha/config: > Invalid argument > yes, this is a mistake on our part which I am not sure I want to fix. Basically there is a file called Config, and a directory called config. case-insensitive file systems like Windows (anything) and MacOS HFS can't handle this at all. Can you use a non-windows machine? ron From rminnich at lanl.gov Wed Mar 12 10:23:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 12 10:23:00 2003 Subject: Patch to flash_rom In-Reply-To: <20030312140819.GB9848@cma.co.jp> Message-ID: thanks very much. If anyone would like to put code in to support reading/writing different segments of flash, we could use it. ron From pyro at linuxlabs.com Wed Mar 12 11:37:01 2003 From: pyro at linuxlabs.com (steven james) Date: Wed Mar 12 11:37:01 2003 Subject: Patch to flash_rom In-Reply-To: Message-ID: Greetings, You have good timing. I was just finishing up a 'universal' flash tool that can do that and handle payload tags as well (for use with bootselect). It also supports block locking/unlocking for devices having that feature. It has a seperate flash_on utility. It should be fairly easy to merge in devices from flash_rom. I'll get that posted soon. G'day, sjames On Wed, 12 Mar 2003, Ronald G. Minnich wrote: > thanks very much. > > If anyone would like to put code in to support reading/writing different > segments of flash, we could use it. > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From rminnich at lanl.gov Wed Mar 12 12:03:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 12 12:03:00 2003 Subject: Patch to flash_rom In-Reply-To: Message-ID: steve can you just integrate flash_on into the tool, as I started to do in flash_rom? ron From pyro at linuxlabs.com Wed Mar 12 12:38:00 2003 From: pyro at linuxlabs.com (steven james) Date: Wed Mar 12 12:38:00 2003 Subject: Patch to flash_rom In-Reply-To: Message-ID: Greetings, Sure, it's done. Just a matter of linking. G'day, sjames On Wed, 12 Mar 2003, Ronald G. Minnich wrote: > steve can you just integrate flash_on into the tool, as I started to do in > flash_rom? > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From hansolofalcon at worldnet.att.net Wed Mar 12 13:56:01 2003 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Wed Mar 12 13:56:01 2003 Subject: Missing file from download page on website Message-ID: <000201c2e8cc$97105e80$1ac3580c@who5> Hello from Gregg C Levine One of the files isn't available from the download page for the Linux BIOS website. Which is http://www.linuxbios.org/developer/download/index.html The file name, is tboot.c. It's my guess, is that particular file wasn't brought over, when the new site was constructed. It's not important. But it is an interesting bit of code. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) From charliesong at concordidea.com Wed Mar 12 14:44:00 2003 From: charliesong at concordidea.com (Charlie Song) Date: Wed Mar 12 14:44:00 2003 Subject: SPD problem Message-ID: <01d101c2e8d3$837fa7c0$b21ea8c0@charliesong> Hi all, I'm trying to use "scanspd" to read SPD. It works fine for some motherboards. But it read back 0s for other motherboards. Does that mean I cann't read SPD for some motherboard? Thanks, Charlie -------------- next part -------------- An HTML attachment was scrubbed... URL: From alesan at manoweb.com Wed Mar 12 14:47:01 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Wed Mar 12 14:47:01 2003 Subject: SMA_SIZE and IDE_BOOT_DRIVE on pcchips810 Message-ID: <3E6F946A.4050806@manoweb.com> Hi. I was reading the source code but I couldn't fully understand the meaning of SMA_SIZE and IDE_BOOT_DRIVE in the config file for pchipc 810lmr. SMA_SIZE should set the amount of framebuffer memory; but which are the possible values? How can I set the minimum, or 8MB, or 64MB? The following code from src/northsouthbridge/sis/730/ipl.S does the FB activation but I can't figure which values of SMA_SIZE correspond to the various video ram sizes. #ifdef HAVE_FRAMEBUFFER orb $SMA_SIZE, %al # enable SMA 8 MB for VGA #endif /* HAVE_FRAMEBUFFER */ #else /* !SIZE_ALL */ no_sdram: #ifdef HAVE_FRAMEBUFFER movb $0x63, %ah # enable DIMM 0 and movb $(SMA_SIZE + 0x01), %al # enable SMA 8 MB for VGA #else /* HAVE_FRAMEBUFFER */ movw $0x6301, %ax # enable DIMM 0 #endif /* HAVE_FRAMEBUFFER */ There are some sample config files where SMA_SIZE is set to 0x80, 0x90, 0xA0 - how much video memory is activated? Similar question for IDE_BOOT_DRIVE. On the sample config files that come with the code it's always set to '2', but the source (ide_fill_inbuf.c) would suggest me /dev/hda is '0' - but I'm not sure. $ grep -r IDE_BOOT_DRIVE . ./src/rom/ide_fill_inbuf.c:#ifndef IDE_BOOT_DRIVE ./src/rom/ide_fill_inbuf.c:#define IDE_BOOT_DRIVE 0 ./src/rom/ide_fill_inbuf.c: ide_read_sector(IDE_BOOT_DRIVE, buffer, block_num, ./util/config/pcchips787.config:option IDE_BOOT_DRIVE=2 ./util/config/stpc.config:option IDE_BOOT_DRIVE=2 /dev/hda -> 0 /dev/hdb -> 1 /dev/hdc -> 2 /dev/hdd -> 3 Is it correct??? P.S. Is it possible to boot from a CDROM? bye bye thank you!!! as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From steve at nexpath.com Wed Mar 12 16:44:01 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Wed Mar 12 16:44:01 2003 Subject: SMA_SIZE and IDE_BOOT_DRIVE on pcchips810 In-Reply-To: <3E6F946A.4050806@manoweb.com> References: <3E6F946A.4050806@manoweb.com> Message-ID: <3E6FB1B5.3090106@nexpath.com> Alessio Sangalli wrote: > SMA_SIZE should set the amount of framebuffer memory; but which are the > possible values? How can I set the minimum, or 8MB, or 64MB? > SiS 630 Dev 0 FN 0 Register 63h DRAM Status Register Bit 7 =1 enable, =0 disable, shared memory Bits[6:4] Size (Total Share memory size for 128 bit mode) Shared Memory Size on DIMM0 000 2M 4M 001 4M 8M 010 8M 16M 011 16M 32M 100 32M 64M 101 64M Not Supported Others : Reserved Bit 3: reserved Bit 2: DIMM2 installed =1, absent =0 Bit 1: DIMM1 " Bit 0: DIMM0 " > /dev/hda -> 0 > /dev/hdb -> 1 > /dev/hdc -> 2 > /dev/hdd -> 3 > > Is it correct??? Yes. Some of us boot from /dev/hdc using CF, then mount /dev/hda0 as the root device. > > P.S. Is it possible to boot from a CDROM? Not sure, probably not. -Steve From rminnich at lanl.gov Wed Mar 12 18:10:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 12 18:10:01 2003 Subject: SPD problem In-Reply-To: <01d101c2e8d3$837fa7c0$b21ea8c0@charliesong> Message-ID: On Wed, 12 Mar 2003, Charlie Song wrote: > I'm trying to use "scanspd" to read SPD. It works fine for some > motherboards. But it read back 0s for other motherboards. some motherboards have two I2C bussees, one for SPD and one for sensors. The BIOS uses the I2C bus for SPD, then sets a register so that the I2C can only be used for sensors. The ASUS CUA works this way. The result is that you have to find the hardware that sets the register and change it for SPD. ron From alesan at manoweb.com Thu Mar 13 03:21:01 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Thu Mar 13 03:21:01 2003 Subject: SMA_SIZE and IDE_BOOT_DRIVE on pcchips810 In-Reply-To: <3E6F946A.4050806@manoweb.com> References: <3E6F946A.4050806@manoweb.com> <3E6FB1B5.3090106@nexpath.com> Message-ID: <3E704507.8070804@manoweb.com> Steve Gehlbach wrote: > SiS 630 Dev 0 FN 0 > Register 63h DRAM Status Register So, I hope I've made the correct calculations, I write them here for future reference: SMA_SIZE values for different video ram sizes: 10000000b -> 0x80h (2MB/4MB) 10010000b -> 090xh (4MB/8MB) 10100000b -> 0A0xh (8MB/16MB) 10110000b -> 0B0xh (16MB/32MB) 11000000b -> 0C0xh (32MB/64MB) 11010000b -> 0D0xh (64MB/na) What I don't understand now is the "double" size value (with the 'not supported' value for 0xD0). What does it mean? > Yes. Some of us boot from /dev/hdc using CF, then mount /dev/hda0 as > the root device. Interesting. But, I was asking to myself... how much time does the hard-disk need to spin-up? I've made few tests and it seems quite fast, only few seconds. How much time is it possible to gain with a CF ide device? I have a small CF card, I should buy the CF-IDE adapter, but I have no idea of the advantages it would bring to me. Thank you for the exceptional work! bye as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From spirit at reactor.ru Thu Mar 13 05:19:00 2003 From: spirit at reactor.ru (Alexander Amelkin) Date: Thu Mar 13 05:19:00 2003 Subject: Universal Flashing tool In-Reply-To: References: Message-ID: <491991673.20030313134256@reactor.ru> Hello guys! Yesterday I spent the day fighting the flash_rom on my pcchips m787cl+ board (SiS630). It just won't work. It mmaps correctly and I can read the BIOS (i created a flash_save tool based on the flash_rom.c code), but the chip identification just doesn't work. My assumption is that it doesn't disable Shadow memory before sending the SoftID sequence to the flash. Btw, the 'flash_and_burn' thing simply doesn't compile complaining on the absence of the 'pci/pci.h' file. So I use flash_rom.c from the 'sis630' directory. But that was just a preface. What I was going to say here is after I gave up fighting with the flash_rom.c, I started searching the Internet for universal flash writers. And you know what? I found a marvelous tool - Uniflash! It can flash almost any flash part on almost any motherboard with any file you say. The tool is written in Pascal for DOS and is open source. I think those of you here who are into the development of the flash_rom.c can use that source to make flash_rom.c way more compatible than it is now. For now I prefer using Uniflash from DOS. It made my m787cl+ boot LinixBIOS in less than a minute after I spent the day fighting the flash_rom.c :)))) Here is the link: http://www.krizovakomunikacia.sk/rainbow/programs.html#UniFlash With best regards, Alexander mailto:spirit at reactor.ru Reactor Critical - 3D Hardware reviews http://www.reactor.ru - in Russian http://www.reactorcritical.com - in English --8<--just-a-cookie---------------------------------------------- Those who contemn Real Programmers are contemned by them more than those who contemn them contemn them. If you understood that then you're a Real Programmer. --8<------------------------------------------------------------- From jerj at coplanar.net Thu Mar 13 08:11:01 2003 From: jerj at coplanar.net (Jeremy Jackson) Date: Thu Mar 13 08:11:01 2003 Subject: Universal Flashing tool In-Reply-To: <491991673.20030313134256@reactor.ru> References: <491991673.20030313134256@reactor.ru> Message-ID: <1047562571.2704.21.camel@contact.skynet.coplanar.net> I wonder if it doesn't make more sense to use the Linux MTD framework. I have begun porting devbios to it. I have refactored devbios into two halves, devbios and a flash library/map library. The MTD chip driver which uses the library is about half done. Perhaps then the LinuxBIOS flash tool can be split into a map driver (the shadow control stuff) and a chip driver for the individual flash chips, then included into MTD. Regards, Jeremy PS - I've used Uniflash, it's very old code with lots of nice global variables and such, but it did help me get an Atmel flash chip working. On Thu, 2003-03-13 at 05:42, Alexander Amelkin wrote: > Hello guys! > > Yesterday I spent the day fighting the flash_rom on my pcchips > m787cl+ board (SiS630). It just won't work. It mmaps correctly and I > can read the BIOS (i created a flash_save tool based on the > flash_rom.c code), but the chip identification just doesn't work. My > assumption is that it doesn't disable Shadow memory before sending > the SoftID sequence to the flash. Btw, the 'flash_and_burn' thing > simply doesn't compile complaining on the absence of the 'pci/pci.h' > file. So I use flash_rom.c from the 'sis630' directory. > > But that was just a preface. What I was going to say here is after I > gave up fighting with the flash_rom.c, I started searching the > Internet for universal flash writers. And you know what? I found a > marvelous tool - Uniflash! It can flash almost any flash part on > almost any motherboard with any file you say. The tool is written in > Pascal for DOS and is open source. I think those of you here who > are into the development of the flash_rom.c can use that source to > make flash_rom.c way more compatible than it is now. > > For now I prefer using Uniflash from DOS. It made my m787cl+ boot > LinixBIOS in less than a minute after I spent the day fighting the > flash_rom.c :)))) > > Here is the link: > http://www.krizovakomunikacia.sk/rainbow/programs.html#UniFlash > > With best regards, > Alexander mailto:spirit at reactor.ru > Reactor Critical - 3D Hardware reviews > http://www.reactor.ru - in Russian > http://www.reactorcritical.com - in English > > --8<--just-a-cookie---------------------------------------------- > Those who contemn Real Programmers are contemned by them more than > those who contemn them contemn them. If you understood that then > you're a Real Programmer. > --8<------------------------------------------------------------- > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From 04.Vaughan.Diarmid at exmouthcollege.devon.sch.uk Thu Mar 13 08:53:01 2003 From: 04.Vaughan.Diarmid at exmouthcollege.devon.sch.uk (Diarmid Vaughan) Date: Thu Mar 13 08:53:01 2003 Subject: New to linuxBIOS Message-ID: <8DBD824609860746A6873D8CF21840FF2148F3@pennyman.exmouthcollege.devon.sch.uk> I am new to linux and to linuxBIOS. I am interested in linuxBIOS. Can someone tell me how to start with my make of Motherboard. My motherboard is as follows: Jetway 694TAS with: VIA 694T/686B chipset Socket 370 Intel celeron (i have windows xp and mandrake linux 8.1 on it) The link about my board is: http://www.jetway.com.tw/evisn/product/socket370/694tas/694tas.htm i need to know what i need to do in order to start and where to go from there. Thanks Vaughan Diarmid From rminnich at lanl.gov Thu Mar 13 08:58:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Mar 13 08:58:01 2003 Subject: Universal Flashing tool In-Reply-To: <491991673.20030313134256@reactor.ru> Message-ID: On Thu, 13 Mar 2003, Alexander Amelkin wrote: > Yesterday I spent the day fighting the flash_rom on my pcchips > m787cl+ board (SiS630). It just won't work. It mmaps correctly and I > can read the BIOS (i created a flash_save tool based on the > flash_rom.c code), but the chip identification just doesn't work. My > assumption is that it doesn't disable Shadow memory before sending > the SoftID sequence to the flash. Btw, the 'flash_and_burn' thing > simply doesn't compile complaining on the absence of the 'pci/pci.h' > file. So I use flash_rom.c from the 'sis630' directory. ok, that's the first time I've seen it not compile. New CVS? Who changed it? > http://www.krizovakomunikacia.sk/rainbow/programs.html#UniFlash Thanks much for the link, I will try to take alook. ron From rminnich at lanl.gov Thu Mar 13 09:00:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Mar 13 09:00:01 2003 Subject: Universal Flashing tool In-Reply-To: <1047562571.2704.21.camel@contact.skynet.coplanar.net> Message-ID: long term, if I can ever get MTD to work reliably for me, it's the way to go. I've just had lots of boards that I couldn't get it working on. ron From rminnich at lanl.gov Thu Mar 13 09:02:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Mar 13 09:02:00 2003 Subject: New to linuxBIOS In-Reply-To: <8DBD824609860746A6873D8CF21840FF2148F3@pennyman.exmouthcollege.devon.sch.uk> Message-ID: can you boot linux and run lspci? ron From stepan at suse.de Thu Mar 13 09:12:00 2003 From: stepan at suse.de (Stefan Reinauer) Date: Thu Mar 13 09:12:00 2003 Subject: Universal Flashing tool In-Reply-To: References: <491991673.20030313134256@reactor.ru> Message-ID: <20030313143713.GA3851@suse.de> * Ronald G. Minnich [030313 15:22]: > > simply doesn't compile complaining on the absence of the 'pci/pci.h' > > file. So I use flash_rom.c from the 'sis630' directory. > > ok, that's the first time I've seen it not compile. New CVS? Who changed > it? Sounds rather like it's trying to use the includes provided by pciutils (Package is called pciutils-devel on SuSE, most probably the same on other distributions) Stefan -- The use of COBOL cripples the mind; its teaching should, therefore, be regarded as a criminal offense. -- E. W. Dijkstra From samp at midascomm.com Thu Mar 13 09:14:01 2003 From: samp at midascomm.com (samp) Date: Thu Mar 13 09:14:01 2003 Subject: New to BIOS Message-ID: <3E709783.80002@midascomm.com> Hi I have a board of P3 low power processor with 815E chipset. Can I port linuxbios to it - regards -samp From rminnich at lanl.gov Thu Mar 13 09:22:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Mar 13 09:22:00 2003 Subject: New to BIOS In-Reply-To: <3E709783.80002@midascomm.com> Message-ID: On Thu, 13 Mar 2003, samp wrote: > Hi I have a board of P3 low power processor with 815E chipset. Can I > port linuxbios to it sure. It's a bit of work but doable. what's the board? ron From samp at midascomm.com Thu Mar 13 09:27:01 2003 From: samp at midascomm.com (samp) Date: Thu Mar 13 09:27:01 2003 Subject: New to BIOS References: Message-ID: <3E709A78.8090407@midascomm.com> I am deisnging a embedded board with p3 low power processor with 815E chipset. and winbond super I/O. First time I am going to port BIOS to it. Not a branded board. - regards - samp Ronald G. Minnich wrote: >On Thu, 13 Mar 2003, samp wrote: > > > >>Hi I have a board of P3 low power processor with 815E chipset. Can I >>port linuxbios to it >> >> > >sure. It's a bit of work but doable. > >what's the board? > >ron > > > -------------- next part -------------- An HTML attachment was scrubbed... URL: From charliesong at concordidea.com Thu Mar 13 10:30:00 2003 From: charliesong at concordidea.com (Charlie Song) Date: Thu Mar 13 10:30:00 2003 Subject: SPD problem References: Message-ID: <031a01c2e979$5256cc90$b21ea8c0@charliesong> Thanks ron. I has another problem with reading SPD. I'm using ASUS P4B533-V motherboard. I couldn't get the VID and DID of 82801DB. And of course, I could not read the SPDt. How can I fix it? Charlie ----- Original Message ----- From: "Ronald G. Minnich" To: "Charlie Song" Cc: Sent: Wednesday, March 12, 2003 6:34 PM Subject: Re: SPD problem > On Wed, 12 Mar 2003, Charlie Song wrote: > > > I'm trying to use "scanspd" to read SPD. It works fine for some > > motherboards. But it read back 0s for other motherboards. > > some motherboards have two I2C bussees, one for SPD and one for sensors. > The BIOS uses the I2C bus for SPD, then sets a register so that the I2C > can only be used for sensors. > > The ASUS CUA works this way. The result is that you have to find the > hardware that sets the register and change it for SPD. > > ron From alesan at manoweb.com Thu Mar 13 13:56:00 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Thu Mar 13 13:56:00 2003 Subject: Problems compiling linuxbios for pcchips810 Message-ID: <3E70C890.7020005@manoweb.com> Hi, I've wrote a config file for pcchips 810 to let it boot from IDE. This is the config file. target rom mainboard pcchips/m810lmr cpu k7 option VIDEO_CONSOLE=1 option SERIAL_CONSOLE=1 option DEFAULT_CONSOLE_LOGLEVEL=6 option SERIAL_POST=1 option ENABLE_MII=1 option MUST_ENABLE_FLOPPY=1 option HAVE_FRAMEBUFFER=1 option SMA_SIZE=0x80 option BOOT_IDE=1 option IDE_BOOT_DRIVE=0 option ONE_TRACK=32 biosbase 0xffff0000 linux /usr/src/linux commandline root=/dev/hda1 console=ttyS0,115200 console=tty0 I use the NLBConfig.py script to generate the makefile etc: $ python2.2 NLBConfig.py myconfig ~/linuxbios/freebios/ the output contains few warnings, but it seems nothing special. I enter "rom" directory and I type make. I've tried to use both gcc296 on redhat 7.2 and gcc322 compiled directly from sources (it works very well); I get this error: [snip] rm -f linuxbios.a ar cr linuxbios.a crt0.o linuxbiosmain.o linuxpci.o newpci.o clog2.o printk.o serial_subr.o video_subr.o subr.o vsprintf.o memset.o memcpy.o memcmp.o malloc.o do_inflate.o delay.o compute_ip_checksum.o version.o keyboard.o mc146818rtc.o isa-dma.o i8259.o beep.o vga_load_regs.o font_8x16.o vga_set_mode.o vga_load_pcx.o ide.o boot.o linuxbios_table.o i386_subr.o params.o hardwaremain.o c_start.o pirq_routing.o c_start.o southbridge.o northbridge.o superio_sis_950.o nsuperio.o mainboard.o irq_tables.o keyboard.o cpuid.o microcode.o mtrr.o l2_cache.o cpufixup.o cpufixup.o gcc -nostdlib -r -o linuxbios_c.o c_start.o ide_fill_inbuf.o linuxbios.a /usr/local/gcc322/lib/gcc-lib/i686-pc-linux-gnu/3.2.2/libgcc.a perl -e 'foreach $var (split(" ", $ENV{VARIABLES})) { if ($ENV{$var} =~ m/^(0x[0-9a-fA-F]+|0[0-7]+|[0-9]+)$/) { print "$var = $ENV{$var};\n"; }}' > ldoptions gcc -nostdlib -nostartfiles -static -o linuxbios_c -T /home/alesan/linuxbios/freebios/src/config/linuxbios_c.ld linuxbios_c.o linuxbios_c.o: In function `mdelay': linuxbios_c.o(.text+0x9d3): undefined reference to `udelay' collect2: ld returned 1 exit status make: *** [linuxbios_c] Error 1 any suggestion? Linuxbios was checked out from the cvs yestarday. bye bye as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From spirit at reactor.ru Thu Mar 13 18:41:01 2003 From: spirit at reactor.ru (Spirit) Date: Thu Mar 13 18:41:01 2003 Subject: linuxbios on sis630 - problems with serial console In-Reply-To: References: Message-ID: <18842702703.20030314030644@reactor.ru> Hello! I have compiled the linuxbios for my pcchips 787cl+, it works fine but i have problems with the serial console. The output works, but input is broken. :( I can see the linux 'login: ' prompt, but I can't input anything. If I boot the same kernel with the same parameters but with the original motherboard's BIOS, I do not have any problems with the serial console. What should I do to fix my problem? Another problem I have here is that 'reboot' doesn't work. It just hangs. I had to use acpi_reset instead, but I don't think that's a proper way to go. Speaking of acpi_reset... there are some words in the source code about the ACPI watchdog timer. What's that? Can that thing be used as a system watchdog to reboot it when it hangs? Best regards, Spirit mailto:spirit at reactor.ru From spirit at reactor.ru Thu Mar 13 18:49:00 2003 From: spirit at reactor.ru (Spirit) Date: Thu Mar 13 18:49:00 2003 Subject: Universal Flashing tool In-Reply-To: <20030313143713.GA3851@suse.de> References: <491991673.20030313134256@reactor.ru> <20030313143713.GA3851@suse.de> Message-ID: <16843172849.20030314031434@reactor.ru> Hello Stefan, Thursday, March 13, 2003, 5:37:13 PM, you wrote: SR> * Ronald G. Minnich [030313 15:22]: >> > simply doesn't compile complaining on the absence of the 'pci/pci.h' >> > file. So I use flash_rom.c from the 'sis630' directory. >> >> ok, that's the first time I've seen it not compile. New CVS? Who changed >> it? SR> Sounds rather like it's trying to use the includes provided by pciutils SR> (Package is called pciutils-devel on SuSE, most probably the same on SR> other distributions) Thanks for the hint. It's a pity the LinuxBIOS project lacks the documentation so badly. It really required the pciutils-devel. It would be nice to have that mentioned in the README or elsewhere. However, the flash_and_burn version of flash_rom.c doesn't work for me either. First of all it coredumps because it can't detect the chipset of my motherboard (although it's sis630e) and thus tries to call an NULL function pointer. An small if statement fixes that, but the tool still can't detect the installed flash part properly. The part is JEDEC-compliant, but probe_jedec doesn't return correct id's for it, no matter if I run flash_on or not. So I still prefer uniflash. Someone here called it an old code... well, may be the code style isn't very good (after all it's pascal...), but the project itself is very fresh. The last update is something like January 2003. -- Best regards, Spirit mailto:spirit at reactor.ru From ollie at sis.com.tw Thu Mar 13 21:36:00 2003 From: ollie at sis.com.tw (ollie lho) Date: Thu Mar 13 21:36:00 2003 Subject: SMA_SIZE and IDE_BOOT_DRIVE on pcchips810 In-Reply-To: <3E704507.8070804@manoweb.com> References: <3E6F946A.4050806@manoweb.com> <3E6FB1B5.3090106@nexpath.com> <3E704507.8070804@manoweb.com> Message-ID: <1047610675.6675.14.camel@ollie> On Thu, 2003-03-13 at 16:44, Alessio Sangalli wrote: > Steve Gehlbach wrote: > > > SiS 630 Dev 0 FN 0 > > Register 63h DRAM Status Register > > > So, I hope I've made the correct calculations, I write them here for > future reference: > > SMA_SIZE values for different video ram sizes: > > 10000000b -> 0x80h (2MB/4MB) > 10010000b -> 090xh (4MB/8MB) > 10100000b -> 0A0xh (8MB/16MB) > 10110000b -> 0B0xh (16MB/32MB) > 11000000b -> 0C0xh (32MB/64MB) > 11010000b -> 0D0xh (64MB/na) > > What I don't understand now is the "double" size value (with the 'not > supported' value for 0xD0). What does it mean? > > You don't have to care about the double size stuff. Some time in the history, there is a feature to add DRAM card for internal VGA. It did not work out. > Interesting. But, I was asking to myself... how much time does the > hard-disk need to spin-up? I've made few tests and it seems quite fast, > only few seconds. How much time is it possible to gain with a CF ide > device? I have a small CF card, I should buy the CF-IDE adapter, but I > have no idea of the advantages it would bring to me. > For CF/DOM, it is "INSTANT'. -- ollie lho From steve at kesa.com Thu Mar 13 22:43:00 2003 From: steve at kesa.com (Steve Gehlbach) Date: Thu Mar 13 22:43:00 2003 Subject: [9fans] Off the shelves plan9-compatible desktop (fwd) In-Reply-To: References: Message-ID: <3E5657D1.6010906@kesa.com> Ronald G. Minnich wrote: >>Lindows3.0 OS <---- what's it? > > > A Linux derived OS > Lindows is essentially Debian. Pretty good desktop, nice firewalling script, doesn't have dev tools installed (gcc, man pages etc). They want you to pay ($99?) per year to use their installation procedure, which is easier, but the debian installs work too. Kind of jeered at by the Linux cognoscenti but I think the approach has merit. -Steve From steve at kesa.com Thu Mar 13 22:49:30 2003 From: steve at kesa.com (Steve Gehlbach) Date: Thu Mar 13 22:49:30 2003 Subject: Ram initialization and small c. In-Reply-To: References: Message-ID: <3E5BB166.3070807@kesa.com> Eric W. Biederman wrote: > Short term I suspect there would be a lot of distraction with just > the mechanics of gcc. If someone knows gcc better than me feel free. > > Eric > I think you have to cramp your C coding style anyway, to stay within registers. The extra scratch area does not help much, with chips such as the SiS630, only has three gp regs, little help. You can't go around declaring variables willy nilly, you run out of space (registers) no matter what compiler. I also have been experimenting with inline gcc, and I think it works pretty well and once you get the hang of it, and it _is_ easier than assy. I have re-coded the console routines, and ram setup, and spd timing setup on the sis630 for C. It is still a wip but I have tested the spd setup by wrapping a real main on a live machine. So far it is about 400 lines of C, should I attach it? It compiles without using the stack (except for a %ebp push/pop which can be deleted). I can't see how a special compiler gets you enough more than gcc to be worth the downside of effort and debugging. Scratch regs vary from chip to chip, and use 1.5 regs to access (pci). You could use the %ebp and %esp which is a gain of two (and maybe %es %fs etc), but I think using gcc will get us there anyway. Just another opinion to put in the hat. -Steve From yann at yannouch.net Thu Mar 13 22:49:48 2003 From: yann at yannouch.net (Yann POUPET) Date: Thu Mar 13 22:49:48 2003 Subject: Newbie question Message-ID: <20030227230352.30318773.yann@yannouch.net> Hi, I've read a lot of posts, but haven't found what I'm looking for. I think I've understood that linuxBios is only there to be able to boot another Linux. Is it possible to boot the kernel directly in (from?) the bios then launching init, mouting HDs... I mean, is there a way to do as if there where no bios on a pc, decompressing the kernel just after power-on, and going on? I'd like to do this, and 8MBytes millenium doc could maybe help me. Actually I just need a fast booting system. Hope this is not too much stupid question... From instec at vsnl.net Thu Mar 13 22:50:09 2003 From: instec at vsnl.net (instec at vsnl.net) Date: Thu Mar 13 22:50:09 2003 Subject: Price detail of linuxBios Message-ID: <20030304045908.2D6731FADC@bom6.vsnl.net.in> An embedded and charset-unspecified text was scrubbed... Name: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: About Init.doc Type: application/msword Size: 17408 bytes Desc: not available URL: From aip at cwlinux.com Thu Mar 13 22:51:01 2003 From: aip at cwlinux.com (Andrew Ip) Date: Thu Mar 13 22:51:01 2003 Subject: EPIA HOWTO Message-ID: <20030314121530.A17736@mail.cwlinux.com> I have just checked in a HOWTO for EPIA. Thanks to Mark Wilkinson for providing us this document. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From rminnich at lanl.gov Thu Mar 13 22:58:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Mar 13 22:58:01 2003 Subject: Newbie question In-Reply-To: <20030227230352.30318773.yann@yannouch.net> Message-ID: On Thu, 27 Feb 2003, Yann POUPET wrote: > I've read a lot of posts, but haven't found what I'm looking for. I > think I've understood that linuxBios is only there to be able to boot > another Linux. Is it possible to boot the kernel directly in (from?) the > bios then launching init, mouting HDs... I mean, is there a way to do as > if there where no bios on a pc, decompressing the kernel just after > power-on, and going on? that's how linuxbios works on many platforms. ron From rminnich at lanl.gov Thu Mar 13 22:59:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Mar 13 22:59:00 2003 Subject: Price detail of linuxBios In-Reply-To: <20030304045908.2D6731FADC@bom6.vsnl.net.in> Message-ID: On Tue, 4 Mar 2003 instec at vsnl.net wrote: > Hi, > > Attached pls find our company profile for your reference. > > We are developing an 'PVR' for which we need LinuxBios. > > Would like to know Price of the same. The 'PVR' contains x86 Processor. > > Our Client is from California , USA and has come to us through our US office. > > We expect the production to take place in Taiwan or Indonesia and estimated volume is 10K units per month > > Feel free to call me if you require any further info. > Folks, I let this message through as a matter of interest. Sorry about that attachment -- thought I deleted it but mailman put it through anyway. Anyway somebody might want to talk to these guys. ron From agnew at cs.umd.edu Thu Mar 13 23:03:01 2003 From: agnew at cs.umd.edu (Adam Agnew) Date: Thu Mar 13 23:03:01 2003 Subject: Newbie question In-Reply-To: <20030227230352.30318773.yann@yannouch.net> Message-ID: <20030313235117.Q51174-100000@www.missl.cs.umd.edu> Yes, with an eeprom of (or over, which would include the doc millenium) 4mbits (512kbytes) people have been able to use the kernel just like that. If you go for the doc millenium, you can get init and a floppy-like distro in there too. On Thu, 27 Feb 2003, Yann POUPET wrote: > Hi, > > I've read a lot of posts, but haven't found what I'm looking for. I think I've understood that linuxBios is only there to be able to boot another Linux. Is it possible to boot the kernel directly in (from?) the bios then launching init, mouting HDs... I mean, is there a way to do as if there where no bios on a pc, decompressing the kernel just after power-on, and going on? > I'd like to do this, and 8MBytes millenium doc could maybe help me. > Actually I just need a fast booting system. > > Hope this is not too much stupid question... > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From rminnich at lanl.gov Thu Mar 13 23:05:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Mar 13 23:05:01 2003 Subject: Newbie question In-Reply-To: <20030313235117.Q51174-100000@www.missl.cs.umd.edu> Message-ID: On Thu, 13 Mar 2003, Adam Agnew wrote: > Yes, with an eeprom of (or over, which would include the doc millenium) > 4mbits (512kbytes) people have been able to use the kernel just like that. > If you go for the doc millenium, you can get init and a floppy-like distro > in there too. I'm doing some work with a board now and an 82802ac part -- 1 MB -- and it's nice to have the kernel in flash again. ron From alesan at manoweb.com Fri Mar 14 09:11:01 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Fri Mar 14 09:11:01 2003 Subject: problem with udelay solved - romimage too big Message-ID: <3E71CCB3.6030005@manoweb.com> Hi, mucking with the source cde and with configuration samples I've solved the compile problem I wrote about yesterday night (udelay) Now I can get a romimage file. I plan to burn this file inside the normal flash of my pcchips 810 board to boot from IDE (hard disk). However, the file romimage is too big! I would have expected a 256KB file, but I obtain a 1.4MB one: $ ll -h payload.block linuxbios.rom romimage -rw-rw-r-- 1 alesan alesan 64k Mar 14 13:31 linuxbios.rom -rw-rw-r-- 1 alesan alesan 1.3M Mar 14 13:31 payload.block -rw-rw-r-- 1 alesan alesan 1.4M Mar 14 13:31 romimage What am I doing wrong? This is the config file: target rom mainboard pcchips/m810lmr cpu k7 option CONFIG_UDELAY_TSC=1 option VIDEO_CONSOLE=1 option SERIAL_CONSOLE=1 option DEFAULT_CONSOLE_LOGLEVEL=6 option SERIAL_POST=1 option ENABLE_MII=1 option MUST_ENABLE_FLOPPY=1 option HAVE_FRAMEBUFFER=1 option SMA_SIZE=0x80 option BOOT_IDE=1 option IDE_BOOT_DRIVE=0 option ONE_TRACK=32 biosbase 0xffff0000 linux /usr/src/linux commandline root=/dev/hda1 console=ttyS0,115200 console=tty0 bye bye thank you as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From rminnich at lanl.gov Fri Mar 14 09:51:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Mar 14 09:51:01 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: <3E71CCB3.6030005@manoweb.com> Message-ID: On Fri, 14 Mar 2003, Alessio Sangalli wrote: > linux /usr/src/linux > commandline root=/dev/hda1 console=ttyS0,115200 console=tty0 how could you expect a 256KB romimage with a kernel in there? It's just not possible. I wish it were. ron From jerj at coplanar.net Fri Mar 14 10:04:00 2003 From: jerj at coplanar.net (Jeremy Jackson) Date: Fri Mar 14 10:04:00 2003 Subject: Universal Flashing tool In-Reply-To: <16843172849.20030314031434@reactor.ru> References: <491991673.20030313134256@reactor.ru> <20030313143713.GA3851@suse.de> <16843172849.20030314031434@reactor.ru> Message-ID: <1047655683.2134.5.camel@contact.skynet.coplanar.net> On Thu, 2003-03-13 at 19:14, Spirit wrote: > an NULL function pointer. An small if statement fixes that, but the > tool still can't detect the installed flash part properly. The part is > JEDEC-compliant, but probe_jedec doesn't return correct id's for it, I think a lot of these devices operate differently from what the manufacturer's datasheet says. Then there are different revisions, which may not be documented. > no matter if I run flash_on or not. So I still prefer uniflash. > Someone here called it an old code... well, may be the code style isn't > very good (after all it's pascal...), but the project itself is very > fresh. The last update is something like January 2003. Yes thanks for stating it that way. When I commented about Uniflash, I meant to say the coding style was old. But it works! It is mature code, and like devbios, it contains working code dealing with hardware quirks. I beat my head against the wall trying to get an Atmel AT29C040 to ID, using their datasheet. Then I looked at Uniflash and devbios, did what they did, and it worked, just nowhere near how the spec said. It would be nice however to have both working, and modern code. Ron, can you elaborate more on the problems you have with MTD? Jeremy From alesan at manoweb.com Fri Mar 14 10:17:00 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Fri Mar 14 10:17:00 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: References: Message-ID: <3E71F672.3090506@manoweb.com> Ronald G. Minnich wrote: > On Fri, 14 Mar 2003, Alessio Sangalli wrote: > > > >linux /usr/src/linux > >commandline root=/dev/hda1 console=ttyS0,115200 console=tty0 > > > how could you expect a 256KB romimage with a kernel in there? It's just > not possible. I wish it were. :) yes I know. However I couldn't find any config file or example to let the kernel image being loaded from the hard disk or IDE in general. On cwlinux it's possible to find images that load a kernel named "kernel" on the root file system. How can I reproduce this in my config file? I will try to "grep -r" it out of the sources, but if anybody could help... I promise I will write a beautiful howto :) bye bye!!! as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From rminnich at lanl.gov Fri Mar 14 10:32:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Mar 14 10:32:01 2003 Subject: Universal Flashing tool In-Reply-To: <1047655683.2134.5.camel@contact.skynet.coplanar.net> Message-ID: On 14 Mar 2003, Jeremy Jackson wrote: > It would be nice however to have both working, and modern code. Ron, > can you elaborate more on the problems you have with MTD? I do the build with the modules, I insmode the modules, and most of the time the part is never IDed and/or writeable. This may have gotten better. Overall MTD has been a headache with bproc nodes due to the large number of modules you have to load. Some sort of auto-loader for MTD modules would be nice. ron From pyro at linuxlabs.com Fri Mar 14 11:03:01 2003 From: pyro at linuxlabs.com (steven james) Date: Fri Mar 14 11:03:01 2003 Subject: Universal Flashing tool In-Reply-To: <1047655683.2134.5.camel@contact.skynet.coplanar.net> Message-ID: Greetings, My experiance is that each chip has it's little quirks. Sometimes it's undocumented, sometimes it's technically within JEDEC but weird, sometimes both. It doesn't help that some documents assume if it's not in the docs, JEDEC applies while in others, if it's not in the docs, it's not there at all. The good news is that the quirks are usually fairly minor. I do prefer a userspace tool since that makes these things much easier to debug, and some chips have features that don't map well to the MTD interfaces such as block locking or top block swap. G'day, sjames On 14 Mar 2003, Jeremy Jackson wrote: > On Thu, 2003-03-13 at 19:14, Spirit wrote: > > an NULL function pointer. An small if statement fixes that, but the > > tool still can't detect the installed flash part properly. The part is > > JEDEC-compliant, but probe_jedec doesn't return correct id's for it, > > I think a lot of these devices operate differently from what the > manufacturer's datasheet says. Then there are different revisions, > which may not be documented. > > > no matter if I run flash_on or not. So I still prefer uniflash. > > Someone here called it an old code... well, may be the code style isn't > > very good (after all it's pascal...), but the project itself is very > > fresh. The last update is something like January 2003. > > Yes thanks for stating it that way. When I commented about Uniflash, I > meant to say the coding style was old. But it works! It is mature > code, and like devbios, it contains working code dealing with hardware > quirks. I beat my head against the wall trying to get an Atmel AT29C040 > to ID, using their datasheet. Then I looked at Uniflash and devbios, > did what they did, and it worked, just nowhere near how the spec said. > > It would be nice however to have both working, and modern code. Ron, > can you elaborate more on the problems you have with MTD? > > Jeremy > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From pyro at linuxlabs.com Fri Mar 14 11:10:01 2003 From: pyro at linuxlabs.com (steven james) Date: Fri Mar 14 11:10:01 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: <3E71F672.3090506@manoweb.com> Message-ID: Greetings, These days, LinuxBIOS expects to find a bootloader in ELF format at the beginning of the ROM. Etherboot has an extension to load an image from a raw IDE partition. I'm working on one that can handle an ext2 filesystem, but it's VERY alpha at the moment. On Fri, 14 Mar 2003, Alessio Sangalli wrote: > > Ronald G. Minnich wrote: > > > On Fri, 14 Mar 2003, Alessio Sangalli wrote: > > > > > > >linux /usr/src/linux > > >commandline root=/dev/hda1 console=ttyS0,115200 console=tty0 > > > > > > how could you expect a 256KB romimage with a kernel in there? It's just > > not possible. I wish it were. > > > :) yes I know. However I couldn't find any config file or example to let > the kernel image being loaded from the hard disk or IDE in general. On > cwlinux it's possible to find images that load a kernel named "kernel" > on the root file system. How can I reproduce this in my config file? > > I will try to "grep -r" it out of the sources, but if anybody could > help... I promise I will write a beautiful howto :) > > bye bye!!! > as > > > > > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From aip at cwlinux.com Fri Mar 14 11:28:01 2003 From: aip at cwlinux.com (Andrew Ip) Date: Fri Mar 14 11:28:01 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: ; from steven james on Fri, Mar 14, 2003 at 11:32:51AM -0500 References: <3E71F672.3090506@manoweb.com> Message-ID: <20030315005357.A26565@mail.cwlinux.com> > These days, LinuxBIOS expects to find a bootloader in ELF format at the > beginning of the ROM. Etherboot has an extension to load an image from a > raw IDE partition. I'm working on one that can handle an ext2 > filesystem, > but it's VERY alpha at the moment. Actually Adam has that patch already. His patch supports ext2, ext3 and vfat at the moment. Shouldn't be too hard to support other filesystems also since most of the code can be extracted from grub. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From alesan at manoweb.com Fri Mar 14 11:48:00 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Fri Mar 14 11:48:00 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: References: Message-ID: <3E720D65.5080806@manoweb.com> steven james wrote: > Greetings, > > These days, LinuxBIOS expects to find a bootloader in ELF format at the > beginning of the ROM. Etherboot has an extension to load an image from a > raw IDE partition. I'm working on one that can handle an ext2 > filesystem, > but it's VERY alpha at the moment. Ok. I know how to make an ELF image of the kernel (mkElfImage). Should I assume cwlinux's rom has etherboot inside? I was able to boot from a ext2(3) partition with it; but now I would like to build my own image etc etc. Which options should I include in the config file? Is there any example for this? Bye bye, thank you as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From rminnich at lanl.gov Fri Mar 14 11:58:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Mar 14 11:58:00 2003 Subject: Universal Flashing tool In-Reply-To: Message-ID: On Fri, 14 Mar 2003, steven james wrote: > The good news is that the quirks are usually fairly minor. I do prefer a > userspace tool since that makes these things much easier to debug, and > some chips have features that don't map well to the MTD interfaces such > as block locking or top block swap. yes, I guess in the end we have seen that MTD is nice, but that the userspace tool gives us flexibility we like. ron From agnew at cs.umd.edu Fri Mar 14 12:07:01 2003 From: agnew at cs.umd.edu (Adam Agnew) Date: Fri Mar 14 12:07:01 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: <20030315005357.A26565@mail.cwlinux.com> Message-ID: <20030314124550.L55460-100000@www.missl.cs.umd.edu> Right. But check out the latest development release of etherboot, that is etherboot-5.1.7 . It has pretty much the same code rolled into it and they have really done some other good work on that release as well (like cleaning up the directory structure). I suspect Eric brought those polled ide changes in. If anyone has trouble with that, they can still use the patch against 5.0.6 which is at http://www.missl.cs.umd.edu/~agnew/etherboot-5.0.6.polled1.diff On Sat, 15 Mar 2003, Andrew Ip wrote: > > > These days, LinuxBIOS expects to find a bootloader in ELF format at the > > beginning of the ROM. Etherboot has an extension to load an image from a > > raw IDE partition. I'm working on one that can handle an ext2 > > filesystem, > > but it's VERY alpha at the moment. > Actually Adam has that patch already. His patch supports ext2, ext3 and vfat > at the moment. Shouldn't be too hard to support other filesystems also > since most of the code can be extracted from grub. > > -Andrew > > -- > Andrew Ip > Email: aip at cwlinux.com > Tel: (852) 2542 2046 > Fax: (852) 2542 2036 > Mobile: (852) 9201 9866 > > Cwlinux Limited > Unit 202B 2/F Lai Cheong Factory Building, > 479-479A Castle Peak Road, > Lai Chi Kok, Kowloon, > Hong Kong. > > Tel: (852)2542 2046 > Fax: (852)2542 2036 > > For public pgp key, please obtain it from http://www.keyserver.net/en. > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From agnew at cs.umd.edu Fri Mar 14 12:14:01 2003 From: agnew at cs.umd.edu (Adam Agnew) Date: Fri Mar 14 12:14:01 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: <20030315005357.A26565@mail.cwlinux.com> Message-ID: <20030314130224.E55460-100000@www.missl.cs.umd.edu> > Steven James wrote: > > These days, LinuxBIOS expects to find a bootloader in ELF format at the > > beginning of the ROM. Etherboot has an extension to load an image from a > > raw IDE partition. I'm working on one that can handle an ext2 > > filesystem, > > but it's VERY alpha at the moment. Oh, wait, i see what you mean. On closer inspection of etherboot-5.1.7 they didn't include the file system code? I wonder why.. but alright. From ebiederman at lnxi.com Fri Mar 14 12:29:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Mar 14 12:29:01 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: <20030314130224.E55460-100000@www.missl.cs.umd.edu> References: <20030314130224.E55460-100000@www.missl.cs.umd.edu> Message-ID: Adam Agnew writes: > > Steven James wrote: > > > These days, LinuxBIOS expects to find a bootloader in ELF format at the > > > beginning of the ROM. Etherboot has an extension to load an image from a > > > raw IDE partition. I'm working on one that can handle an ext2 > > > filesystem, > > > but it's VERY alpha at the moment. > > Oh, wait, i see what you mean. On closer inspection of etherboot-5.1.7 > they didn't include the file system code? I wonder why.. but alright. Because I rolled the code in. And I have always seen the fs code as overkill for the problem. However the code should be layered well enough that you should be able to incorporate the fs code if you like. Eric From agnew at cs.umd.edu Fri Mar 14 12:31:01 2003 From: agnew at cs.umd.edu (Adam Agnew) Date: Fri Mar 14 12:31:01 2003 Subject: Payload FAQ In-Reply-To: Message-ID: <20030314130950.Y55460-100000@www.missl.cs.umd.edu> Maybe it's time for a payload FAQ? I know we have over 5 payloads in common use and maybe a faq or a table on linuxbios.org could show the features of each? Off the top of my head, we have: Linux Kernel regular - use as your OS kernel Linux Kernel Kexec bootloader - boots another linux kernel from a device supported by linux (I don't know where this payload stands as a formal package) Memtest86 - great memory tester Plan9 - Plan9 OS (can it boot Linux yet?) ADLO + Bochs BIOS - Interrupt support, boots BSDs and Win2k Etherboot standard - kernel over ethernet Etherboot devel branch - kernel over ethernet and raw disk i/o Etherboot 5.0.6 polled ide patch - kernel over ethernet and buggy file system support Etherboot SIS patch - kernel over ethernet, file system support, and booting WinCE I think (but I don't know if SIS has let this out formally) RedBoot - could read the file system but never had the elf support to make it really usefull Steven James ELF finder - I think this was written as payload? Anyway, it lets you choose from payloads in your rom. And I'm sure there are probably many more which have good uses too. Please, add on to the thread if you know of more. From ebiederman at lnxi.com Fri Mar 14 12:40:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Mar 14 12:40:00 2003 Subject: Universal Flashing tool In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > My experiance is that each chip has it's little quirks. Sometimes it's > undocumented, sometimes it's technically within JEDEC but weird, sometimes > both. > > It doesn't help that some documents assume if it's not in the docs, JEDEC > applies while in others, if it's not in the docs, it's not there at all. > > The good news is that the quirks are usually fairly minor. I do prefer a > userspace tool since that makes these things much easier to debug, and > some chips have features that don't map well to the MTD interfaces such > as block locking or top block swap. Block locking maps well to the mtd interface. There is not currently a way to do the top block swap but that should be a minor addition. So far I prefer to achieve the same effect in software, so that has not been an issue. Generally I prefer the mtd driver for end users (not developers). 1) MTD has the cleanest infrastructure I have seen. 2) The test to see if everything is working properly is easy. 3) I can separate out policy from the code that actually talks to the chips. And I have not seen chips so buggy they are impossible to work with the mtd interface. My only problem with the mtd code is that it takes a while to flush through to being in the mainstream kernel. And if someone reminds me I will get my linuxbios flashing tools posted that use the mtd interface. Eric From ebiederman at lnxi.com Fri Mar 14 12:46:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Mar 14 12:46:01 2003 Subject: Universal Flashing tool In-Reply-To: <1047562571.2704.21.camel@contact.skynet.coplanar.net> References: <491991673.20030313134256@reactor.ru> <1047562571.2704.21.camel@contact.skynet.coplanar.net> Message-ID: Jeremy Jackson writes: > I wonder if it doesn't make more sense to use the Linux MTD framework. > I have begun porting devbios to it. I have refactored devbios into two > halves, devbios and a flash library/map library. The MTD chip driver > which uses the library is about half done. I have been using the mtd drivers. The usual mtd split is. - Map driver - probe driver - cmdset. And right now the MTD code has only 2 command sets that are every really used. The AMD and the Intel. I guess there is a third command set in the tree now. And jedec_probe seems to go a good job of probing. I think getting the /dev/bios code merged with the mtd code is a good way to go. > Perhaps then the LinuxBIOS flash tool can be split into a map driver > (the shadow control stuff) and a chip driver for the individual flash > chips, then included into MTD. If we continue to maintain a user space tool, it should definitely be factored into map/probe/and command set drivers like the mtd kernel code. Eric From ebiederman at lnxi.com Fri Mar 14 12:49:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Mar 14 12:49:00 2003 Subject: Universal Flashing tool In-Reply-To: References: Message-ID: "Ronald G. Minnich" writes: > On Fri, 14 Mar 2003, steven james wrote: > > > The good news is that the quirks are usually fairly minor. I do prefer a > > userspace tool since that makes these things much easier to debug, and > > some chips have features that don't map well to the MTD interfaces such > > as block locking or top block swap. > > yes, I guess in the end we have seen that MTD is nice, but that the > userspace tool gives us flexibility we like. So far from what I have seen user space is good for quick hacks, and the mtd code base looks a lot better for long term maintenance. Eric From ebiederman at lnxi.com Fri Mar 14 12:52:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Mar 14 12:52:00 2003 Subject: problem with udelay solved - romimage too big In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > These days, LinuxBIOS expects to find a bootloader in ELF format at the > beginning of the ROM. Etherboot has an extension to load an image from a > raw IDE partition. I'm working on one that can handle an ext2 > filesystem, > but it's VERY alpha at the moment. And I am working on a tool that can do a lilo like thing, and generate an ELF header for a kernel stored anywhere on the disk. And put that header at the start of the disk. It works but it needs some variables. Eric From rminnich at lanl.gov Fri Mar 14 15:31:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Mar 14 15:31:01 2003 Subject: Payload FAQ In-Reply-To: <20030314130950.Y55460-100000@www.missl.cs.umd.edu> Message-ID: On Fri, 14 Mar 2003, Adam Agnew wrote: > Plan9 - Plan9 OS (can it boot Linux yet?) no, there are no plans to do that. It's arguable that if you're booting Plan 9 you have no interest in booting Linux :-) also, we can boot 9load ron From charliesong at concordidea.com Fri Mar 14 16:40:01 2003 From: charliesong at concordidea.com (Charlie Song) Date: Fri Mar 14 16:40:01 2003 Subject: Looking for datasheet of Sis chipset Message-ID: <00c401c2ea76$2af401b0$b21ea8c0@charliesong> Hello all, Could anyone provide the datasheet of SiS chipset that supports Intel Pentim 4/3 ? Thanks, Charlie -------------- next part -------------- An HTML attachment was scrubbed... URL: From hansolofalcon at worldnet.att.net Fri Mar 14 23:01:01 2003 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Fri Mar 14 23:01:01 2003 Subject: Bare Metal bootloader built, now how do I use it? Message-ID: <000d01c2eaab$236dc9a0$e9c9580c@who5> Hello from Gregg C Levine Okay, here is what I mean. I have successfully built the Bare Metal boot loader. Now the question is, or should be: How do I use it? Steven this is an interesting project. Now I'm just fishing for advice. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) From shubhangi.jadhav at patni.com Sat Mar 15 08:07:00 2003 From: shubhangi.jadhav at patni.com (Shubhangi Jadhav) Date: Sat Mar 15 08:07:00 2003 Subject: Help needed to understand code In-Reply-To: Message-ID: Hi, Could anyone tell me what are the .inc files found in the LinuxBIOS source? Are these generated from the C code (for the sdram code I could see an association between the .c and corresponding .inc) and how ? Thanks, Shubhangi -----Original Message----- From: steven james [mailto:pyro at linuxlabs.com] Sent: Friday, March 07, 2003 8:00 PM To: Shubhangi Jadhav Cc: linuxbios at clustermatic.org Subject: RE: Help needed to understand code Greetings, By chance, are you looking at a snapshot tarball? If so, that's very old. The best bet is to check out the CVS tree from sourceforge. These days, intel_main is gone and there's nothing in the chip directory. G'day, sjames On Fri, 7 Mar 2003, Shubhangi Jadhav wrote: > Hi, > > However according to the LinuxBIOS readme the assembly code calls > intel_main in freebios/chip/intel/intel_main.c which in turn calls > linuxbios_main in linuxbios/inflate/main.c. So is intel_main called first or > hardwaremain. Am I missing something > Please elaborate more on the flow. > > Thanks, > Shubhangi > > -----Original Message----- > From: steven james [mailto:pyro at linuxlabs.com] > Sent: Friday, March 07, 2003 6:29 PM > To: Shubhangi Jadhav > Cc: linuxbios at clustermatic.org > Subject: Re: Help needed to understand code > > > Greetings, > > Probably the first thing to understand is the overall flow of control. > > On powerup, the reset vector at f000:fff0 jumps to the start of the > assembly code. The assembly code consists of a series of modular units > that the config files paste together using include directives. It just > starts at the beginning, and new pieces are tacked on as encountered in > the config files. The config files are invoked by directives like > northbridge and southbridge. The master config file is in the mainboard > directory and is invoked by the user's config file. Most mainboard > directory have example user configs. > > The c code is linked together seperatly and then compressed. The last part > of the asm code decompresses it into RAM and calls hardwaremain > (found in src/arch//lib/hardwaremain.c currently, can be > alpha, i386 or ppc). The remainder of the C code is all invoked from > there. > > G'day, > sjames > > On Fri, 7 Mar 2003, Shubhangi Jadhav wrote: > > > Hi, > > > > I'm a LinuxBIOS newbie. I have downloaded the source code for the same > and > > was trying to understand it. Looks too complicated to me. > > I'd started with the code for Intel440gx mainboard, but failed to > > understand how the northbridge and southbridge intialization routines are > > invoked. > > Can someone tell me how to go about understanding the code? > > > > Thanks, > > Shubhangi > > > > > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > -- > -------------------------steven james, director of research, linux labs > ... ........ ..... .... 230 peachtree st nw ste 701 > the original linux labs atlanta.ga.us 30303 > -since 1995 http://www.linuxlabs.com > office 404.577.7747 fax 404.577.7743 > ----------------------------------------------------------------------- > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From steve at nexpath.com Sat Mar 15 11:33:01 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Sat Mar 15 11:33:01 2003 Subject: Help needed to understand code In-Reply-To: References: Message-ID: <3E735F6C.2000102@nexpath.com> Shubhangi Jadhav wrote: > Hi, > > Could anyone tell me what are the .inc files found in the LinuxBIOS source? > Are these generated from the C code (for the sdram code I could see an > association between the .c and corresponding .inc) and how ? > The .inc files are assembly language files that "stack up" or include, in order, on top of crt0.base. These execute first, and eventually move the C-code (and decompress it if necessary) to RAM, ending at c_start.S, which jumps to the C-code. The .inc files do things that are necessary as a prelude to running C, which needs RAM (ie, a stack). Each .inc file must jump around its data, it is expected to execute top to bottom and flow to the next file included below it. -Steve From pyro at linuxlabs.com Sat Mar 15 16:20:00 2003 From: pyro at linuxlabs.com (steven james) Date: Sat Mar 15 16:20:00 2003 Subject: Bare Metal bootloader built, now how do I use it? In-Reply-To: <000d01c2eaab$236dc9a0$e9c9580c@who5> Message-ID: Greetings, I should document this :-) The bootselect will scan the ROM for payload tags (see baremetal/include/rom/read_bytes.h) The signature is $TAG$ the data field and any subsequent 16 byte blocks of the tag contain an ASCIIZ name for the payload. Currently, it's hardwired to the serial console. When it runs, if there is a byte waiting in the rx buffer, it will present a list and wait for a numerical selection, otherwise, it will chain to the default payload (the one that follows bootselect). You'll want to build LinuxBIOS with option PYRO_SERIAL so that the rx buffer will accept and hold your keypress (giving you enough time to hit space). Usually, I use it with an etherboot or two, memtest86, and a forth environment I'm working on (not in the tree yet since the build is a mess). G'day, sjames On Fri, 14 Mar 2003, Gregg C Levine wrote: > Hello from Gregg C Levine > Okay, here is what I mean. > I have successfully built the Bare Metal boot loader. Now the question > is, or should be: > How do I use it? > > Steven this is an interesting project. Now I'm just fishing for > advice. > ------------------- > Gregg C Levine hansolofalcon at worldnet.att.net > ------------------------------------------------------------ > "The Force will be with you...Always." Obi-Wan Kenobi > "Use the Force, Luke."? Obi-Wan Kenobi > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > (This company dedicates this E-Mail to Master Yoda ) > > > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From aip at cwlinux.com Sun Mar 16 04:19:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Sun Mar 16 04:19:00 2003 Subject: New version of DOC Millennium MD2802-D08 Message-ID: <20030316174418.A16112@mail.cwlinux.com> MD2802-D08 is the new version of MD2800-D08. Basically it is the same with newer packing, and it is working with LinuxBIOS!!! -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From spirit at reactor.ru Sun Mar 16 06:16:01 2003 From: spirit at reactor.ru (Alexander Amelkin) Date: Sun Mar 16 06:16:01 2003 Subject: Payload FAQ In-Reply-To: <20030314130950.Y55460-100000@www.missl.cs.umd.edu> References: <20030314130950.Y55460-100000@www.missl.cs.umd.edu> Message-ID: <141260938449.20030316144029@reactor.ru> Hello! Friday, March 14, 2003, 9:21:19 PM, Adam Agnew wrote: AA> ADLO + Bochs BIOS - Interrupt support, boots BSDs and Win2k Can anyone explain how to use that on a pcchips m787cl+? Now it uses something like kexec or etherboot-devel and I experience troubles with interrupts for add-on cards. For instance, my Cisco Aironet 4800 card doesn't get an interrupt assigned to it and the airo.o driver module doesn't find the card. I would really like to also have some means for disabling chipset built-in devices that consume interrupts. On SiS630e I have absolutely useless extra things like AC97 modem and sound. There is also an fdd controller and a secondary IDE controller that I don't need either. Is there a way to disable those? With best regards, Alexander mailto:spirit at reactor.ru From spirit at reactor.ru Sun Mar 16 06:22:00 2003 From: spirit at reactor.ru (Alexander Amelkin) Date: Sun Mar 16 06:22:00 2003 Subject: serial console problems Message-ID: <44261283696.20030316144614@reactor.ru> Hello! I already asked, but nobody answered my question. I'm having problems with the serial console when booting LinuxBIOS on a pcchips m787cl+ motherboard. The serial works for output (I can see what the box says) but doesn't for input (I can't login from the serial console). If I boot the same kernel with the same parameters (console=ttyS0,9600n8) using the original motherboard's BIOS (AMI), I don't have any problems at all. Any suggestions? With best regards, Alexander mailto:spirit at reactor.ru From rminnich at lanl.gov Sun Mar 16 10:21:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Sun Mar 16 10:21:01 2003 Subject: serial console problems In-Reply-To: <44261283696.20030316144614@reactor.ru> Message-ID: this is almost always an old version of init. We used to have this problem all the time. I'll try to find the patch we used to use -- you're the first person to report this in over a year. It occurs with an older init and a newer kernel. ron From alesan at manoweb.com Sun Mar 16 13:33:01 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Sun Mar 16 13:33:01 2003 Subject: compiling etherboot Message-ID: <3E74C92A.2040605@manoweb.com> Hi. I'm trying to compile etherboot for linuxbios to boot an image on a ide device. I downloaded both version 5.0.9 and 5.1.7. Would you tell me which targets should I make? What about file system support? bye bye thank you as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From spirit at reactor.ru Sun Mar 16 18:11:00 2003 From: spirit at reactor.ru (Spirit) Date: Sun Mar 16 18:11:00 2003 Subject: SiS630 Software Watchdog Timer Message-ID: <10698361876.20030317023730@reactor.ru> Hello! I've been reading the SIS630 datasheet and found out that the chipset has a watchdog timer (for some reason they call it 'software') similar to that of the i810. Does anybody here know if there is a ready driver for that thing? P.S. I'm inspecting the datasheet in search for ways of disabling AC97 Audio and Modem functions, as that would be a great addition to the linuxbios. -- Best regards, Spirit mailto:spirit at reactor.ru From steve at nexpath.com Sun Mar 16 20:14:00 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Sun Mar 16 20:14:00 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: <10698361876.20030317023730@reactor.ru> References: <10698361876.20030317023730@reactor.ru> Message-ID: <3E752B32.6090607@nexpath.com> Spirit wrote: > I've been reading the SIS630 datasheet and found out that the > chipset has a watchdog timer (for some reason they call it > 'software') similar to that of the i810. > > Does anybody here know if there is a ready driver for that thing? Not aware of a linux driver, but you might want to turn off the software watchdog earlier, if you use compression. Right now it is disabled in southbridge.c which is too late since decompression takes a few seconds. This will do it in chipinit.inc: #define ACPI_BASE_ADDR 0x5000 /* Disable Auto-Reset */ movw $(ACPI_BASE_ADDR + 0x56), %dx inb %dx, %al orb 0x40, %al outb %al, %dx /* Disable Software Watchdog */ xorb %al, %al movw $(ACPI_BASE_ADDR + 0x4b), %dx outb %al, %dx --- There are some other simplifications that can be put into chipinit.inc (the gdt reload is not necessary after the Eric's changes in c_start.S), but I haven't had time to make a diff and send it to Ron. -Steve From steve at nexpath.com Sun Mar 16 20:24:01 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Sun Mar 16 20:24:01 2003 Subject: serial console problems In-Reply-To: <44261283696.20030316144614@reactor.ru> References: <44261283696.20030316144614@reactor.ru> Message-ID: <3E752DAC.2040109@nexpath.com> Alexander Amelkin wrote: > I already asked, but nobody answered my question. > I'm having problems with the serial console when booting LinuxBIOS on > a pcchips m787cl+ motherboard. The serial works for output (I can see > what the box says) but doesn't for input (I can't login from the > serial console). If I boot the same kernel with the same parameters > (console=ttyS0,9600n8) using the original motherboard's BIOS (AMI), I > don't have any problems at all. > > Any suggestions? I assume you changed "option TTYS0_BAUD=38400" in /mainboard/pcchips/m787cl+ to 9600? It is also possible it doesn't work, as I don't recall ever testing it. I will try and get a chance to check it this week. All I used was the vga display and the serial console just for status errors etc. -Steve From shubhangi.jadhav at patni.com Mon Mar 17 00:09:01 2003 From: shubhangi.jadhav at patni.com (Shubhangi Jadhav) Date: Mon Mar 17 00:09:01 2003 Subject: Help needed to understand code In-Reply-To: <3E735F6C.2000102@nexpath.com> Message-ID: how does crt0.base move to c_start.S. I did not find any reference to c_start.S from crt0.base or any other .inc files included in crt0.base -Shubhangi -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org]On Behalf Of Steve Gehlbach Sent: Saturday, March 15, 2003 10:44 PM To: Shubhangi Jadhav Cc: linuxbios at clustermatic.org Subject: Re: Help needed to understand code Shubhangi Jadhav wrote: > Hi, > > Could anyone tell me what are the .inc files found in the LinuxBIOS source? > Are these generated from the C code (for the sdram code I could see an > association between the .c and corresponding .inc) and how ? > The .inc files are assembly language files that "stack up" or include, in order, on top of crt0.base. These execute first, and eventually move the C-code (and decompress it if necessary) to RAM, ending at c_start.S, which jumps to the C-code. The .inc files do things that are necessary as a prelude to running C, which needs RAM (ie, a stack). Each .inc file must jump around its data, it is expected to execute top to bottom and flow to the next file included below it. -Steve _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From hcyun at etri.re.kr Mon Mar 17 00:42:00 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Mon Mar 17 00:42:00 2003 Subject: ADLO for EPIA Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD6B0@cms3> With current linuxbios for EPIA, I found that internel graphic device (bus 1, dev 0 ) is not visible in the pci configuration space. I have tried to enable this by setting PP_Rx3E and RxA9 registers, but with failed. Do you know how to make it visible? Heechul > In the current cvs tree, vga is not enabled. Have you > enabled it yet? > > -Andrew > > -- > Andrew Ip > Email: aip at cwlinux.com > Tel: (852) 2542 2046 > Fax: (852) 2542 2036 > Mobile: (852) 9201 9866 > > Cwlinux Limited > Unit 202B 2/F Lai Cheong Factory Building, > 479-479A Castle Peak Road, > Lai Chi Kok, Kowloon, > Hong Kong. > > Tel: (852)2542 2046 > Fax: (852)2542 2036 > > For public pgp key, please obtain it from http://www.keyserver.net/en. > -------------- next part -------------- An HTML attachment was scrubbed... URL: From aip at cwlinux.com Mon Mar 17 01:02:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Mon Mar 17 01:02:00 2003 Subject: ADLO for EPIA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6B0@cms3>; from hcyun@etri.re.kr on Mon, Mar 17, 2003 at 03:08:34PM +0900 References: <8470181DABD5D511B3E700D0B7A8AC4A9CD6B0@cms3> Message-ID: <20030317142802.A25455@mail.cwlinux.com> Heechul, > With current linuxbios for EPIA, I found that internel graphic device (bus > 1, dev 0 ) is not visible in the pci configuration space. I have tried to > enable this by setting PP_Rx3E and RxA9 registers, but with failed. > Do you know how to make it visible? Including this setup will enable the vga device. Hope this help. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- #if VIDEO_CONSOLE CS_WRITE($0xf6, $0x01) CS_WRITE($0xf7, $0x01) // CS_WRITE($0xf8, $0x22) CS_WRITE($0xf8, $0x22) CS_WRITE($0xf9, $0x42) CS_WRITE($0xfa, $0x00) CS_WRITE($0xfb, $0xb0) CS_WRITE($0xfd, $0x08) CS_WRITE($0xa0, $0x02) CS_WRITE($0xa1, $0x00) CS_WRITE($0xa2, $0x20) CS_WRITE($0xa3, $0x00) CS_WRITE($0xa4, $0x07) CS_WRITE($0xa5, $0x02) CS_WRITE($0xa6, $0x00) CS_WRITE($0xa7, $0x07) CS_WRITE($0xac, $0x6e) CS_WRITE($0xad, $0x62) #endif #if HAVE_FRAMEBUFFER CS_WRITE($0x13, $0xd0) // CS_WRITE($0x80, $0x0f) // CS_WRITE($0x81, $0x41) // CS_WRITE($0x88, $0x02) // from steve CS_WRITE($0x56, $0x20) CS_WRITE($0x57, $0x20) // CS_WRITE($0x63, $0x01) // CS_WRITE($0x80, $0x0f) // CS_WRITE($0x84, $0xf0) // CS_WRITE($0x89, $0x00) // CS_WRITE($0x8a, $0x00) // CS_WRITE($0x8b, $0x00) #endif From hcyun at etri.re.kr Mon Mar 17 05:19:00 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Mon Mar 17 05:19:00 2003 Subject: ADLO for EPIA Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD6B1@cms3> Thanks. It works and I can see something (just splash of colors) on my CRT. The screen, though it is not usable, is brought up by original VGABIOS using ADLO. Heechul. > -----Original Message----- > From: Andrew Ip [mailto:aip at cwlinux.com] > Sent: Monday, March 17, 2003 3:28 PM > To: hcyun at etri.re.kr > Cc: linuxbios at clustermatic.org > Subject: Re: ADLO for EPIA > > > Heechul, > > > With current linuxbios for EPIA, I found that internel > graphic device (bus > > 1, dev 0 ) is not visible in the pci configuration space. I > have tried to > > enable this by setting PP_Rx3E and RxA9 registers, but with failed. > > Do you know how to make it visible? > Including this setup will enable the vga device. Hope this help. > > -Andrew > > -- > Andrew Ip > Email: aip at cwlinux.com > Tel: (852) 2542 2046 > Fax: (852) 2542 2036 > Mobile: (852) 9201 9866 > > Cwlinux Limited > Unit 202B 2/F Lai Cheong Factory Building, > 479-479A Castle Peak Road, > Lai Chi Kok, Kowloon, > Hong Kong. > > Tel: (852)2542 2046 > Fax: (852)2542 2036 > > For public pgp key, please obtain it from http://www.keyserver.net/en. > -------------- next part -------------- An HTML attachment was scrubbed... URL: From spirit at reactor.ru Mon Mar 17 08:09:01 2003 From: spirit at reactor.ru (Spirit) Date: Mon Mar 17 08:09:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: <3E752B32.6090607@nexpath.com> References: <10698361876.20030317023730@reactor.ru> <3E752B32.6090607@nexpath.com> Message-ID: <3542901559.20030317163530@reactor.ru> Hello Steve, Monday, March 17, 2003, 4:56:02 AM, you wrote: SG> Spirit wrote: >> I've been reading the SIS630 datasheet and found out that the >> chipset has a watchdog timer (for some reason they call it >> 'software') similar to that of the i810. >> >> Does anybody here know if there is a ready driver for that thing? SG> Not aware of a linux driver, but you might want to turn off the software SG> watchdog earlier, if you use compression. Right now it is disabled in SG> southbridge.c which is too late since decompression takes a few seconds. That shouldn't be a problem unless it takes 5 seconds to get to the southbridge.c code. But of course, moving it to an earlier position is a good idea. However, what I was asking for is how to enable and make use of it, not how to disable it. I think I'll need to look into the i810-tco.c from the kernel sources and try to modify it for SIS630. SG> This will do it in chipinit.inc: SG> #define ACPI_BASE_ADDR 0x5000 Speaking of ACPI... I can't get it working with LinuxBIOS. ospm_*.o modules won't load and the kernel complains on being unable to read ACPI tables. SG> There are some other simplifications that can be put into chipinit.inc SG> (the gdt reload is not necessary after the Eric's changes in c_start.S), SG> but I haven't had time to make a diff and send it to Ron. What I would really like to see somewhere in the LinuxBIOS code is the options to disable SiS630 embedded modem and audio controllers. I browser through the datasheet and didn't find how to disable them. I probably should re-read it, but if anyone knows the way already, I'd appreciate showing it to me. >> I'm having problems with the serial console when booting LinuxBIOS on >> a pcchips m787cl+ motherboard. The serial works for output (I can see >> what the box says) but doesn't for input (I can't login from the >> serial console). If I boot the same kernel with the same parameters >> (console=ttyS0,9600n8) using the original motherboard's BIOS (AMI), I >> don't have any problems at all. >> >> Any suggestions? SG> SG> I assume you changed "option TTYS0_BAUD=38400" in SG> /mainboard/pcchips/m787cl+ to 9600? Yes, I did. But that's not the problem. Or at least not the main one. It was a problem of an old init, as Ron suggested. I ugraded init and the problem is gone. Best regards, Spirit mailto:spirit at reactor.ru From rminnich at lanl.gov Mon Mar 17 10:02:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 17 10:02:00 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: <3542901559.20030317163530@reactor.ru> Message-ID: On Mon, 17 Mar 2003, Spirit wrote: > That shouldn't be a problem unless it takes 5 seconds to get to the > southbridge.c code. But of course, moving it to an earlier position is > a good idea. It really takes 5 seconds? it did not used to. I liked having it in the southbridge code for a simple reason: if you are in that code then things are working well. If you are not in that kind at some point, you really want that watchdog reset. It is a very simple self-test. > However, what I was asking for is how to enable and make use of it, > not how to disable it. I think I'll need to look into the i810-tco.c > from the kernel sources and try to modify it for SIS630. it's easy. Set the bit, and in 5 seconds or so you get a reset. Here is a sample function that will enable reset, from the old patches. +void +sis503_reset(struct pci_dev *dev) +{ + unsigned char b; + unsigned short acpi_base; + + printk(KERN_ERR __FUNCTION__ ": starting reset operation. \n"); + + /* Enable ACPI by set B7 on Reg 0x40, LPC */ + pci_read_config_byte(dev, 0x40, &b); + pci_write_config_byte(dev, 0x40, b | 0x80); + printk(KERN_ERR __FUNCTION__ ": enabled ACPI. \n"); + + /* get the ACPI base address for register 0x74,0x75 of LPC */ + pci_read_config_word(dev, 0x74, &acpi_base); + printk(KERN_ERR __FUNCTION__ ":acpi base: %x\n", acpi_base); + + /* Set software watchdog timer init value */ + outb(0x03, 0x4a + acpi_base); + printk(KERN_ERR __FUNCTION__ ": set the dog. \n"); + + printk(KERN_ERR __FUNCTION__ ": enabling dog. \n"); + /* Software watchdog enable, issue PCIRST# when time expire */ + outb(0x8f, 0x4b + acpi_base); + + printk(KERN_ERR __FUNCTION__ ": We should reset soon. \n"); +} > Speaking of ACPI... I can't get it working with LinuxBIOS. ospm_*.o > modules won't load and the kernel complains on being unable to read > ACPI tables. that's because there are not acpi tables. ron From ebiederman at lnxi.com Mon Mar 17 10:25:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 17 10:25:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: References: Message-ID: "Ronald G. Minnich" writes: > On Mon, 17 Mar 2003, Spirit wrote: > > > That shouldn't be a problem unless it takes 5 seconds to get to the > > southbridge.c code. But of course, moving it to an earlier position is > > a good idea. > > It really takes 5 seconds? it did not used to. I liked having it in the > southbridge code for a simple reason: if you are in that code then things > are working well. If you are not in that kind at some point, you really > want that watchdog reset. It is a very simple self-test. This is something I want to look at. I have seen the decompresser taking a full second on several different machines and I find any discernible pause to be a problem. Tentatively I have attributed this to a poorly setup cache somewhere. But I have not had a chance to really investigate it. As it stands right now I am in inch from moving the decompresser from code that runs from ROM to code that runs from RAM, to see if that fixes the performance issue. When I load an etherboot image I have never detected a noticeable slowdown. Which is relevant because etherboot uses exactly the same code. With just minimal changes to cope with running the code in a different environment. Eric From rminnich at lanl.gov Mon Mar 17 12:11:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 17 12:11:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: Message-ID: On 17 Mar 2003, Eric W. Biederman wrote: > As it stands right now I am in inch from moving the decompresser > from code that runs from ROM to code that runs from RAM, to see if > that fixes the performance issue. didn't we make ROM cacheable yet? Rather than keep moving things to RAM, if we make ROM cacheable that is a far simpler solution I think. ron From steve at nexpath.com Mon Mar 17 12:47:01 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Mon Mar 17 12:47:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: References: Message-ID: <3E7611E2.9090405@nexpath.com> Ronald G. Minnich wrote: > On Mon, 17 Mar 2003, Spirit wrote: > > >>That shouldn't be a problem unless it takes 5 seconds to get to the >>southbridge.c code. But of course, moving it to an earlier position is >>a good idea. > > > It really takes 5 seconds? it did not used to. I liked having it in the > southbridge code for a simple reason: if you are in that code then things > are working well. If you are not in that kind at some point, you really > want that watchdog reset. It is a very simple self-test. > On PCChips m787cl+ that I have, it will definitely reset if you turn compression on, without disabling the watchdog. I suppose it must be 5 seconds, but I did not time it. Definitely a long time. Maybe it is related to running at 0xffff0000 instead of 0xf0000. Did we cached that region? The mtrr code is there but I have not checked through it to see what regions are cached. -Steve From steve at nexpath.com Mon Mar 17 12:54:01 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Mon Mar 17 12:54:01 2003 Subject: Help needed to understand code In-Reply-To: References: Message-ID: <3E761370.80908@nexpath.com> Shubhangi Jadhav wrote: > how does crt0.base move to c_start.S. I did not find any reference to > c_start.S from crt0.base or any other .inc files included in crt0.base > The bottom of crt0.base jumps to c_start.S using loader "magic". c_start.S runs in ram in the C code address space. crt0.base runs in rom. -Steve From rminnich at lanl.gov Mon Mar 17 18:46:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 17 18:46:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: <3E7611E2.9090405@nexpath.com> Message-ID: On Mon, 17 Mar 2003, Steve Gehlbach wrote: > Maybe it is related to running at 0xffff0000 instead of 0xf0000. Did we > cached that region? The mtrr code is there but I have not checked > through it to see what regions are cached. I am almost certain we do not cache that region. That might be it. ron From ollie at sis.com.tw Mon Mar 17 20:52:01 2003 From: ollie at sis.com.tw (ollie lho) Date: Mon Mar 17 20:52:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: <3542901559.20030317163530@reactor.ru> References: <10698361876.20030317023730@reactor.ru> <3E752B32.6090607@nexpath.com> <3542901559.20030317163530@reactor.ru> Message-ID: <1047953703.6676.18.camel@ollie> On Mon, 2003-03-17 at 21:35, Spirit wrote: > > What I would really like to see somewhere in the LinuxBIOS code is the > options to disable SiS630 embedded modem and audio controllers. I > browser through the datasheet and didn't find how to disable them. I > probably should re-read it, but if anyone knows the way already, I'd > appreciate showing it to me. > Search the keyword DISABLE_INTERNAL_DEVICE or something in the source. Try writing different value (bit patterns) to the register 0x7c (not so sure ??) in southbridge. It is undocumented. -- ollie lho From steve at nexpath.com Mon Mar 17 21:02:00 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Mon Mar 17 21:02:00 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: References: Message-ID: <3E76441A.2050804@nexpath.com> Ronald G. Minnich wrote: > On Mon, 17 Mar 2003, Steve Gehlbach wrote: > > >>Maybe it is related to running at 0xffff0000 instead of 0xf0000. Did we >>cached that region? The mtrr code is there but I have not checked >>through it to see what regions are cached. > > > I am almost certain we do not cache that region. That might be it. > > ron How about using XIP_ROM_SIZE and XIP_ROM_BASE; seems to setup WP caching on variable MTRR 0x203 (mem type=5). Or does this have other effects; maybe use a different option with same code? -Steve From ebiederman at lnxi.com Mon Mar 17 21:29:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 17 21:29:00 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: <3E76441A.2050804@nexpath.com> References: <3E76441A.2050804@nexpath.com> Message-ID: Steve Gehlbach writes: > Ronald G. Minnich wrote: > > On Mon, 17 Mar 2003, Steve Gehlbach wrote: > > > >> Maybe it is related to running at 0xffff0000 instead of 0xf0000. Did we > >> cached that region? The mtrr code is there but I have not checked through it > > >> to see what regions are cached. > > I am almost certain we do not cache that region. That might be it. > > ron > > > How about using XIP_ROM_SIZE and XIP_ROM_BASE; seems to setup WP caching on > variable MTRR 0x203 (mem type=5). Or does this have other effects; maybe use a > different option with same code? XIP is short for Execute in place. And that is exactly what it is designed for. Eric From ebiederman at lnxi.com Mon Mar 17 21:37:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 17 21:37:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: References: Message-ID: "Ronald G. Minnich" writes: > On 17 Mar 2003, Eric W. Biederman wrote: > > > As it stands right now I am in inch from moving the decompresser > > from code that runs from ROM to code that runs from RAM, to see if > > that fixes the performance issue. > > didn't we make ROM cacheable yet? Rather than keep moving things to RAM, > if we make ROM cacheable that is a far simpler solution I think. Oh, I agree. I just think I have seen cases where the rom is cacheable and the code takes a noticeable amount of time anyway. Eric From steve at nexpath.com Mon Mar 17 21:58:01 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Mon Mar 17 21:58:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: References: <3E76441A.2050804@nexpath.com> Message-ID: <3E76953B.9050608@nexpath.com> Eric W. Biederman wrote: > Steve Gehlbach writes: > > >>Ronald G. Minnich wrote: >>How about using XIP_ROM_SIZE and XIP_ROM_BASE; seems to setup WP caching on >>variable MTRR 0x203 (mem type=5). Or does this have other effects; maybe use a >>different option with same code? > > > XIP is short for Execute in place. And that is exactly what it is designed for. > Fair enough, so we'll use 0x204,5 and separate code. I assume it will speed things up, have to test it in a day or so. As it is, the 5 sec delay makes compression hard to live with. I am also assuming the Via C3 has the variable MTRRs, that may not be a correct assumption. The Intel book says P6 family. -Steve From ebiederman at lnxi.com Mon Mar 17 22:07:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 17 22:07:00 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: <3E76953B.9050608@nexpath.com> References: <3E76441A.2050804@nexpath.com> <3E76953B.9050608@nexpath.com> Message-ID: Steve Gehlbach writes: > Eric W. Biederman wrote: > > Steve Gehlbach writes: > > > >>Ronald G. Minnich wrote: > >>How about using XIP_ROM_SIZE and XIP_ROM_BASE; seems to setup WP caching on > >>variable MTRR 0x203 (mem type=5). Or does this have other effects; maybe use > a > > >>different option with same code? > > XIP is short for Execute in place. And that is exactly what it is designed > > for. > > > > Fair enough, so we'll use 0x204,5 and separate code. I assume it will speed > things up, have to test it in a day or so. As it is, the 5 sec delay makes > compression hard to live with. Error. Communications failure. I meant this situation is exactly what it is designed for. > I am also assuming the Via C3 has the variable MTRRs, that may not be a correct > assumption. The Intel book says P6 family. Very good question what does the C3 have? I recall the strange clones not following intels variable mtrrs. Eric From steve at nexpath.com Mon Mar 17 23:32:01 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Mon Mar 17 23:32:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: References: <3E76441A.2050804@nexpath.com> <3E76953B.9050608@nexpath.com> Message-ID: <3E76AB4C.3060904@nexpath.com> Eric W. Biederman wrote: > Error. Communications failure. > > I meant this situation is exactly what it is designed for. Sorry. I misunderstood. > >>I am also assuming the Via C3 has the variable MTRRs, that may not be a correct >>assumption. The Intel book says P6 family. > > > Very good question what does the C3 have? I recall the strange clones > not following intels variable mtrrs. > Hard to get this out of Via, they don't do datasheets for ordinary folks, but posts on the newsgroups seem to indicate p6 compatibility in some versions anyway: From a post in linux.kernel: cat /proc/cpuinfo: processor : 0 vendor_id : CentaurHauls cpu family : 6 model : 8 model name : VIA C3 Ezra stepping : 9 cpu MHz : 999.910 cache size : 64 KB fdiv_bug : no hlt_bug : no f00f_bug : no coma_bug : no fpu : yes fpu_exception : yes cpuid level : 1 wp : yes flags : fpu de tsc msr cx8 mtrr pge mmx 3dnow bogomips : 1989.22 I'll try the XIP_ROM_SIZE etc tomorrow. -Steve From ebiederman at lnxi.com Mon Mar 17 23:56:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 17 23:56:00 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: <3E76AB4C.3060904@nexpath.com> References: <3E76441A.2050804@nexpath.com> <3E76953B.9050608@nexpath.com> <3E76AB4C.3060904@nexpath.com> Message-ID: Steve Gehlbach writes: > Eric W. Biederman wrote: > > > Error. Communications failure. > > I meant this situation is exactly what it is designed for. > > Sorry. I misunderstood. > > > > >>I am also assuming the Via C3 has the variable MTRRs, that may not be a > correct > > >>assumption. The Intel book says P6 family. > > Very good question what does the C3 have? I recall the strange clones > > not following intels variable mtrrs. > > > > Hard to get this out of Via, they don't do datasheets for ordinary folks, but > posts on the newsgroups seem to indicate p6 compatibility in some versions > anyway: > > From a post in linux.kernel: > cat /proc/cpuinfo: > > processor : 0 > vendor_id : CentaurHauls > cpu family : 6 > model : 8 > model name : VIA C3 Ezra > stepping : 9 > cpu MHz : 999.910 > cache size : 64 KB > fdiv_bug : no > hlt_bug : no > f00f_bug : no > coma_bug : no > fpu : yes > fpu_exception : yes > cpuid level : 1 > wp : yes > flags : fpu de tsc msr cx8 mtrr pge mmx 3dnow > bogomips : 1989.22 > > I'll try the XIP_ROM_SIZE etc tomorrow. So it looks like they have the normal mtrrs. For the strange cpus they should be supported in the linux kernel and have code behind /proc/mtrr. Eric From steve at nexpath.com Tue Mar 18 11:35:01 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Tue Mar 18 11:35:01 2003 Subject: SiS630 Software Watchdog Timer In-Reply-To: References: <3E76441A.2050804@nexpath.com> <3E76953B.9050608@nexpath.com> <3E76AB4C.3060904@nexpath.com> Message-ID: <3E77527F.6030408@nexpath.com> Eric W. Biederman wrote: > So it looks like they have the normal mtrrs. > Yep, appears so. I tried the following this morning: option XIP_ROM_SIZE= 0x01000000 option XIP_ROM_BASE= 0xff000000 This caches the top 16M. The decompress time went from 13 seconds (!!) to less than a second. Guess we better make sure to cache the upper ROM. cat /proc/cpuinfo for my my unit lists as "Via Samuel 2" at 551Mhz and 1101BogoMips, otherwise the same as the one I posted in this thread yesterday. -Steve From spirit at reactor.ru Tue Mar 18 14:34:01 2003 From: spirit at reactor.ru (Alexander Amelkin) Date: Tue Mar 18 14:34:01 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) Message-ID: <92152454918.20030318230043@reactor.ru> Hello ollie, This is the corrected version. The one I sent before contained an error in the raminit.inc patch and wasn't sent to the list.. However, even without my patch I was getting the following error when I set DISABLE_INTERNAL_DEVICES=1 and try to make: crt0.s:786: Error: Symbol write_lpc_register already defined. As I discovered that was caused by the unneeded write_lpc_register label in the raminit.inc. Thus I modified my patch to remove that line and now everything works fine. Tuesday, March 18, 2003, 5:15:03 AM, you wrote: ol> On Mon, 2003-03-17 at 21:35, Spirit wrote: >> >> What I would really like to see somewhere in the LinuxBIOS code is the >> options to disable SiS630 embedded modem and audio controllers. I >> browser through the datasheet and didn't find how to disable them. I >> probably should re-read it, but if anyone knows the way already, I'd >> appreciate showing it to me. >> ol> Search the keyword DISABLE_INTERNAL_DEVICE or something in the source. ol> Try writing different value (bit patterns) to the register 0x7c (not so ol> sure ??) in southbridge. It is undocumented. It's quite funny to hear about undocumented SiS chipset features from a SiS person :))) Anyway, thanks for the hint. That turned out to be a FAQ and the answer can even be found on linuxbios.org/faq :) I thought that with that information it would be nice to have configuration options to enable and disable specific embedded devices, so I wrote a small patch to sis/630/raminit.inc. I hope this will help other people. Please find the patch file attached. I tried the patch and it works. The board boots ok and the per-device disable options work as supposed to. -- Best regards, Spirit mailto:spirit at reactor.ru -------------- next part -------------- A non-text attachment was scrubbed... Name: sis630-embedded-devices.patch Type: application/octet-stream Size: 2294 bytes Desc: not available URL: From rminnich at lanl.gov Tue Mar 18 15:07:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Mar 18 15:07:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <92152454918.20030318230043@reactor.ru> Message-ID: can we get a second sis 630 person to test this? Just for double check. I don't have sis 630 any more :-( ron From spirit at reactor.ru Tue Mar 18 17:44:01 2003 From: spirit at reactor.ru (Spirit) Date: Tue Mar 18 17:44:01 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: References: Message-ID: <126163829304.20030319021014@reactor.ru> Hello Ronald, Tuesday, March 18, 2003, 11:07:34 PM, you wrote: RGM> can we get a second sis 630 person to test this? Just for double check. I also created another two patches: 1. Adds an IDE_SPINUP_DELAY option (defaults to 2 seconds, just as it is now). Good for IDE DiskOnModule (flash) machines that do not need to wait for a flash to spin-up :) It also replaces the unmeaningful "This is a hard coded delay" message with "IDE Spin-Up Delay". 2. Adds a CUSTOM_GREETING option to allow replacing the standard "LinuxBIOS-{version}{extraversion} {build} {booting}" message with a custom greeting "{custom_greeting} {build} {booting}" The patches are tested and work fine for me. Do you want me to send them in? What I would also like to add is some meaningful message before that myriad of dots starts appearing (the kernel loading process I mean). It would be nice to say "Loading kernel:" and then start printing dots. However, I don't know what is the best place for that code. Any suggestions? -- Best regards, Spirit mailto:spirit at reactor.ru From rminnich at lanl.gov Tue Mar 18 17:52:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Mar 18 17:52:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <126163829304.20030319021014@reactor.ru> Message-ID: On Wed, 19 Mar 2003, Spirit wrote: > The patches are tested and work fine for me. > Do you want me to send them in? yes. Ask Eric for the best place to print "load kernel:" but it should be "Loading payload" ron From NEWBELL7 at magicn.com Tue Mar 18 19:06:01 2003 From: NEWBELL7 at magicn.com (NEWBELL7 at magicn.com) Date: Tue Mar 18 19:06:01 2003 Subject: [epia]Unknown bootloader class Message-ID: I have epia board. I had followed the HOWTO/EPIA Documentation. But The debug messages are like this below. What's wrong? I use a ROM Emulator. And I use mkelfImage from freebios/util/mkelfImage/. Please, Help me!! ===================================================== LinuxBIOS-1.0.0 Tue Mar 18 21:45:13 KST 2003 starting... Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Tue Mar 18 21:45:13 KST 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1106/0601] PCI: 00:01.0 [1106/8601] PCI: 00:11.0 [1106/8231] PCI: 00:11.1 [1106/0571] PCI: 00:11.2 [1106/3038] PCI: 00:11.3 [1106/3038] PCI: 00:11.4 [1106/8235] PCI: 00:11.5 [1106/3058] PCI: 00:11.6 [1106/3068] PCI: 00:12.0 [1106/3065] PCI: pci_scan_bus for bus 1 PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xfeb00000 - 0xfeafffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfeb00000 - 0xfeafffff] bus 1 mem PCI: 00:11.1 20 <- [0x00001c40 - 0x00001c4f] io PCI: 00:11.2 20 <- [0x00001c00 - 0x00001c1f] io PCI: 00:11.3 20 <- [0x00001c20 - 0x00001c3f] io PCI: 00:11.5 10 <- [0x00001000 - 0x000010ff] io PCI: 00:11.5 14 <- [0x00001c50 - 0x00001c53] io PCI: 00:11.5 18 <- [0x00001c60 - 0x00001c63] io PCI: 00:11.6 10 <- [0x00001400 - 0x000014ff] io PCI: 00:12.0 10 <- [0x00001800 - 0x000018ff] io PCI: 00:12.0 14 <- [0xfeb00000 - 0xfeb000ff] mem ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:11.0 cmd <- 87 PCI: 00:11.1 cmd <- 81 PCI: 00:11.2 cmd <- 01 PCI: 00:11.3 cmd <- 01 PCI: 00:11.4 cmd <- 00 PCI: 00:11.5 cmd <- 01 PCI: 00:11.6 cmd <- 01 PCI: 00:12.0 cmd <- 83 done. Initializing PCI devices... PCI devices initialized sizeram: returning 0x1fc00 KB sizeram: NOT returning 0x1fc00 KB sizeram: there are still some SPD problems ... sizeram: SO we return only 0x10000 KB totalram: 64M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x00803035 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Disabling local apic...done. CPU #0 Initialized Mainboard fixup IDE enable in reg. 50 is 0x7 set IDE reg. 50 to 0x7 IRQs in reg. 4c are 0x4 setting reg. 4c to 0x4 enables in reg 0x40 0x8 enables in reg 0x40 read back as 0xb enables in reg 0x9 0x8f enables in reg 0x9 read back as 0x8a command in reg 0x4 0x81 command in reg 0x4 reads back as 0x7 Ethernet fixup Configuring VIA LAN RTC Init Invalid CMOS LB checksum Final mainboard fixup Southbridge fixup setting southbridge Assigning IRQ 12 to 0:11.2 Readback = 12 Assigning IRQ 12 to 0:11.3 Readback = 12 Assigning IRQ 10 to 0:11.5 Readback = 10 Assigning IRQ 10 to 0:11.6 Readback = 10 setting ethernet Assigning IRQ 11 to 0:12.0 Readback = 11 setting pci slot Checking IRQ routing tables... /home/newbell/LinuxBios/freebios/src/arch/i386/lib/pirq_routing.c: 24:check_p irq_routing_table() - irq_routing_table located at: 0x0000a440 done. Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 00000664 checksum 48cc Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 203:init_bytes() - zkernel_start:0xfff00000 zkernel_mask:0x0000ffff Searching for 16 byte tags 64:rom_read_bytes() - overflowed source buffer. max_block = 15 init_bytes found 0 tags Found ELF candiate at offset 0 New segment addr 0x94000 size 0x74e8 offset 0x60 filesize 0x396c (cleaned up) New segment addr 0x94000 size 0x74e8 offset 0x60 filesize 0x396c Loading Segment: addr: 0x0000000000094000 memsz: 0x00000000000074e8 filesz: 0x00 0000000000396c Clearing Segment: addr: 0x000000000009796c memsz: 0x0000000000003b7c Jumping to boot code at 0x94000 ROM segment 0x4041 length 0x0006 reloc 0x9400 Etherboot 5.0.8 (GPL) Tagged ELF for [VIA 86C100] Boot from (N)etwork or from (L)ocal? clocks_per_tick = 420319 N Probing...[VIA 86C100]Found VIA 6102 ROM address 0x0000 rhine.c v1.0.0 2000-01-07 IO address 1800 Ethernet Address: 00:00:F0:91:58:39 Analyzing Media type,this will take several seconds........OK Linespeed=10Mbs Fullduplex The PCI BIOS has not enabled this device! Updating PCI command 0003->0007. pci_bus 00 pci_device_fn 90 Searching for server (DHCP)... .Me: 165.213.172.236, Server: 165.213.172.155, Gateway 165.213.172.1 Loading 165.213.172.155:/tftpboot/vmlinuz.xterm ...(ELF)... ................... ....................................................................... ....... ....................................................................... ....... ....................................................................... ....... ....................................................................... ....... ....................................................................... ....... ....................................................................... ....... ....................................................................... ....... ....................................................................don e rhine disable Unknown bootloader class! type=0x000101C0 data=0x000989CE Firmware type: LinuxBIOS -------------- next part -------------- An HTML attachment was scrubbed... URL: From ollie at sis.com.tw Tue Mar 18 20:32:01 2003 From: ollie at sis.com.tw (ollie lho) Date: Tue Mar 18 20:32:01 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: References: Message-ID: <1048038888.6675.20.camel@ollie> On Wed, 2003-03-19 at 04:07, Ronald G. Minnich wrote: > can we get a second sis 630 person to test this? Just for double check. > > I don't have sis 630 any more :-( > I don't have any more neither :~(. Adrew, can you test it ? -- ollie lho From xpegenaute at telepolis.es Wed Mar 19 05:20:01 2003 From: xpegenaute at telepolis.es (Xavier Pegenaute) Date: Wed Mar 19 05:20:01 2003 Subject: About motherboard with adlo Message-ID: <3E786541.4050109@telepolis.es> Hello, i know that ADLO is runing with Matsonic MS730E, but i'd like to try and in my faculty they haven't this motherboard. Is running Adlo, in other type of motherboard ..? In case that finally i haven't the motherboard that i need for Adlo ..., , which mothers boards i can use with LinuxBios and DoC (MD2802) ? some recommedation ..? ASUS CUA LeadTek Winfast 6300 pcchips 810lmr Elite Group K7SEM I think that i d'ont forget nothing ... Regards. Xavi. From mwilkinson at ndirect.co.uk Wed Mar 19 05:30:01 2003 From: mwilkinson at ndirect.co.uk (Mark Wilkinson) Date: Wed Mar 19 05:30:01 2003 Subject: [epia] Unknown bootloader class Message-ID: <000401c2ee06$33c750b0$ce40a8c0@2pmtech.com> Hello ! looking through the debug messages you've supplied, the problem seems to be with the image that you've loaded. The linuxbios + etherboot seems to have worked fine - Etherboot hands over to your image just after the 'rhine disable' message. Have you tried booting a stock kernel image ? Can you supply more information on the image you are loading ? What kernel version, configuration info etc. Regards Mark Wilkinson -------------- next part -------------- An HTML attachment was scrubbed... URL: From spirit at reactor.ru Wed Mar 19 05:36:01 2003 From: spirit at reactor.ru (Spirit) Date: Wed Mar 19 05:36:01 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: References: Message-ID: <163206588248.20030319140238@reactor.ru> Hello Ronald, Wednesday, March 19, 2003, 2:18:54 AM, you wrote: RGM> On Wed, 19 Mar 2003, Spirit wrote: >> The patches are tested and work fine for me. >> Do you want me to send them in? RGM> yes. Ok. Find them attached. -- Best regards, Spirit mailto:spirit at reactor.ru -------------- next part -------------- A non-text attachment was scrubbed... Name: custom-greeting-i386.patch Type: application/octet-stream Size: 560 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: spinup-delay.patch Type: application/octet-stream Size: 1028 bytes Desc: not available URL: From rminnich at lanl.gov Wed Mar 19 09:20:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 19 09:20:01 2003 Subject: About motherboard with adlo In-Reply-To: <3E786541.4050109@telepolis.es> Message-ID: On Wed, 19 Mar 2003, Xavier Pegenaute wrote: > ASUS CUA CUA is fine with DOC > LeadTek Winfast 6300 > pcchips 810lmr > Elite Group K7SEM these should all work. ron From aip at cwlinux.com Wed Mar 19 10:18:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Wed Mar 19 10:18:00 2003 Subject: About motherboard with adlo In-Reply-To: <3E786541.4050109@telepolis.es>; from Xavier Pegenaute on Wed, Mar 19, 2003 at 12:40:33PM +0000 References: <3E786541.4050109@telepolis.es> Message-ID: <20030319234455.A26708@mail.cwlinux.com> > In case that finally i haven't the motherboard that i need for Adlo ..., > , which mothers boards i can use with LinuxBios and DoC (MD2802) ? some > recommedation ..? > ASUS CUA > LeadTek Winfast 6300 > pcchips 810lmr > Elite Group K7SEM pcchips 787 pcchips 758 should also work. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From aip at cwlinux.com Wed Mar 19 10:22:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Wed Mar 19 10:22:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <1048038888.6675.20.camel@ollie>; from ollie lho on Wed, Mar 19, 2003 at 09:54:48AM +0800 References: <1048038888.6675.20.camel@ollie> Message-ID: <20030319234843.B26708@mail.cwlinux.com> > I don't have any more neither :~(. Adrew, can you test it ? I guess this is me :). I'll try it and send the result back to the list. However, we should also think about other way to enable/disable devices without rebuilding LinuxBIOS. Is it possible to do it with cmos like normal bios? -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From rminnich at lanl.gov Wed Mar 19 10:25:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 19 10:25:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <20030319234843.B26708@mail.cwlinux.com> Message-ID: On Wed, 19 Mar 2003, Andrew Ip wrote: > I guess this is me :). I'll try it and send the result back to > the list. However, we should also think about other way to > enable/disable devices without rebuilding LinuxBIOS. Is it > possible to do it with cmos like normal bios? > There are actually two cases. The first case is that you never want some feature enable because of the motherboard design. The second is that you want some features enabled/disabled. But I have only ever seen the first case in reality. Are there other cases? ron From aip at cwlinux.com Wed Mar 19 10:33:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Wed Mar 19 10:33:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: ; from Ronald G. Minnich on Wed, Mar 19, 2003 at 08:52:02AM -0700 References: <20030319234843.B26708@mail.cwlinux.com> Message-ID: <20030319235925.A26906@mail.cwlinux.com> > There are actually two cases. The first case is that you never want some > feature enable because of the motherboard design. The second is that you > want some features enabled/disabled. There are 3 pci slots on m758/m787. If I want to use all 3 slots, I need to disable audio/modem. However, some applications might not want to disable audio. Even storing IRQ assignment is also very useful for debugging purpose. Storing boot option is useful, too. I'm just thinking flexablity here. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From rminnich at lanl.gov Wed Mar 19 10:37:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 19 10:37:01 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <20030319235925.A26906@mail.cwlinux.com> Message-ID: On Wed, 19 Mar 2003, Andrew Ip wrote: > There are 3 pci slots on m758/m787. If I want to use all 3 slots, I need > to disable audio/modem. However, some applications might not want to disable > audio. Even storing IRQ assignment is also very useful for debugging > purpose. Storing boot option is useful, too. I'm just thinking flexablity > here. Eric set up a nice infrastructure for CMOS, and we have not yet used it. Sounds like we now have an application. I would like to have the LinuxBIOS code that uses the CMOS written in C, however. How late in the boot process can you enable/disable this hardware and have it work correctly? ron From aip at cwlinux.com Wed Mar 19 10:46:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Wed Mar 19 10:46:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: ; from Ronald G. Minnich on Wed, Mar 19, 2003 at 09:03:07AM -0700 References: <20030319235925.A26906@mail.cwlinux.com> Message-ID: <20030320001231.A27140@mail.cwlinux.com> > Eric set up a nice infrastructure for CMOS, and we have not yet used it. > Sounds like we now have an application. I would like to have the LinuxBIOS > code that uses the CMOS written in C, however. How late in the boot > process can you enable/disable this hardware and have it work correctly? For most cases, it probably needs to be done before PCI probing. Besides, should we follow normal bios layout, or should we have our own. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From rminnich at lanl.gov Wed Mar 19 17:35:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 19 17:35:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <20030320001231.A27140@mail.cwlinux.com> Message-ID: On Thu, 20 Mar 2003, Andrew Ip wrote: > For most cases, it probably needs to be done before PCI probing. Besides, > should we follow normal bios layout, or should we have our own. we should have our own, but follow the conventions established for, e.g., the supermicro boards. ron From ollie at sis.com.tw Wed Mar 19 20:29:00 2003 From: ollie at sis.com.tw (ollie lho) Date: Wed Mar 19 20:29:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: References: Message-ID: <1048125051.23394.3.camel@ollie> On Thu, 2003-03-20 at 00:03, Ronald G. Minnich wrote: > On Wed, 19 Mar 2003, Andrew Ip wrote: > > > There are 3 pci slots on m758/m787. If I want to use all 3 slots, I need > > to disable audio/modem. However, some applications might not want to disable > > audio. Even storing IRQ assignment is also very useful for debugging > > purpose. Storing boot option is useful, too. I'm just thinking flexablity > > here. > > Eric set up a nice infrastructure for CMOS, and we have not yet used it. > Sounds like we now have an application. I would like to have the LinuxBIOS > code that uses the CMOS written in C, however. How late in the boot > process can you enable/disable this hardware and have it work correctly? > Before PCI enumeration. -- ollie lho From ollie at sis.com.tw Wed Mar 19 20:31:01 2003 From: ollie at sis.com.tw (ollie lho) Date: Wed Mar 19 20:31:01 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <20030320001231.A27140@mail.cwlinux.com> References: <20030319235925.A26906@mail.cwlinux.com> <20030320001231.A27140@mail.cwlinux.com> Message-ID: <1048125142.23391.6.camel@ollie> On Thu, 2003-03-20 at 00:12, Andrew Ip wrote: > > Eric set up a nice infrastructure for CMOS, and we have not yet used it. > > Sounds like we now have an application. I would like to have the LinuxBIOS > > code that uses the CMOS written in C, however. How late in the boot > > process can you enable/disable this hardware and have it work correctly? > For most cases, it probably needs to be done before PCI probing. Besides, > should we follow normal bios layout, or should we have our own. The CMOS layout for normal BIOS differ form vendor to vendor (chipset/MB too ??). I think we should come up with our own standard. -- ollie lho From hansolofalcon at worldnet.att.net Wed Mar 19 21:33:01 2003 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Wed Mar 19 21:33:01 2003 Subject: Bare Metal bootloader built, now how do I use it? In-Reply-To: Message-ID: <000001c2ee8c$d3e49400$a4a3580c@who5> Hello again from Gregg C Levine Thought you should know, that I've built my copy of the Bare Metal bootloader. According to your notes below, it gets used with an Ether boot, and the memory tester. And that I'd need to build my Linux BIOS builds with that serial setting turned on. One quick question before I do all that, can I simply test Bare Metal, by sending it via an etherboot device to the system in question? Your notes say I can. But how? ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) > -----Original Message----- > From: steven james [mailto:pyro at linuxlabs.com] > Sent: Saturday, March 15, 2003 4:46 PM > To: Gregg C Levine > Cc: Linuxbios > Subject: Re: Bare Metal bootloader built, now how do I use it? > > Greetings, > > I should document this :-) > > The bootselect will scan the ROM for payload tags (see > baremetal/include/rom/read_bytes.h) > > The signature is $TAG$ > > the data field and any subsequent 16 byte blocks of the tag contain an > ASCIIZ name for the payload. > > Currently, it's hardwired to the serial console. When it runs, if there is > a byte waiting in the rx buffer, it will present a list and wait for a > numerical selection, otherwise, it will chain to the default payload > (the one that follows bootselect). > > You'll want to build LinuxBIOS with option PYRO_SERIAL so that the rx > buffer will accept and hold your keypress (giving you enough time to hit > space). > > Usually, I use it with an etherboot or two, memtest86, and a forth > environment I'm working on (not in the tree yet since the build is a > mess). > > G'day, > sjames > > > On Fri, 14 Mar 2003, Gregg C Levine wrote: > > > Hello from Gregg C Levine > > Okay, here is what I mean. > > I have successfully built the Bare Metal boot loader. Now the question > > is, or should be: > > How do I use it? > > > > Steven this is an interesting project. Now I'm just fishing for > > advice. > > ------------------- > > Gregg C Levine hansolofalcon at worldnet.att.net > > ------------------------------------------------------------ > > "The Force will be with you...Always." Obi-Wan Kenobi > > "Use the Force, Luke."? Obi-Wan Kenobi > > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > > (This company dedicates this E-Mail to Master Yoda ) > > > > > > > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > -- > -------------------------steven james, director of research, linux labs > ... ........ ..... .... 230 peachtree st nw ste 2701 > the original linux labs atlanta.ga.us 30303 > -since 1995 http://www.linuxlabs.com > office 404.577.7747 fax 404.577.7743 > ---------------------------------------------------------------------- - > From NEWBELL7 at magicn.com Thu Mar 20 03:04:01 2003 From: NEWBELL7 at magicn.com (NEWBELL7 at magicn.com) Date: Thu Mar 20 03:04:01 2003 Subject: [epia] Unknown bootloader class Message-ID: <9eb901c2ee89$68ae7870$82cda8c0@magicn.net> Hello Mark! HOWTO/EPIA documentation says, "Step a) Grab the source for your favorate version of the linux kernel Configure as required make dep bzImage ". So just to find out if the kernel starts or not, I got my kernel image from redhat 7.1, of which version is 2.4.2 and ignored kernel configuraiton except serial console. And my linux version is redhat 7.1. Anyway, my kernel configuration is below. And I got mkelfImage like this. cd freebios/util/mkelfImage /configure make Then I got final kernel Image for etherboot like this. mkelfImage --kernel=/usr/src/linux-2.4/arch/i386/boot/bzImage \ --output=/tftpboot/vmlinuz.epia \ --command-line="console=ttyS0,115200n8 root=/dev/hda3" Thank you for your attention. regards HyungJong Shin >looking through the debug messages you've supplied, the problem seems to >be with the image that you've loaded. > >The linuxbios + etherboot seems to have worked fine - Etherboot hands >over to your image just after the 'rhine disable' >message. > >Have you tried booting a stock kernel image ? > >Can you supply more information on the image you are loading ? What >kernel version, configuration info etc. =============================================================== # # Automatically generated by make menuconfig: don't edit # CONFIG_X86=y CONFIG_ISA=y # CONFIG_SBUS is not set CONFIG_UID16=y # # Code maturity level options # # CONFIG_EXPERIMENTAL is not set # # Loadable module support # CONFIG_MODULES=y CONFIG_MODVERSIONS=y CONFIG_KMOD=y # # Processor type and features # # CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set # CONFIG_M586MMX is not set # CONFIG_M686 is not set CONFIG_MPENTIUMIII=y # CONFIG_MPENTIUM4 is not set # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MCRUSOE is not set # CONFIG_MWINCHIPC6 is not set # CONFIG_MWINCHIP2 is not set # CONFIG_MWINCHIP3D is not set CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_INVLPG=y CONFIG_X86_CMPXCHG=y CONFIG_X86_BSWAP=y CONFIG_X86_POPAD_OK=y CONFIG_X86_L1_CACHE_SHIFT=5 CONFIG_X86_TSC=y CONFIG_X86_GOOD_APIC=y CONFIG_X86_PGE=y CONFIG_X86_USE_PPRO_CHECKSUM=y # CONFIG_TOSHIBA is not set # CONFIG_MICROCODE is not set # CONFIG_X86_MSR is not set # CONFIG_X86_CPUID is not set # CONFIG_E820_PROC is not set CONFIG_NOHIGHMEM=y # CONFIG_HIGHMEM4G is not set # CONFIG_HIGHMEM64G is not set CONFIG_1GB=y # CONFIG_2GB is not set # CONFIG_3GB is not set # CONFIG_MATH_EMULATION is not set # CONFIG_MTRR is not set CONFIG_SMP=y CONFIG_HAVE_DEC_LOCK=y # # General setup # CONFIG_NET=y # CONFIG_VISWS is not set CONFIG_X86_IO_APIC=y CONFIG_X86_LOCAL_APIC=y CONFIG_PCI=y # CONFIG_PCI_GOBIOS is not set # CONFIG_PCI_GODIRECT is not set CONFIG_PCI_GOANY=y CONFIG_PCI_BIOS=y CONFIG_PCI_DIRECT=y CONFIG_PCI_NAMES=y # CONFIG_EISA is not set # CONFIG_MCA is not set CONFIG_HOTPLUG=y # # PCMCIA/CardBus support # CONFIG_PCMCIA=y CONFIG_CARDBUS=y # CONFIG_I82365 is not set # CONFIG_TCIC is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y CONFIG_KCORE_ELF=y # CONFIG_KCORE_AOUT is not set CONFIG_BINFMT_AOUT=y CONFIG_BINFMT_ELF=y CONFIG_BINFMT_MISC=y CONFIG_PM=y # CONFIG_APM is not set # # Memory Technology Devices (MTD) # # CONFIG_MTD is not set # # Parallel port support # # CONFIG_PARPORT is not set # # Plug and Play configuration # CONFIG_PNP=y CONFIG_ISAPNP=y # # Block devices # CONFIG_BLK_DEV_FD=y # CONFIG_BLK_DEV_XD is not set # CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_BLK_DEV_INITRD is not set # # Multi-device support (RAID and LVM) # # CONFIG_MD is not set # CONFIG_BLK_DEV_MD is not set # CONFIG_MD_LINEAR is not set # CONFIG_MD_RAID0 is not set # CONFIG_MD_RAID1 is not set # CONFIG_MD_RAID5 is not set # CONFIG_MD_MULTIPATH is not set # CONFIG_BLK_DEV_LVM is not set # # Networking options # CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set # CONFIG_NETLINK is not set # CONFIG_NETFILTER is not set # CONFIG_FILTER is not set CONFIG_UNIX=y CONFIG_INET=y # CONFIG_TUX is not set CONFIG_IP_MULTICAST=y # CONFIG_IP_ADVANCED_ROUTER is not set # CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set # CONFIG_IP_MROUTE is not set # CONFIG_INET_ECN is not set # CONFIG_SYN_COOKIES is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_DECNET is not set # CONFIG_BRIDGE is not set # # QoS and/or fair queueing # # CONFIG_NET_SCHED is not set # # Telephony Support # # CONFIG_PHONE is not set # CONFIG_PHONE_IXJ is not set # # ATA/IDE/MFM/RLL support # CONFIG_IDE=y # # IDE, ATA and ATAPI Block devices # CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set CONFIG_BLK_DEV_IDEDISK=y # CONFIG_IDEDISK_MULTI_MODE is not set # CONFIG_BLK_DEV_IDEDISK_VENDOR is not set # CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set # CONFIG_BLK_DEV_IDEDISK_IBM is not set # CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set # CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set # CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set # CONFIG_BLK_DEV_IDEDISK_WD is not set # CONFIG_BLK_DEV_COMMERIAL is not set # CONFIG_BLK_DEV_TIVO is not set # CONFIG_BLK_DEV_IDECS is not set CONFIG_BLK_DEV_IDECD=y # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_BLK_DEV_IDESCSI is not set CONFIG_BLK_DEV_CMD640=y # CONFIG_BLK_DEV_CMD640_ENHANCED is not set # CONFIG_BLK_DEV_ISAPNP is not set CONFIG_BLK_DEV_RZ1000=y CONFIG_BLK_DEV_IDEPCI=y CONFIG_IDEPCI_SHARE_IRQ=y # CONFIG_BLK_DEV_IDEDMA_PCI is not set # CONFIG_BLK_DEV_OFFBOARD is not set # CONFIG_IDEDMA_PCI_AUTO is not set # CONFIG_BLK_DEV_IDEDMA is not set # CONFIG_IDEDMA_PCI_WIP is not set # CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set # CONFIG_BLK_DEV_AEC62XX is not set # CONFIG_AEC62XX_TUNING is not set # CONFIG_BLK_DEV_ALI15X3 is not set # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD7409 is not set # CONFIG_AMD7409_OVERRIDE is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_CY82C693 is not set # CONFIG_BLK_DEV_CS5530 is not set # CONFIG_BLK_DEV_HPT34X is not set # CONFIG_HPT34X_AUTODMA is not set # CONFIG_BLK_DEV_HPT366 is not set # CONFIG_BLK_DEV_PIIX is not set # CONFIG_PIIX_TUNING is not set # CONFIG_BLK_DEV_NS87415 is not set # CONFIG_BLK_DEV_OPTI621 is not set # CONFIG_BLK_DEV_PDC202XX is not set # CONFIG_PDC202XX_BURST is not set # CONFIG_BLK_DEV_OSB4 is not set # CONFIG_BLK_DEV_SIS5513 is not set # CONFIG_BLK_DEV_SLC90E66 is not set # CONFIG_BLK_DEV_TRM290 is not set # CONFIG_BLK_DEV_VIA82CXXX is not set # CONFIG_IDE_CHIPSETS is not set # CONFIG_IDEDMA_AUTO is not set # CONFIG_DMA_NONPCI is not set CONFIG_BLK_DEV_IDE_MODES=y # # SCSI support # CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_SD_EXTRA_DEVS=40 # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set # CONFIG_CHR_DEV_SG is not set CONFIG_SCSI_DEBUG_QUEUES=y CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set # # SCSI low-level drivers # # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_7000FASST is not set # CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_AHA152X is not set # CONFIG_SCSI_AHA1542 is not set # CONFIG_SCSI_AHA1740 is not set # CONFIG_SCSI_AACRAID is not set # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_IN2000 is not set # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set # CONFIG_SCSI_EATA is not set # CONFIG_SCSI_EATA_DMA is not set # CONFIG_SCSI_EATA_PIO is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set # CONFIG_SCSI_GDTH is not set # CONFIG_SCSI_GENERIC_NCR5380 is not set # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_NCR53C406A is not set # CONFIG_SCSI_NCR53C7xx is not set # CONFIG_SCSI_NCR53C8XX is not set CONFIG_SCSI_SYM53C8XX=y CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS=4 CONFIG_SCSI_NCR53C8XX_MAX_TAGS=32 CONFIG_SCSI_NCR53C8XX_SYNC=20 # CONFIG_SCSI_NCR53C8XX_PROFILE is not set # CONFIG_SCSI_NCR53C8XX_IOMAPPED is not set # CONFIG_SCSI_NCR53C8XX_PQS_PDS is not set # CONFIG_SCSI_PAS16 is not set # CONFIG_SCSI_PCI2000 is not set # CONFIG_SCSI_PCI2220I is not set # CONFIG_SCSI_PSI240I is not set # CONFIG_SCSI_QLOGIC_FAS is not set # CONFIG_SCSI_QLOGIC_ISP is not set # CONFIG_SCSI_QLOGIC_FC is not set # CONFIG_SCSI_QLOGIC_1280 is not set # CONFIG_SCSI_QLOGIC_QLA2100 is not set # CONFIG_SCSI_SEAGATE is not set # CONFIG_SCSI_SIM710 is not set # CONFIG_SCSI_SYM53C416 is not set # CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_T128 is not set # CONFIG_SCSI_U14_34F is not set # CONFIG_SCSI_ULTRASTOR is not set # # PCMCIA SCSI adapter support # # CONFIG_SCSI_PCMCIA is not set # # Fusion MPT device support # # CONFIG_FUSION is not set # CONFIG_FUSION_BOOT is not set # CONFIG_FUSION_ISENSE is not set # CONFIG_FUSION_CTL is not set # CONFIG_FUSION_LAN is not set # # I2O device support # # CONFIG_I2O is not set # CONFIG_I2O_PCI is not set # CONFIG_I2O_BLOCK is not set # CONFIG_I2O_LAN is not set # CONFIG_I2O_SCSI is not set # CONFIG_I2O_PROC is not set # # Network device support # CONFIG_NETDEVICES=y # # ARCnet devices # # CONFIG_ARCNET is not set CONFIG_DUMMY=m # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_NET_SB1000 is not set # # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_ADAPTEC_STARFIRE is not set # CONFIG_AC3200 is not set # CONFIG_APRICOT is not set # CONFIG_CS89x0 is not set # CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set CONFIG_EEPRO100=y # CONFIG_EEPRO100_PM is not set # CONFIG_LNE390 is not set # CONFIG_E100 is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139TOO is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set # CONFIG_VIA_RHINE is not set # CONFIG_WINBOND_840 is not set # CONFIG_HAPPYMEAL is not set # CONFIG_NET_POCKET is not set # # Ethernet (1000 Mbit) # # CONFIG_E1000 is not set # CONFIG_ACENIC is not set # CONFIG_NET_BROADCOM is not set # CONFIG_HAMACHI is not set # CONFIG_SK98LIN is not set # CONFIG_FDDI is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # # Wireless LAN (non-hamradio) # # CONFIG_CIPE is not set # CONFIG_NET_RADIO is not set # # Token Ring devices # # CONFIG_TR is not set # CONFIG_NET_FC is not set # # Wan interfaces # # CONFIG_WAN is not set # # PCMCIA network device support # CONFIG_NET_PCMCIA=y # CONFIG_PCMCIA_3C589 is not set # CONFIG_PCMCIA_3C574 is not set # CONFIG_PCMCIA_FMVJ18X is not set CONFIG_PCMCIA_PCNET=y # CONFIG_PCMCIA_NMCLAN is not set # CONFIG_PCMCIA_SMC91C92 is not set # CONFIG_PCMCIA_XIRC2PS is not set # CONFIG_ARCNET_COM20020_CS is not set # CONFIG_PCMCIA_IBMTR is not set # CONFIG_PCMCIA_XIRCOM is not set # CONFIG_PCMCIA_XIRTULIP is not set CONFIG_NET_PCMCIA_RADIO=y CONFIG_PCMCIA_RAYCS=y # CONFIG_PCMCIA_NETWAVE is not set # CONFIG_PCMCIA_WAVELAN is not set # CONFIG_PCMCIA_WVLAN is not set # CONFIG_AIRONET4500_CS is not set # CONFIG_AIRONET4800_CS is not set CONFIG_PCMCIA_NETCARD=y # # Amateur Radio support # # CONFIG_HAMRADIO is not set # # IrDA (infrared) support # # CONFIG_IRDA is not set # # ISDN subsystem # # CONFIG_ISDN is not set # # Old CD-ROM drivers (not SCSI, not IDE) # # CONFIG_CD_NO_IDESCSI is not set # # Input core support # # CONFIG_INPUT is not set # # Character devices # # CONFIG_VT is not set CONFIG_SERIAL=y CONFIG_SERIAL_CONSOLE=y # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 # # I2C support # # CONFIG_I2C is not set # # Mice # # CONFIG_BUSMOUSE is not set CONFIG_MOUSE=y CONFIG_PSMOUSE=y # CONFIG_82C710_MOUSE is not set # CONFIG_PC110_PAD is not set # # Joysticks # # CONFIG_JOYSTICK is not set # CONFIG_QIC02_TAPE is not set # # Watchdog Cards # # CONFIG_WATCHDOG is not set # CONFIG_INTEL_RNG is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # # Ftape, the floppy tape device driver # # CONFIG_FTAPE is not set CONFIG_AGP=y CONFIG_AGP_INTEL=y CONFIG_AGP_I810=y CONFIG_AGP_VIA=y CONFIG_AGP_AMD=y CONFIG_AGP_SIS=y CONFIG_AGP_ALI=y CONFIG_DRM=y CONFIG_DRM_TDFX=y # CONFIG_DRM_GAMMA is not set # CONFIG_DRM_R128 is not set CONFIG_DRM_RADEON=y # CONFIG_DRM_I810 is not set # CONFIG_DRM_MGA is not set CONFIG_PCMCIA_SERIAL=y # # PCMCIA character device support # # CONFIG_PCMCIA_SERIAL_CS is not set # CONFIG_PCMCIA_SERIAL_CB is not set # # Multimedia devices # # CONFIG_VIDEO_DEV is not set # # File systems # # CONFIG_QUOTA is not set # CONFIG_AUTOFS_FS is not set CONFIG_AUTOFS4_FS=y # CONFIG_REISERFS_FS is not set # CONFIG_REISERFS_CHECK is not set # CONFIG_ADFS_FS is not set # CONFIG_ADFS_FS_RW is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_FAT_FS is not set # CONFIG_MSDOS_FS is not set # CONFIG_UMSDOS_FS is not set # CONFIG_VFAT_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set # CONFIG_CRAMFS is not set # CONFIG_TMPFS is not set # CONFIG_RAMFS is not set CONFIG_ISO9660_FS=y # CONFIG_JOLIET is not set # CONFIG_MINIX_FS is not set # CONFIG_NTFS_FS is not set # CONFIG_NTFS_RW is not set # CONFIG_HPFS_FS is not set CONFIG_PROC_FS=y # CONFIG_DEVFS_FS is not set # CONFIG_DEVFS_MOUNT is not set # CONFIG_DEVFS_DEBUG is not set CONFIG_DEVPTS_FS=y # CONFIG_QNX4FS_FS is not set # CONFIG_QNX4FS_RW is not set # CONFIG_ROMFS_FS is not set CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set # CONFIG_SYSV_FS_WRITE is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set # CONFIG_UFS_FS is not set # CONFIG_UFS_FS_WRITE is not set # # Network File Systems # # CONFIG_CODA_FS is not set CONFIG_NFS_FS=y # CONFIG_NFS_V3 is not set # CONFIG_ROOT_NFS is not set CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set # CONFIG_NCPFS_STRONG is not set # CONFIG_NCPFS_NFS_NS is not set # CONFIG_NCPFS_OS2_NS is not set # CONFIG_NCPFS_SMALLDOS is not set # CONFIG_NCPFS_NLS is not set # CONFIG_NCPFS_EXTRAS is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set # # Sound # CONFIG_SOUND=y # CONFIG_SOUND_CMPCI is not set # CONFIG_SOUND_EMU10K1 is not set # CONFIG_SOUND_FUSION is not set # CONFIG_SOUND_CS4281 is not set # CONFIG_SOUND_ES1370 is not set CONFIG_SOUND_ES1371=y # CONFIG_SOUND_ESSSOLO1 is not set # CONFIG_SOUND_MAESTRO is not set # CONFIG_SOUND_MAESTRO3 is not set # CONFIG_SOUND_ICH is not set # CONFIG_SOUND_SONICVIBES is not set # CONFIG_SOUND_TRIDENT is not set # CONFIG_SOUND_MSNDCLAS is not set # CONFIG_SOUND_MSNDPIN is not set # CONFIG_SOUND_VIA82CXXX is not set # CONFIG_SOUND_OSS is not set # CONFIG_SOUND_TVMIXER is not set # # USB support # CONFIG_USB=y # CONFIG_USB_DEBUG is not set # CONFIG_USB_DEVICEFS is not set # CONFIG_USB_BANDWIDTH is not set CONFIG_USB_UHCI_ALT=y # CONFIG_USB_OHCI is not set # CONFIG_USB_AUDIO is not set # CONFIG_USB_BLUETOOTH is not set CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_HP8200e is not set # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # CONFIG_USB_DC2XX is not set # CONFIG_USB_MDC800 is not set # CONFIG_USB_SCANNER is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USB_HP5300 is not set # CONFIG_USB_IBMCAM is not set # CONFIG_USB_OV511 is not set # CONFIG_USB_DSBR is not set # CONFIG_USB_DABUSB is not set # CONFIG_USB_PLUSB is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_USBNET is not set # CONFIG_USB_USS720 is not set # # USB Serial Converter support # # CONFIG_USB_SERIAL is not set # CONFIG_USB_RIO500 is not set # # Kernel hacking # CONFIG_DEBUG_IOVIRT=y # CONFIG_MAGIC_SYSRQ is not set -------------- next part -------------- An HTML attachment was scrubbed... URL: From pyro at linuxlabs.com Thu Mar 20 07:23:00 2003 From: pyro at linuxlabs.com (steven james) Date: Thu Mar 20 07:23:00 2003 Subject: Bare Metal bootloader built, now how do I use it? In-Reply-To: <000001c2ee8c$d3e49400$a4a3580c@who5> Message-ID: Greetings, You can 'sort of' manage it in theory. Put the bootselect.elf on your boot server and set up dhcpd.conf filename= line to send bootselect.elf. Since your flash won't have any tags, you'll see it come up on serial, then fail (since it won't find any tags). G'day, sjames On Wed, 19 Mar 2003, Gregg C Levine wrote: > Hello again from Gregg C Levine > Thought you should know, that I've built my copy of the Bare Metal > bootloader. According to your notes below, it gets used with an Ether > boot, and the memory tester. And that I'd need to build my Linux BIOS > builds with that serial setting turned on. One quick question before I > do all that, can I simply test Bare Metal, by sending it via an > etherboot device to the system in question? Your notes say I can. But > how? > ------------------- > Gregg C Levine hansolofalcon at worldnet.att.net > ------------------------------------------------------------ > "The Force will be with you...Always." Obi-Wan Kenobi > "Use the Force, Luke."? Obi-Wan Kenobi > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > (This company dedicates this E-Mail to Master Yoda ) > > > > > -----Original Message----- > > From: steven james [mailto:pyro at linuxlabs.com] > > Sent: Saturday, March 15, 2003 4:46 PM > > To: Gregg C Levine > > Cc: Linuxbios > > Subject: Re: Bare Metal bootloader built, now how do I use it? > > > > Greetings, > > > > I should document this :-) > > > > The bootselect will scan the ROM for payload tags (see > > baremetal/include/rom/read_bytes.h) > > > > The signature is $TAG$ > > > > the data field and any subsequent 16 byte blocks of the tag contain > an > > ASCIIZ name for the payload. > > > > Currently, it's hardwired to the serial console. When it runs, if > there is > > a byte waiting in the rx buffer, it will present a list and wait for > a > > numerical selection, otherwise, it will chain to the default payload > > (the one that follows bootselect). > > > > You'll want to build LinuxBIOS with option PYRO_SERIAL so that the > rx > > buffer will accept and hold your keypress (giving you enough time to > hit > > space). > > > > Usually, I use it with an etherboot or two, memtest86, and a forth > > environment I'm working on (not in the tree yet since the build is a > > mess). > > > > G'day, > > sjames > > > > > > On Fri, 14 Mar 2003, Gregg C Levine wrote: > > > > > Hello from Gregg C Levine > > > Okay, here is what I mean. > > > I have successfully built the Bare Metal boot loader. Now the > question > > > is, or should be: > > > How do I use it? > > > > > > Steven this is an interesting project. Now I'm just fishing for > > > advice. > > > ------------------- > > > Gregg C Levine hansolofalcon at worldnet.att.net > > > ------------------------------------------------------------ > > > "The Force will be with you...Always." Obi-Wan Kenobi > > > "Use the Force, Luke."? Obi-Wan Kenobi > > > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > > > (This company dedicates this E-Mail to Master Yoda ) > > > > > > > > > > > > > > > _______________________________________________ > > > Linuxbios mailing list > > > Linuxbios at clustermatic.org > > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > > > > -- > > -------------------------steven james, director of research, linux > labs > > ... ........ ..... .... 230 peachtree st nw ste > 2701 > > the original linux labs atlanta.ga.us > 30303 > > -since 1995 > http://www.linuxlabs.com > > office 404.577.7747 fax > 404.577.7743 > > > ---------------------------------------------------------------------- > - > > > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From mwilkinson at ndirect.co.uk Thu Mar 20 08:23:00 2003 From: mwilkinson at ndirect.co.uk (Mark Wilkinson) Date: Thu Mar 20 08:23:00 2003 Subject: [epia] Unknown bootloader class Message-ID: <001701c2eee7$972314f0$ce40a8c0@2pmtech.com> Hello HyungJong Thanks for the configuration information. I'd first suggest using a more recent version of the kernel (2.4.18 or higher) as these have support for the Via C3 processor. Second, I'd also suggest configuring the kernel with the following options set/unset. If you go for a newer kernel, select C3 as the processor type. Disable SMP - it's a single processor ! Disable Power management - LinuxBIOS does not have any support at present. Set PCI access to DIRECT rather than ANY Disable the EtherExpress 1000 network card Enable the Via Rhine network card. Until you get the kernel working, I'd also disable sound support. I've also finally managed to track down the 'Unknown bootloader class' message to the mkelfimage utility (elf32-i386/convert_params.c). Perhaps Eric Biederman can comment more on the problem. Regards Mark Wilkinson. From aip at cwlinux.com Thu Mar 20 08:25:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Thu Mar 20 08:25:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <92152454918.20030318230043@reactor.ru>; from Alexander Amelkin on Tue, Mar 18, 2003 at 11:00:43PM +0300 References: <92152454918.20030318230043@reactor.ru> Message-ID: <20030320215029.A7825@mail.cwlinux.com> Alexander, It works!!! I have checked in. Thanks. -Andrew On Tue, Mar 18, 2003 at 11:00:43PM +0300, Alexander Amelkin wrote: > Hello ollie, > > This is the corrected version. The one I sent before contained an > error in the raminit.inc patch and wasn't sent to the list.. > > However, even without my patch I was getting the following error when I set > DISABLE_INTERNAL_DEVICES=1 and try to make: > > crt0.s:786: Error: Symbol write_lpc_register already defined. > > As I discovered that was caused by the unneeded write_lpc_register > label in the raminit.inc. Thus I modified my patch to remove that > line and now everything works fine. -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 232 bytes Desc: not available URL: From aip at cwlinux.com Thu Mar 20 08:40:01 2003 From: aip at cwlinux.com (Andrew Ip) Date: Thu Mar 20 08:40:01 2003 Subject: [epia] Unknown bootloader class In-Reply-To: <9eb901c2ee89$68ae7870$82cda8c0@magicn.net>; from NEWBELL7@magicn.com on Thu, Mar 20, 2003 at 11:35:45AM +0900 References: <9eb901c2ee89$68ae7870$82cda8c0@magicn.net> Message-ID: <20030320220629.B7825@mail.cwlinux.com> You can also try to set CPU to i386 or 586 first. > # CONFIG_M386 is not set > # CONFIG_M486 is not set > # CONFIG_M586 is not set > # CONFIG_M586TSC is not set > # CONFIG_M586MMX is not set > # CONFIG_M686 is not set > CONFIG_MPENTIUMIII=y > # CONFIG_MPENTIUM4 is not set > # CONFIG_MK6 is not set > # CONFIG_MK7 is not set > # CONFIG_MCRUSOE is not set > # CONFIG_MWINCHIPC6 is not set > # CONFIG_MWINCHIP2 is not set > # CONFIG_MWINCHIP3D is not set > CONFIG_X86_WP_WORKS_OK=y > CONFIG_X86_INVLPG=y -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From NEWBELL7 at magicn.com Fri Mar 21 04:19:00 2003 From: NEWBELL7 at magicn.com (NEWBELL7 at magicn.com) Date: Fri Mar 21 04:19:00 2003 Subject: =?ks_c_5601-1987?B?tOTA5TogW2VwaWFdIFVua25vd24gYm9vdGxvYWRlciBjbA==?= =?ks_c_5601-1987?B?YXNzIFtta2VsZkltYWdlXQ==?= Message-ID: <1982501c2ef74$1bb114b0$81cda8c0@magicn.net> As Mr. Mark and Mr. Andrew said, I got new kernel wich 2.4.19 from cwlinux. ( kernel-source-linuxbios-2.4.19-CWLINUX_4.i386.rpm and also official linux-2.4.18.tar.gz ) and, select C3 as the processor type and disabled SMP. Then I set PCI access to DIRECT, network card to VIA Rhine. But , Unknown bootloader class!! which image does "mkelfImage" make with bzImage ? why didn't only my image work? what does etherboot check about my image ? Does the kernel image from mkelfImage include the check routines from mkelfImage? Now, I'm analyzing my liuxbios source code, which is very hard for me. Hmm~~ My kernel configuration is below. Thank you for help. ======================================================================== ===== # # Automatically generated by make menuconfig: don't edit # CONFIG_X86=y CONFIG_ISA=y # CONFIG_SBUS is not set CONFIG_UID16=y # # Code maturity level options # # CONFIG_EXPERIMENTAL is not set # # Loadable module support # CONFIG_MODULES=y CONFIG_MODVERSIONS=y CONFIG_KMOD=y # # Processor type and features # # CONFIG_M386 is not set # CONFIG_M486 is not set # CONFIG_M586 is not set # CONFIG_M586TSC is not set # CONFIG_M586MMX is not set # CONFIG_M686 is not set # CONFIG_MPENTIUMIII is not set # CONFIG_MPENTIUM4 is not set # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MELAN is not set # CONFIG_MCRUSOE is not set # CONFIG_MWINCHIPC6 is not set # CONFIG_MWINCHIP2 is not set # CONFIG_MWINCHIP3D is not set CONFIG_MCYRIXIII=y CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_INVLPG=y CONFIG_X86_CMPXCHG=y CONFIG_X86_XADD=y CONFIG_X86_BSWAP=y CONFIG_X86_POPAD_OK=y # CONFIG_RWSEM_GENERIC_SPINLOCK is not set CONFIG_RWSEM_XCHGADD_ALGORITHM=y CONFIG_X86_L1_CACHE_SHIFT=5 CONFIG_X86_TSC=y CONFIG_X86_ALIGNMENT_16=y CONFIG_X86_USE_3DNOW=y CONFIG_X86_USE_PPRO_CHECKSUM=y # CONFIG_TOSHIBA is not set # CONFIG_I8K is not set # CONFIG_MICROCODE is not set # CONFIG_X86_MSR is not set # CONFIG_X86_CPUID is not set CONFIG_NOHIGHMEM=y # CONFIG_HIGHMEM4G is not set # CONFIG_HIGHMEM64G is not set # CONFIG_MATH_EMULATION is not set # CONFIG_MTRR is not set # CONFIG_SMP is not set # CONFIG_X86_UP_APIC is not set # CONFIG_X86_UP_IOAPIC is not set # # General setup # CONFIG_NET=y CONFIG_PCI=y # CONFIG_PCI_GOBIOS is not set CONFIG_PCI_GODIRECT=y # CONFIG_PCI_GOANY is not set CONFIG_PCI_DIRECT=y CONFIG_PCI_NAMES=y # CONFIG_EISA is not set # CONFIG_MCA is not set CONFIG_HOTPLUG=y # # PCMCIA/CardBus support # CONFIG_PCMCIA=y CONFIG_CARDBUS=y # CONFIG_I82092 is not set # CONFIG_I82365 is not set # CONFIG_TCIC is not set # # PCI Hotplug Support # # CONFIG_HOTPLUG_PCI is not set # CONFIG_HOTPLUG_PCI_COMPAQ is not set # CONFIG_HOTPLUG_PCI_COMPAQ_NVRAM is not set CONFIG_SYSVIPC=y # CONFIG_BSD_PROCESS_ACCT is not set CONFIG_SYSCTL=y CONFIG_KCORE_ELF=y # CONFIG_KCORE_AOUT is not set CONFIG_BINFMT_AOUT=y CONFIG_BINFMT_ELF=y CONFIG_BINFMT_MISC=y # CONFIG_PM is not set # CONFIG_APM is not set # # Memory Technology Devices (MTD) # # CONFIG_MTD is not set # # Parallel port support # # CONFIG_PARPORT is not set # # Plug and Play configuration # CONFIG_PNP=y CONFIG_ISAPNP=y # # Block devices # CONFIG_BLK_DEV_FD=y # CONFIG_BLK_DEV_XD is not set # CONFIG_PARIDE is not set # CONFIG_BLK_CPQ_DA is not set # CONFIG_BLK_CPQ_CISS_DA is not set # CONFIG_BLK_DEV_DAC960 is not set # CONFIG_BLK_DEV_LOOP is not set # CONFIG_BLK_DEV_NBD is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_BLK_DEV_INITRD is not set # # Multi-device support (RAID and LVM) # # CONFIG_MD is not set # CONFIG_BLK_DEV_MD is not set # CONFIG_MD_LINEAR is not set # CONFIG_MD_RAID0 is not set # CONFIG_MD_RAID1 is not set # CONFIG_MD_RAID5 is not set # CONFIG_MD_MULTIPATH is not set # CONFIG_BLK_DEV_LVM is not set # # Networking options # CONFIG_PACKET=y # CONFIG_PACKET_MMAP is not set # CONFIG_NETLINK_DEV is not set # CONFIG_NETFILTER is not set # CONFIG_FILTER is not set CONFIG_UNIX=y CONFIG_INET=y CONFIG_IP_MULTICAST=y # CONFIG_IP_ADVANCED_ROUTER is not set # CONFIG_IP_PNP is not set # CONFIG_NET_IPIP is not set # CONFIG_NET_IPGRE is not set # CONFIG_IP_MROUTE is not set # CONFIG_INET_ECN is not set # CONFIG_SYN_COOKIES is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set # CONFIG_DECNET is not set # CONFIG_BRIDGE is not set # # QoS and/or fair queueing # # CONFIG_NET_SCHED is not set # # Telephony Support # # CONFIG_PHONE is not set # CONFIG_PHONE_IXJ is not set # CONFIG_PHONE_IXJ_PCMCIA is not set # # ATA/IDE/MFM/RLL support # CONFIG_IDE=y # # IDE, ATA and ATAPI Block devices # CONFIG_BLK_DEV_IDE=y # CONFIG_BLK_DEV_HD_IDE is not set # CONFIG_BLK_DEV_HD is not set CONFIG_BLK_DEV_IDEDISK=y CONFIG_IDEDISK_MULTI_MODE=y # CONFIG_BLK_DEV_IDEDISK_VENDOR is not set # CONFIG_BLK_DEV_IDEDISK_FUJITSU is not set # CONFIG_BLK_DEV_IDEDISK_IBM is not set # CONFIG_BLK_DEV_IDEDISK_MAXTOR is not set # CONFIG_BLK_DEV_IDEDISK_QUANTUM is not set # CONFIG_BLK_DEV_IDEDISK_SEAGATE is not set # CONFIG_BLK_DEV_IDEDISK_WD is not set # CONFIG_BLK_DEV_COMMERIAL is not set # CONFIG_BLK_DEV_TIVO is not set # CONFIG_BLK_DEV_IDECS is not set CONFIG_BLK_DEV_IDECD=y # CONFIG_BLK_DEV_IDETAPE is not set # CONFIG_BLK_DEV_IDEFLOPPY is not set # CONFIG_BLK_DEV_IDESCSI is not set CONFIG_BLK_DEV_CMD640=y # CONFIG_BLK_DEV_CMD640_ENHANCED is not set # CONFIG_BLK_DEV_ISAPNP is not set CONFIG_BLK_DEV_RZ1000=y CONFIG_BLK_DEV_IDEPCI=y CONFIG_IDEPCI_SHARE_IRQ=y CONFIG_BLK_DEV_IDEDMA_PCI=y CONFIG_BLK_DEV_ADMA=y # CONFIG_BLK_DEV_OFFBOARD is not set CONFIG_IDEDMA_PCI_AUTO=y CONFIG_BLK_DEV_IDEDMA=y # CONFIG_IDEDMA_PCI_WIP is not set # CONFIG_IDEDMA_NEW_DRIVE_LISTINGS is not set # CONFIG_BLK_DEV_AEC62XX is not set # CONFIG_AEC62XX_TUNING is not set # CONFIG_BLK_DEV_ALI15X3 is not set # CONFIG_WDC_ALI15X3 is not set # CONFIG_BLK_DEV_AMD74XX is not set # CONFIG_AMD74XX_OVERRIDE is not set # CONFIG_BLK_DEV_CMD64X is not set # CONFIG_BLK_DEV_CY82C693 is not set # CONFIG_BLK_DEV_CS5530 is not set # CONFIG_BLK_DEV_HPT34X is not set # CONFIG_HPT34X_AUTODMA is not set # CONFIG_BLK_DEV_HPT366 is not set CONFIG_BLK_DEV_PIIX=y CONFIG_PIIX_TUNING=y # CONFIG_BLK_DEV_NS87415 is not set # CONFIG_BLK_DEV_OPTI621 is not set # CONFIG_BLK_DEV_PDC202XX is not set # CONFIG_PDC202XX_BURST is not set # CONFIG_PDC202XX_FORCE is not set # CONFIG_BLK_DEV_SVWKS is not set # CONFIG_BLK_DEV_SIS5513 is not set # CONFIG_BLK_DEV_SLC90E66 is not set # CONFIG_BLK_DEV_TRM290 is not set # CONFIG_BLK_DEV_VIA82CXXX is not set # CONFIG_IDE_CHIPSETS is not set CONFIG_IDEDMA_AUTO=y # CONFIG_IDEDMA_IVB is not set # CONFIG_DMA_NONPCI is not set CONFIG_BLK_DEV_IDE_MODES=y # CONFIG_BLK_DEV_ATARAID is not set # CONFIG_BLK_DEV_ATARAID_PDC is not set # CONFIG_BLK_DEV_ATARAID_HPT is not set # # SCSI support # CONFIG_SCSI=y CONFIG_BLK_DEV_SD=y CONFIG_SD_EXTRA_DEVS=40 # CONFIG_CHR_DEV_ST is not set # CONFIG_CHR_DEV_OSST is not set # CONFIG_BLK_DEV_SR is not set # CONFIG_CHR_DEV_SG is not set CONFIG_SCSI_DEBUG_QUEUES=y CONFIG_SCSI_MULTI_LUN=y CONFIG_SCSI_CONSTANTS=y # CONFIG_SCSI_LOGGING is not set # # SCSI low-level drivers # # CONFIG_BLK_DEV_3W_XXXX_RAID is not set # CONFIG_SCSI_7000FASST is not set # CONFIG_SCSI_ACARD is not set # CONFIG_SCSI_AHA152X is not set # CONFIG_SCSI_AHA1542 is not set # CONFIG_SCSI_AHA1740 is not set # CONFIG_SCSI_AIC7XXX is not set # CONFIG_SCSI_AIC7XXX_OLD is not set # CONFIG_SCSI_DPT_I2O is not set # CONFIG_SCSI_ADVANSYS is not set # CONFIG_SCSI_IN2000 is not set # CONFIG_SCSI_AM53C974 is not set # CONFIG_SCSI_MEGARAID is not set # CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_CPQFCTS is not set # CONFIG_SCSI_DMX3191D is not set # CONFIG_SCSI_DTC3280 is not set # CONFIG_SCSI_EATA is not set # CONFIG_SCSI_EATA_DMA is not set # CONFIG_SCSI_EATA_PIO is not set # CONFIG_SCSI_FUTURE_DOMAIN is not set # CONFIG_SCSI_GDTH is not set # CONFIG_SCSI_GENERIC_NCR5380 is not set # CONFIG_SCSI_IPS is not set # CONFIG_SCSI_INITIO is not set # CONFIG_SCSI_INIA100 is not set # CONFIG_SCSI_NCR53C406A is not set # CONFIG_SCSI_NCR53C7xx is not set # CONFIG_SCSI_SYM53C8XX_2 is not set # CONFIG_SCSI_NCR53C8XX is not set CONFIG_SCSI_SYM53C8XX=y CONFIG_SCSI_NCR53C8XX_DEFAULT_TAGS=4 CONFIG_SCSI_NCR53C8XX_MAX_TAGS=32 CONFIG_SCSI_NCR53C8XX_SYNC=20 # CONFIG_SCSI_NCR53C8XX_PROFILE is not set # CONFIG_SCSI_NCR53C8XX_IOMAPPED is not set # CONFIG_SCSI_NCR53C8XX_PQS_PDS is not set # CONFIG_SCSI_PAS16 is not set # CONFIG_SCSI_PCI2000 is not set # CONFIG_SCSI_PCI2220I is not set # CONFIG_SCSI_PSI240I is not set # CONFIG_SCSI_QLOGIC_FAS is not set # CONFIG_SCSI_QLOGIC_ISP is not set # CONFIG_SCSI_QLOGIC_FC is not set # CONFIG_SCSI_QLOGIC_1280 is not set # CONFIG_SCSI_SEAGATE is not set # CONFIG_SCSI_SIM710 is not set # CONFIG_SCSI_SYM53C416 is not set # CONFIG_SCSI_DC390T is not set # CONFIG_SCSI_T128 is not set # CONFIG_SCSI_U14_34F is not set # CONFIG_SCSI_ULTRASTOR is not set # # PCMCIA SCSI adapter support # # CONFIG_SCSI_PCMCIA is not set # # Fusion MPT device support # # CONFIG_FUSION is not set # CONFIG_FUSION_BOOT is not set # CONFIG_FUSION_ISENSE is not set # CONFIG_FUSION_CTL is not set # CONFIG_FUSION_LAN is not set # # I2O device support # # CONFIG_I2O is not set # CONFIG_I2O_PCI is not set # CONFIG_I2O_BLOCK is not set # CONFIG_I2O_LAN is not set # CONFIG_I2O_SCSI is not set # CONFIG_I2O_PROC is not set # # Network device support # CONFIG_NETDEVICES=y # # ARCnet devices # # CONFIG_ARCNET is not set CONFIG_DUMMY=m # CONFIG_BONDING is not set # CONFIG_EQUALIZER is not set # CONFIG_TUN is not set # CONFIG_NET_SB1000 is not set # # Ethernet (10 or 100Mbit) # CONFIG_NET_ETHERNET=y # CONFIG_SUNLANCE is not set # CONFIG_HAPPYMEAL is not set # CONFIG_SUNBMAC is not set # CONFIG_SUNQE is not set # CONFIG_SUNGEM is not set # CONFIG_NET_VENDOR_3COM is not set # CONFIG_LANCE is not set # CONFIG_NET_VENDOR_SMC is not set # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_AT1700 is not set # CONFIG_DEPCA is not set # CONFIG_HP100 is not set # CONFIG_NET_ISA is not set CONFIG_NET_PCI=y # CONFIG_PCNET32 is not set # CONFIG_ADAPTEC_STARFIRE is not set # CONFIG_AC3200 is not set # CONFIG_APRICOT is not set # CONFIG_CS89x0 is not set # CONFIG_TULIP is not set # CONFIG_DE4X5 is not set # CONFIG_DGRS is not set # CONFIG_DM9102 is not set # CONFIG_EEPRO100 is not set # CONFIG_LNE390 is not set # CONFIG_FEALNX is not set # CONFIG_NATSEMI is not set # CONFIG_NE2K_PCI is not set # CONFIG_NE3210 is not set # CONFIG_ES3210 is not set # CONFIG_8139CP is not set # CONFIG_8139TOO is not set # CONFIG_8139TOO_PIO is not set # CONFIG_8139TOO_TUNE_TWISTER is not set # CONFIG_8139TOO_8129 is not set # CONFIG_8139_NEW_RX_RESET is not set # CONFIG_SIS900 is not set # CONFIG_EPIC100 is not set # CONFIG_SUNDANCE is not set # CONFIG_TLAN is not set CONFIG_VIA_RHINE=y # CONFIG_VIA_RHINE_MMIO is not set # CONFIG_WINBOND_840 is not set # CONFIG_NET_POCKET is not set # # Ethernet (1000 Mbit) # # CONFIG_ACENIC is not set # CONFIG_DL2K is not set # CONFIG_MYRI_SBUS is not set # CONFIG_NS83820 is not set # CONFIG_HAMACHI is not set # CONFIG_YELLOWFIN is not set # CONFIG_SK98LIN is not set # CONFIG_FDDI is not set # CONFIG_PLIP is not set # CONFIG_PPP is not set # CONFIG_SLIP is not set # # Wireless LAN (non-hamradio) # # CONFIG_NET_RADIO is not set # # Token Ring devices # # CONFIG_TR is not set # CONFIG_NET_FC is not set # # Wan interfaces # # CONFIG_WAN is not set # # PCMCIA network device support # CONFIG_NET_PCMCIA=y # CONFIG_PCMCIA_3C589 is not set # CONFIG_PCMCIA_3C574 is not set # CONFIG_PCMCIA_FMVJ18X is not set CONFIG_PCMCIA_PCNET=y # CONFIG_PCMCIA_AXNET is not set # CONFIG_PCMCIA_NMCLAN is not set # CONFIG_PCMCIA_SMC91C92 is not set # CONFIG_PCMCIA_XIRC2PS is not set # CONFIG_ARCNET_COM20020_CS is not set # CONFIG_PCMCIA_IBMTR is not set # CONFIG_PCMCIA_XIRCOM is not set # CONFIG_PCMCIA_XIRTULIP is not set CONFIG_NET_PCMCIA_RADIO=y CONFIG_PCMCIA_RAYCS=y # CONFIG_PCMCIA_NETWAVE is not set # CONFIG_PCMCIA_WAVELAN is not set # CONFIG_AIRONET4500_CS is not set # # Amateur Radio support # # CONFIG_HAMRADIO is not set # # IrDA (infrared) support # # CONFIG_IRDA is not set # # ISDN subsystem # # CONFIG_ISDN is not set # # Old CD-ROM drivers (not SCSI, not IDE) # # CONFIG_CD_NO_IDESCSI is not set # # Input core support # # CONFIG_INPUT is not set # CONFIG_INPUT_KEYBDEV is not set # CONFIG_INPUT_MOUSEDEV is not set # CONFIG_INPUT_JOYDEV is not set # CONFIG_INPUT_EVDEV is not set # # Character devices # CONFIG_VT=y CONFIG_VT_CONSOLE=y CONFIG_SERIAL=y # CONFIG_SERIAL_CONSOLE is not set # CONFIG_SERIAL_EXTENDED is not set # CONFIG_SERIAL_NONSTANDARD is not set CONFIG_UNIX98_PTYS=y CONFIG_UNIX98_PTY_COUNT=256 # # I2C support # # CONFIG_I2C is not set # # Mice # # CONFIG_BUSMOUSE is not set CONFIG_MOUSE=y CONFIG_PSMOUSE=y # CONFIG_82C710_MOUSE is not set # CONFIG_PC110_PAD is not set # # Joysticks # # CONFIG_INPUT_GAMEPORT is not set # CONFIG_QIC02_TAPE is not set # # Watchdog Cards # # CONFIG_WATCHDOG is not set # CONFIG_INTEL_RNG is not set # CONFIG_NVRAM is not set # CONFIG_RTC is not set # CONFIG_DTLK is not set # CONFIG_R3964 is not set # CONFIG_APPLICOM is not set # # Ftape, the floppy tape device driver # # CONFIG_FTAPE is not set CONFIG_AGP=y CONFIG_AGP_INTEL=y CONFIG_AGP_I810=y CONFIG_AGP_VIA=y CONFIG_AGP_AMD=y CONFIG_AGP_SIS=y CONFIG_AGP_ALI=y # CONFIG_AGP_SWORKS is not set CONFIG_DRM=y # CONFIG_DRM_OLD is not set CONFIG_DRM_NEW=y CONFIG_DRM_TDFX=y # CONFIG_DRM_R128 is not set CONFIG_DRM_RADEON=y # CONFIG_DRM_I810 is not set # CONFIG_DRM_MGA is not set # CONFIG_DRM_SIS is not set # # PCMCIA character devices # # CONFIG_PCMCIA_SERIAL_CS is not set # CONFIG_MWAVE is not set # # Multimedia devices # # CONFIG_VIDEO_DEV is not set # # File systems # # CONFIG_QUOTA is not set # CONFIG_AUTOFS_FS is not set CONFIG_AUTOFS4_FS=y # CONFIG_REISERFS_FS is not set # CONFIG_REISERFS_CHECK is not set # CONFIG_REISERFS_PROC_INFO is not set # CONFIG_ADFS_FS is not set # CONFIG_ADFS_FS_RW is not set # CONFIG_AFFS_FS is not set # CONFIG_HFS_FS is not set # CONFIG_BFS_FS is not set # CONFIG_EXT3_FS is not set # CONFIG_JBD is not set # CONFIG_JBD_DEBUG is not set # CONFIG_FAT_FS is not set # CONFIG_MSDOS_FS is not set # CONFIG_UMSDOS_FS is not set # CONFIG_VFAT_FS is not set # CONFIG_EFS_FS is not set # CONFIG_JFFS_FS is not set # CONFIG_JFFS2_FS is not set # CONFIG_CRAMFS is not set CONFIG_TMPFS=y # CONFIG_RAMFS is not set CONFIG_ISO9660_FS=y # CONFIG_JOLIET is not set # CONFIG_ZISOFS is not set # CONFIG_MINIX_FS is not set # CONFIG_VXFS_FS is not set # CONFIG_NTFS_FS is not set # CONFIG_NTFS_RW is not set # CONFIG_HPFS_FS is not set CONFIG_PROC_FS=y # CONFIG_DEVFS_FS is not set # CONFIG_DEVFS_MOUNT is not set # CONFIG_DEVFS_DEBUG is not set CONFIG_DEVPTS_FS=y # CONFIG_QNX4FS_FS is not set # CONFIG_QNX4FS_RW is not set # CONFIG_ROMFS_FS is not set CONFIG_EXT2_FS=y # CONFIG_SYSV_FS is not set # CONFIG_UDF_FS is not set # CONFIG_UDF_RW is not set # CONFIG_UFS_FS is not set # CONFIG_UFS_FS_WRITE is not set # # Network File Systems # # CONFIG_CODA_FS is not set # CONFIG_INTERMEZZO_FS is not set CONFIG_NFS_FS=y # CONFIG_NFS_V3 is not set # CONFIG_ROOT_NFS is not set CONFIG_NFSD=y # CONFIG_NFSD_V3 is not set CONFIG_SUNRPC=y CONFIG_LOCKD=y # CONFIG_SMB_FS is not set # CONFIG_NCP_FS is not set # CONFIG_NCPFS_PACKET_SIGNING is not set # CONFIG_NCPFS_IOCTL_LOCKING is not set # CONFIG_NCPFS_STRONG is not set # CONFIG_NCPFS_NFS_NS is not set # CONFIG_NCPFS_OS2_NS is not set # CONFIG_NCPFS_SMALLDOS is not set # CONFIG_NCPFS_NLS is not set # CONFIG_NCPFS_EXTRAS is not set # CONFIG_ZISOFS_FS is not set # CONFIG_ZLIB_FS_INFLATE is not set # # Partition Types # # CONFIG_PARTITION_ADVANCED is not set CONFIG_MSDOS_PARTITION=y # CONFIG_SMB_NLS is not set # CONFIG_NLS is not set # # Console drivers # CONFIG_VGA_CONSOLE=y # CONFIG_VIDEO_SELECT is not set # # Sound # # CONFIG_SOUND is not set # # USB support # CONFIG_USB=y # CONFIG_USB_DEBUG is not set # CONFIG_USB_DEVICEFS is not set # CONFIG_USB_BANDWIDTH is not set # CONFIG_USB_LONG_TIMEOUT is not set CONFIG_USB_UHCI_ALT=y # CONFIG_USB_OHCI is not set # CONFIG_USB_AUDIO is not set # CONFIG_USB_BLUETOOTH is not set CONFIG_USB_STORAGE=y # CONFIG_USB_STORAGE_DEBUG is not set # CONFIG_USB_STORAGE_DATAFAB is not set # CONFIG_USB_STORAGE_FREECOM is not set # CONFIG_USB_STORAGE_ISD200 is not set # CONFIG_USB_STORAGE_DPCM is not set # CONFIG_USB_STORAGE_HP8200e is not set # CONFIG_USB_STORAGE_SDDR09 is not set # CONFIG_USB_STORAGE_JUMPSHOT is not set # CONFIG_USB_ACM is not set # CONFIG_USB_PRINTER is not set # CONFIG_USB_DC2XX is not set # CONFIG_USB_MDC800 is not set # CONFIG_USB_SCANNER is not set # CONFIG_USB_MICROTEK is not set # CONFIG_USB_HPUSBSCSI is not set # CONFIG_USB_PEGASUS is not set # CONFIG_USB_KAWETH is not set # CONFIG_USB_CATC is not set # CONFIG_USB_CDCETHER is not set # CONFIG_USB_USBNET is not set # CONFIG_USB_USS720 is not set # # USB Serial Converter support # # CONFIG_USB_SERIAL is not set # CONFIG_USB_SERIAL_GENERIC is not set # CONFIG_USB_SERIAL_BELKIN is not set # CONFIG_USB_SERIAL_WHITEHEAT is not set # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set # CONFIG_USB_SERIAL_EMPEG is not set # CONFIG_USB_SERIAL_FTDI_SIO is not set # CONFIG_USB_SERIAL_VISOR is not set # CONFIG_USB_SERIAL_IPAQ is not set # CONFIG_USB_SERIAL_IR is not set # CONFIG_USB_SERIAL_EDGEPORT is not set # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set # CONFIG_USB_SERIAL_KEYSPAN is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28XA is not set # CONFIG_USB_SERIAL_KEYSPAN_USA28XB is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19 is not set # CONFIG_USB_SERIAL_KEYSPAN_USA18X is not set # CONFIG_USB_SERIAL_KEYSPAN_USA19W is not set # CONFIG_USB_SERIAL_KEYSPAN_USA49W is not set # CONFIG_USB_SERIAL_MCT_U232 is not set # CONFIG_USB_SERIAL_KLSI is not set # CONFIG_USB_SERIAL_PL2303 is not set # CONFIG_USB_SERIAL_CYBERJACK is not set # CONFIG_USB_SERIAL_XIRCOM is not set # CONFIG_USB_SERIAL_OMNINET is not set # CONFIG_USB_RIO500 is not set # # Kernel hacking # # CONFIG_DEBUG_KERNEL is not set -------------- next part -------------- An HTML attachment was scrubbed... URL: From Luca.Pellanda at italtel.it Fri Mar 21 05:10:01 2003 From: Luca.Pellanda at italtel.it (Pellanda Luca) Date: Fri Mar 21 05:10:01 2003 Subject: build problem: displayinit problem Message-ID: Hi, folks my config file is: # Note that this is RELATIVE TO WHERE YOU ARE WHEN YOU RUN THE # CONFIG TOOL. Make it absolute if you like target l440bx mainboard intel/l440bx # Enable Serial Console for debugging # It will come up at 115200,8n1 #option SERIAL_CONSOLE=1 # Enable MicroCode update and L2 Cache init for PII and PIII option UPDATE_MICROCODE option CONFIGURE_L2_CACHE # Use the internal VGA frame buffer device #option HAVE_FRAMEBUFFER #option USE_CACHE_RAM=0 #option USE_GENERIC_ROM=0 #option USE_ELF_BOOT=0 #makedefine PHLASH_BASE_NAME=p13-0125 #makedefine BOOT_IMAGE=/tftpboot/netboot.ebi #makedefine BOOT_IMAGE=vmlinux.bin.gz.block # Path to your kernel (vmlinux) # NOTE; you need a path to your test12 kernel here. #linux /manpreet/freebios/linux linux /home/tesi/src # Kernel command line parameters #commandline ro panic=5 root=/dev/hda5 console=ttyS0,115200 debug 3 NLBConfig.py( ver. 1.37) runs correctly while compiling I got this message: gcc -nostdlib -r -o linuxbios_c.o c_start.o linuxbios.a /usr/lib/gcc-lib/i386-r edhat-linux/2.96/libgcc.a perl -e 'foreach $var (split(" ", $ENV{VARIABLES})) { if ($ENV{$var} =~ m/^(0x[0 -9a-fA-F]+|0[0-7]+|[0-9]+)$/) { print "$var = $ENV{$var};\n"; }}' > ldoptions gcc -nostdlib -nostartfiles -static -o linuxbios_c -T /home/tesi/src/freebios/sr c/config/linuxbios_c.ld linuxbios_c.o linuxbios_c.o: In function `displayinit': linuxbios_c.o(.text+0x3605): undefined reference to `ttys0_init' linuxbios_c.o: In function `__display_tx_byte': linuxbios_c.o(.text+0x361a): undefined reference to `ttys0_tx_byte' collect2: ld returned 1 exit status make: *** [linuxbios_c] Error 1 Anithing that I am missing ? Regards. -------------- next part -------------- An HTML attachment was scrubbed... URL: From mwilkinson at ndirect.co.uk Fri Mar 21 07:04:01 2003 From: mwilkinson at ndirect.co.uk (Mark Wilkinson) Date: Fri Mar 21 07:04:01 2003 Subject: [epia] Unknown bootloader class Message-ID: <011b01c2efa5$b60a3600$ce40a8c0@2pmtech.com> Hello HyungJong, I'm beginning to wonder if the problem you are seeing lies with the configuration of etherboot you've used. My thinking is that etherboot thinks it's executing a different type of image (ie FreeBSD, Multiboot, etc) rather than an ELF image, and is thus passing some different information across. Can you forward the Config file that you used to build the etherboot payload ? Regards Mark Wilkinson. From Lawrence_Morrison at Dell.com Fri Mar 21 07:39:00 2003 From: Lawrence_Morrison at Dell.com (Lawrence_Morrison at Dell.com) Date: Fri Mar 21 07:39:00 2003 Subject: Anyone have a list of any Dell servers that have linuxbios runnin g? Message-ID: Guy's, I think after a long time I have Dell interested in Linuxbios. Anyone have a list of any Dell servers that have linuxbios running? Thanks Lawrence D. Morrison Linux/Unix Systems Engineer and Consultant Custom Factory Integration Dell Computer Corporation 1.800.289.3355 ext 36856 Phone: 512.723.6856 Pager: 512.907.1767 Fax: 512.723.8257 Email: lawrence_morrison at dell.com -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Fri Mar 21 09:12:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Mar 21 09:12:00 2003 Subject: Anyone have a list of any Dell servers that have linuxbios runnin g? In-Reply-To: Message-ID: On Fri, 21 Mar 2003 Lawrence_Morrison at Dell.com wrote: > I think after a long time I have Dell interested in Linuxbios. > Anyone have a list of any Dell servers that have linuxbios running? I sure do not. sorry. ron From jerj at coplanar.net Fri Mar 21 09:33:01 2003 From: jerj at coplanar.net (Jeremy Jackson) Date: Fri Mar 21 09:33:01 2003 Subject: Anyone have a list of any Dell servers that have linuxbios runnin g? In-Reply-To: References: Message-ID: <1048258784.1617.7.camel@contact.skynet.coplanar.net> Good news. Two companies I have worked for have been Dell users. It would be nice to have LinuxBIOS available in that environment. I haven't heard of anyone ever using LinuxBIOS on a Dell. I was considering a WebApp 120 (discontinued) since it had an Intel BX chipset. Some of the current Dell servers, such as the PowerEdge 1650, have ServerWorks chipsets. I believe people have been unsuccessful at getting documentation on these chipsets (NDA issues). This is something to think about. Regards, Jeremy On Fri, 2003-03-21 at 08:06, Lawrence_Morrison at Dell.com wrote: > Guy's, > > > I think after a long time I have Dell interested in Linuxbios. > Anyone have a list of any Dell servers that have linuxbios running? > > > Thanks > Lawrence D. Morrison > Linux/Unix Systems Engineer and Consultant > Custom Factory Integration > Dell Computer Corporation > 1.800.289.3355 ext 36856 > Phone: 512.723.6856 > Pager: 512.907.1767 > Fax: 512.723.8257 > Email: lawrence_morrison at dell.com > > > From rminnich at lanl.gov Fri Mar 21 09:49:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Mar 21 09:49:00 2003 Subject: Anyone have a list of any Dell servers that have linuxbios runnin g? In-Reply-To: <1048258784.1617.7.camel@contact.skynet.coplanar.net> Message-ID: On 21 Mar 2003, Jeremy Jackson wrote: > I haven't heard of anyone ever using LinuxBIOS on a Dell. it's been a lack-of-interest thing with dell, plus a lack-of-cooperation thing with serverworks. The first has apparently been fixed, I don't know if the second can ever be fixed. ron From rodmur at maybe.org Fri Mar 21 12:29:00 2003 From: rodmur at maybe.org (Dale Harris) Date: Fri Mar 21 12:29:00 2003 Subject: Supermicro vs Tyan Message-ID: <20030321181028.GQ679@maybe.org> Hi, Let's assume I'm building a cluster and I have a choice between Tyan 2721 Pro 533 board and Supermicro X5 DPEG2. Which one of those would be the best choice to use with LinuxBIOS? -- Dale Harris rodmur at maybe.org /.-) From rodmur at maybe.org Fri Mar 21 13:13:01 2003 From: rodmur at maybe.org (Dale Harris) Date: Fri Mar 21 13:13:01 2003 Subject: Supermicro vs Tyan In-Reply-To: <20030321181028.GQ679@maybe.org> References: <20030321181028.GQ679@maybe.org> Message-ID: <20030321185347.GB30456@maybe.org> On Fri, Mar 21, 2003 at 10:10:28AM -0800, Dale Harris elucidated: > Hi, > > Let's assume I'm building a cluster and I have a choice between Tyan > 2721 Pro 533 board and Supermicro X5 DPEG2. Which one of those would be > the best choice to use with LinuxBIOS? > Or maybe the question I should ask is if either of those boards are supported by LinuxBIOS? Dale From rminnich at lanl.gov Fri Mar 21 13:59:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Mar 21 13:59:01 2003 Subject: Supermicro vs Tyan In-Reply-To: <20030321185347.GB30456@maybe.org> Message-ID: On Fri, 21 Mar 2003, Dale Harris wrote: > Or maybe the question I should ask is if either of those boards are > supported by LinuxBIOS? lspci first. thanks ron From ivan at munix.com.br Fri Mar 21 14:51:01 2003 From: ivan at munix.com.br (Ivan Gustavo) Date: Fri Mar 21 14:51:01 2003 Subject: Config file/Rom image to Jetway B860t Message-ID: <3E7B499D.8060702@munix.com.br> Hy, I am trying to port the Via Epia freebios files to my Jetway B860T, which is almost equal. I have also a Via Epia M/B to test if necessary. About Why I am doing this port to my M/B, I am working 1 year for a embedded system to the dentist area, and use the suck board from Jetway to run my system, I use linux from basis and Xfree. It not use keyboard, mouse, or other In device, only a nice Serial Infra Red Sensor and Remote Control done by me... Therefore when the power loss (ps), sometimes the bios checksum changes and corrupt, asking to press the F1 on the next cold boot, and how I does not have In Devices Up at this time, my embeed system changes to medical trash :( I asked to many bios manufactures to change it, so we told which can do nothing to me, and how I know a little bit of Assembly and C, I will help the project with my bios development , so I need some information... I done a simple test config file and a b860t.config for my M/B and did run the NLBConfig.py to generate the build directory. (Files Attached) I done also a minor bugfix on the south bridge source code (to correct wrong include file paths)... Now is the problem, I do not know what file I need to use to write on my BIOS, the romfile have up to 900k, and my eeprom is 256k like many others... Some Useful Info: ---------------------------------------------------------------------------------------------------------------------------------------------- lspci from my Jetway/b860t 00:00.0 Host bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia] (rev 05) 00:01.0 PCI bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia AGP] 00:07.0 ISA bridge: VIA Technologies, Inc. VT82C686 [Apollo Super South] (rev 40) 00:07.1 IDE interface: VIA Technologies, Inc. VT82C586/B/686A/B PIPC Bus Master IDE (rev 06) 00:07.2 USB Controller: VIA Technologies, Inc. USB (rev 1a) 00:07.3 USB Controller: VIA Technologies, Inc. USB (rev 1a) 00:07.4 Bridge: VIA Technologies, Inc. VT82C686 [Apollo Super ACPI] (rev 40) 00:07.5 Multimedia audio controller: VIA Technologies, Inc. VT82C686 AC97 Audio Controller (rev 50) 00:09.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) 01:00.0 VGA compatible controller: Trident Microsystems CyberBlade/i1 (rev 6a) ------------------------------------------------------------------------------------------------------------------------------------------------ lspci from my Via/Epia 00:00.0 Host bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia] (rev 05) 00:01.0 PCI bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia AGP] 00:11.0 ISA bridge: VIA Technologies, Inc. VT8231 [PCI-to-ISA Bridge] (rev 10) 00:11.1 IDE interface: VIA Technologies, Inc. VT82C586/B/686A/B PIPC Bus Master IDE (rev 06) 00:11.2 USB Controller: VIA Technologies, Inc. USB (rev 1e) 00:11.3 USB Controller: VIA Technologies, Inc. USB (rev 1e) 00:11.4 Bridge: VIA Technologies, Inc. VT8235 ACPI (rev 10) 00:11.5 Multimedia audio controller: VIA Technologies, Inc. VT82C686 AC97 Audio Controller (rev 40) 00:12.0 Ethernet controller: VIA Technologies, Inc. VT6102 [Rhine-II] (rev 51) 01:00.0 VGA compatible controller: Trident Microsystems CyberBlade/i1 (rev 6a) -- Ivan Gustavo Munix dos Santos ----------------------------- http://www.munix.com.br mailto:ivan at munix.com.br Skydental SJC. Av. Heitor Vila lobos, 1565 Fone: 12-39232925 Ramal 215 Sao Jose Dos Campos - SP -------------- next part -------------- A non-text attachment was scrubbed... Name: jetway.tgz Type: application/x-gzip Size: 3373 bytes Desc: not available URL: From rminnich at lanl.gov Fri Mar 21 16:54:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Mar 21 16:54:01 2003 Subject: Config file/Rom image to Jetway B860t In-Reply-To: <3E7B499D.8060702@munix.com.br> Message-ID: On Fri, 21 Mar 2003, Ivan Gustavo wrote: > Now is the problem, I do not know what file I need to use to write on my > BIOS, the romfile have up to 900k, and my eeprom is 256k like many > others... for that small part you can not use a linux kernel, you will have to use etherboot. But etherboot works extremely well. ron From NEWBELL7 at magicn.com Fri Mar 21 19:37:00 2003 From: NEWBELL7 at magicn.com (NEWBELL7 at magicn.com) Date: Fri Mar 21 19:37:00 2003 Subject: =?ks_c_5601-1987?B?tOTA5TogW2VwaWFdIFVua25vd24gYm9vdGxvYWRlciBjbA==?= =?ks_c_5601-1987?B?YXNzIFtta2VsZkltYWdlXQ==?= Message-ID: <4d48c01c2f00e$ee5a2a10$82cda8c0@magicn.net> Hello Mark! I modified src/Config while building the etherboot executive. I removed -DPCBIOS flag and added -DLINUXBIOS. Do I need anything else to modify for linuxbios on Epia ? Also, May I ask you a question about other topic ? The PCI configuration space values in vt8601/raminit.inc seems strange when I refer to vt8601 Datasheet and BIOS porting guide. Are the values stable and optimized ? Because I'm beginner for bios, I seems like that I don't know too many thing. I hope you to understand me. Anyway, My config file for etherboot is below. Thank you for your help! ===================================================================== # # Config for Etherboot/32 # # Do not delete the tag OptionDescription and /OptionDescription # It is used to automatically generate the documentation. # # # User interaction options: # # -DASK_BOOT=n # Ask "Boot from Network or from Local? " at startup, # timeout after n seconds (0 = no timeout); this # can be done in a more generic way by using the # IMAGE_MENU, but it requires that the "bootp" # server is accessible, even when booting locally. # If unset, boot immediately using the default. # -DANS_DEFAULT=ANS_NETWORK # Assume Network to previous question # (alternative: ANS_LOCAL) on timeout or Return key # See etherboot.h for prompt and answer strings. # -DBAR_PROGRESS # Use rotating bar instead of sequential dots # to indicate an IP packet transmitted. # -DMOTD # Display message of the day; read vendortags.html # for further information. (Deprecated) # -DIMAGE_MENU # Allow to interactively chose between different # bootimages; read vendortags.html for further # information. (Deprecated) # -DPASSWD # Enable password protection for boot images; this # requires -DIMAGE_MENU. (Deprecated) # -DUSRPARMS # Allow the user to interactively edit parameters # that are passed to the booted kernel; you should # probably enable -DPASSWD as well; this feature # requires -DIMAGE_MENU. (Deprecated) # -DANSIESC # Evaluate a subset of common ANSI escape sequences # when displaying the message of the day; this # probably does not make sense unless you also # define -DMOTD or at least -DIMAGE_MENU. It is # possible to combine this option with -DCONSOLE_DUAL, # but you have to be aware that the boot menu will # no longer use ANSI escapes to be compatible with the # serial console. Also be careful with your banners, as # they may confuse your serial console. Generally you # lose most of the ANSIESC functionality. (Deprecated) # -DGFX # Support extensions to the ANSI escape sequences for # displaying graphics (icons or logos); this # requires -DANSIESC. It probably does not make sense # to use -DGFX if you have -DCONSOLE_DUAL, as the # serial console normally cannot handle the GFX stuff. # (Deprecated) # -DSHOW_NUMERIC # Display menu item labels as numbers. # -DDELIMITERLINES # Print a line of = characters at the start # and also just before starting an image. # -DSIZEINDICATOR # Update a running total of the amount of code # loaded so far, in kilobytes. # # Boot autoconfiguration protocol options: # # -DNO_DHCP_SUPPORT # Use BOOTP instead of DHCP. # -DRARP_NOT_BOOTP # Use RARP instead of BOOTP/DHCP. # -DREQUIRE_VCI_ETHERBOOT # Require an encapsulated Vendor Class Identifier # of "Etherboot" in the DHCP reply # Requires DHCP support. # -DALLOW_ONLY_ENCAPSULATED # Ignore Etherboot-specific options that are not within # the Etherboot encapsulated options field. This option # should be enabled unless you have a legacy DHCP server # configuration from the bad old days before the use of # encapsulated Etherboot options. # # Boot tuning parameters: # # -DCONGESTED # Turns on packet retransmission. Use it on a # congested network, where the normal operation # can't boot the image. # -DBACKOFF_LIMIT # Sets the maximum RFC951 backoff exponent to n. # Do not set this unreasonably low, because on networks # with many machines they can saturate the link # (the delay corresponding to the exponent is a random # time in the range 0..3.5*2^n seconds). Use 5 for a # VERY small network (max. 2 minutes delay), 7 for a # medium sized network (max. 7.5 minutes delay) or 10 # for a really huge network with many clients, frequent # congestions (max. 1 hour delay). On average the # delay time will be half the maximum value. If in # doubt about the consequences, use a larger value. # Also keep in mind that the number of retransmissions # is not changed by this setting, so the default of 20 # may no longer be appropriate. You might need to set # MAX_ARP_RETRIES, MAX_BOOTP_RETRIES, MAX_TFTP_RETRIES # and MAX_RPC_RETRIES to a larger value. # # Boot device options: # # -DCAN_BOOT_DISK # Can boot from floppy/hd if bootimage matches the # pattern "/dev/[fhs]d*". # -DTRY_FLOPPY_FIRST # If > 0, tries that many times to read the boot # sector from a floppy drive before booting from # ROM. If successful, does a local boot. # It assumes the floppy is bootable. # Requires -DCAN_BOOT_DISK. # -DEMERGENCYDISKBOOT # If no BOOTP server can be found, then boot from # local disk. The accessibility of the TFTP server # has no effect, though! So configure your BOOTP # server properly. You should probably reduce # MAX_BOOTP_RETRIES to a small number like 3. # # Boot image options: # # -DTAGGED_IMAGE # Add tagged image kernel boot support (Recommended). # -DAOUT_IMAGE # Add a.out kernel boot support (generic). # -DELF_IMAGE # Add generic ELF kernel boot support (Recommended). # -DIMAGE_MULTIBOOT # Add Multiboot image support (currently only # for ELF images). # Without this, generic ELF support is selected. # -DIMAGE_FREEBSD # Add FreeBSD image loading support (requires at least # -DAOUT_IMAGE and/or -DELF_IMAGE). # -DFREEBSD_KERNEL_ENV # Pass in FreeBSD kernel environment # -DAOUT_LYNX_KDI # Add Lynx a.out KDI support # # -DDOWNLOAD_PROTO_TFTP # If defined, boots by TFTP (Recommended). # -DDOWNLOAD_PROTO_NFS # If defined, boots from a NFS mount and disables # TFTP loading. Default is DOWNLOAD_PROTO_TFTP # if neither is defined. # # Console options: # # -DCONSOLE_CRT # Set for CRT console (default if nothing else is set). # -DCONSOLE_SERIAL # Set for serial console. # -DCONSOLE_DUAL # Set for CRT and serial console, see comment at # -DANSIESC and -DGFX. # -DCOMCONSOLE # Set port, e.g. 0x3F8. # -DCONSPEED # Set speed, e.g. 57600. # -DCOMPARM # Set Line Control Register value for data bits, stop # bits and parity. See a National Semiconditor 8250/ # 16450/16550 data sheet for bit meanings. # If undefined, defaults to 0x03 = 8N1. # -DCOMPRESERVE # Ignore COMSPEED and COMPARAM and instead preserve # the com port parameters from the previous user # of the com port. Examples of previous user are a BIOS # that implements console redirection, lilo and LinuxBIOS. # This makes it trivial to keep the serial port # speed setting in sync between multiple users. # You set the speed in the first user and the # rest follow along. # # BIOS interface options: # # -DPCBIOS # Compile in support for the normal pcbios # -DLINUXBIOS # Compile in support for LinuxBIOS # # -DBBS_BUT_NOT_PNP_COMPLIANT # Some BIOSes claim to be PNP but they don't conform # to the BBS spec which specifies that ES:DI must # point to the string $PnP on entry. This option # works around those. This option must be added to # LCONFIG. # -DNO_DELAYED_INT # Take control as soon as BIOS detects the ROM. # Normally hooks onto INT18H or INT19H. Use only if you # have a very non-conformant BIOS as it bypasses # BIOS initialisation of devices. This only works for # legacy ROMs, i.e. PCI_PNP_HEADER not defined. # This option was formerly called NOINT19H. # -DBOOT_INT18H # Etherboot normally hooks onto INT19H for legacy ROMs. # You can choose to hook onto INT18H (BASIC interpreter # entry point) instead. This entry point is used when # all boot devices have been exhausted. This option must # be added to LCONFIG. # -DCONFIG_PCI_DIRECT # Define this for PCI BIOSes that do not implement # BIOS32 or not correctly. Normally not needed. # Only works for BIOSes of a certain era. # -DCONFIG_TSC_CURRTICKS # Uses the processor time stamp counter instead of reading # the BIOS time counter. This allows Etherboot to work # even without a BIOS. This only works on late model # 486s and above. # -DPXELOADER_KEEP_UNDI # For implementation later with UNDI. # -DIBM_L40 # This option uses the 0x92 method of controlling # A20 instead of the traditional method of using the # keyboard controller. An explanation of A20 is here: # http://www.win.tue.nl/~aeb/linux/kbd/A20.html # This occurs on MCA, EISA and some embedded boards, # and sometimes with the Fast Gate A20 option on some # BIOSes. # Enable this only if you are sure of what you are doing. # # Obscure options you probably don't need to touch: # # -DPOWERSAVE # Halt the processor when waiting for keyboard input # which saves power while waiting for user interaction. # Good for compute clusters and VMware emulation. # But may not work for all CPUs. # -DT503_AUI # Use AUI by default on 3c503 cards. # -DMOVEROM # If your motherboard does not cache adapter memory # space, then this option can speed up loading of # compressed BOOT-Prom images. It has no effect on # uncompressed images. Unless you are very tight on # free space, you will usually want to define this # option. This option must be added to LCONFIG! # (Recommended). # -DUSE_LOWMEM_BUFFER # Define to put some buffers below 0x10000 which # may interfere with other programs (Deprecated). # # These default settings compile Etherboot with a small number of options. # You may wish to enable more of the features if the size of your ROM allows. # BIOS select don't change unless you know what you are doing #CFLAGS32+= -DPCBIOS # For prompting and default on timeout CFLAGS32+= -DASK_BOOT=3 -DANS_DEFAULT=ANS_NETWORK # If you prefer the old style rotating bar progress display # CFLAGS32+= -DBAR_PROGRESS # MOTD and Image Menu are no longer the default, use mk{elf,nbi}-menu instead # CFLAGS32+= -DMOTD -DIMAGE_MENU # Enabling this makes the boot ROM require a Vendor Class Identifier # of "Etherboot" in the Vendor Encapsulated Options # This can be used to reject replies from servers other than the one # we want to give out addresses to us, but it will prevent Etherboot # from getting an IP lease until you have configured DHCPD correctly # CFLAGS32+= -DREQUIRE_VCI_ETHERBOOT # Enabling this causes Etherboot to ignore Etherboot-specific options # that are not within an Etherboot encapsulated options field. # This option should be enabled unless you have a legacy DHCP server # configuration from the bad old days before the use of # encapsulated Etherboot options. # CFLAGS32+= -DALLOW_ONLY_ENCAPSULATED # Limit the delay on packet loss/congestion to a more bearable value. See # description above. If unset, do not limit the delay between resend. CFLAGS32+= -DBACKOFF_LIMIT=7 -DCONGESTED # More optional features # CFLAGS32+= -DANSIESC -DGFX # CFLAGS32+= -DPASSWD -DUSRPARMS # CFLAGS32+= -DCAN_BOOT_DISK -DTRY_FLOPPY_FIRST=4 # For a serial console, which can run in parallel with CRT console # CFLAGS32+= -DCONSOLE_DUAL -DCOMCONSOLE=0x3F8 -DCONSPEED=9600 # Enable tagged image, generic ELF, Multiboot ELF # or FreeBSD ELF/a.out boot image support CFLAGS32+= -DTAGGED_IMAGE -DELF_IMAGE # CFLAGS32+= -DAOUT_IMAGE -DIMAGE_MULTIBOOT -DIMAGE_FREEBSD # CFLAGS32+= -DAOUT_IMAGE -DAOUT_LYNX_KDI # Change download protocol to NFS, default is TFTP # CFLAGS32+= -DDOWNLOAD_PROTO_NFS # Options to make a version of Etherboot that will work under linuxBIOS. CFLAGS32+= -DLINUXBIOS -DCONFIG_TSC_CURRTICKS -DCONSOLE_SERIAL -DCOMCONSOLE=0x3f8 -DCOMPRESERVE -DCONFIG_PCI_DIRECT -DELF_IMAGE # These options affect the loader that is prepended to the Etherboot image LCONFIG+= -DMOVEROM # LCONFIG+= -DBBS_BUT_NOT_PNP_COMPLIANT # LCONFIG+= -DBOOT_INT18H # you should normally not need to change these RM= rm -f TOUCH= touch CC32= gcc AS32= as LD32= ld SIZE32= size AR32= ar RANLIB32= ranlib # If you use egcs or gcc-2.8, using -Os may help to reduce the code size. # Otherwise use -O2 (under no circumstance use -O3 or above!). CFLAGS32+= -Os -ffreestanding -fstrength-reduce -fomit-frame-pointer -mcpu=i386 # Squeeze the code in as little space as possible. CFLAGS32+= -malign-jumps=1 -malign-loops=1 -malign-functions=1 CFLAGS32+= -Wall -W -Wno-format -Wno-unused ASFLAGS32= LDFLAGS32+= -N -Ttext $(RELOCADDR) -e _start LDBINARY32= --oformat binary # flag for headerless binary LIBC32= # not needed # Support for PXE emulation. Works only with FreeBSD to load the kernel # via pxeboot, use only with DOWNLOAD_PROTO_NFS #CFLAGS32+= -DFREEBSD_PXEEMU -----Original Message----- From: Mark Wilkinson [mailto:mwilkinson at ndirect.co.uk] Sent: Friday, March 21, 2003 9:31 PM To: NEWBELL7 at magicn.com; linuxbios at clustermatic.org Subject: Re: [epia] Unknown bootloader class Hello HyungJong, I'm beginning to wonder if the problem you are seeing lies with the configuration of etherboot you've used. My thinking is that etherboot thinks it's executing a different type of image (ie FreeBSD, Multiboot, etc) rather than an ELF image, and is thus passing some different information across. Can you forward the Config file that you used to build the etherboot payload ? Regards Mark Wilkinson. -------------- next part -------------- An HTML attachment was scrubbed... URL: From spirit at reactor.ru Sat Mar 22 13:33:00 2003 From: spirit at reactor.ru (Alexander Amelkin) Date: Sat Mar 22 13:33:00 2003 Subject: SiS630 Disabling Embedded Devices (was: Software Watchdog Timer) In-Reply-To: <20030320215029.A7825@mail.cwlinux.com> References: <92152454918.20030318230043@reactor.ru> <20030320215029.A7825@mail.cwlinux.com> Message-ID: <2805603356.20030322215814@reactor.ru> Hello Andrew, Thursday, March 20, 2003, 4:50:29 PM, you wrote: AI> Alexander, AI> It works!!! I have checked in. Thanks. I knew it! :) You're welcome. With best regards, Alexander mailto:spirit at reactor.ru From spirit at reactor.ru Sat Mar 22 13:48:01 2003 From: spirit at reactor.ru (Alexander Amelkin) Date: Sat Mar 22 13:48:01 2003 Subject: Config file/Rom image to Jetway B860t In-Reply-To: References: Message-ID: <60806512754.20030322221324@reactor.ru> Hello Ronald, Saturday, March 22, 2003, 1:21:12 AM, you wrote: RGM> On Fri, 21 Mar 2003, Ivan Gustavo wrote: >> Now is the problem, I do not know what file I need to use to write on my >> BIOS, the romfile have up to 900k, and my eeprom is 256k like many >> others... RGM> for that small part you can not use a linux kernel, you will have to use RGM> etherboot. But etherboot works extremely well. Isn't it possible with EPIA to boot from a local IDE drive like with m787cl+ ? With best regards, Alexander mailto:spirit at reactor.ru From mwilkinson at ndirect.co.uk Sun Mar 23 03:54:01 2003 From: mwilkinson at ndirect.co.uk (Mark Wilkinson) Date: Sun Mar 23 03:54:01 2003 Subject: [epia] Unknown bootloader class Message-ID: <200303230913.26093.mwilkinson@ndirect.co.uk> Hello HyungJong Thanks for the config information. I can only see one difference between your config and my own. That is the CFLAGS32+= -DASK_BOOT=3 -DANS_DEFAULT=ANS_NETWORK line, which I don't have enabled, but I can't see that being the cause of your problem. Just for Information, I'm using version 1.16 of mkelfImage As for you second question, I'm not sure about the values in raminit being optimised. I think they are configured to 'work' for 64Mbytes of memory - any more just get's ignored. For my 128Mb system, I've changed to the following 5a = 0x08 5b->5f,56,57 = 0x10 as these are what the original BIOS set for my memory module. Andrew Ip may be able to tell you more on this. The one document I've not seen is the BIOS porting guide. Just can't seem to find it freely available on the web. Regards Mark Wilkinson From mwilkinson at ndirect.co.uk Sun Mar 23 04:48:01 2003 From: mwilkinson at ndirect.co.uk (Mark Wilkinson) Date: Sun Mar 23 04:48:01 2003 Subject: [epia] Unknown bootloader class In-Reply-To: <200303230913.26093.mwilkinson@ndirect.co.uk> References: <200303230913.26093.mwilkinson@ndirect.co.uk> Message-ID: <200303231007.00348.mwilkinson@ndirect.co.uk> Hi HyungJong, I've finally managed to get to the point where I can give the configs a try (one with -DTAGGED_IMAGE enabled, one without) in both cases, the boot sequence reported that the bootloader class was unknown (Type = 0x00000000), but the system then went on to boot the loaded kernel quite happily (see attached capture file) I've also attached the romimages as well file :- lb+eb-elf = linuxbios + etherboot (elf images only) lb+eb-tag+elf = linuxbios + etherboot (tagged and elf images) if you still don't get any further, I think it time to look at the kernel configuration once again.... the command line you specified did have the correct disk partition listed as root didn't it ? I seem to recall that you'd configured /dev/hda3 as the root partition, does this match with where / really is ? regards Mark Wilkinson -------------- next part -------------- 0 LinuxBIOS-1.0.0 Sun Mar 23 09:25:01 GMT 2003 starting... Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Sun Mar 23 09:25:01 GMT 2003 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1106/0601] PCI: 00:01.0 [1106/8601] PCI: 00:11.0 [1106/8231] PCI: 00:11.1 [1106/0571] PCI: 00:11.2 [1106/3038] PCI: 00:11.3 [1106/3038] PCI: 00:11.4 [1106/8235] PCI: 00:11.5 [1106/3058] PCI: 00:11.6 [1106/3068] PCI: 00:12.0 [1106/3065] PCI: pci_scan_bus for bus 1 PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xfeb00000 - 0xfeafffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfeb00000 - 0xfeafffff] bus 1 mem PCI: 00:11.1 20 <- [0x00001c40 - 0x00001c4f] io PCI: 00:11.2 20 <- [0x00001c00 - 0x00001c1f] io PCI: 00:11.3 20 <- [0x00001c20 - 0x00001c3f] io PCI: 00:11.5 10 <- [0x00001000 - 0x000010ff] io PCI: 00:11.5 14 <- [0x00001c50 - 0x00001c53] io PCI: 00:11.5 18 <- [0x00001c60 - 0x00001c63] io PCI: 00:11.6 10 <- [0x00001400 - 0x000014ff] io PCI: 00:12.0 10 <- [0x00001800 - 0x000018ff] io PCI: 00:12.0 14 <- [0xfeb00000 - 0xfeb000ff] mem ASSIGNED RESOURCES, bus 0 done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:11.0 cmd <- 87 PCI: 00:11.1 cmd <- 81 PCI: 00:11.2 cmd <- 01 PCI: 00:11.3 cmd <- 01 PCI: 00:11.4 cmd <- 00 PCI: 00:11.5 cmd <- 01 PCI: 00:11.6 cmd <- 01 PCI: 00:12.0 cmd <- 83 done. Initializing PCI devices... PCI devices initialized sizeram: returning 0x1fc00 KB sizeram: NOT returning 0x1fc00 KB sizeram: there are still some SPD problems ... sizeram: SO we return only 0x10000 KB totalram: 64M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x07 Processor Mask : 0x00 Processor Stepping : 0x08 Feature flags : 0x00803035 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Disabling local apic...done. CPU #0 Initialized Mainboard fixup IDE enable in reg. 50 is 0x7 set IDE reg. 50 to 0x7 IRQs in reg. 4c are 0x4 setting reg. 4c to 0x4 enables in reg 0x40 0x8 enables in reg 0x40 read back as 0xb enables in reg 0x9 0x8f enables in reg 0x9 read back as 0x8a command in reg 0x4 0x81 command in reg 0x4 reads back as 0x7 Ethernet fixup Configuring VIA LAN RTC Init Invalid CMOS LB checksum Final mainboard fixup Southbridge fixup setting southbridge Assigning IRQ 12 to 0:11.2 Readback = 12 Assigning IRQ 12 to 0:11.3 Readback = 12 Assigning IRQ 10 to 0:11.5 Readback = 10 Assigning IRQ 10 to 0:11.6 Readback = 10 setting ethernet Assigning IRQ 11 to 0:12.0 Readback = 11 setting pci slot Checking IRQ routing tables... /home/mark/epia/freebios/src/arch/i386/lib/pirq_routing.c: 23:check_pirq_routing_table() - irq_routing_table located at: 0x000098a0 done. Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 00000678 checksum 3e51 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 200:init_bytes() - zkernel_start:0xfff00000 zkernel_mask:0x0000ffff Searching for 16 byte tags 63:rom_read_bytes() - overflowed source buffer. max_block = 15 init_bytes found 0 tags Found ELF candiate at offset 0 New segment addr 0x94000 size 0x73e8 offset 0x60 filesize 0x3874 (cleaned up) New segment addr 0x94000 size 0x73e8 offset 0x60 filesize 0x3874 Loading Segment: addr: 0x0000000000094000 memsz: 0x00000000000073e8 filesz: 0x0000000000003874 Clearing Segment: addr: 0x0000000000097874 memsz: 0x0000000000003b74 Jumping to boot code at 0x94000 ROM segment 0x0000 length 0x0010 reloc 0x9400 Etherboot 5.0.8 (GPL) Tagged ELF for [VIA 86C100] Probing...[VIA 86C100]Found VIA 6102 ROM address 0x0000 rhine.c v1.0.0 2000-01-07 IO address 1800 Ethernet Address: 00:40:63:C1:9C:95 Analyzing Media type,this will take several seconds........clocks_per_tick = 504384 OK Linespeed=100Mbs Fullduplex The PCI BIOS has not enabled this device! Updating PCI command 0003->0007. pci_bus 00 pci_device_fn 90 Searching for server (DHCP)... -\Me: 192.168.0.60, Server: 192.168.0.2, Gateway 192.168.0.1 Loading 192.168.0.2:vmlinuz.epia |/-(ELF)... [.... snip .....] rhine disable Unknown bootloader class! type=0x00000000 data=0x000988CE Firmware type: LinuxBIOS Linux version 2.4.18-14 (bhcompile at stripples.devel.redhat.com) (gcc version 3.2 20020903 (Red Hat Linux 8.0 3.2-7)) #1 Wed Sep 4 11:57:57 EDT 2002 BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 00000000000006d8 (reserved) BIOS-e820: 00000000000006d8 - 00000000000a0000 (usable) BIOS-e820: 0000000000100000 - 0000000004000000 (usable) 64MB LOWMEM available. hm, page 00000000 reserved twice. On node 0 totalpages: 16384 zone(0): 4096 pages. zone(1): 12288 pages. zone(2): 0 pages. Kernel command line: console=ttyS0,115200 root=/dev/hda3 Initializing CPU#0 Detected 800.048 MHz processor. Speakup v-1.00 CVS: Tue Jun 11 14:22:53 EDT 2002 : initialized Console: colour dummy device 80x25 Calibrating delay loop... 1595.80 BogoMIPS Memory: 61040k/65536k available (1193k kernel code, 3596k reserved, 984k data, 200k init, 0k highmem) Checking if this processor honours the WP bit even in supervisor mode... Ok. Dentry cache hash table entries: 8192 (order: 4, 65536 bytes) Inode cache hash table entries: 4096 (order: 3, 32768 bytes) Mount cache hash table entries: 1024 (order: 1, 8192 bytes) Buffer cache hash table entries: 4096 (order: 2, 16384 bytes) Page-cache hash table entries: 16384 (order: 4, 65536 bytes) CPU: L1 I Cache: 64K (32 bytes/line), D cache 64K (32 bytes/line) CPU: L2 Cache: 64K (32 bytes/line) CPU: Centaur VIA Ezra stepping 08 Checking 'hlt' instruction... OK. POSIX conformance testing by UNIFIX mtrr: v1.40 (20010327) Richard Gooch (rgooch at atnf.csiro.au) mtrr: detected mtrr type: Intel PCI: Using configuration type 1 PCI: Probing PCI hardware Unknown bridge resource 0: assuming transparent Unknown bridge resource 1: assuming transparent Unknown bridge resource 2: assuming transparent isapnp: Scanning for PnP cards... isapnp: No Plug & Play device found speakup: initialized device: /dev/synth, node (MAJOR 10, MINOR 25) Linux NET4.0 for Linux 2.4 Based upon Swansea University Computer Society NET3.039 Initializing RT netlink socket apm: BIOS not found. Starting kswapd VFS: Diskquotas version dquot_6.5.0 initialized Detected PS/2 Mouse Port. pty: 512 Unix98 ptys configured Serial driver version 5.05c (2001-07-08) with MANY_PORTS MULTIPORT SHARE_IRQ SERIAL_PCI ISAPNP enabled ttyS0 at 0x03f8 (irq = 4) is a 16550A Real Time Clock Driver v1.10e block: 112 slots per queue, batch=28 Uniform Multi-Platform E-IDE driver Revision: 6.31 ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx VP_IDE: IDE controller on PCI bus 00 dev 89 VP_IDE: chipset revision 6 VP_IDE: not 100% native mode: will probe irqs later ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx VP_IDE: VIA vt8231 (rev 10) IDE UDMA100 controller on pci00:11.1 ide0: BM-DMA at 0x1c40-0x1c47, BIOS settings: hda:pio, hdb:pio ide1: BM-DMA at 0x1c48-0x1c4f, BIOS settings: hdc:pio, hdd:pio hda: C/H/S=0/0/0 from BIOS ignored hda: IBM-DJNA-352500, ATA DISK drive hdb: YAMAHA CRW4416E, ATAPI CD/DVD-ROM drive hdc: HYPERSTONE FLASH DISK, ATA DISK drive hdc: set_drive_speed_status: status=0x51 { DriveReady SeekComplete Error } hdc: set_drive_speed_status: error=0x04 { DriveStatusError } ide1: Drive 0 didn't accept speed setting. Oh, well. ide0 at 0x1f0-0x1f7,0x3f6 on irq 14 ide1 at 0x170-0x177,0x376 on irq 15 hda: 49981680 sectors (25591 MB) w/1966KiB Cache, CHS=49585/16/63, UDMA(33) hdc: 257024 sectors (132 MB) w/0KiB Cache, CHS=1004/8/32 ide-floppy driver 0.99.newide Partition check: hda: [PTBL] [3111/255/63] hda1 hda2 hda3 hdc: hdc1 hdc2 Floppy drive(s): fd0 is 1.44M, fd1 is unknown type 7 (usb?) -------------- next part -------------- A non-text attachment was scrubbed... Name: lb+eb-elf Type: application/x-executable Size: 262144 bytes Desc: not available URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: lb+eb-tag+elf Type: application/x-executable Size: 262144 bytes Desc: not available URL: From root at hamburg.de Sun Mar 23 08:23:00 2003 From: root at hamburg.de (Felix Kloeckner) Date: Sun Mar 23 08:23:00 2003 Subject: new mainboard supported (elitegroup p6stp-fl) Message-ID: <20030323145104.A1683@synapse.pentanet> hello, i got linux linuxbios running on the p6stp-fl from elitegroup using the standard flashrom (no DoC). i successfully booted linux using etherboot i am wondering how to handle dll.inc, at the time i have to manually include it in northsouthbridge/sis/630/chipinit.inc, not the fine way... where can i put the config files, etc? elitegroup/p6stp-fl/ elitegroup/p6stp-fl/Config elitegroup/p6stp-fl/dll.inc elitegroup/p6stp-fl/STATUS elitegroup/p6stp-fl/irq_tables.c elitegroup/p6stp-fl/example.config elitegroup/p6stp-fl/mainboard.c elitegroup/p6stp-fl/no_reset.inc felix kloeckner From alesan at manoweb.com Sun Mar 23 10:14:00 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Sun Mar 23 10:14:00 2003 Subject: flash_rom segfaults Message-ID: <3E7DD510.40409@manoweb.com> Hi. I've noticed this a while ago, I made few experiments, downloaded the latest linuxvbios cvs, but I can't solve this problem. The fact is that, when I'm about to flash a rom (both from pcchips or from linuxbios) on my pcchips 810 7.1a board, I simply got a "segmentation fault". No other error. I was able few weeks ago to properly burn images without any kind of problem. Do you have any hint?? bye bye ciao as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From alesan at manoweb.com Sun Mar 23 10:17:00 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Sun Mar 23 10:17:00 2003 Subject: sis900 ethernet Message-ID: <3E7DD5E4.3020501@manoweb.com> When I'm about to transfer huge files with the integrated ethernet of my pcchips 810 motherboard, I can transfer 20/50MB very fast, but then the speed reduces to few KB/s. I think this is a known issue in older kernels, but I don't know if it has been fixed. I use 2.4.20... bye bye thank you as P.S. I also had problems with an athlon 2000+ installed on this motherboard: SSE are not enabled, crashing programs like mplayer that require them. -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From rminnich at lanl.gov Sun Mar 23 12:23:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Sun Mar 23 12:23:00 2003 Subject: Config file/Rom image to Jetway B860t In-Reply-To: <60806512754.20030322221324@reactor.ru> Message-ID: On Sat, 22 Mar 2003, Alexander Amelkin wrote: > Isn't it possible with EPIA to boot from a local IDE drive like with > m787cl+ ? yes, but no one has tested doing that so we can not claim it works until someone has done it. ron From rminnich at lanl.gov Sun Mar 23 12:29:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Sun Mar 23 12:29:01 2003 Subject: flash_rom segfaults In-Reply-To: <3E7DD510.40409@manoweb.com> Message-ID: On Sun, 23 Mar 2003, Alessio Sangalli wrote: > The fact is that, when I'm about to flash a rom (both from pcchips or > from linuxbios) on my pcchips 810 7.1a board, I simply got a > "segmentation fault". No other error. my fault, can somebody send me those most recent fixes for this? sorry! ron From shubhangi.jadhav at patni.com Sun Mar 23 23:36:01 2003 From: shubhangi.jadhav at patni.com (Shubhangi Jadhav) Date: Sun Mar 23 23:36:01 2003 Subject: Help needed to understand code In-Reply-To: <3E761370.80908@nexpath.com> Message-ID: Hi, Could you please explain to me the complete flow, right from the beginning of execution of the assembly code. How does the assembly code jump to the C code ? which is the jump instruction in crt0.base that makes it jump to c_start.S Thanks, Shubhangi -----Original Message----- From: Steve Gehlbach [mailto:steve at nexpath.com] Sent: Monday, March 17, 2003 11:57 PM To: Shubhangi Jadhav Cc: linuxbios at clustermatic.org Subject: Re: Help needed to understand code Shubhangi Jadhav wrote: > how does crt0.base move to c_start.S. I did not find any reference to > c_start.S from crt0.base or any other .inc files included in crt0.base > The bottom of crt0.base jumps to c_start.S using loader "magic". c_start.S runs in ram in the C code address space. crt0.base runs in rom. -Steve From nick-linuxbios at bostonimportcenter.com Mon Mar 24 03:03:01 2003 From: nick-linuxbios at bostonimportcenter.com (Nicholas Mistry) Date: Mon Mar 24 03:03:01 2003 Subject: off topic: CF -> IDE Where and which to buy? Message-ID: <1909.66.30.63.6.1048494644.squirrel@www.mistry.com> I am in the process of getting a CF/IDE drive for my Linuxbios machine. I am in the US and was wondering where and which one to get. As i am in a rush and hate to impulse buy, i thought to ask what you thought. so far its between one of these: http://www.pcengines.ch/cflash.htm (US $20) http://www.cwlinux.com/eng/products/products_ide2cf.php (US $20-25) Are there any others i should consider? Any feedback would be greatly appreciated, plus i am sure it would help the community. Thanks again.. -Nick From jake at CS.Stanford.EDU Mon Mar 24 03:19:00 2003 From: jake at CS.Stanford.EDU (Jake Page) Date: Mon Mar 24 03:19:00 2003 Subject: off topic: CF -> IDE Where and which to buy? In-Reply-To: <1909.66.30.63.6.1048494644.squirrel@www.mistry.com> Message-ID: On Mon, 24 Mar 2003, Nicholas Mistry wrote: > I am in the process of getting a CF/IDE drive for my Linuxbios machine. I > am in the US and was wondering where and which one to get. As i am in a > rush and hate to impulse buy, i thought to ask what you thought. > > so far its between one of these: > > http://www.pcengines.ch/cflash.htm (US $20) I have tried the CFDISK 1C and CDDISK D5 from PCEngines. The 1C works fine. The 5D is nice because it's so small, but the connector is kind of flimsy and didn't hold up too well to repeated use... > http://www.cwlinux.com/eng/products/products_ide2cf.php (US $20-25) Haven't tried, but from looking at them I'd say they look great for a more "permanent" solution, but are probably more of a pain if you are removing the card a lot. They do look a lot sturdier than either of the PCEngines adaptors... -Jake From dw-clustermatic.org at botanicus.net Mon Mar 24 04:59:01 2003 From: dw-clustermatic.org at botanicus.net (David M. Wilson) Date: Mon Mar 24 04:59:01 2003 Subject: SiS63x MAC address change tool. Message-ID: <20030324102633.A781@africa.datactics.co.uk> Hi there, I recently had hell whilest building a cluster. We thought it would be intelligent at the time to hot-swap BIOS chips that failed flashing into a running motherboard for re-flashing. As per documentation in previous threads on this list, all the BIOS chips ended up with that motherboard's MAC address. Thanks to the author of write_cmos.c, we were able to repair the damage (as least temporarily), but needed to make a few little small changes to write_cmos.c so that we didn't have to re-compile it each time to change the MAC address, and also, the PCI address of the ISA bridge was different from the #define in the original code. I include my version here for the sake of people who may not be able to perform the modifications I made, along with a large comment at the top explaining the concept. My hardware knowledge is zilch, and these changes may be wrong. It worked for me though.. Thanks again Steve! David. -------------- next part -------------- /* Program to set the CMOS MAC address on the SiS630e chipset. By Steve M. Gehlbach (steve at kesa.com), silly modifications made by David M. Wilson . Based on the work of SiS for the sis900.c driver in the 2.4.19 kernel. 1. Compile this program with "cc -o write_cmos write_cmos.c". 2. Type 'lspci -v' or 'cat /proc/pci' at the shell prompt, and scan for 'ISA bridge' in the list. If using lspci, note the numbers to the left of the line, eg. "04:01.0", these are your bus, device, and function numbers. If using cat, note the bus, device and function numbers given. 3. Run write_cmos, with the bus, device, and function number on the command line, followed by the MAC address bytes you would like to set the motherboard to. For example, if your ISA bridge is at address 04, 01, 0, and you want the motherboard to become 00:0A:E6:54:AB:01, your command line may look something like: root at node$ ./write_cmos 4 1 0 00 0a e6 54 ab 01 4. The program will prompt to confirm the MAC address to write (this is just a safety measure). Press the return key. 5. Verify the MAC address read back matches that which you specified on the command line. If they match, the modification should have been successful. Reboot your machine in order for the ethernet driver to pick up the new MAC address. 6. Grab a fresh cup of coffee. :-) Expected output (successful modification): [root at node13 projects]# ./write_cmos 0 2 0 00 0a e6 54 ab 01 MAC Address to write: 00:0a:e6:54:ab:01 Press to continue. Setting MAC... done. reading back MAC: 00 0a e6 54 ab 01 */ #include #include #include #include #include #include #include #include extern const char *const sys_errlist[]; #define CONFIG_CMD(bus,devfn, where) (0x80000000 | (bus << 16) | (devfn << 8) | (where & ~3)) #define u8 u_char #define u16 u_short #define u32 u_long #define PCI_DEVFN(slot,func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) #define PCI_FUNC(devfn) ((devfn) & 0x07) static int pci_conf1_read_config_word(unsigned char bus, int devfn, int where, u16 * value) { outl(CONFIG_CMD(bus, devfn, where), 0xCF8); *value = inw(0xCFC + (where & 2)); return 0; } static int pci_conf1_write_config_byte(unsigned char bus, int devfn, int where, u8 value) { outl(CONFIG_CMD(bus, devfn, where), 0xCF8); outb(value, 0xCFC + (where & 3)); return 0; } static int pci_conf1_read_config_byte(unsigned char bus, int devfn, int where, u8 * value) { outl(CONFIG_CMD(bus, devfn, where), 0xCF8); *value = inb(0xCFC + (where & 3)); return 0; } static int pci_conf1_write_config_word(unsigned char bus, int devfn, int where, u16 value) { outl(CONFIG_CMD(bus, devfn, where), 0xCF8); outw(value, 0xCFC + (where & 2)); return 0; } int main (int argc, char **argv) { u_char v1,reg; u8 mac_set[6] = {0x00,0x0a,0xe6,0x54,0xac,0xb7}; u8 mac[6]; char junkbuf[2]; u_short port; int i, bus, devfn; if (iopl(3) < 0 ) { perror("iopl"); printf("%s: You must run this program as root!\n",argv[0]); return 1; } if (argc < 10) { fprintf(stderr, "Please specify ISA bridge address and MAC bytes.\n" "eg.: %s 00 0A E6 AA BB CC\n", argv[0] ); return 1; } bus = atoi(argv[1]); devfn = PCI_DEVFN(atoi(argv[2]), atoi(argv[3])); mac_set[0] = strtoul(argv[4], NULL, 16); mac_set[1] = strtoul(argv[5], NULL, 16); mac_set[2] = strtoul(argv[6], NULL, 16); mac_set[3] = strtoul(argv[7], NULL, 16); mac_set[4] = strtoul(argv[8], NULL, 16); mac_set[5] = strtoul(argv[9], NULL, 16); printf( "MAC Address to write: %02x:%02x:%02x:%02x:%02x:%02x\n" "Press to continue.", mac_set[0], mac_set[1], mac_set[2], mac_set[3], mac_set[4], mac_set[5] ); fgets(junkbuf, sizeof junkbuf, stdin); // map the APC registers into cmos pci_conf1_read_config_byte(bus, devfn, 0x48, ®); pci_conf1_write_config_byte(bus, devfn, 0x48, reg | 0x40); // mac address is at offset 0x9 // write it there printf("Setting MAC... "); for (i = 0; i < 6; i++) { outb(0x09 + i, 0x70); outb(mac_set[i],0x71); } printf("done.\n"); // now read it back to confirm printf("reading back MAC: "); for (i = 0; i < 6; i++) { outb(0x09 + i, 0x70); mac[i] = inb(0x71); printf("%02x ",mac[i]); } printf("\n"); // restore the cmos mapping to normal pci_conf1_write_config_byte(bus, devfn, 0x48, reg & ~0x40); } From tulonja at koti.soon.fi Mon Mar 24 06:15:01 2003 From: tulonja at koti.soon.fi (Jarmo Tulonen) Date: Mon Mar 24 06:15:01 2003 Subject: [epia] Unknown bootloader class Message-ID: <20030324114241.YNFQ24612.fep07-app.kolumbus.fi@there> Hello If this problem is not solved yet, I would suggest trying a newer mkelfImage. I have been using version 2.2 from ftp://ftp.lnxi.com/pub/src/mkelfImage/ and that one works fine (I'm also using an Epia card.) I tried with the version in the freebios tree and got a similar "Unknown bootloader class" error. With regards Jarmo From ivan at munix.com.br Mon Mar 24 07:12:01 2003 From: ivan at munix.com.br (Ivan Gustavo) Date: Mon Mar 24 07:12:01 2003 Subject: Config file/Rom image to Jetway B860t References: <60806512754.20030322221324@reactor.ru> <20030323145922.GA17095@tsn.or.jp> Message-ID: <3E7ED2AC.2050708@munix.com.br> SONE Takeshi wrote: >On Sat, Mar 22, 2003 at 10:13:24PM +0300, Alexander Amelkin wrote: > > >>Hello Ronald, >> >>Saturday, March 22, 2003, 1:21:12 AM, you wrote: >> >>RGM> On Fri, 21 Mar 2003, Ivan Gustavo wrote: >> >> >> >>>>Now is the problem, I do not know what file I need to use to write on my >>>>BIOS, the romfile have up to 900k, and my eeprom is 256k like many >>>>others... >>>> >>>> >>RGM> for that small part you can not use a linux kernel, you will have to use >>RGM> etherboot. But etherboot works extremely well. >> >>Isn't it possible with EPIA to boot from a local IDE drive like with >>m787cl+ ? >> >> > >Yes, it is possible. >My EPIA successfully boots with BOOT_IDE. >Now I'm trying to enable all RAM (now it's hardcoded to 64M), >and get video. >The only problem so far is that verify_loaded_image (elfboot.c) >hangs up after loading kernel from IDE. >I have not yet investigated this one but commented out that call >and it's working ok. > >-- >Takeshi > I am working on the development of the some other hardware support for the B860T M/B which I guess is full usable for the Epia, I must do only some bugfix for the RGB encoder V1621 to TV Out, and will test for us . > > -- Ivan Gustavo Munix dos Santos ----------------------------- http://www.munix.com.br mailto:ivan at munix.com.br Skydental SJC. Av. Heitor Vila lobos, 1565 Fone: 12-39232925 Ramal 215 Sao Jose Dos Campos - SP From rsmith at bitworks.com Mon Mar 24 12:30:01 2003 From: rsmith at bitworks.com (Richard Smith) Date: Mon Mar 24 12:30:01 2003 Subject: off topic: CF -> IDE Where and which to buy? In-Reply-To: <1909.66.30.63.6.1048494644.squirrel@www.mistry.com> References: <1909.66.30.63.6.1048494644.squirrel@www.mistry.com> Message-ID: <3E7F46DB.6080500@bitworks.com> Nicholas Mistry wrote: > > Are there any others i should consider? I've used this one and it works well. It's type II so you can use IBM microdrives as well as standard CF. http://www.tapr.org/tapr/html/Fcfa.html > Any feedback would be greatly appreciated, plus i am sure it would help > the community. On a side note something I find _really_ hand when working with CF devices is my PCMCIA card for my Desktop and a CF to PCMCIA adapter. Lets me hot plug the CF in and out of my desktop. Very handy for copying images onto the CF during the debug cycle. From russell at abc9986.demon.co.uk Mon Mar 24 12:39:01 2003 From: russell at abc9986.demon.co.uk (Russell Gower) Date: Mon Mar 24 12:39:01 2003 Subject: [epia] Unknown bootloader class References: <200303230913.26093.mwilkinson@ndirect.co.uk> Message-ID: <00f901c2f230$2d1d4480$0f01a8c0@winxp> > As for you second question, I'm not sure about the values in raminit being > optimised. I think they are configured to 'work' for 64Mbytes of memory - any > more just get's ignored. For my 128Mb system, I've changed to the following > 5a = 0x08 > 5b->5f,56,57 = 0x10 > as these are what the original BIOS set for my memory module. I could'nt get any more than 64mb of ram recognised using the raminit.inc approach, and even that 64mb was showing lots of errors. So i reworked things to uses the generic spd stuff. I did intend on producing a patch to send in to Andrew IP, but i ran out of time then my linuxbios got out of sync with the CVS etc. I'll try again soon but i am very busy at the moment. Russell From rminnich at lanl.gov Mon Mar 24 12:42:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Mon Mar 24 12:42:01 2003 Subject: off topic: CF -> IDE Where and which to buy? In-Reply-To: <3E7F46DB.6080500@bitworks.com> Message-ID: On Mon, 24 Mar 2003, Richard Smith wrote: > On a side note something I find _really_ hand when working with CF > devices is my PCMCIA card for my Desktop and a CF to PCMCIA adapter. > Lets me hot plug the CF in and out of my desktop. Very handy for > copying images onto the CF during the debug cycle. or a laptop (like the X24) with a CF slot :-) ron From jake at CS.Stanford.EDU Mon Mar 24 12:44:12 2003 From: jake at CS.Stanford.EDU (Jake Page) Date: Mon Mar 24 12:44:12 2003 Subject: off topic: CF -> IDE Where and which to buy? In-Reply-To: <3E7F46DB.6080500@bitworks.com> Message-ID: On Mon, 24 Mar 2003, Richard Smith wrote: > On a side note something I find _really_ hand when working with CF > devices is my PCMCIA card for my Desktop and a CF to PCMCIA adapter. > Lets me hot plug the CF in and out of my desktop. Very handy for > copying images onto the CF during the debug cycle. Another alternative to this is a USB CF reader - I'm using the Sandisk Imagemate to mount my CF cards & copy images, etc. -Jake From nick-linuxbios at bostonimportcenter.com Mon Mar 24 13:52:00 2003 From: nick-linuxbios at bostonimportcenter.com (Nicholas Mistry) Date: Mon Mar 24 13:52:00 2003 Subject: off topic: CF -> IDE Where and which to buy? In-Reply-To: References: <3E7F46DB.6080500@bitworks.com> Message-ID: <1118.66.30.63.6.1048533555.squirrel@www.mistry.com> I too am am running the Imagemate (SDDR-31) USB -> CF adapter. It is great for development and debugging. Used it many times when porting linux to the Ipaq! My only frustration is that i am unable to boot of it. Once the kernel is loaded i can mount the CF card and make it the root filesystem, but that is about it. What i am aiming to do is completely eliminate the harddrive in my machine. And swapping out the card is not something i will be doing regularly. I just want a reliable and inexpensive solution that gets the job done. -N > On Mon, 24 Mar 2003, Richard Smith wrote: > >> On a side note something I find _really_ hand when working with CF >> devices is my PCMCIA card for my Desktop and a CF to PCMCIA adapter. >> Lets me hot plug the CF in and out of my desktop. Very handy for >> copying images onto the CF during the debug cycle. > > Another alternative to this is a USB CF reader - I'm using the Sandisk > Imagemate to mount my CF cards & copy images, etc. > > -Jake > From joey at joescan.com Mon Mar 24 15:58:00 2003 From: joey at joescan.com (Joey Nelson) Date: Mon Mar 24 15:58:00 2003 Subject: off topic: CF -> IDE Where and which to buy? In-Reply-To: <1118.66.30.63.6.1048533555.squirrel@www.mistry.com> Message-ID: <006101c2f24b$fde72c50$6501a8c0@pink> Nicholas, As an alternative to CF, I'm using PQI IDE Disk on Modules. For PC/104 embedded systems that have the 2mm 44pin IDE connectors they plug right in without needing an additional power wire. 40 pin versions require a separate +5V power input. Programming them takes a bit more ingenuity. I found that you can buy IDE -> USB2.0 enclosures that work under Linux just like the SDDR-31. The one tricky part is connector gender is wrong and the pins are flipped, so you have to take a 2mm IDE cable and put pin headers in both ends to hook the DOMs to the IDE->USB2 perverter. Once the target system is up and running I update tend the DOM across the network, which is good till I test a kernel that won't boot. It's a good solution for me because I don't have to find a place to mount the CF adapter board, and don't have the extra cable. The DOM price is a bit more than CF at around $40. Joey Nelson -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Nicholas Mistry Sent: Monday, March 24, 2003 11:19 AM To: linuxbios at clustermatic.org Subject: Re: off topic: CF -> IDE Where and which to buy? I too am am running the Imagemate (SDDR-31) USB -> CF adapter. It is great for development and debugging. Used it many times when porting linux to the Ipaq! My only frustration is that i am unable to boot of it. Once the kernel is loaded i can mount the CF card and make it the root filesystem, but that is about it. What i am aiming to do is completely eliminate the harddrive in my machine. And swapping out the card is not something i will be doing regularly. I just want a reliable and inexpensive solution that gets the job done. -N From aip at cwlinux.com Mon Mar 24 19:42:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Mon Mar 24 19:42:00 2003 Subject: off topic: CF -> IDE Where and which to buy? In-Reply-To: <1118.66.30.63.6.1048533555.squirrel@www.mistry.com>; from Nicholas Mistry on Mon, Mar 24, 2003 at 02:19:15PM -0500 References: <3E7F46DB.6080500@bitworks.com> <1118.66.30.63.6.1048533555.squirrel@www.mistry.com> Message-ID: <20030325090950.A1773@mail.cwlinux.com> Nicholas, > I too am am running the Imagemate (SDDR-31) USB -> CF adapter. It is > great for development and debugging. Used it many times when porting > linux to the Ipaq! My only frustration is that i am unable to boot of > it. Once the kernel is loaded i can mount the CF card and make it the > root filesystem, but that is about it. If you really want to boot the USB->CF, you can use DOC with kexec as a boot loader. Then, you can mount the CF, and run kexec kernel from the CF. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From aip at cwlinux.com Mon Mar 24 19:44:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Mon Mar 24 19:44:00 2003 Subject: [epia] Unknown bootloader class In-Reply-To: <00f901c2f230$2d1d4480$0f01a8c0@winxp>; from Russell Gower on Mon, Mar 24, 2003 at 06:07:04PM -0000 References: <200303230913.26093.mwilkinson@ndirect.co.uk> <00f901c2f230$2d1d4480$0f01a8c0@winxp> Message-ID: <20030325091134.B1773@mail.cwlinux.com> > I could'nt get any more than 64mb of ram recognised using the raminit.inc > approach, and even that 64mb was showing lots of errors. > So i reworked things to uses the generic spd stuff. > I did intend on producing a patch to send in to Andrew IP, but i ran out of > time then my linuxbios got out of sync with the CVS etc. I'll try again soon > but i am very busy at the moment. I think I have a fix. I'll check it in once I have double check the fix. It is just a stupid mistake. -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From NEWBELL7 at magicn.com Mon Mar 24 21:28:00 2003 From: NEWBELL7 at magicn.com (NEWBELL7 at magicn.com) Date: Mon Mar 24 21:28:00 2003 Subject: =?ks_c_5601-1987?B?tOTA5TogW2VwaWFdIFVua25vd24gYm9vdGxvYWRlciBjbA==?= =?ks_c_5601-1987?B?YXNzIFtta2VsZkltYWdlXQ==?= Message-ID: Hello Mark !! My EPIA finally works. You are right! I saw on my EPIA what is the capture file attached on last mail. So as far, I have used mkelfImage-2.0, but it didn't work. By the way, yesterday I just used mkelfImage-1.16 which is the same as you. Then it worked. What's the problem ? I don't know the reason why it differs. I am about to find it out. And let me know it , if you know. Thank you for your help. -----Original Message----- From: Mark Wilkinson [mailto:mwilkinson at ndirect.co.uk] Sent: Sunday, March 23, 2003 7:07 PM To: NEWBELL7 at magicn.com Cc: linuxbios at clustermatic.org Subject: Re: [epia] Unknown bootloader class Hi HyungJong, I've finally managed to get to the point where I can give the configs a try (one with -DTAGGED_IMAGE enabled, one without) in both cases, the boot sequence reported that the bootloader class was unknown (Type = 0x00000000), but the system then went on to boot the loaded kernel quite happily (see attached capture file) I've also attached the romimages as well file :- lb+eb-elf = linuxbios + etherboot (elf images only) lb+eb-tag+elf = linuxbios + etherboot (tagged and elf images) if you still don't get any further, I think it time to look at the kernel configuration once again.... the command line you specified did have the correct disk partition listed as root didn't it ? I seem to recall that you'd configured /dev/hda3 as the root partition, does this match with where / really is ? regards Mark Wilkinson -------------- next part -------------- An HTML attachment was scrubbed... URL: From hansolofalcon at worldnet.att.net Mon Mar 24 22:40:01 2003 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Mon Mar 24 22:40:01 2003 Subject: (no subject) Message-ID: <003601c2f284$2ed1c720$abc4580c@who5> Hello again from Gregg C Levine Eric, when you get a chance, can you examine the attached text file? It contains the activities from building the kernel exec tools for 2.5.12 of the kernel sources. This was built using the current tool chain for Slackware-8.0 for Intel. I am using the Linux-2.4.20 kernel. Also, can you make any recommendations for constructing a ram disk image for a kernel booted using the tools? ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: ktools.1.8.txt URL: From hansolofalcon at worldnet.att.net Mon Mar 24 22:49:00 2003 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Mon Mar 24 22:49:00 2003 Subject: Strange events happening building kernel exec tools was RE: (no subject) In-Reply-To: <003601c2f284$2ed1c720$abc4580c@who5> Message-ID: <003d01c2f285$6a732b60$abc4580c@who5> Hello again from Gregg C Levine Sorry forgot the subject line! Now resending it, with one. And I also pasting the text file contents below the original message. Everything in the original message applies. However one I forgot is: Where do I put the created programs? The /usr/bin for one, and the /usr/sbin for the other? Or the directories hanging off the / directory? ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi (This company dedicates this E-Mail to General Obi-Wan Kenobi ) (This company dedicates this E-Mail to Master Yoda ) > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of Gregg C Levine > Sent: Monday, March 24, 2003 11:08 PM > To: Linuxbios > Subject: (no subject) > > Hello again from Gregg C Levine > Eric, when you get a chance, can you examine the attached text file? > It contains the activities from building the kernel exec tools for > 2.5.12 of the kernel sources. > > This was built using the current tool chain for Slackware-8.0 for > Intel. I am using the Linux-2.4.20 kernel. Also, can you make any > recommendations for constructing a ram disk image for a kernel booted > using the tools? > ------------------- > Gregg C Levine hansolofalcon at worldnet.att.net > ------------------------------------------------------------ > "The Force will be with you...Always." Obi-Wan Kenobi > "Use the Force, Luke."? Obi-Wan Kenobi > (This company dedicates this E-Mail to General Obi-Wan Kenobi ) > (This company dedicates this E-Mail to Master Yoda ) > > ------------ Script started on Mon Mar 24 22:59:51 2003 root at tardis:/usr/src/LoBos/linux-kernel-patches/kexec/kexec-tools-1.8# make mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/kexec.o -c kexec/kexec.c mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/kexec-syscall.o -c kexec/kexec-syscall.c mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/kexec-x86.o -c kexec/kexec-x86.c mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/kexec-elf32-x86.o -c kexec/kexec-elf32-x86.c mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/kexec-bzImage.o -c kexec/kexec-bzImage.c kexec/kexec-bzImage.c: In function `bzImage_load': kexec/kexec-bzImage.c:163: warning: `fp_ramdisk' might be used uninitialized in this function mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/ifdown.o -c kexec/ifdown.c mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/x86-setup-32.o -c kexec/x86-setup-32.S mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/x86-setup-16.o -c kexec/x86-setup-16.S mkdir -p objdir/kexec gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -o objdir/kexec/x86-setup-16-debug.o -c kexec/x86-setup-16-debug.S /tmp/ccLM5d5a.s: Assembler messages: /tmp/ccLM5d5a.s:254: Warning: indirect jmp without `*' mkdir -p objdir/util_lib gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -c -o objdir/util_lib/compute_ip_checksum.o util_lib/compute_ip_checksum.c mkdir -p objdir ar rs ./objdir/libutil.a ./objdir/util_lib/compute_ip_checksum.o mkdir -p objdir/build/sbin gcc -Wall -g -O2 -fno-strict-aliasing -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -static -o objdir/build/sbin/kexec ./objdir/kexec/kexec.o ./objdir/kexec/kexec-syscall.o ./objdir/kexec/kexec-x86.o ./objdir/kexec/kexec-elf32-x86.o ./objdir/kexec/kexec-bzImage.o ./objdir/kexec/ifdown.o ./objdir/kexec/x86-setup-32.o ./objdir/kexec/x86-setup-16.o ./objdir/kexec/x86-setup-16-debug.o ./objdir/libutil.a mkdir -p objdir/kexec_test gcc -x assembler-with-cpp -E -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -DRELOC=0x10000 kexec_test/kexec_test16.S > objdir/kexec_test/kexec_test16.s mkdir -p objdir/kexec_test as -o objdir/kexec_test/kexec_test16.o objdir/kexec_test/kexec_test16.s mkdir -p objdir/kexec_test gcc -x assembler-with-cpp -E -I./util_lib/include -DVERSION='"1.8"' -DRELEASE_DATE='"01 December 2002"' -DRELOC=0x10000 kexec_test/kexec_test.S > objdir/kexec_test/kexec_test.s mkdir -p objdir/kexec_test as -o objdir/kexec_test/kexec_test.o objdir/kexec_test/kexec_test.s mkdir -p objdir/build/bin ld -e _start -Ttext 0x10000 ./objdir/kexec_test/kexec_test16.o ./objdir/kexec_test/kexec_test.o -o objdir/build/bin/kexec_test root at tardis:/usr/src/LoBos/linux-kernel-patches/kexec/kexec-tools-1.8# exit Script done on Mon Mar 24 23:00:27 2003 -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: ktools.1.8.txt URL: From alesan at manoweb.com Tue Mar 25 02:47:00 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Tue Mar 25 02:47:00 2003 Subject: flash_rom Message-ID: <3E800F61.40501@manoweb.com> How is the situation of flash_rom? Ron said few days ago there was a wrong version in the cvs. Is it updated now? bye bye thank you as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From Andre.Courchesne at ca.kontron.com Tue Mar 25 08:05:01 2003 From: Andre.Courchesne at ca.kontron.com (Courchesne, Andre) Date: Tue Mar 25 08:05:01 2003 Subject: off topic: CF -> IDE Where and which to buy? Message-ID: <5009AD9521A8D41198EE00805F85F18F03A8608F@sembo111.teknor.com> Ok, I know this is not really in sync with "listserv etiquette", but I am a reseller of CompactFlash adapters and peripherals that are pretty interesting. You can see some on my site at www.net-forces.com For those who wants details or pricing, e-mail me privately at courchea at net-forces.com Again sorry for the intrusion, but I wanted to share the info. --- Andre Courchesne - Consultant http://www.net-forces.com -----Original Message----- From: Nicholas Mistry [mailto:nick-linuxbios at bostonimportcenter.com] Sent: Monday, March 24, 2003 2:19 PM To: linuxbios at clustermatic.org Subject: Re: off topic: CF -> IDE Where and which to buy? I too am am running the Imagemate (SDDR-31) USB -> CF adapter. It is great for development and debugging. Used it many times when porting linux to the Ipaq! My only frustration is that i am unable to boot of it. Once the kernel is loaded i can mount the CF card and make it the root filesystem, but that is about it. What i am aiming to do is completely eliminate the harddrive in my machine. And swapping out the card is not something i will be doing regularly. I just want a reliable and inexpensive solution that gets the job done. -N > On Mon, 24 Mar 2003, Richard Smith wrote: > >> On a side note something I find _really_ hand when working with CF >> devices is my PCMCIA card for my Desktop and a CF to PCMCIA adapter. >> Lets me hot plug the CF in and out of my desktop. Very handy for >> copying images onto the CF during the debug cycle. > > Another alternative to this is a USB CF reader - I'm using the Sandisk > Imagemate to mount my CF cards & copy images, etc. > > -Jake > _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Tue Mar 25 09:10:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Mar 25 09:10:01 2003 Subject: flash_rom In-Reply-To: <3E800F61.40501@manoweb.com> Message-ID: On Tue, 25 Mar 2003, Alessio Sangalli wrote: > How is the situation of flash_rom? Ron said few days ago there was a > wrong version in the cvs. Is it updated now? I'm still waiting for a re-send of the patch, but I am also going to try to find it today. ron From alesan at manoweb.com Tue Mar 25 14:48:01 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Tue Mar 25 14:48:01 2003 Subject: semi-ot: sis900 lan support Message-ID: <3E80B84F.40700@manoweb.com> Hi. I've experienced some problems with sis900 ethernet performances. Though this is not *directly* linuxbios related, I think here I can find interesteds people. I'm here with my pcchips 810 motherboard, but I've found the same problem on other TWO motheboards. I load the sis900 module or I compile it into the kernel, but the performances are incredibly low: if I transfer a huge file, the transfer starts at 5MB/s more or less, but after few seconds it drammatically drops to 60KB/s. I would need more that two hours to transfer an ISO image. I've changed the cable, connected the computers with a cross cable, but the problem is always there. The other computer has a rtl8139 card and works fine with other non-sis900 hosts. ifconfig or iptraf show NO errors but the transfer rate is no more than 60KB/s. I'm using kernel 2.4.20, pcchips810lmr with 256MB memory and athlon2000+... bye bye, thank you as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From Andre.Courchesne at ca.kontron.com Tue Mar 25 14:57:00 2003 From: Andre.Courchesne at ca.kontron.com (Courchesne, Andre) Date: Tue Mar 25 14:57:00 2003 Subject: off topic: CF -> IDE Where and which to buy? Message-ID: <5009AD9521A8D41198EE00805F85F18F03A8629F@sembo111.teknor.com> I just notices that I had a down time between now and around 10am this morning so if you bumped your head on my door, try again and it should be up and running... --- Andre Courchesne - Consultant http://www.net-forces.com -----Original Message----- From: Courchesne, Andre Sent: Tuesday, March 25, 2003 8:33 AM To: linuxbios at clustermatic.org Subject: RE: off topic: CF -> IDE Where and which to buy? Ok, I know this is not really in sync with "listserv etiquette", but I am a reseller of CompactFlash adapters and peripherals that are pretty interesting. You can see some on my site at www.net-forces.com For those who wants details or pricing, e-mail me privately at courchea at net-forces.com Again sorry for the intrusion, but I wanted to share the info. --- Andre Courchesne - Consultant http://www.net-forces.com -----Original Message----- From: Nicholas Mistry [mailto:nick-linuxbios at bostonimportcenter.com] Sent: Monday, March 24, 2003 2:19 PM To: linuxbios at clustermatic.org Subject: Re: off topic: CF -> IDE Where and which to buy? I too am am running the Imagemate (SDDR-31) USB -> CF adapter. It is great for development and debugging. Used it many times when porting linux to the Ipaq! My only frustration is that i am unable to boot of it. Once the kernel is loaded i can mount the CF card and make it the root filesystem, but that is about it. What i am aiming to do is completely eliminate the harddrive in my machine. And swapping out the card is not something i will be doing regularly. I just want a reliable and inexpensive solution that gets the job done. -N > On Mon, 24 Mar 2003, Richard Smith wrote: > >> On a side note something I find _really_ hand when working with CF >> devices is my PCMCIA card for my Desktop and a CF to PCMCIA adapter. >> Lets me hot plug the CF in and out of my desktop. Very handy for >> copying images onto the CF during the debug cycle. > > Another alternative to this is a USB CF reader - I'm using the Sandisk > Imagemate to mount my CF cards & copy images, etc. > > -Jake > _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Wed Mar 26 02:49:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Mar 26 02:49:00 2003 Subject: small c compiler status... Message-ID: O.k. I have been going incrementally and have just finished the register allocator. I built the compiler on an optimization framework which took a little more work than I expected but things have been going good so far. My test code base is the L440GX ram initialization in C, that I wrong a while ago. With a small change smbus_read_byte so that it does not take a pointer argument but instead does the classic getchar trick for return a status and a data byte in the same return value. So far it compiles it all with just 8 registers except for 2 lines of code. So a little bit of tweaking of will probably be called for. I will publish the code as soon as I have it generating x86 assembly. The big thing I want to measure now is how much of a code size increase all of that unconditional inline gives. If it significant I have a optimization on the back burner that will not inline a function if there are sufficient registers available to call it out of line. Upgrading the compiler to optionally use the MMX and/or the SSE registers for additional storage should take about an hour. The generic code really does not care. Of almost as much usefulness I have not yet implemented constant propagation which should reduce the register pressure as well. The compiler itself is probably not especially shareable with other projects as it first and foremost optimizes register usage. But I don't think it will be a major maintenance burden either. So far it comes to about 8000 lines of code with a noticeable chunk of that being code to dump the the various forms of intermediate code. Though I expect it to probably stabilize around 10000 lines of code. My tentative name for the compiler is romcc. If anyone has a better one I'm all ears. So far romcc is the only name I have thought of that someone else isn't already using. Eric From hcyun at etri.re.kr Wed Mar 26 07:52:01 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Wed Mar 26 07:52:01 2003 Subject: PCI bus error on VT6102 ethernet Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD6D5@cms3> Hi, When I tried to enable vt6102 ethernet, i got following error. After tracking down the code, I found that it happen because ISR0 (0xc) register report "PCI Bus error". If someone know any clue of the reason, please let me know. Thanks --------------------- # insmod via-rhine debug=7 Using /lib/modules/2.4.17/kernel/drivers/net/via-rhine.o via-rhine.c:v1.10-LK1.1.12 03/11/2001 Written by Donald Becker http://www.scyld.com/network/via-rhine.html via-rhine: reset finished after 5 microseconds. eth0: VIA VT6102 Rhine-II at 0xea002000, 00:40:63:c3:98:09, IRQ 11. eth0: MII PHY found at address 1, status 0x786d advertising 05e1 Link 45e1. # ifconfig eth0 129.254.180.119 up eth0: reset finished after 5 microseconds. eth0: Setting full-duplex based on MII #1 link partner capability of 45e1. # eth0: Something Wicked happened! 0040. <----------- ERROR, net doesn't work. --------------------- - HeeChul Yun, Embedded S/W Team at ETRI phone: +82-42-860-1673 -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Wed Mar 26 08:31:01 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 26 08:31:01 2003 Subject: PCI bus error on VT6102 ethernet In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6D5@cms3> Message-ID: On Wed, 26 Mar 2003 hcyun at etri.re.kr wrote: > When I tried to enable vt6102 ethernet, i got following error. After > tracking down the code, I found that it happen because ISR0 (0xc) > register report "PCI Bus error". Was ISR0 set to the value beforehand? Is it possible that the driver should be doing more to reset the hardware than it does? ron From eugen at leitl.org Wed Mar 26 17:01:00 2003 From: eugen at leitl.org (Eugen Leitl) Date: Wed Mar 26 17:01:00 2003 Subject: [linux-elitists] Our little side project... Just Linux Hardware (dot com) (fwd) Message-ID: ---------- Forwarded message ---------- Date: Wed, 26 Mar 2003 21:24:24 +0000 From: Karsten M. Self To: linux-elitists at zgp.org Subject: Re: [linux-elitists] Our little side project... Just Linux Hardware (dot com) on Wed, Mar 26, 2003 at 10:48:42AM -0500, Michael Bacarella (mbac at netgraft.com) wrote: > Shopping for hardware is a chore. For us elitists, > it's especially bothersome because you have to investigate > devices for Linux compatibility. > > This seems like a barrier to sale to me, so I thought about attacking the > problem by building a site that only lists well supported > Linux hardware, and provides links to purchasing it via > affiliates. > > Here is the unborn unreleased please be gentle in criticism > version we've come up with so far. > > http://justlinuxhardware.com/ > > Probably not a directly viable business model, but I still > think it's worth me spending money on. Consider, if the > site is any good: > > 1. Shopping for Linux becomes a bit easier (hopefully?), > which is better for the community. > > 2. Vendors who support Linux are rewarded by increased sales. > > 3. Retailers who sell vendor's products are rewarded by increased sales. > > 4. Companies who haven't decided to support Linux yet can see > a real picture of what kind of business they're missing out on. > The invisible hand... > > 5. Companies in step #4 who want to develop a Linux strategy > have been introduced to an ally who can help them in their > quest. And if this leads to work, I know a list or two of > consultants who may be able to help us out... > > What do you folks think? Good idea. In one category, at least, there are two tools which may be very useful. Assessing whole systems (particularly laptops) is a crapshoot. You pretty much have to find out who's installed GNU/Linux on the same (or often: a similar) model. And then hand-tweak to get the thing up and running. Fortunately there are two tools which take a lot of the uncertainty out of this picture. One is bootable GNU/Linux systems with extensive hardware autodetection (e.g.: Knoppix). The other are tools to extract system capabilities and configuration, and dump this to a file. I've written one such of the latter, called system-info. There's a copy at http://twiki.wethey.org/twiki/bin/view/Main/SystemInfoScript, along with sample output. This still isn't fully sufficient, though it's a good start. Among other settings that would be useful: - Suspend/hibernation & APM settings. - hdparm configs. - X configuration and/or spec. Posting system specs and the output of system-info to a system review site would be a strong positive step, and puts a minimal load on the vendor (boot Knoppix, run script). I'd love to see someone run with this. Peace. -- Karsten M. Self http://kmself.home.netcom.com/ What Part of "Gestalt" don't you understand? "Life," said Marvin dolefully, "loathe it or ignore it, you can't like it." -- HHGTG _______________________________________________ linux-elitists http://zgp.org/mailman/listinfo/linux-elitists From chris.schafer at pnl.gov Wed Mar 26 17:23:00 2003 From: chris.schafer at pnl.gov (Schafer, Christopher L) Date: Wed Mar 26 17:23:00 2003 Subject: Support for supermicro 7501 based boards and issues with 3ware raid cards Message-ID: Linux BIOS Team, I was wondering if there is any active work on the above Supermicro boards and are there issues with accessing the 3ware raid controllers bios tools if one is using linux BIOS? Thanks, Chris Schafer From yann at yannouch.net Wed Mar 26 17:24:31 2003 From: yann at yannouch.net (Yann Poupet) Date: Wed Mar 26 17:24:31 2003 Subject: problem with PCHIPS M758LT+ Message-ID: <20030318184023.70c16937.yann@yannouch.net> Hi, my problems are not linuxbios specific, but since I wanted a linuxbios mobo, I've bought one from cwlinux and maybe one of you had the same problems. My mobo is a pcchips M758LT+, whith a sis630ET chipset. When I first plugged my hard disk to this mobo, the problems began. I had lot of HDD input/ouput errors (XFS on a 2.4.20-ck4 kernel), and finaly my HD seems to be dead... I've installed the latest ac patched kernel (2.4.21-pre5-ac3) which is supposed to have latest sis ide drivers, but I'm still having problem with my new HD (some stange sounds, some I/O errors on XFS and corrupts on ext2). The 630ET is supposed to be an ATA133 chipset, but the kernel recognized it as a Sis630 / ATA66 chipset (dmesg says 'SiS630 ATA 66 controller'). Is there still a problem with the drivers or are they fine for SIS630ET? Anyone has this mobo whith no problem? I don't want to play with the embedded Doc LinuxBios before I'm sure all's OK. 2nd problem (and last one). This chipset is supposed to embed a sound card. After some search on the net, I think it should be a sis7012 or 7018 chip. But my kernel can't find such a device (nothing in dmesg, nothing in lspci -vvv). I've activated it in the bios, but it's still invisible. Any experience with sound on this mobo? Thanks From root at hamburg.de Wed Mar 26 17:25:47 2003 From: root at hamburg.de (Felix Kloeckner) Date: Wed Mar 26 17:25:47 2003 Subject: new mainboard supported (elitegroup p6stp-fl) Message-ID: <20030319163343.A14357@synapse.pentanet> hello, i got linux linuxbios running on the p6stp-fl from elitegroup using the standard flashrom (no DoC). i successfully booted linux using etherboot i am wondering how to handle dll.inc, at the time i have to manually include it in northsouthbridge/sis/630/chipinit.inc, not the fine way... where can i put the config files, etc? elitegroup/p6stp-fl/ elitegroup/p6stp-fl/Config elitegroup/p6stp-fl/dll.inc elitegroup/p6stp-fl/STATUS elitegroup/p6stp-fl/irq_tables.c elitegroup/p6stp-fl/example.config elitegroup/p6stp-fl/mainboard.c elitegroup/p6stp-fl/no_reset.inc felix kloeckner From rodmur at amnh.org Wed Mar 26 17:27:11 2003 From: rodmur at amnh.org (Dale Harris) Date: Wed Mar 26 17:27:11 2003 Subject: IPMI support in Linux In-Reply-To: References: <20021019214515.A19785@mail.cwlinux.com> Message-ID: <20030320230958.GA500@amnh.org> On Sat, Oct 19, 2002 at 05:45:47PM +0000, Eric W. Biederman elucidated: > > Which part of IPMI. > > IPMI is a weird spec where all of the parts seem optional > that I have not seen on a stable production board. There is the > L440gx but I would not call that stable. So how do things look today? W.r.t IPMI and LinuxBIOS? Has much of anything changed? Is there anything in IPMI that I would need? LLNL has their powerman utilty which apparently only uses LinuxBIOS: http://www.llnl.gov/linux/powerman/ Heard that Tyan has a board 2721 that supports LinuxBIOS? Anybody know about that board? -- Dale Harris American Museum of Natural History Linux Cluster Admin. Div. of Invertebrate Zoology (212) 313-7538 Central Park West at 79th Street rodmur at amnh.org New York, NY 10024-5192 From ts1 at tsn.or.jp Wed Mar 26 17:28:51 2003 From: ts1 at tsn.or.jp (SONE Takeshi) Date: Wed Mar 26 17:28:51 2003 Subject: Config file/Rom image to Jetway B860t In-Reply-To: <60806512754.20030322221324@reactor.ru> References: <60806512754.20030322221324@reactor.ru> Message-ID: <20030323145922.GA17095@tsn.or.jp> On Sat, Mar 22, 2003 at 10:13:24PM +0300, Alexander Amelkin wrote: > Hello Ronald, > > Saturday, March 22, 2003, 1:21:12 AM, you wrote: > > RGM> On Fri, 21 Mar 2003, Ivan Gustavo wrote: > > >> Now is the problem, I do not know what file I need to use to write on my > >> BIOS, the romfile have up to 900k, and my eeprom is 256k like many > >> others... > > RGM> for that small part you can not use a linux kernel, you will have to use > RGM> etherboot. But etherboot works extremely well. > > Isn't it possible with EPIA to boot from a local IDE drive like with > m787cl+ ? Yes, it is possible. My EPIA successfully boots with BOOT_IDE. Now I'm trying to enable all RAM (now it's hardcoded to 64M), and get video. The only problem so far is that verify_loaded_image (elfboot.c) hangs up after loading kernel from IDE. I have not yet investigated this one but commented out that call and it's working ok. -- Takeshi From chrisw at lnxi.com Wed Mar 26 17:30:40 2003 From: chrisw at lnxi.com (Chris Worley) Date: Wed Mar 26 17:30:40 2003 Subject: Initializing an ATI Rage 128 Message-ID: <1048542070.8889.1317.camel@localhost.localdomain> I need to run X on a LinuxBIOS based machine, not for video output... just to use it's framebuffer to render images, and subsequently capture those images. The Virtual Framebuffer is an option, but is quite slow. Setting "ATI Rage128 display support" (CONFIG_FB_ATY128) doesn't help. /dev/fb0 doesn't exist, and X starts with: (II) ATI: ATI driver (version 6.3.6) for chipsets: ati, ativga (II) R128: Driver for ATI Rage 128 chipsets: ATI Rage 128 RE (PCI), ATI Rage 128 RF (AGP), ATI Rage 128 RG (AGP), ATI Rage 128 RK (PCI), ATI Rage 128 RL (AGP), ATI Rage 128 SM (AGP), ATI Rage 128 PR, ATI Rage 128 Pro PD (PCI), ATI Rage 128 Pro PF (AGP), ATI Rage 128 Pro ULTRA TF (AGP), ATI Rage 128 Pro ULTRA TL (AGP), ATI Rage 128 Pro ULTRA TR (AGP), ATI Rage 128 Mobility LE (PCI), ATI Rage 128 Mobility LF (AGP), ATI Rage 128 Mobility MF (AGP), ATI Rage 128 Mobility ML (AGP) (II) RADEON: Driver for ATI Radeon chipsets: ATI Radeon QD (AGP), ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP), ATI Radeon VE QY (AGP), ATI Radeon VE QZ (AGP), ATI Radeon Mobility LW (AGP), ATI Radeon Mobility LY (AGP), ATI Radeon Mobility LZ (AGP) (--) Assigning device section with no busID to primary device (EE) No devices detected. I can run with frame buffer settings, and get a "no screens found" error. The best reference I've found concerning video initialization was in the archive, from Ron Minnich: > Anybody: What's the recommended approach/reference/magic to getting video > going for LinuxBIOS. I'd like to get the on-chip video going on the VIA Epia > board - Hints appreciated. it depends. If you can get the chipset to init by knowing what to do, then do it in the northbridge code (if integrated) or in the mainboard code (if not integrated). If it is a Mystery Chip but you have a VGABIOS for it, try enabling linuxbios VGABIOS support and see if that turns it on. Otherwise you'll have to see if linux framebuffer support will do it, or the user-mode program we also have in freebios/utils. I'm guessing this means freebios/util/vgabios/testbios. With testbios, I need a file name, I'm guessing I need the BIOS binary. Where would I find the bios binary? Thanks, Chris -- Chris Worley Linux Networx From chrisw at lnxi.com Wed Mar 26 17:32:21 2003 From: chrisw at lnxi.com (Chris Worley) Date: Wed Mar 26 17:32:21 2003 Subject: Initializing an ATI Rage 128 In-Reply-To: <1048542070.8889.1317.camel@localhost.localdomain> References: <1048542070.8889.1317.camel@localhost.localdomain> Message-ID: <1048546649.8898.1460.camel@localhost.localdomain> I need to run X on a LinuxBIOS based machine, not for video output... just to use it's framebuffer to render images, and subsequently capture those images. The Virtual Framebuffer is an option, but is quite slow. Setting "ATI Rage128 display support" (CONFIG_FB_ATY128) doesn't help. /dev/fb0 doesn't exist, and X starts with: (II) ATI: ATI driver (version 6.3.6) for chipsets: ati, ativga (II) R128: Driver for ATI Rage 128 chipsets: ATI Rage 128 RE (PCI), ATI Rage 128 RF (AGP), ATI Rage 128 RG (AGP), ATI Rage 128 RK (PCI), ATI Rage 128 RL (AGP), ATI Rage 128 SM (AGP), ATI Rage 128 PR, ATI Rage 128 Pro PD (PCI), ATI Rage 128 Pro PF (AGP), ATI Rage 128 Pro ULTRA TF (AGP), ATI Rage 128 Pro ULTRA TL (AGP), ATI Rage 128 Pro ULTRA TR (AGP), ATI Rage 128 Mobility LE (PCI), ATI Rage 128 Mobility LF (AGP), ATI Rage 128 Mobility MF (AGP), ATI Rage 128 Mobility ML (AGP) (II) RADEON: Driver for ATI Radeon chipsets: ATI Radeon QD (AGP), ATI Radeon QE (AGP), ATI Radeon QF (AGP), ATI Radeon QG (AGP), ATI Radeon VE QY (AGP), ATI Radeon VE QZ (AGP), ATI Radeon Mobility LW (AGP), ATI Radeon Mobility LY (AGP), ATI Radeon Mobility LZ (AGP) (--) Assigning device section with no busID to primary device (EE) No devices detected. I can run with frame buffer settings, and get a "no screens found" error. The best reference I've found concerning video initialization was in the archive, from Ron Minnich: > Anybody: What's the recommended approach/reference/magic to getting video > going for LinuxBIOS. I'd like to get the on-chip video going on the VIA Epia > board - Hints appreciated. it depends. If you can get the chipset to init by knowing what to do, then do it in the northbridge code (if integrated) or in the mainboard code (if not integrated). If it is a Mystery Chip but you have a VGABIOS for it, try enabling linuxbios VGABIOS support and see if that turns it on. Otherwise you'll have to see if linux framebuffer support will do it, or the user-mode program we also have in freebios/utils. I'm guessing this means freebios/util/vgabios/testbios. With testbios, I need a file name, I'm guessing I need the BIOS binary. Where would I find the bios binary? Thanks, Chris From rminnich at lanl.gov Wed Mar 26 17:35:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 26 17:35:00 2003 Subject: Support for supermicro 7501 based boards and issues with 3ware raid cards In-Reply-To: Message-ID: On Fri, 14 Mar 2003, Schafer, Christopher L wrote: > I was wondering if there is any active work on the above Supermicro > boards and are there issues with accessing the 3ware raid controllers > bios tools if one is using linux BIOS? I don't have these but 7501 is supported nowadays. Have not tested this board. ron From rminnich at lanl.gov Wed Mar 26 17:48:00 2003 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Mar 26 17:48:00 2003 Subject: Initializing an ATI Rage 128 In-Reply-To: <1048542070.8889.1317.camel@localhost.localdomain> Message-ID: I have to try to remember how to use testbios :-) I think that you can give it a file which is the vga bios and it will go try to init the card. You can get the vga bios off the card using dumpdevmem on the appropriate flash part. Let me try to remember some more and I'll get back to you. We're starting the vga project up again this summer, hope to get further along. ron From pyro at linuxlabs.com Wed Mar 26 17:53:01 2003 From: pyro at linuxlabs.com (steven james) Date: Wed Mar 26 17:53:01 2003 Subject: Support for supermicro 7501 based boards and issues with 3ware raid cards In-Reply-To: Message-ID: Greetings, The 7501 chipset is supported, but the setup will probably need some tweaking for the Supermicro. Currently, it's for Intel Clearwater (se7501sw2). The 2Ware BIOS tools will likely not work under LinuxBIOS. Are they actually necessary, or just a convieniance (I've not worked with it)? G'day, sjames On Fri, 14 Mar 2003, Schafer, Christopher L wrote: > Linux BIOS Team, > > I was wondering if there is any active work on the above Supermicro > boards and are there issues with accessing the 3ware raid controllers > bios tools if one is using linux BIOS? > > Thanks, > > Chris Schafer > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From garlick at llnl.gov Wed Mar 26 18:10:01 2003 From: garlick at llnl.gov (Jim Garlick) Date: Wed Mar 26 18:10:01 2003 Subject: IPMI support in Linux In-Reply-To: <20030320230958.GA500@amnh.org> Message-ID: On Thu, 20 Mar 2003, Dale Harris wrote: > On Sat, Oct 19, 2002 at 05:45:47PM +0000, Eric W. Biederman elucidated: > > > > Which part of IPMI. > > > > IPMI is a weird spec where all of the parts seem optional > > that I have not seen on a stable production board. There is the > > L440gx but I would not call that stable. > > So how do things look today? W.r.t IPMI and LinuxBIOS? Has much of > anything changed? Is there anything in IPMI that I would need? LLNL > has their powerman utilty which apparently only uses LinuxBIOS: > > http://www.llnl.gov/linux/powerman/ > > > Heard that Tyan has a board 2721 that supports LinuxBIOS? Anybody know > about that board? Dale, not sure exactly what you're after here, but powerman has no connection with LinuxBIOS or IPMI. It manages external remote power control devices (power strips with ethernet connections). Jim From rodmur at maybe.org Wed Mar 26 19:21:00 2003 From: rodmur at maybe.org (Dale Harris) Date: Wed Mar 26 19:21:00 2003 Subject: IPMI support in Linux In-Reply-To: References: <20030320230958.GA500@amnh.org> Message-ID: <20030327004916.GF29483@maybe.org> On Wed, Mar 26, 2003 at 03:38:09PM -0800, Jim Garlick elucidated: > > Dale, not sure exactly what you're after here, but powerman has no connection > with LinuxBIOS or IPMI. It manages external remote power control devices > (power strips with ethernet connections). > > Jim Hi Jim, Well, I'm probably just being stupid, to put it frankly. Basically I was wondering what power on/off functionality LinuxBIOS has, or if it can use IPMI. There have been updated drivers added the kernel in the pass couple of months for IPMI, I assume that could be used by LinuxBIOS to access that functionality on those boards that support IPMI. I was mainly curious if anyone had been doing any development in those areas. My disconnect on powerman was just my failure to RTFM. Sorry, for any confusion. ;-) Dale From rminnich at internet.cybermesa.com Wed Mar 26 21:39:01 2003 From: rminnich at internet.cybermesa.com (Ronald Minnich) Date: Wed Mar 26 21:39:01 2003 Subject: (no subject) Message-ID: testing From rminnich at lanl.gov Wed Mar 26 21:48:01 2003 From: rminnich at lanl.gov (ron minnich) Date: Wed Mar 26 21:48:01 2003 Subject: (no subject) In-Reply-To: Message-ID: Sorry about that guys I have just moved email and wanted to see if I was dropping any messages from the list. ron From pyro at linuxlabs.com Thu Mar 27 05:20:01 2003 From: pyro at linuxlabs.com (steven james) Date: Thu Mar 27 05:20:01 2003 Subject: Support for supermicro 7501 based boards and issues with 3ware raid cards In-Reply-To: Message-ID: Greetings, It may be possible to do something with ADLO to get the BIOS tools working. Something to watch out for will be the detection and initialization of an existing raid on boot. If BIOS on the card is doing that, it won't work in LinuxBIOS without an ADLO (or similar) solution. I have delt with Promise fastraid under LinuxBIOS, but the best solution there was to mod the kernel driver to make it be a JBOD and use the Linux md driver for RAID. Is the 3Ware genuine hardware RAID, or is it a softraid solution? G'day, sjames On Wed, 26 Mar 2003, Schafer, Christopher L wrote: > Unfortunatally it is the only way to build raid arrays on the controllers. You can recover arrays from the os but not build them. > > I will contact 3ware and see what they think... > > Thanks > > -----Original Message----- > From: steven james [mailto:pyro at linuxlabs.com] > Sent: Wed 3/26/2003 3:20 PM > To: Schafer, Christopher L > Cc: linuxbios at clustermatic.org > Subject: Re: Support for supermicro 7501 based boards and issues with 3ware raid cards > > Greetings, > > The 7501 chipset is supported, but the setup will probably need some > tweaking for the Supermicro. Currently, it's for Intel Clearwater > (se7501sw2). > > The 2Ware BIOS tools will likely not work under LinuxBIOS. Are they > actually necessary, or just a convieniance (I've not worked with it)? > > G'day, > sjames > > > > On Fri, 14 Mar 2003, Schafer, Christopher L wrote: > > > Linux BIOS Team, > > > > I was wondering if there is any active work on the above Supermicro > > boards and are there issues with accessing the 3ware raid controllers > > bios tools if one is using linux BIOS? > > > > Thanks, > > > > Chris Schafer > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From ebiederman at lnxi.com Thu Mar 27 06:06:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Thu Mar 27 06:06:01 2003 Subject: Support for supermicro 7501 based boards and issues with 3ware raid cards In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > It may be possible to do something with ADLO to get the BIOS tools > working. > > Something to watch out for will be the detection and initialization of an > existing raid on boot. If BIOS on the card is doing that, it won't work in > LinuxBIOS without an ADLO (or similar) solution. > > I have delt with Promise fastraid under LinuxBIOS, but the best solution > there was to mod the kernel driver to make it be a JBOD and use the Linux > md driver for RAID. > > Is the 3Ware genuine hardware RAID, or is it a softraid solution? Generally what I have seen is that real hardware raid solutions are not just x86 only, and they work under LinuxBIOS. Because they do not need the x86 BIOS. For IDE raid I have not heard that those are actually real hardware raid. For an onboard controller even an ADLO type solution will be insufficient because installing LinuxBIOS will kill the option Rom. Basically it is a matter of getting it to work under Linux without needing an option Rom. And for scsi that has not been a problem. Eric From ebiederman at lnxi.com Thu Mar 27 06:45:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Thu Mar 27 06:45:01 2003 Subject: Support for supermicro 7501 based boards and issues with 3ware raid cards In-Reply-To: References: Message-ID: steven james writes: > Greetings, > > The 7501 chipset is supported, but the setup will probably need some > tweaking for the Supermicro. Currently, it's for Intel Clearwater > (se7501sw2). The E7501 chipset code does not work in a general fashion. We have a working supermicro board here as well. But it only works when the right set of magic values are hard coded into some undocumented registers at the moment. We are still tracking this down. Steven the code you put in the tree misses a few places that need to be changed to properly support the 133Mhz memory clock. So in short the E7501 support is almost there and but it needs just a little bit more work. We are after Intel to get documentation on their last couple of registers and if all else fails we can attempt to reverse engineer them. We shall see how that goes. Eric From aip at cwlinux.com Thu Mar 27 08:13:00 2003 From: aip at cwlinux.com (Andrew Ip) Date: Thu Mar 27 08:13:00 2003 Subject: problem with PCHIPS M758LT+ In-Reply-To: <20030318184023.70c16937.yann@yannouch.net>; from Yann Poupet on Tue, Mar 18, 2003 at 06:40:23PM +0100 References: <20030318184023.70c16937.yann@yannouch.net> Message-ID: <20030327214051.A9409@mail.cwlinux.com> Yann, > When I first plugged my hard disk to this mobo, the problems began. I had lot of HDD input/ouput errors (XFS on a 2.4.20-ck4 kernel), and finaly my HD seems to be dead... I've installed the latest ac patched kernel (2.4.21-pre5-ac3) which is supposed to have latest sis ide drivers, but I'm still having problem with my new HD (some stange sounds, some I/O errors on XFS and corrupts on ext2). The 630ET is supposed to be an ATA133 chipset, but the kernel recognized it as a Sis630 / ATA66 chipset (dmesg says 'SiS630 ATA 66 controller'). Is there still a problem with the drivers or are they fine for SIS630ET? Anyone has this mobo whith no problem? I don't have any problem with the IDE. Have you tried different HD? > 2nd problem (and last one). This chipset is supposed to embed a sound card. After some search on the net, I think it should be a sis7012 or 7018 chip. But my kernel can't find such a device (nothing in dmesg, nothing in lspci -vvv). I've activated it in the bios, but it's still invisible. Any experience with sound on this mobo? Try # modprobe cmpci -Andrew -- Andrew Ip Email: aip at cwlinux.com Tel: (852) 2542 2046 Fax: (852) 2542 2036 Mobile: (852) 9201 9866 Cwlinux Limited Unit 202B 2/F Lai Cheong Factory Building, 479-479A Castle Peak Road, Lai Chi Kok, Kowloon, Hong Kong. Tel: (852)2542 2046 Fax: (852)2542 2036 For public pgp key, please obtain it from http://www.keyserver.net/en. From pyro at linuxlabs.com Thu Mar 27 09:43:01 2003 From: pyro at linuxlabs.com (steven james) Date: Thu Mar 27 09:43:01 2003 Subject: Support for supermicro 7501 based boards and issues with 3ware raid cards In-Reply-To: Message-ID: Greetings, It may be possible to do something with the sg interface to get the setup. If they also have a dos based utility, a wide open (permissive) dosemu session could be worth looking into as well. G'day, sjames On Thu, 27 Mar 2003, Schafer, Christopher L wrote: > The device is hardware raid upto 12 drives. Presents a SCSI device to the driver/kernel. > > > -- -------------------------steven james, director of research, linux labs ... ........ ..... .... 230 peachtree st nw ste 2701 the original linux labs atlanta.ga.us 30303 -since 1995 http://www.linuxlabs.com office 404.577.7747 fax 404.577.7743 ----------------------------------------------------------------------- From charliesong at concordidea.com Thu Mar 27 10:12:01 2003 From: charliesong at concordidea.com (Charlie Song) Date: Thu Mar 27 10:12:01 2003 Subject: Why cann't I read SPD for SiS 745 chipset? Message-ID: <072e01c2f477$96241d70$b21ea8c0@charliesong> Hello, I'm trying to read SPD of DIMM on a motherboard with SiS745 chipset. But I cann't read it. I've checked the ACPI enable bit. It is 0xD8. The ACPI Base Address is 0xE400. Can anyone help me to fix the problem ? Thanks, Charlie -------------- next part -------------- An HTML attachment was scrubbed... URL: From steve at nexpath.com Thu Mar 27 10:41:00 2003 From: steve at nexpath.com (Steve Gehlbach) Date: Thu Mar 27 10:41:00 2003 Subject: small c compiler status... In-Reply-To: References: Message-ID: <3E8323DB.8010609@nexpath.com> Eric W. Biederman wrote: > My tentative name for the compiler is romcc. If anyone has a better > one I'm all ears. So far romcc is the only name I have thought of > that someone else isn't already using. > Great to hear this is coming along, look forward to giving it a try. romcc works for me. -Steve From bos at serpentine.com Thu Mar 27 11:43:00 2003 From: bos at serpentine.com (Bryan O'Sullivan) Date: Thu Mar 27 11:43:00 2003 Subject: Support for supermicro 7501 based boards and issues with 3ware raid cards In-Reply-To: References: Message-ID: <1048785060.8641.1.camel@serpentine.internal.keyresearch.com> On Thu, 2003-03-27 at 02:48, steven james wrote: > Is the 3Ware genuine hardware RAID, or is it a softraid solution? 3ware cards are hardware RAID cards, yes. In addition, you don't need to go through the 3ware BIOS to manage them; 3ware ships both a web-based management tool and a command-line tool. At worst (if you want to use the controller as a boot device), you end up doing a network or CD-ROM boot, setting up the controller and installing an OS, then booting off the controller. References: <3E80B84F.40700@manoweb.com> Message-ID: <3E8332E0.7020103@nexpath.com> Alessio Sangalli wrote: > I load the sis900 module or I compile it into the kernel, but the > performances are incredibly low: if I transfer a huge file, the transfer > starts at 5MB/s more or less, but after few seconds it drammatically > drops to 60KB/s. I would need more that two hours to transfer an ISO image. > > > I'm using kernel 2.4.20, pcchips810lmr with 256MB memory and athlon2000+... > I tried a 954MB (ls -lh) file on pcchips 787cl+ (sis900, via C3, 320Mb ram), and it took 22:20 using scp, no compression. Since I have a 10baseT network, using ssh, and other traffic, this seems about right (700+ kb/sec). Kernel is 2.4.18, sis900 driver v1.08.02. -Steve From alesan at manoweb.com Thu Mar 27 14:04:00 2003 From: alesan at manoweb.com (Alessio Sangalli) Date: Thu Mar 27 14:04:00 2003 Subject: semi-ot: sis900 lan support In-Reply-To: <3E8332E0.7020103@nexpath.com> References: <3E80B84F.40700@manoweb.com> <3E8332E0.7020103@nexpath.com> Message-ID: <3E83512C.5010902@manoweb.com> Steve Gehlbach wrote: > > I tried a 954MB (ls -lh) file on pcchips 787cl+ (sis900, via C3, 320Mb > ram), and it took 22:20 using scp, no compression. Since I have a > 10baseT network, using ssh, and other traffic, this seems about right > (700+ kb/sec). Kernel is 2.4.18, sis900 driver v1.08.02. Is it possible to force the network at 10Mbps even if there is a 100Mbps capable cable? bye as -- How to build a lirc receiver http://www.manoweb.com/alesan/lirc From stuge-linuxbios at cdy.org Thu Mar 27 15:48:00 2003 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Thu Mar 27 15:48:00 2003 Subject: semi-ot: sis900 lan support In-Reply-To: <3E83512C.5010902@manoweb.com> References: <3E80B84F.40700@manoweb.com> <3E8332E0.7020103@nexpath.com> <3E83512C.5010902@manoweb.com> Message-ID: <20030327210916.GI7817@foo.birdnet.se> On Thu, Mar 27, 2003 at 08:29:48PM +0100, Alessio Sangalli wrote: > Steve Gehlbach wrote: > > > >I tried a 954MB (ls -lh) file on pcchips 787cl+ (sis900, via C3, 320Mb > >ram), and it took 22:20 using scp, no compression. Since I have a > >10baseT network, using ssh, and other traffic, this seems about right > >(700+ kb/sec). Kernel is 2.4.18, sis900 driver v1.08.02. > > Is it possible to force the network at 10Mbps even if there is a 100Mbps > capable cable? Sure: mii-tool -F 10baseT-HD eth0 (for half duplex) mii-tool -h for more options. //Peter From ollie at sis.com.tw Thu Mar 27 20:47:01 2003 From: ollie at sis.com.tw (ollie lho) Date: Thu Mar 27 20:47:01 2003 Subject: Why cann't I read SPD for SiS 745 chipset? In-Reply-To: <072e01c2f477$96241d70$b21ea8c0@charliesong> References: <072e01c2f477$96241d70$b21ea8c0@charliesong> Message-ID: <1048816444.7266.0.camel@ollie> On Thu, 2003-03-27 at 23:43, Charlie Song wrote: > Hello, > > I'm trying to read SPD of DIMM on a motherboard with SiS745 chipset. > But I cann't read it. I've checked the ACPI enable bit. It is 0xD8. > The ACPI Base Address is 0xE400. > > Can anyone help me to fix the problem ? do you have the register spec for 745 ? What program do you use to read the SPD ? -- ollie lho From rminnich at lanl.gov Thu Mar 27 22:04:00 2003 From: rminnich at lanl.gov (ron minnich) Date: Thu Mar 27 22:04:00 2003 Subject: flash_rom patches. Message-ID: I have finally finished a bunch of paperwork exercise here at the Lab and can now work on linuxbios again :-) I have applied and committed the flash_rom patches you sent. Will the person who recently sent me the new motherboard patches please resend ... I lost them. :-( Nice to be back doing something technical ... ron From ivan at munix.com.br Fri Mar 28 06:25:01 2003 From: ivan at munix.com.br (Ivan Gustavo) Date: Fri Mar 28 06:25:01 2003 Subject: Information about BIOS and the boot process Message-ID: <3E855D2A.102@munix.com.br> I am writing some code to fixup the video chipset trident cyberblade and V1621 RGB->CS encoder , and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so I am looking for information about the real bios process, and about the layout of the common bios files, and of course, any information about bios as possible. My main problem is to find good documentation about the post, the boot process. I read on some places which the CS is set F000 and EIP FFF0, so in other websites I had seen CS is FFF0, in other 000F , causing some confusion with me. I need some documentation about 20bits addressing lines, and the GATE A20 function also. Tanks in advance. From dkotian3 at vsnl.net Fri Mar 28 07:58:00 2003 From: dkotian3 at vsnl.net (dkotian3 at vsnl.net) Date: Fri Mar 28 07:58:00 2003 Subject: Information about BIOS and the boot process Message-ID: <20030328140034.B85734FDFD@bom6.vsnl.net.in> An embedded and charset-unspecified text was scrubbed... Name: not available URL: From ts1 at cma.co.jp Fri Mar 28 08:21:01 2003 From: ts1 at cma.co.jp (SONE Takeshi) Date: Fri Mar 28 08:21:01 2003 Subject: Information about BIOS and the boot process In-Reply-To: <3E855D2A.102@munix.com.br> References: <3E855D2A.102@munix.com.br> Message-ID: <20030328134905.GB7829@cma.co.jp> On Sat, Mar 29, 2003 at 08:45:30AM +0000, Ivan Gustavo wrote: > I am writing some code to fixup the video chipset trident > cyberblade and V1621 RGB->CS encoder , > and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so I will really appreciate that work. > I read on some places which the CS is set F000 and EIP FFF0, so > in other websites I had seen CS is FFF0, > in other 000F , causing some confusion with me. CPU starts with last 16 byte of address space. On a 386 or later it's FFFFFFF:0000?? Anyway that does not really matter since the code there is a simple long jump (jmp seg:off). -- Takeshi From rminnich at lanl.gov Fri Mar 28 08:57:01 2003 From: rminnich at lanl.gov (ron minnich) Date: Fri Mar 28 08:57:01 2003 Subject: Information about BIOS and the boot process In-Reply-To: <20030328140034.B85734FDFD@bom6.vsnl.net.in> Message-ID: On Fri, 28 Mar 2003 dkotian3 at vsnl.net wrote: > Agreed, I am also looking for a good documention. > Atleast the flow in terms of implemented functions > or assembly code and some kind of Do's and Dont's > if any. Until the architecture of the system started to stabilize this was hard. It is still hard due to some changes coming up. I'll try to write something in the next while .... oh if only Frame would run under Crossover Office this would be so much easier ... ron From rminnich at lanl.gov Fri Mar 28 08:58:59 2003 From: rminnich at lanl.gov (ron minnich) Date: Fri Mar 28 08:58:59 2003 Subject: Information about BIOS and the boot process In-Reply-To: <20030328134905.GB7829@cma.co.jp> Message-ID: On Fri, 28 Mar 2003, SONE Takeshi wrote: > CPU starts with last 16 byte of address space. > On a 386 or later it's FFFFFFF:0000?? CPU starts out in "big real mode" at 0xffff0000, and most BIOSes (linuxbios too) do a jump cs:ip to 0xf000:0x0, which pops the CPU into the old 8086 real mode. kron From stepan at suse.de Fri Mar 28 09:02:01 2003 From: stepan at suse.de (Stefan Reinauer) Date: Fri Mar 28 09:02:01 2003 Subject: Information about BIOS and the boot process In-Reply-To: <20030328134905.GB7829@cma.co.jp> References: <3E855D2A.102@munix.com.br> <20030328134905.GB7829@cma.co.jp> Message-ID: <20030328143028.GA1269@suse.de> * SONE Takeshi [030328 14:49]: > On Sat, Mar 29, 2003 at 08:45:30AM +0000, Ivan Gustavo wrote: > > I read on some places which the CS is set F000 and EIP FFF0, so > > in other websites I had seen CS is FFF0, > > in other 000F , causing some confusion with me. > > CPU starts with last 16 byte of address space. > On a 386 or later it's FFFFFFF:0000?? > Anyway that does not really matter since the code there is a simple > long jump (jmp seg:off). Even i386+ CPUs come up in 16bit mode, so it is F000:FFF0 (setting the 64k segment to F0000-FFFFF and having the entry point 16 bytes before the end of this segment Stefan Best regards, Stefan Reinauer -- The use of COBOL cripples the mind; its teaching should, therefore, be regarded as a criminal offense. -- E. W. Dijkstra From ivan at munix.com.br Fri Mar 28 11:10:01 2003 From: ivan at munix.com.br (Ivan Gustavo) Date: Fri Mar 28 11:10:01 2003 Subject: Information about BIOS and the boot process References: Message-ID: <3E85527B.5040402@munix.com.br> ron minnich wrote: >On Fri, 28 Mar 2003, SONE Takeshi wrote: > > > >>CPU starts with last 16 byte of address space. >>On a 386 or later it's FFFFFFF:0000?? >> >> > >CPU starts out in "big real mode" at 0xffff0000, > Tanks :) But, other ask... Ok , the CS point to the last accessible segment, and IP to the last addess less 16 bytes... What I do not understand is, how the bios data go to there (may be funny to you, so I dont find nothing documentation about)... I ask it because a common bios have 256k and the segment which the processor point is 752Kbytes far... ... so I guess I am not imagining right. >and most BIOSes (linuxbios too) do a jump cs:ip to 0xf000:0x0, which pops the CPU into the >old 8086 real mode. > >kron > > > > > -- Ivan Gustavo Munix dos Santos ----------------------------- http://www.munix.com.br mailto:ivan at munix.com.br Skydental SJC. Av. Heitor Vila lobos, 1565 Fone: 12-39232925 Ramal 215 Sao Jose Dos Campos - SP From ivan at munix.com.br Fri Mar 28 11:20:01 2003 From: ivan at munix.com.br (Ivan Gustavo) Date: Fri Mar 28 11:20:01 2003 Subject: Wrong documentation info Message-ID: <3E85547E.9070508@munix.com.br> At the EPIA HOWTO have a sample declaration to the etherboot config file like below: Comment out the following line(s) :- CFLAGS32+= -DPCIBIOS Uncomment the following line(s) :- #CFLAGS32+= -DLINUXBIOS -DCONFIG_TSC_CURTICKS -DCONSOLE_SERIAL \ -DCOMCONSOLE=0x3f8 -DCOMPRESERVE -DCONFIG_PCI_DIRECT \ -DELF_IMAGE Look the -DCONFIG_TSC_CURTICKS , anybody have it wrotte wrong ? the right is CONFIG_TSC_CURRTICKS . Also for the version 5.0.9 of the etherboot, I needed to use -DPCBIOS and added the pcbios.S object file for include the int15() object code to make the compilation susseful. Rgds. -- Ivan Gustavo Munix dos Santos ----------------------------- http://www.munix.com.br mailto:ivan at munix.com.br Skydental SJC. Av. Heitor Vila lobos, 1565 Fone: 12-39232925 Ramal 215 Sao Jose Dos Campos - SP From gwatson at lanl.gov Fri Mar 28 11:28:00 2003 From: gwatson at lanl.gov (Greg Watson) Date: Fri Mar 28 11:28:00 2003 Subject: Information about BIOS and the boot process In-Reply-To: <20030328140034.B85734FDFD@bom6.vsnl.net.in> References: <20030328140034.B85734FDFD@bom6.vsnl.net.in> Message-ID: Other people probably know much more about this than me, but here's my experience. There seem to be two main parts to linuxbios. The first is arch/{arch}/config/ctr0.base which does the very low level initialization, like turning on memory, etc. The second is arch/{arch}/lib/c_start.S which does whatever else is necessary to call the C function hardwaremain(). hardwaremain() then does whatever else is necessary to load linux. c_start.S is linked with linuxbios.a, a library containing generic support routines (those found in the lib directory) and anything specified using the 'object' directive in a Config file (and other stuff). The resultant 'executable' is called linuxbios_c. The loader script used to link linuxbios_c is config/linuxbios_c.ld, and is configured to be loaded relative to _RAMBASE. crt0.base is not linked against anything. Any additional assembly routines you need must be specified using the 'mainboardinit' directive in a Config file. This causes the specified assembly file to be added to "crt0_includes.h" which is in turn included at the start of crt0.base (or at the end in the case of the ppc version). The loader script used to link crt0.base is in arch/{arch}/config/ldscript.base. The resultant 'executable' is called linuxbios and will be loaded at _ROMBASE. The tricky thing is that this loader script will also load the linuxbios_c 'executable' at a location called _payload in this file. The main task of crt0.base is then to initialize enough hardware so that this payload can be copied from rom into ram (which may also involve uncompressing code). Then control is transferred to _start, which is the first location in linuxbios_c. To get an idea of how crt0.base works, look at the following files. This is the order of execution specified by the configuration file for sis735. cpu/i386/entry16.inc cpu/i386/entry32.inc superio/sis/950/setup_serial.inc pc80/serial.inc arch/i386/lib/console.inc cpu/k7/earlymtrr.inc northsouthbridge/sis/735/raminit.inc arch/i386/config/crt0.base Next look at c_start.S which will show you what happens once control is transferred to _start. Finally, look at arch/{arch}/lib/hardwaremain.c to see what other stuff is done to get linux loaded. Most other files are specific to particular hardware, so it can be pretty confusing to just browse the tree. Hope this helps, Greg At 7:00 PM +0500 3/28/03, dkotian3 at vsnl.net wrote: >Agreed, I am also looking for a good documention. >Atleast the flow in terms of implemented functions >or assembly code and some kind of Do's and Dont's >if any. >One good advantage would be more and more people >would be easily aware about the code architecture and >would get invovled in LinuxBIOS if one is interested. > > > >ivan at munix.com.br wrote > I am writing some code to fixup the video chipset trident >cyberblade and V1621 RGB->CS encoder , >and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so >I am looking for information >about the real bios process, and about the layout of the common bios >files, and of course, any information >about bios as possible. > >My main problem is to find good documentation about the post, the boot >process. > > I read on some places which the CS is set F000 and EIP FFF0, so >in other websites I had seen CS is FFF0, > in other 000F , causing some confusion with me. > >I need some documentation about 20bits addressing lines, and the GATE >A20 function also. > >Tanks in advance. > > >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios > >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios From dkotian3 at vsnl.net Fri Mar 28 12:53:01 2003 From: dkotian3 at vsnl.net (Deepak Kotian) Date: Fri Mar 28 12:53:01 2003 Subject: Information about BIOS and the boot process References: Message-ID: <000401c2f556$d72ae3a0$393e41db@vsnl.net> Thanks Ron. The documentation would do a lot of good to many in the forum for the new comers (including me) Lot of queries should get resolved automatically. The cvs seems to have support of lot of motherboards now, but I guess, the knowledge/experience seems to be with the one who have supported those boards only. If the implementator of LinuxBIOS for the respective motherboard spends even 8/10 hours to produce a document of his flow or Design, it would benefit a lot. To start with, If not very formal,atleast informal documentations can be shared in the cvs from everyone or somewhere else on the site. Based on the various documentation , may be a good document could be produced and shared easily. These are just suggestions, there may be better way or means to do it though. Regards Deepak ----- Original Message ----- From: "ron minnich" To: Cc: ; Sent: Friday, March 28, 2003 7:55 PM Subject: Re: Information about BIOS and the boot process > On Fri, 28 Mar 2003 dkotian3 at vsnl.net wrote: > > > Agreed, I am also looking for a good documention. > > Atleast the flow in terms of implemented functions > > or assembly code and some kind of Do's and Dont's > > if any. > > Until the architecture of the system started to stabilize this was hard. > It is still hard due to some changes coming up. I'll try to write > something in the next while .... > > oh if only Frame would run under Crossover Office this would be so much > easier ... > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From charliesong at concordidea.com Fri Mar 28 13:02:00 2003 From: charliesong at concordidea.com (Charlie Song) Date: Fri Mar 28 13:02:00 2003 Subject: Why cann't I read SPD for SiS 745 chipset? References: <072e01c2f477$96241d70$b21ea8c0@charliesong> <1048816444.7266.0.camel@ollie> Message-ID: <0a1801c2f558$642b6d50$b21ea8c0@charliesong> Ollie, I don't have the register spec for 745. I just refered from 735. What's different for ACPI enable and address between 745 and 735? I'm working on a ASUS motherboard - A7S333 to try to read SPD of the DIMM for memory test purpose. Could you help me to find a way to realize that? Thanks, Charlie ----- Original Message ----- From: "ollie lho" To: "Charlie Song" Cc: "LinuxBIOS Mailing List" Sent: Thursday, March 27, 2003 8:54 PM Subject: Re: Why cann't I read SPD for SiS 745 chipset? > On Thu, 2003-03-27 at 23:43, Charlie Song wrote: > > Hello, > > > > I'm trying to read SPD of DIMM on a motherboard with SiS745 chipset. > > But I cann't read it. I've checked the ACPI enable bit. It is 0xD8. > > The ACPI Base Address is 0xE400. > > > > Can anyone help me to fix the problem ? > > do you have the register spec for 745 ? What program do you use to > read the SPD ? > > -- > ollie lho From ivan at munix.com.br Fri Mar 28 13:13:01 2003 From: ivan at munix.com.br (Ivan Gustavo) Date: Fri Mar 28 13:13:01 2003 Subject: Information about BIOS and the boot process References: <000401c2f556$d72ae3a0$393e41db@vsnl.net> Message-ID: <3E856F47.90009@munix.com.br> I will be happy to help in anything if need. I think the same, with the documentation work distributed, a group can analyse and check if is nothing wrong, doing a CVS area for the revised documentation. Regds. Deepak Kotian wrote: >Thanks Ron. The documentation would do a lot of good to >many in the forum for the new comers (including >me) >Lot of queries should get resolved automatically. > >The cvs seems to have support of lot of motherboards now, but I guess, >the knowledge/experience seems to be with the one who have supported >those boards only. >If the implementator of LinuxBIOS for the respective motherboard >spends even 8/10 hours to produce a document of his flow or Design, >it would benefit a lot. To start with, If not very formal,atleast informal >documentations can be shared in the cvs from everyone or somewhere >else on the site. Based on the various documentation , may be a good >document could be produced and shared easily. > >These are just suggestions, there may be better way or means to do it >though. > >Regards >Deepak > > From rminnich at lanl.gov Fri Mar 28 13:21:02 2003 From: rminnich at lanl.gov (ron minnich) Date: Fri Mar 28 13:21:02 2003 Subject: Why cann't I read SPD for SiS 745 chipset? In-Reply-To: <0a1801c2f558$642b6d50$b21ea8c0@charliesong> Message-ID: On Fri, 28 Mar 2003, Charlie Song wrote: > I'm working on a ASUS motherboard - A7S333 to try to read SPD of the DIMM > for memory test purpose. Could you help me to find a way to realize that? uh oh, ASUS. They have a habit of making TWO I2C busses, and one is used for SPD. You have to figure out how to turn that on. See the ASUS CUA port for an example. ron From rminnich at lanl.gov Fri Mar 28 13:28:20 2003 From: rminnich at lanl.gov (ron minnich) Date: Fri Mar 28 13:28:20 2003 Subject: Information about BIOS and the boot process In-Reply-To: <3E856F47.90009@munix.com.br> Message-ID: btw, don't forget make documentation when you have built a target. If you want to fix the comments on the functions, we'll take the patches. ron From dkotian3 at vsnl.net Fri Mar 28 14:20:01 2003 From: dkotian3 at vsnl.net (Deepak Kotian) Date: Fri Mar 28 14:20:01 2003 Subject: Information about BIOS and the boot process Message-ID: <001f01c2f562$ed1e9600$353e41db@vsnl.net> Thanks Ron. The documentation would do a lot of good to many in the forum for the new comers (including me) Lot of queries should get resolved automatically. The cvs seems to have support of lot of motherboards now, but I guess, the knowledge/experience seems to be with the one who have supported those boards only. If the implementator of LinuxBIOS for the respective motherboard spends even 8/10 hours to produce a document of his flow or Design, it would benefit a lot. To start with, If not very formal,atleast informal documentations can be shared in the cvs from everyone or somewhere else on the site. Based on the various documentation , may be a good document could be produced and shared easily. These are just suggestions, there may be better way or means to do it though. Regards Deepak ----- Original Message ----- From: "ron minnich" To: Cc: ; Sent: Friday, March 28, 2003 7:55 PM Subject: Re: Information about BIOS and the boot process > On Fri, 28 Mar 2003 dkotian3 at vsnl.net wrote: > > > Agreed, I am also looking for a good documention. > > Atleast the flow in terms of implemented functions > > or assembly code and some kind of Do's and Dont's > > if any. > > Until the architecture of the system started to stabilize this was hard. > It is still hard due to some changes coming up. I'll try to write > something in the next while .... > > oh if only Frame would run under Crossover Office this would be so much > easier ... > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From stuge-linuxbios at cdy.org Fri Mar 28 14:46:00 2003 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Fri Mar 28 14:46:00 2003 Subject: Information about BIOS and the boot process In-Reply-To: <000401c2f556$d72ae3a0$393e41db@vsnl.net> References: <000401c2f556$d72ae3a0$393e41db@vsnl.net> Message-ID: <20030328200705.GD2808@foo.birdnet.se> On Fri, Mar 28, 2003 at 11:50:03PM +0530, Deepak Kotian wrote: > Thanks Ron. The documentation would do a lot of good to > many in the forum for the new comers (including > me) > Lot of queries should get resolved automatically. > > The cvs seems to have support of lot of motherboards now, but I guess, > the knowledge/experience seems to be with the one who have supported > those boards only. > If the implementator of LinuxBIOS for the respective motherboard > spends even 8/10 hours to produce a document of his flow or Design, > it would benefit a lot. 8-10 hours is a lot of time, unfortunately. [..snip..] > These are just suggestions, there may be better way or means to do it > though. I've suggested setting up a wiki in another similar situation where relatively few and busy people had specific knowledge about the system design. I'm pretty sure it will work out well. PhpWiki looks nice, at http://phpwiki.sf.net/ but I didn't get it to run immediately when I tried setting it up. I have a slightly unusual configuration running however so it might just be my bad. My $0.02. //Peter From dkotian3 at vsnl.net Sat Mar 29 01:38:00 2003 From: dkotian3 at vsnl.net (dkotian3 at vsnl.net) Date: Sat Mar 29 01:38:00 2003 Subject: Information about BIOS and the boot process Message-ID: <20030329074017.31A2F4FEF1@bom6.vsnl.net.in> An embedded and charset-unspecified text was scrubbed... Name: not available URL: From stuge-linuxbios at cdy.org Sat Mar 29 12:06:00 2003 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Sat Mar 29 12:06:00 2003 Subject: Information about BIOS and the boot process In-Reply-To: <20030329074017.31A2F4FEF1@bom6.vsnl.net.in> References: <20030329074017.31A2F4FEF1@bom6.vsnl.net.in> Message-ID: <20030329172738.GB29653@foo.birdnet.se> On Sat, Mar 29, 2003 at 12:40:17PM +0500, dkotian3 at vsnl.net wrote: > Thanks Greg, > > I think, that is very good overview about the flow. > It may be good idea to continue this flow on this thread or > somewhere else. > I think,One cannot expect Greg to do all the documentation as Peter > said 8-10 hours is a lot of time. May be out of the > many implementors in this forum, if one contributes by giving > more details about any one of these files in detail of one's own > choice ,basically significance,flow about it and Do's and Dont's,etc > and any experiences. Probably a structure needs to be proposed as well > and rest should fall in place for documentation at least. > If not 8 hours by one person, atleast an hour can be contributed > may not be an issue. There has been a lot of good information sent to the mailing list but unfortunately it can be hard to find in the archives because of the low S/N ratio. Please don't get me wrong though, I think this list is very nice, I'm just saying that I've thought to myself "that's good documentation, it should be saved somewhere" a couple of times when reading some emails with stuff that's completely trivial to several readers, but quite valuable to myself and other (relative to complete) newbies. //Peter From dkotian3 at vsnl.net Sat Mar 29 12:44:01 2003 From: dkotian3 at vsnl.net (Deepak Kotian) Date: Sat Mar 29 12:44:01 2003 Subject: Information about BIOS and the boot process References: <20030329074017.31A2F4FEF1@bom6.vsnl.net.in> <20030329172738.GB29653@foo.birdnet.se> Message-ID: <00c701c2f61e$c4373780$233e41db@vsnl.net> Agreed on all points.That is why I suggested to maintain this thread and the contributors may contribute their view on basically significance,flow about the individual ,Do's and Dont's,etc, so next time when someone ask for some documentation, atleast there would be only one thread to look for... And one can easily take these material and produce a good formal one out of it whenever there is some time. Regards Deepak ----- Original Message ----- From: "Peter Stuge" To: Sent: Saturday, March 29, 2003 10:57 PM Subject: Re: Information about BIOS and the boot process > On Sat, Mar 29, 2003 at 12:40:17PM +0500, dkotian3 at vsnl.net wrote: > > Thanks Greg, > > > > I think, that is very good overview about the flow. > > It may be good idea to continue this flow on this thread or > > somewhere else. > > I think,One cannot expect Greg to do all the documentation as Peter > > said 8-10 hours is a lot of time. May be out of the > > many implementors in this forum, if one contributes by giving > > more details about any one of these files in detail of one's own > > choice ,basically significance,flow about it and Do's and Dont's,etc > > and any experiences. Probably a structure needs to be proposed as well > > and rest should fall in place for documentation at least. > > If not 8 hours by one person, atleast an hour can be contributed > > may not be an issue. > > There has been a lot of good information sent to the mailing list but > unfortunately it can be hard to find in the archives because of the low S/N > ratio. Please don't get me wrong though, I think this list is very nice, > I'm just saying that I've thought to myself "that's good documentation, it > should be saved somewhere" a couple of times when reading some emails with > stuff that's completely trivial to several readers, but quite valuable to > myself and other (relative to complete) newbies. > > > //Peter > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Sat Mar 29 18:14:00 2003 From: rminnich at lanl.gov (ron minnich) Date: Sat Mar 29 18:14:00 2003 Subject: Information about BIOS and the boot process In-Reply-To: <00c701c2f61e$c4373780$233e41db@vsnl.net> Message-ID: What I most want is the documentation IN THE CODE, so that make documentation gives you the docs for that motherboard. ron From joey at joescan.com Sat Mar 29 18:22:00 2003 From: joey at joescan.com (Joey Nelson) Date: Sat Mar 29 18:22:00 2003 Subject: Fabiatech FB2510 Geode GX1 motherboard. Message-ID: <000901c2f64e$03769420$6501a8c0@pink> Hello, I'm hoping to get Linuxbios running on a Fabiatech FB2510 PC/104 cpu board. It's quite similar too the existing advantech/pcm-5823 motherboard. It has a GX1 Northbridge/CPU, CS5530 Southbridge, SMC FDC37B787 SuperIO, and RTL8139C 10/100 Ethernet. It has a 2-MBit SST39SF020A flash in a PLC-32 package, so DOC is not an option. But it appears there are included utilities for writing this flash in the Linuxbios cvs tree. Alternately I have a Universal programmer. I'm figuring I can base my work off the pcm-5823 and other GX1/CS5530 based motherboard configurations. What are the areas I may have to customize for FB2510? I'm willing and able to dig into the source code if necessary. Just point me to where it is necessary. Is there any information I'm going to have to ask Fabiatech for? My goal is to boot with Linuxbios along with the ide_disk driver from Etherboot. The Linux kernel and initrd/rootfs will be on an IDE flash drive. I'm currently using a FAT16 formatted IDE Flash with the very simple syslinux bootloader, which loads a bzImage and gzipped initrd/rootfs. How do I get Linux onto an IDE device so Etherboot's ide_disk driver will load the kernel and my initrd? Thanks, Joey Nelson From dkotian3 at vsnl.net Sun Mar 30 13:25:01 2003 From: dkotian3 at vsnl.net (Deepak Kotian) Date: Sun Mar 30 13:25:01 2003 Subject: Information about BIOS and the boot process References: Message-ID: <001c01c2f6ed$ac60c3e0$472241db@vsnl.net> Agreed, That is right. Many would like to reuse the code for a new motherboard, it would be very handy to be have some reference guide, so may be an overall documentation/or some kind of experience will probably show him the methodology of how to go about to implement LinuxBIOS on one's motherboard. Thanks and Regards Deepak ----- Original Message ----- From: "ron minnich" To: "Deepak Kotian" Cc: "Peter Stuge" ; Sent: Sunday, March 30, 2003 5:12 AM Subject: Re: Information about BIOS and the boot process > What I most want is the documentation IN THE CODE, so that make > documentation gives you the docs for that motherboard. > > ron > > From rminnich at lanl.gov Sun Mar 30 20:56:01 2003 From: rminnich at lanl.gov (ron minnich) Date: Sun Mar 30 20:56:01 2003 Subject: Fabiatech FB2510 Geode GX1 motherboard. In-Reply-To: <000901c2f64e$03769420$6501a8c0@pink> Message-ID: On Sat, 29 Mar 2003, Joey Nelson wrote: > What are the areas I may have to customize for FB2510? I'm willing and > able to dig into the source code if necessary. Just point me to where > it is necessary. Is there any information I'm going to have to ask > Fabiatech for? here is the easiest thing to do. Look at some of the HOWTOs (e.g. the sbc710 etc.). Then try to build a pcm-5823 linuxbios and load it into flash and see how it works on the board. I doubt all the pieces will work, but if you get serial output of any kind, I think the port will be easy. I have found with several GEODE boards that the only thing that changes much is the IRQ table and which super io they use. If the bios even works a little (I.e. you get serial out) considering using one of the two portguides to tell you how to make a linuxbios port for this board. Also consider writing a version of this portguide for this board -- the more portguides the better. For the rest of your questions, let's get to them after you have done a basic linuxbios port. But, I see no problems doing what you are trying to do. ron p.s. I'm on vacation this week so my answers will be sporadic, but I'm here. From yenneo at oreka.com Mon Mar 31 00:36:00 2003 From: yenneo at oreka.com (Philippe CABANNES) Date: Mon Mar 31 00:36:00 2003 Subject: =?iso-8859-1?q?I=B4m?= novice Message-ID: <200303310604.IAA67259@mailhub7.isdnet.net> I?m novice, and i?m trying to follow the instructions of the Epia?s How to file. I can?t execute the config tool. My file is named "NLBConfig.py,v" , why is there the ",v" at the end of the file? is it normal? This is the the same for my config file. I renamed them as "NLBConfig.py" and "motherboard.config" but impossible to execute. I used "python .../NLBConfig.py ..../motherboard.config /.../" It gives me a mistake at the first line, so i don?t think this is this way it works. -------------------------------------------------- Oreka ! Nous sommes l'internet moins cher ! Surfez 25% moins cher avec http://www.oreka.com From vincent at ulyssis.org Mon Mar 31 02:07:01 2003 From: vincent at ulyssis.org (Vincent Touquet) Date: Mon Mar 31 02:07:01 2003 Subject: I?m novice In-Reply-To: <200303310604.IAA67259@mailhub7.isdnet.net> References: <200303310604.IAA67259@mailhub7.isdnet.net> Message-ID: <20030331073609.GA19198@lea.ulyssis.org> On Mon, Mar 31, 2003 at 08:15:08AM +0100, Philippe CABANNES wrote: >I?m novice, and i?m trying to follow the instructions of the Epia?s >How to file. >I can?t execute the config tool. My file is named "NLBConfig.py,v" , >why is there the ",v" at the end of the file? is it normal? (cut) >It gives me a mistake at the first line, so i don?t think this is this >way it works. The ,v means it is a versioned file, straight from CVS. You shouldn't have such files if you check the files out of CVS properly: these files only live inside the CVS repository (maybe you just "downloaded" them from the CVS repository without checking them out with the CVS tools ?). Its also possible to strip the ,v file back to a normal file using the cvs tools, but I don't know it by hard unfortunately. best regards, Vincent From hcyun at etri.re.kr Mon Mar 31 04:49:00 2003 From: hcyun at etri.re.kr (hcyun at etri.re.kr) Date: Mon Mar 31 04:49:00 2003 Subject: GPL and NDA Message-ID: <8470181DABD5D511B3E700D0B7A8AC4A9CD6E8@cms3> Hello, I have a question regarding GPL and NDA issue. I have documents for a specific chipset which I get with NDA. And I'm trying to port Linuxbios on that chipset. As LinuxBIOS is GPL, I know I must make my port publicly available. In this case, Is it a violation of NDA or not? Does it depend on NDA? I think there are many people on this list who were in similar situation. So please tell me some advice. - HeeChul Yun, Embedded S/W Team at ETRI phone: +82-42-860-1673 -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at suse.de Mon Mar 31 05:11:00 2003 From: stepan at suse.de (Stefan Reinauer) Date: Mon Mar 31 05:11:00 2003 Subject: GPL and NDA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6E8@cms3> References: <8470181DABD5D511B3E700D0B7A8AC4A9CD6E8@cms3> Message-ID: <20030331104025.GA15731@suse.de> * hcyun at etri.re.kr [030331 12:17]: > I have documents for a specific chipset which I get with NDA. > And I'm trying to port Linuxbios on that chipset. > As LinuxBIOS is GPL, I know I must make my port publicly available. > In this case, Is it a violation of NDA or not? Does it depend on NDA? This depends on the NDA you signed. Some companies for example agree that code that has been derived from NDA documentation may be released under GPL as long as it does not reveal major documentation or features that are actually not needed to get things going. You should definitely clarify this before releasing, better before writing any code, and, if possible, get this explicitly stated in the NDA or other contracts you sign. IANAL ;) Stefan -- The use of COBOL cripples the mind; its teaching should, therefore, be regarded as a criminal offense. -- E. W. Dijkstra From rminnich at mini.ccs.lanl.gov Mon Mar 31 11:02:01 2003 From: rminnich at mini.ccs.lanl.gov (Ronald G Minnich) Date: Mon Mar 31 11:02:01 2003 Subject: GPL and NDA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6E8@cms3> Message-ID: On Mon, 31 Mar 2003 hcyun at etri.re.kr wrote: > I have documents for a specific chipset which I get with NDA. > And I'm trying to port Linuxbios on that chipset. > As LinuxBIOS is GPL, I know I must make my port publicly available. > In this case, Is it a violation of NDA or not? Does it depend on NDA? - you can build GPL code based on NDA chipsets, but you MUST get the permission to do that from the holder of the GPL - it is a violation of the NDA if you release GPL code without getting permission - you do not have to release your GPL code if you never release your linuxbios to anyone outside ETRI. You only have to release code if you release object - If I were you I would consider using a different chipset if you can not get the vendor to agree. ron From justin at street-vision.com Mon Mar 31 11:30:01 2003 From: justin at street-vision.com (Justin Cormack) Date: Mon Mar 31 11:30:01 2003 Subject: GPL and NDA In-Reply-To: References: Message-ID: <1049129892.1373.24.camel@lotte> On Tue, 2003-04-01 at 02:25, Ronald G Minnich wrote: > On Mon, 31 Mar 2003 hcyun at etri.re.kr wrote: > > > I have documents for a specific chipset which I get with NDA. > > And I'm trying to port Linuxbios on that chipset. > > As LinuxBIOS is GPL, I know I must make my port publicly available. > > In this case, Is it a violation of NDA or not? Does it depend on NDA? > > - you can build GPL code based on NDA chipsets, but you MUST get the > permission to do that from the holder of the GPL er, typo, holder of specification > - it is a violation of the NDA if you release GPL code without > getting permission > - you do not have to release your GPL code if you never release your > linuxbios to anyone outside ETRI. You only have to release code > if you release object > - If I were you I would consider using a different chipset if you can not > get the vendor to agree. Or if you never want to do business with them again, just ignore the NDA. They have no legal force in some countries (eg the UK). But I would avaoid them if at all possible. There are always other manufacturers, and no one else will be able to help you with development. Justin From Antony at Soft-Solutions.co.uk Mon Mar 31 11:56:00 2003 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Mon Mar 31 11:56:00 2003 Subject: GPL and NDA In-Reply-To: <1049129892.1373.24.camel@lotte> References: <1049129892.1373.24.camel@lotte> Message-ID: <200303311725.h2VHPSG30075@vulcan.rissington.net> On Monday 31 March 2003 5:58 pm, Justin Cormack wrote: > Or if you never want to do business with them again, just ignore the > NDA. They have no legal force in some countries (eg the UK). Can you elaborate on that? If they have no legal force, why do people use them (and yes, I have been on both ends of NDAs in the UK). Regards, Antony -- Having been asked to provide a reference for this man, I can confidently state that you will be very lucky indeed if you can get him to work for you. From stepan at suse.de Mon Mar 31 12:48:01 2003 From: stepan at suse.de (Stefan Reinauer) Date: Mon Mar 31 12:48:01 2003 Subject: GPL and NDA In-Reply-To: <1049129892.1373.24.camel@lotte> References: <1049129892.1373.24.camel@lotte> Message-ID: <20030331181529.GA21597@suse.de> * Justin Cormack [030331 18:58]: > On Tue, 2003-04-01 at 02:25, Ronald G Minnich wrote: > > - you can build GPL code based on NDA chipsets, but you MUST get the > > permission to do that from the holder of the GPL > > er, typo, holder of specification both should be ok. As the holder of the GPL is the one that has to enforce it, it might be sufficient to get a permission from the license holder to only release a binary. (Which is still not a good idea, wrt open source) > Or if you never want to do business with them again, just ignore the > NDA. They have no legal force in some countries (eg the UK). After a couple of times you might run into problems finding new manufacturers. ;) Stefan -- The use of COBOL cripples the mind; its teaching should, therefore, be regarded as a criminal offense. -- E. W. Dijkstra From Antony at Soft-Solutions.co.uk Mon Mar 31 13:06:01 2003 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Mon Mar 31 13:06:01 2003 Subject: GPL and NDA In-Reply-To: <20030331181529.GA21597@suse.de> References: <1049129892.1373.24.camel@lotte> <20030331181529.GA21597@suse.de> Message-ID: <200303311834.h2VIYmG30184@vulcan.rissington.net> On Monday 31 March 2003 7:15 pm, Stefan Reinauer wrote: > * Justin Cormack [030331 18:58]: > > On Tue, 2003-04-01 at 02:25, Ronald G Minnich wrote: > > > - you can build GPL code based on NDA chipsets, but you MUST get the > > > permission to do that from the holder of the GPL > > > > er, typo, holder of specification > > both should be ok. As the holder of the GPL is the one that has to > enforce it, it might be sufficient to get a permission from the license > holder to only release a binary. (Which is still not a good idea, wrt > open source) This would then be a violation of the GPL. If you produce something based on GPL code, you must distribute the source (or make it available) as well as the binary. There's no such thing as binary-only GPL code. If you think violating the GPL is not such a bad idea.... http://www.open-mag.com/features/Vol_24/GPL/gpl.htm Antony. -- Most people are aware that the Universe is big. - Paul Davies, Professor of Theoretical Physics From ebiederman at lnxi.com Mon Mar 31 15:02:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 31 15:02:01 2003 Subject: GPL and NDA In-Reply-To: <8470181DABD5D511B3E700D0B7A8AC4A9CD6E8@cms3> References: <8470181DABD5D511B3E700D0B7A8AC4A9CD6E8@cms3> Message-ID: hcyun at etri.re.kr writes: > Hello, > > I have a question regarding GPL and NDA issue. > > I have documents for a specific chipset which I get with NDA. > And I'm trying to port Linuxbios on that chipset. > As LinuxBIOS is GPL, I know I must make my port publicly available. > In this case, Is it a violation of NDA or not? Does it depend on NDA? Violating the spirit of an NDA has business consequences, regardless of the legal ones so keeping good faith is necessary. But that runs two ways. If you a customer cannot use their product because of NDA issues you have leverage to work out the issue with manufacturer of the hardware. In general a NDA does not preclude you from working on a chipset. In many cases there are extra constrains to releasing code before the hardware is publicly available. So a source/binary release may need to wait until the official launch of a product. In all cases you can develop code and not release either the source or the binary while you have an NDA. And that meets the terms of the GPL. For source code release the stipulation is that anyone who can get the binary needs a means to get the source. In a practical sense I have not yet seen hardware where knowing how to program it appears to reveal how to build it. Which is what I would suspect manufacturers would be worried about. Most NDA issues I have seen have come out of business NDA reflex and can usually be resolved. It also helps in the business arguments that alternative suppliers of competing hardware have been successfully worked with so you can threaten to switch hardware or even switch hardware if you cannot use a piece of hardware because of NDA issues. Also people tend to be particularly prickly NDA wise on the top of the line hardware. In most cases embedded products are a commodity and volume market, with more custom systems being built. So on the embedded side I would expect the NDA issues to be easier to overcome. Eric From ebiederman at lnxi.com Mon Mar 31 15:11:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 31 15:11:00 2003 Subject: Information about BIOS and the boot process In-Reply-To: <3E855D2A.102@munix.com.br> References: <3E855D2A.102@munix.com.br> Message-ID: Ivan Gustavo writes: > I am writing some code to fixup the video chipset trident cyberblade and > > V1621 RGB->CS encoder , > and also trying to fix the IDE_BOOT for my mainboard (B860T or EPIA), so I am > looking for information > about the real bios process, and about the layout of the common bios files, and > of course, any information > about bios as possible. You might try the IDE_BOOT option of etherboot... > My main problem is to find good documentation about the post, the boot process. > > I read on some places which the CS is set F000 and EIP FFF0, so in other > websites I had seen CS is FFF0, > in other 000F , causing some confusion with me. So far I have not seen a good reply so: Since there continues to be confusion. The cpu starts running at: 0xffff0000:0xfff0 An impossible to load CS selector but the cpu manages it. Many times there is a far jmp to 0xf000:???? so there is a rom alias there. While not universally used in LinuxBIOS there is code present to do a short backwards jump. And at the location of that jump transition into 32bit protected mode. > I need some documentation about 20bits addressing lines, and the GATE A20 > function also. As far as gateA20. It is for legacy compatibility and it has been since the introduction of the 286. When a machine boots up all address lines are enabled and active. When going into dos compatibility mode gate a20 is disabled. Under LinuxBIOS gateA20 is always left enabled. Eric From ebiederman at lnxi.com Mon Mar 31 15:14:00 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 31 15:14:00 2003 Subject: [epia] Unknown bootloader class In-Reply-To: <20030324114241.YNFQ24612.fep07-app.kolumbus.fi@there> References: <20030324114241.YNFQ24612.fep07-app.kolumbus.fi@there> Message-ID: Jarmo Tulonen writes: > Hello > > If this problem is not solved yet, I would suggest trying > a newer mkelfImage. I have been using version 2.2 from > ftp://ftp.lnxi.com/pub/src/mkelfImage/ > and that one works fine (I'm also using an Epia card.) > I tried with the version in the freebios tree and got > a similar "Unknown bootloader class" error. Note: Unknown bootloader class is a warning. And is generally harmless. It happens when some tweak or fix is put in and the method the bootloader passes parameters is not recognized. It should not prevent booting as the stub in mkelfImage knows how to read the LinuxBIOS tables directly and find all of the information it needs. Eric From ebiederman at lnxi.com Mon Mar 31 17:20:01 2003 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Mar 31 17:20:01 2003 Subject: Wrong documentation info In-Reply-To: <3E85547E.9070508@munix.com.br> References: <3E85547E.9070508@munix.com.br> Message-ID: Ivan Gustavo writes: > At the EPIA HOWTO have a sample declaration to the etherboot config file like > below: > > Comment out the following line(s) :- > CFLAGS32+= -DPCIBIOS > Uncomment the following line(s) :- > #CFLAGS32+= -DLINUXBIOS -DCONFIG_TSC_CURTICKS -DCONSOLE_SERIAL \ > -DCOMCONSOLE=0x3f8 -DCOMPRESERVE -DCONFIG_PCI_DIRECT \ > -DELF_IMAGE > > Look the -DCONFIG_TSC_CURTICKS , anybody have it wrotte wrong ? > the right is CONFIG_TSC_CURRTICKS . > > > Also for the version 5.0.9 of the etherboot, I needed to use -DPCBIOS and added > the pcbios.S object file for include the int15() object code to make the > compilation susseful. Running under LinuxBIOS -DPCBIOS is a problem. int15() is also a problem. It appears you have enabled something that does not work under LinuxBIOS. Mostly I have been working with the development version 5.1.x so I have not double checked to see if 5.0.9 works but a regression would be a surprise. Eric From rminnich at lanl.gov Mon Mar 31 18:35:00 2003 From: rminnich at lanl.gov (ron minnich) Date: Mon Mar 31 18:35:00 2003 Subject: GPL and NDA In-Reply-To: <1049129892.1373.24.camel@lotte> Message-ID: On 31 Mar 2003, Justin Cormack wrote: > > - you can build GPL code based on NDA chipsets, but you MUST get the > > permission to do that from the holder of the GPL > > er, typo, holder of specification yeah, sorry! ron From rminnich at lanl.gov Mon Mar 31 18:43:00 2003 From: rminnich at lanl.gov (ron minnich) Date: Mon Mar 31 18:43:00 2003 Subject: GPL and NDA In-Reply-To: <200303311834.h2VIYmG30184@vulcan.rissington.net> Message-ID: On Mon, 31 Mar 2003, Antony Stone wrote: > This would then be a violation of the GPL. If you produce something based > on GPL code, you must distribute the source (or make it available) as well as > the binary. There's no such thing as binary-only GPL code. yes, and to reiterate, if you never distribute binary, then you don't have to distribute source. E.g. IBM never released the linuxbios code they wrote for an SiS chipset as the project got cancelled. ron From rminnich at lanl.gov Mon Mar 31 18:55:01 2003 From: rminnich at lanl.gov (ron minnich) Date: Mon Mar 31 18:55:01 2003 Subject: [9fans] vga docs (fwd) Message-ID: might be useful, did not look. ron ---------- Forwarded message ---------- Date: Mon, 31 Mar 2003 18:13:12 -0500 From: Russ Cox Reply-To: 9fans at cse.psu.edu To: 9fans at cse.psu.edu Subject: [9fans] vga docs If you're writing VGA drivers and don't have paper docs nearby, this is almost as good. http://web.inter.nl.net/hcc/S.Weijgers/FreeVGA/home.htm From adam at cfar.umd.edu Mon Mar 31 19:46:01 2003 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Mon Mar 31 19:46:01 2003 Subject: [9fans] vga docs (fwd) In-Reply-To: Message-ID: <20030331201346.U316-100000@www.missl.cs.umd.edu> looks pretty nice though it seems most of the docs date back to the '98 wihch in computer-years is like an millenium or so. still should be usefull if I ever get to try get some open source vga bios on hardware. Thanks! > might be useful, did not look. > > ron > > ---------- Forwarded message ---------- > Date: Mon, 31 Mar 2003 18:13:12 -0500 > From: Russ Cox > Reply-To: 9fans at cse.psu.edu > To: 9fans at cse.psu.edu > Subject: [9fans] vga docs > > If you're writing VGA drivers and don't have paper > docs nearby, this is almost as good. > > http://web.inter.nl.net/hcc/S.Weijgers/FreeVGA/home.htm > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- Adam Sulmicki http://www.eax.com The Supreme Headquarters of the 32 bit registers