simple question on fallback/normal images

[Andrew Ip]

Ron,

> I need to build a bios for the clearwater with no fallback/normal images. 
> Just a single image. 
> I find myself unsure how to do this, I've not looked in depth at the 
> fallback/normal build stuff.
> Is there a simple option so I can build an image w/o the fallback/normal 
> stuff on systems like clearwater that are configured for fallback/normal?
I have attached a config for a custom e7500 board which uses a single
image instead of fallback image.  It should be pretty similar to Clearwater.
Hope this help.

-Andrew

-- 
Andrew Ip
Email:  aip at cwlinux.com
Tel:    (852) 2542 2046
Fax:    (852) 2542 2036
Mobile: (852) 9201 9866

Cwlinux Limited
Unit 202B 2/F Lai Cheong Factory Building,
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Tel: (852)2542 2046
Fax: (852)2542 2036

For public pgp key, please obtain it from http://www.keyserver.net/en.
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# This will make a target directory of ./winfast
# Note that this is RELATIVE TO WHERE YOU ARE WHEN YOU RUN THE
# CONFIG TOOL. Make it absolute if you like
target /opt/cwlinux/buildrom/cw7600
  
mainboard cwlinux/cw7600
  
# option ROM_SIZE=524288
# option ROM_IMAGE_SIZE=65536

option DEBUG=1

option DEFAULT_CONSOLE_LOGLEVEL=9

# Enable Serial Console for debugging
# It will come up at 115200,8n1
option SERIAL_CONSOLE=1
## Select the serial console baud rate.
option TTYS0_BAUD=115200
#option TTYS0_BAUD=57600
#option TTYS0_BAUD=38400
#option TTYS0_BAUD=19200
#option TTYS0_BAUD=9600
#option TTYS0_BAUD=4800
#option TTYS0_BAUD=2400
#option TTYS0_BAUD=1200

# Select the serial console base port
option TTYS0_BASE=0x3f8

# Select the serial protocol
# This (much better!) to 8 data bits, 1 stop bit, and no parity
option TTYS0_LCS=0x3

# Enable MicroCode update and L2 Cache init for PII and PIII
option UPDATE_MICROCODE=1
# option CONFIGURE_L2_CACHE=1

# Use the internal VGA frame buffer device
#option HAVE_FRAMEBUFFER=1

option USE_ELF_BOOT=1

option USE_GENERIC_ROM=1

option STD_FLASH=1
  
option USE_FALLBACK_IMAGE=0

option HAVE_PIRQ_TABLE=1
  
option NO_KEYBOARD=0

# payload /opt/cwlinux/etherboot/src/bin32/eepro100.elf
payload /opt/cwlinux/etherboot/src/bin32/eepro100.ebi
# payload /opt/cwlinux/memtest86/memtest

##
## Cpu Speed
##
#option CPU_CLOCK_MULTIPLIER=XEON_X8
#option CPU_CLOCK_MULTIPLIER=XEON_X9
#option CPU_CLOCK_MULTIPLIER=XEON_X10
#option CPU_CLOCK_MULTIPLIER=XEON_X11
#option CPU_CLOCK_MULTIPLIER=XEON_X12
#option CPU_CLOCK_MULTIPLIER=XEON_X13
#option CPU_CLOCK_MULTIPLIER=XEON_X14
#option CPU_CLOCK_MULTIPLIER=XEON_X15
#option CPU_CLOCK_MULTIPLIER=XEON_X16
#option CPU_CLOCK_MULTIPLIER=XEON_X17
#option CPU_CLOCK_MULTIPLIER=XEON_X18
#option CPU_CLOCK_MULTIPLIER=XEON_X19
#option CPU_CLOCK_MULTIPLIER=XEON_X19
option CPU_CLOCK_MULTIPLIER=XEON_X20
#option CPU_CLOCK_MULTIPLIER=XEON_X21
#option CPU_CLOCK_MULTIPLIER=XEON_X22
#option CPU_CLOCK_MULTIPLIER=XEON_X23

##
## Select power on after power fail setting
option MAINBOARD_POWER_ON_AFTER_POWER_FAIL=MAINBOARD_POWER_ON
#option MAINBOARD_POWER_ON_AFTER_POWER_FAIL=MAINBOARD_POWER_ON

# makerule romimage: linuxbios.rom payload.block ;
# addaction romimage cat payload.block linuxbios.rom linuxbios.rom > romimage