V2 VIA EPIA -- SPD.

[Eric W. Biederman]

ron minnich <rminnich at lanl.gov> writes:

> OK, the first SPD work is in. Ram size is now set from SPD. 
> 
> The next line of attack are the MA registers. 
> 
> The code is walking a tight line between code space size and register 
> allocation; see 
> northbridge/via/vt8601/raminit.c
> for some details. These old pentiums are tight on registers!

I see.  Any chance that could be linux-kernel style indented?
Right now the indentation is not consistent.
 
> That said, doing this in C is even better than having an ICE.

Cool. :)

Eric