Eric W. Biederman
ebiederman at lnxi.com
Fri Sep 26 16:18:00 CEST 2003
Steve Gehlbach <steve at nexpath.com> writes:
> Eric W. Biederman wrote:
> >>I was going to force it to use ide_read_sector_chs but did not have time.
> >>I switched to using my CF drive and it worked fine, so I don't think it was
> >>cockpit trouble.
> > Right. My only other guess is that some of the lba48 support my be
> > in a strange way and causing problems. We always write the lba48 high
> > registers but we don't set them in the lba case. It should not cause a
> > But drives are diverse enough we might find some strange bugs.
> > At least we have not yet found a drive that we have spin up problems with yet.
> I did some more testing. Forcing CHS mode did not help. I looked at the older
> LB code, and started to cut and paste some of its init code into the new code
> just as an experiment. So far no help.
> I noticed the busy/wait loop in the original LB code looks at the error
> register. I also notice in the new code the pio_data_in routine does not check
> the error bit, matter of fact, the error bit is never checked anywhere AFAICT.
> Interestingly, if you check the error bit in the status register (bit 0), it is
> set after the pio_set_registers() command for my 1.2G WD (in pio_data_in for
> READ SECTOR(S) ), but not for another drive that works (7.5G WD). I looked at
> the ATA-2 and ATA-5 specs and the error stuff seems to have changed a little. I
> have not had a chance to put in code to see just where the error bit gets set,
> but it seems that once it is set you cannot go on without clearing it or
Possibly. I believe I was not using the error bit because things were
failing in other ways so I did not need the error bit, and I don't
think CF drives support it.
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