From zhushisongzhu at yahoo.com Mon Aug 2 06:40:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Aug 2 06:40:01 2004 Subject: via flash_on utility Message-ID: <20040802121550.41079.qmail@web13203.mail.yahoo.com> Dear lists, flasn_on utility is just for sis630 chipset. Is there any similar utility for via 8601/686b chipset? tks zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - Send 10MB messages! http://promotions.yahoo.com/new_mail From kfuchs at winternet.com Mon Aug 2 14:21:00 2004 From: kfuchs at winternet.com (Ken Fuchs) Date: Mon Aug 2 14:21:00 2004 Subject: AMD Serenade: Filo can't find/access ATA HD (IDE - /dev/hda) Message-ID: <200408021956.i72JuOcq001310@tundra.winternet.com> All serial input/output is prefixed with <#>. for easier reference. /dev/hda3 contains SuSE GNU/Linux 9.1 on a single reiserfs filesystem. The Linux kernel is SuSE patched /boot/vmlinuz-2.6.4-52-smp. vmlinuz is a symbolic link to this kernel. The SuSE GNU/Linux 9.1 system works fine when the original BIOS is used. The filo command used is: 749. boot: hda3:/boot/vmlinuz root=/dev/hda3 console=tty0 console=ttyS0,115200 desktop splash=silent showopts Filo returns: 753. file_open: dev=hda3, path=/boot/vmlinuz 754. find_ide_controller: PCI IDE #0 not found 755. IDE channel 0 not found 756. devopen: failed to open ide Here's the serial output (numbered for easier reference): ------ 1. LinuxBIOS-1.1.6.0Fallback Wed Jul 28 09:01:14 EDT 2004 starting... 2. setting up resource map....done. 3. 02 nodes initialized. 4. coherent_ht_finalize 5. done 6. ht reset - 7. LinuxBIOS-1.1.6.0Fallback Wed Jul 28 09:01:14 EDT 2004 starting... 8. setting up resource map....done. 9. 02 nodes initialized. 10. coherent_ht_finalize 11. done 12. PCI: 00:01.00 13. PCI: 00:01.01 14. PCI: 00:02.00 15. PCI: 00:02.01 16. PCI: 00:03.00 17. PCI: 00:04.00 18. PCI: 00:04.01 19. PCI: 00:04.02 20. PCI: 00:04.03 21. PCI: 00:04.05 22. PCI: 00:04.06 23. PCI: 00:18.00 24. PCI: 00:18.01 25. PCI: 00:18.02 26. PCI: 00:18.03 27. PCI: 00:19.00 28. PCI: 00:19.01 29. PCI: 00:19.02 30. PCI: 00:19.03 31. Ram1.00 32. Ram1.01 33. Ram2.00 34. Ram2.01 35. No memory for this cpu 36. Ram3 37. Initializing memory: done 38. Clearing LinuxBIOS memory: done 39. Ram4 40. PCI: 00:01.00 41. PCI: 00:01.01 42. PCI: 00:02.00 43. PCI: 00:02.01 44. PCI: 00:03.00 45. PCI: 00:04.00 46. PCI: 00:04.01 47. PCI: 00:04.02 48. PCI: 00:04.03 49. PCI: 00:04.05 50. PCI: 00:04.06 51. PCI: 00:18.00 52. PCI: 00:18.01 53. PCI: 00:18.02 54. PCI: 00:18.03 55. PCI: 00:19.00 56. PCI: 00:19.01 57. PCI: 00:19.02 58. PCI: 00:19.03 59. Copying LinuxBIOS to ram. 60. Jumping to LinuxBIOS. 61. POST: 0x39 62. LinuxBIOS-1.1.6.0Fallback Fri Jul 30 10:01:21 EDT 2004 booting... 63. POST: 0x40 64. Finding PCI configuration type. 65. PCI: Using configuration type 1 66. POST: 0x5f 67. Enumerating static devices... 68. Enumerating: AMD Serenade mainboard 69. Enumerating: AMD K8 Northbridge 70. Enumerating: AMD K8 Northbridge 71. Enumerating: AMD K8 CPU 72. Enumerating: AMD K8 CPU 73. Enumerating: AMD 8111 Southbridge 74. Enumerating: Winbond w83627hf 75. Enumerating buses... 76. PCI: pci_scan_bus for bus 0 77. POST: 0x24 78. pci_scan_get_dev, looking for devfn: 18.0 79. pci_scan_get_dev, found dev 00028064 80. PCI: 00:18.0 [1022/1100] enabled 81. pci_scan_get_dev, looking for devfn: 18.1 82. pci_scan_get_dev, found dev 00028190 83. PCI: 00:18.1 [1022/1101] enabled 84. pci_scan_get_dev, looking for devfn: 18.2 85. pci_scan_get_dev, found dev 000282bc 86. PCI: 00:18.2 [1022/1102] enabled 87. pci_scan_get_dev, looking for devfn: 18.3 88. pci_scan_get_dev, found dev 000283e8 89. PCI: 00:18.3 [1022/1103] ops 90. PCI: 00:18.3 [1022/1103] enabled 91. pci_scan_get_dev, looking for devfn: 18.4 92. pci_scan_get_dev, found dev 00000000 93. pci_scan_get_dev, looking for devfn: 18.5 94. pci_scan_get_dev, found dev 00000000 95. pci_scan_get_dev, looking for devfn: 18.6 96. pci_scan_get_dev, found dev 00000000 97. pci_scan_get_dev, looking for devfn: 18.7 98. pci_scan_get_dev, found dev 00000000 99. pci_scan_get_dev, looking for devfn: 19.0 100. pci_scan_get_dev, found dev 00028514 101. PCI: 00:19.0 [1022/1100] enabled 102. pci_scan_get_dev, looking for devfn: 19.1 103. pci_scan_get_dev, found dev 00028640 104. PCI: 00:19.1 [1022/1101] enabled 105. pci_scan_get_dev, looking for devfn: 19.2 106. pci_scan_get_dev, found dev 0002876c 107. PCI: 00:19.2 [1022/1102] enabled 108. pci_scan_get_dev, looking for devfn: 19.3 109. pci_scan_get_dev, found dev 00028898 110. PCI: 00:19.3 [1022/1103] ops 111. PCI: 00:19.3 [1022/1103] enabled 112. pci_scan_get_dev, looking for devfn: 19.4 113. pci_scan_get_dev, found dev 00000000 114. pci_scan_get_dev, looking for devfn: 19.5 115. pci_scan_get_dev, found dev 00000000 116. pci_scan_get_dev, looking for devfn: 19.6 117. pci_scan_get_dev, found dev 00000000 118. pci_scan_get_dev, looking for devfn: 19.7 119. pci_scan_get_dev, found dev 00000000 120. pci_scan_get_dev, looking for devfn: 1a.0 121. pci_scan_get_dev, found dev 00000000 122. pci_scan_get_dev, looking for devfn: 1b.0 123. pci_scan_get_dev, found dev 00000000 124. pci_scan_get_dev, looking for devfn: 1c.0 125. pci_scan_get_dev, found dev 00000000 126. pci_scan_get_dev, looking for devfn: 1d.0 127. pci_scan_get_dev, found dev 00000000 128. pci_scan_get_dev, looking for devfn: 1e.0 129. pci_scan_get_dev, found dev 00000000 130. pci_scan_get_dev, looking for devfn: 1f.0 131. pci_scan_get_dev, found dev 00000000 132. POST: 0x25 133. PCI: 01:01.0 [1022/7450] enabled next_unitid: 0003 134. PCI: 01:03.0 [1022/7460] enabled next_unitid: 0007 135. HyperT reset not needed 136. PCI: pci_scan_bus for bus 1 137. POST: 0x24 138. pci_scan_get_dev, looking for devfn: 00.0 139. pci_scan_get_dev, found dev 00000000 140. pci_scan_get_dev, looking for devfn: 01.0 141. pci_scan_get_dev, found dev 000289c4 142. PCI: 01:01.0 [1022/7450] bus ops 143. PCI: 01:01.0 [1022/7450] enabled 144. pci_scan_get_dev, looking for devfn: 01.1 145. pci_scan_get_dev, found dev 00028af0 146. PCI: 01:01.1 [1022/7451] ops 147. PCI: 01:01.1 [1022/7451] enabled 148. pci_scan_get_dev, looking for devfn: 01.2 149. pci_scan_get_dev, found dev 00000000 150. pci_scan_get_dev, looking for devfn: 01.3 151. pci_scan_get_dev, found dev 00000000 152. pci_scan_get_dev, looking for devfn: 01.4 153. pci_scan_get_dev, found dev 00000000 154. pci_scan_get_dev, looking for devfn: 01.5 155. pci_scan_get_dev, found dev 00000000 156. pci_scan_get_dev, looking for devfn: 01.6 157. pci_scan_get_dev, found dev 00000000 158. pci_scan_get_dev, looking for devfn: 01.7 159. pci_scan_get_dev, found dev 00000000 160. pci_scan_get_dev, looking for devfn: 02.0 161. pci_scan_get_dev, found dev 00028c1c 162. PCI: 01:02.0 [1022/7450] bus ops 163. PCI: 01:02.0 [1022/7450] enabled 164. pci_scan_get_dev, looking for devfn: 02.1 165. pci_scan_get_dev, found dev 00028d48 166. PCI: 01:02.1 [1022/7451] ops 167. PCI: 01:02.1 [1022/7451] enabled 168. pci_scan_get_dev, looking for devfn: 02.2 169. pci_scan_get_dev, found dev 00000000 170. pci_scan_get_dev, looking for devfn: 02.3 171. pci_scan_get_dev, found dev 00000000 172. pci_scan_get_dev, looking for devfn: 02.4 173. pci_scan_get_dev, found dev 00000000 174. pci_scan_get_dev, looking for devfn: 02.5 175. pci_scan_get_dev, found dev 00000000 176. pci_scan_get_dev, looking for devfn: 02.6 177. pci_scan_get_dev, found dev 00000000 178. pci_scan_get_dev, looking for devfn: 02.7 179. pci_scan_get_dev, found dev 00000000 180. pci_scan_get_dev, looking for devfn: 03.0 181. pci_scan_get_dev, found dev 00029b58 182. PCI: 01:03.0 [1022/7460] bus ops 183. PCI: 01:03.0 [1022/7460] enabled 184. pci_scan_get_dev, looking for devfn: 04.0 185. pci_scan_get_dev, found dev 00000000 186. PCI: 01:04.0 [1022/7468] bus ops 187. PCI: 01:04.0 [1022/7468] enabled 188. pci_scan_get_dev, looking for devfn: 04.1 189. pci_scan_get_dev, found dev 00000000 190. PCI: 01:04.1 [1022/7469] ops 191. PCI: 01:04.1 [1022/7469] enabled 192. pci_scan_get_dev, looking for devfn: 04.2 193. pci_scan_get_dev, found dev 00000000 194. PCI: 01:04.2 [1022/746a] enabled 195. pci_scan_get_dev, looking for devfn: 04.3 196. pci_scan_get_dev, found dev 00000000 197. PCI: 01:04.3 [1022/746b] ops 198. PCI: 01:04.3 [1022/746b] enabled 199. pci_scan_get_dev, looking for devfn: 04.4 200. pci_scan_get_dev, found dev 00000000 201. pci_scan_get_dev, looking for devfn: 04.5 202. pci_scan_get_dev, found dev 00000000 203. PCI: 01:04.5 [1022/746d] ops 204. PCI: 01:04.5 [1022/746d] enabled 205. pci_scan_get_dev, looking for devfn: 04.6 206. pci_scan_get_dev, found dev 00000000 207. PCI: 01:04.6 [1022/746e] ops 208. PCI: 01:04.6 [1022/746e] enabled 209. pci_scan_get_dev, looking for devfn: 04.7 210. pci_scan_get_dev, found dev 00000000 211. pci_scan_get_dev, looking for devfn: 05.0 212. pci_scan_get_dev, found dev 00000000 213. pci_scan_get_dev, looking for devfn: 06.0 214. pci_scan_get_dev, found dev 00000000 215. pci_scan_get_dev, looking for devfn: 07.0 216. pci_scan_get_dev, found dev 00000000 217. POST: 0x25 218. PCI: pci_scan_bus for bus 2 219. POST: 0x24 220. pci_scan_get_dev, looking for devfn: 00.0 221. pci_scan_get_dev, found dev 00000000 222. pci_scan_get_dev, looking for devfn: 01.0 223. pci_scan_get_dev, found dev 00000000 224. pci_scan_get_dev, looking for devfn: 02.0 225. pci_scan_get_dev, found dev 00000000 226. pci_scan_get_dev, looking for devfn: 03.0 227. pci_scan_get_dev, found dev 00000000 228. pci_scan_get_dev, looking for devfn: 04.0 229. pci_scan_get_dev, found dev 00000000 230. pci_scan_get_dev, looking for devfn: 05.0 231. pci_scan_get_dev, found dev 00000000 232. pci_scan_get_dev, looking for devfn: 06.0 233. pci_scan_get_dev, found dev 00000000 234. pci_scan_get_dev, looking for devfn: 07.0 235. pci_scan_get_dev, found dev 00000000 236. pci_scan_get_dev, looking for devfn: 08.0 237. pci_scan_get_dev, found dev 00000000 238. pci_scan_get_dev, looking for devfn: 09.0 239. pci_scan_get_dev, found dev 00000000 240. pci_scan_get_dev, looking for devfn: 0a.0 241. pci_scan_get_dev, found dev 00000000 242. pci_scan_get_dev, looking for devfn: 0b.0 243. pci_scan_get_dev, found dev 00000000 244. pci_scan_get_dev, looking for devfn: 0c.0 245. pci_scan_get_dev, found dev 00000000 246. pci_scan_get_dev, looking for devfn: 0d.0 247. pci_scan_get_dev, found dev 00000000 248. pci_scan_get_dev, looking for devfn: 0e.0 249. pci_scan_get_dev, found dev 00000000 250. pci_scan_get_dev, looking for devfn: 0f.0 251. pci_scan_get_dev, found dev 00000000 252. pci_scan_get_dev, looking for devfn: 10.0 253. pci_scan_get_dev, found dev 00000000 254. pci_scan_get_dev, looking for devfn: 11.0 255. pci_scan_get_dev, found dev 00000000 256. pci_scan_get_dev, looking for devfn: 12.0 257. pci_scan_get_dev, found dev 00000000 258. pci_scan_get_dev, looking for devfn: 13.0 259. pci_scan_get_dev, found dev 00000000 260. pci_scan_get_dev, looking for devfn: 14.0 261. pci_scan_get_dev, found dev 00000000 262. pci_scan_get_dev, looking for devfn: 15.0 263. pci_scan_get_dev, found dev 00000000 264. pci_scan_get_dev, looking for devfn: 16.0 265. pci_scan_get_dev, found dev 00000000 266. pci_scan_get_dev, looking for devfn: 17.0 267. pci_scan_get_dev, found dev 00000000 268. pci_scan_get_dev, looking for devfn: 18.0 269. pci_scan_get_dev, found dev 00000000 270. pci_scan_get_dev, looking for devfn: 19.0 271. pci_scan_get_dev, found dev 00000000 272. pci_scan_get_dev, looking for devfn: 1a.0 273. pci_scan_get_dev, found dev 00000000 274. pci_scan_get_dev, looking for devfn: 1b.0 275. pci_scan_get_dev, found dev 00000000 276. pci_scan_get_dev, looking for devfn: 1c.0 277. pci_scan_get_dev, found dev 00000000 278. pci_scan_get_dev, looking for devfn: 1d.0 279. pci_scan_get_dev, found dev 00000000 280. pci_scan_get_dev, looking for devfn: 1e.0 281. pci_scan_get_dev, found dev 00000000 282. pci_scan_get_dev, looking for devfn: 1f.0 283. pci_scan_get_dev, found dev 00000000 284. POST: 0x25 285. PCI: pci_scan_bus returning with max=02 286. POST: 0x55 287. PCI: pci_scan_bus for bus 3 288. POST: 0x24 289. pci_scan_get_dev, looking for devfn: 00.0 290. pci_scan_get_dev, found dev 00000000 291. pci_scan_get_dev, looking for devfn: 01.0 292. pci_scan_get_dev, found dev 00000000 293. PCI: 03:01.0 [1000/0030] enabled 294. pci_scan_get_dev, looking for devfn: 01.1 295. pci_scan_get_dev, found dev 00000000 296. PCI: 03:01.1 [1000/0030] enabled 297. pci_scan_get_dev, looking for devfn: 01.2 298. pci_scan_get_dev, found dev 00000000 299. pci_scan_get_dev, looking for devfn: 01.3 300. pci_scan_get_dev, found dev 00000000 301. pci_scan_get_dev, looking for devfn: 01.4 302. pci_scan_get_dev, found dev 00000000 303. pci_scan_get_dev, looking for devfn: 01.5 304. pci_scan_get_dev, found dev 00000000 305. pci_scan_get_dev, looking for devfn: 01.6 306. pci_scan_get_dev, found dev 00000000 307. pci_scan_get_dev, looking for devfn: 01.7 308. pci_scan_get_dev, found dev 00000000 309. pci_scan_get_dev, looking for devfn: 02.0 310. pci_scan_get_dev, found dev 00000000 311. pci_scan_get_dev, looking for devfn: 03.0 312. pci_scan_get_dev, found dev 00000000 313. PCI: 03:03.0 [14e4/1648] enabled 314. pci_scan_get_dev, looking for devfn: 03.1 315. pci_scan_get_dev, found dev 00000000 316. PCI: 03:03.1 [14e4/1648] enabled 317. pci_scan_get_dev, looking for devfn: 03.2 318. pci_scan_get_dev, found dev 00000000 319. pci_scan_get_dev, looking for devfn: 03.3 320. pci_scan_get_dev, found dev 00000000 321. pci_scan_get_dev, looking for devfn: 03.4 322. pci_scan_get_dev, found dev 00000000 323. pci_scan_get_dev, looking for devfn: 03.5 324. pci_scan_get_dev, found dev 00000000 325. pci_scan_get_dev, looking for devfn: 03.6 326. pci_scan_get_dev, found dev 00000000 327. pci_scan_get_dev, looking for devfn: 03.7 328. pci_scan_get_dev, found dev 00000000 329. pci_scan_get_dev, looking for devfn: 04.0 330. pci_scan_get_dev, found dev 00000000 331. pci_scan_get_dev, looking for devfn: 05.0 332. pci_scan_get_dev, found dev 00000000 333. pci_scan_get_dev, looking for devfn: 06.0 334. pci_scan_get_dev, found dev 00000000 335. pci_scan_get_dev, looking for devfn: 07.0 336. pci_scan_get_dev, found dev 00000000 337. pci_scan_get_dev, looking for devfn: 08.0 338. pci_scan_get_dev, found dev 00000000 339. pci_scan_get_dev, looking for devfn: 09.0 340. pci_scan_get_dev, found dev 00000000 341. pci_scan_get_dev, looking for devfn: 0a.0 342. pci_scan_get_dev, found dev 00000000 343. pci_scan_get_dev, looking for devfn: 0b.0 344. pci_scan_get_dev, found dev 00000000 345. pci_scan_get_dev, looking for devfn: 0c.0 346. pci_scan_get_dev, found dev 00000000 347. pci_scan_get_dev, looking for devfn: 0d.0 348. pci_scan_get_dev, found dev 00000000 349. pci_scan_get_dev, looking for devfn: 0e.0 350. pci_scan_get_dev, found dev 00000000 351. pci_scan_get_dev, looking for devfn: 0f.0 352. pci_scan_get_dev, found dev 00000000 353. pci_scan_get_dev, looking for devfn: 10.0 354. pci_scan_get_dev, found dev 00000000 355. pci_scan_get_dev, looking for devfn: 11.0 356. pci_scan_get_dev, found dev 00000000 357. pci_scan_get_dev, looking for devfn: 12.0 358. pci_scan_get_dev, found dev 00000000 359. pci_scan_get_dev, looking for devfn: 13.0 360. pci_scan_get_dev, found dev 00000000 361. pci_scan_get_dev, looking for devfn: 14.0 362. pci_scan_get_dev, found dev 00000000 363. pci_scan_get_dev, looking for devfn: 15.0 364. pci_scan_get_dev, found dev 00000000 365. pci_scan_get_dev, looking for devfn: 16.0 366. pci_scan_get_dev, found dev 00000000 367. pci_scan_get_dev, looking for devfn: 17.0 368. pci_scan_get_dev, found dev 00000000 369. pci_scan_get_dev, looking for devfn: 18.0 370. pci_scan_get_dev, found dev 00000000 371. pci_scan_get_dev, looking for devfn: 19.0 372. pci_scan_get_dev, found dev 00000000 373. pci_scan_get_dev, looking for devfn: 1a.0 374. pci_scan_get_dev, found dev 00000000 375. pci_scan_get_dev, looking for devfn: 1b.0 376. pci_scan_get_dev, found dev 00000000 377. pci_scan_get_dev, looking for devfn: 1c.0 378. pci_scan_get_dev, found dev 00000000 379. pci_scan_get_dev, looking for devfn: 1d.0 380. pci_scan_get_dev, found dev 00000000 381. pci_scan_get_dev, looking for devfn: 1e.0 382. pci_scan_get_dev, found dev 00000000 383. pci_scan_get_dev, looking for devfn: 1f.0 384. pci_scan_get_dev, found dev 00000000 385. POST: 0x25 386. PCI: pci_scan_bus returning with max=03 387. POST: 0x55 388. PCI: pci_scan_bus for bus 4 389. POST: 0x24 390. pci_scan_get_dev, looking for devfn: 00.0 391. pci_scan_get_dev, found dev 00000000 392. PCI: 04:00.0 [1022/7464] enabled 393. pci_scan_get_dev, looking for devfn: 00.1 394. pci_scan_get_dev, found dev 00000000 395. PCI: 04:00.1 [1022/7464] enabled 396. pci_scan_get_dev, looking for devfn: 00.2 397. pci_scan_get_dev, found dev 00000000 398. PCI: 04:00.2 [1022/7463] enabled 399. pci_scan_get_dev, looking for devfn: 00.3 400. pci_scan_get_dev, found dev 00000000 401. pci_scan_get_dev, looking for devfn: 00.4 402. pci_scan_get_dev, found dev 00000000 403. pci_scan_get_dev, looking for devfn: 00.5 404. pci_scan_get_dev, found dev 00000000 405. pci_scan_get_dev, looking for devfn: 00.6 406. pci_scan_get_dev, found dev 00000000 407. pci_scan_get_dev, looking for devfn: 00.7 408. pci_scan_get_dev, found dev 00000000 409. pci_scan_get_dev, looking for devfn: 01.0 410. pci_scan_get_dev, found dev 00000000 411. PCI: 04:01.0 [1022/7462] ops 412. PCI: 04:01.0 [1022/7462] enabled 413. pci_scan_get_dev, looking for devfn: 02.0 414. pci_scan_get_dev, found dev 00000000 415. pci_scan_get_dev, looking for devfn: 03.0 416. pci_scan_get_dev, found dev 00000000 417. pci_scan_get_dev, looking for devfn: 04.0 418. pci_scan_get_dev, found dev 00000000 419. PCI: 04:04.0 [1002/4752] enabled 420. pci_scan_get_dev, looking for devfn: 05.0 421. pci_scan_get_dev, found dev 00000000 422. pci_scan_get_dev, looking for devfn: 06.0 423. pci_scan_get_dev, found dev 00000000 424. pci_scan_get_dev, looking for devfn: 07.0 425. pci_scan_get_dev, found dev 00000000 426. pci_scan_get_dev, looking for devfn: 08.0 427. pci_scan_get_dev, found dev 00000000 428. pci_scan_get_dev, looking for devfn: 09.0 429. pci_scan_get_dev, found dev 00000000 430. pci_scan_get_dev, looking for devfn: 0a.0 431. pci_scan_get_dev, found dev 00000000 432. pci_scan_get_dev, looking for devfn: 0b.0 433. pci_scan_get_dev, found dev 00000000 434. pci_scan_get_dev, looking for devfn: 0c.0 435. pci_scan_get_dev, found dev 00000000 436. pci_scan_get_dev, looking for devfn: 0d.0 437. pci_scan_get_dev, found dev 00000000 438. pci_scan_get_dev, looking for devfn: 0e.0 439. pci_scan_get_dev, found dev 00000000 440. pci_scan_get_dev, looking for devfn: 0f.0 441. pci_scan_get_dev, found dev 00000000 442. pci_scan_get_dev, looking for devfn: 10.0 443. pci_scan_get_dev, found dev 00000000 444. pci_scan_get_dev, looking for devfn: 11.0 445. pci_scan_get_dev, found dev 00000000 446. pci_scan_get_dev, looking for devfn: 12.0 447. pci_scan_get_dev, found dev 00000000 448. pci_scan_get_dev, looking for devfn: 13.0 449. pci_scan_get_dev, found dev 00000000 450. pci_scan_get_dev, looking for devfn: 14.0 451. pci_scan_get_dev, found dev 00000000 452. pci_scan_get_dev, looking for devfn: 15.0 453. pci_scan_get_dev, found dev 00000000 454. pci_scan_get_dev, looking for devfn: 16.0 455. pci_scan_get_dev, found dev 00000000 456. pci_scan_get_dev, looking for devfn: 17.0 457. pci_scan_get_dev, found dev 00000000 458. pci_scan_get_dev, looking for devfn: 18.0 459. pci_scan_get_dev, found dev 00000000 460. pci_scan_get_dev, looking for devfn: 19.0 461. pci_scan_get_dev, found dev 00000000 462. pci_scan_get_dev, looking for devfn: 1a.0 463. pci_scan_get_dev, found dev 00000000 464. pci_scan_get_dev, looking for devfn: 1b.0 465. pci_scan_get_dev, found dev 00000000 466. pci_scan_get_dev, looking for devfn: 1c.0 467. pci_scan_get_dev, found dev 00000000 468. pci_scan_get_dev, looking for devfn: 1d.0 469. pci_scan_get_dev, found dev 00000000 470. pci_scan_get_dev, looking for devfn: 1e.0 471. pci_scan_get_dev, found dev 00000000 472. pci_scan_get_dev, looking for devfn: 1f.0 473. pci_scan_get_dev, found dev 00000000 474. POST: 0x25 475. PCI: pci_scan_bus returning with max=04 476. POST: 0x55 477. scan_static_bus for PCI: 01:04.0 478. scan_static_bus done 479. PCI: pci_scan_bus returning with max=04 480. POST: 0x55 481. PCI: pci_scan_bus returning with max=04 482. POST: 0x55 483. done 484. POST: 0x66 485. Allocating resources... 486. Allocating VGA resource PCI: 04:04.0 487. ASSIGN RESOURCES, bus 0 488. PCI: 00:18.0 c0 <- [0x00001000 - 0x00003fff] node 0 link 2 io 489. PCI: 00:18.0 b8 <- [0xfc000000 - 0xfd2fffff] node 0 link 2 mem 490. ASSIGN RESOURCES, bus 1 491. PCI: 01:01.0 1c <- [0x00003000 - 0x00002fff] bus 2 io 492. PCI: 01:01.0 24 <- [0xfd200000 - 0xfd1fffff] bus 2 prefmem 493. PCI: 01:01.0 20 <- [0xfd200000 - 0xfd1fffff] bus 2 mem 494. PCI: 01:01.1 10 <- [0xfd200000 - 0xfd200fff] mem 495. PCI: 01:02.0 1c <- [0x00001000 - 0x00001fff] bus 3 io 496. PCI: 01:02.0 24 <- [0xfd200000 - 0xfd1fffff] bus 3 prefmem 497. PCI: 01:02.0 20 <- [0xfd100000 - 0xfd1fffff] bus 3 mem 498. ASSIGN RESOURCES, bus 3 499. PCI: 03:01.0 10 <- [0x00001000 - 0x000010ff] io 500. PCI: 03:01.0 14 <- [0xfd100000 - 0xfd10ffff] mem 501. PCI: 03:01.0 1c <- [0xfd110000 - 0xfd11ffff] mem 502. PCI: 03:01.1 10 <- [0x00001400 - 0x000014ff] io 503. PCI: 03:01.1 14 <- [0xfd120000 - 0xfd12ffff] mem 504. PCI: 03:01.1 1c <- [0xfd130000 - 0xfd13ffff] mem 505. PCI: 03:03.0 10 <- [0xfd140000 - 0xfd14ffff] mem 506. PCI: 03:03.0 18 <- [0xfd150000 - 0xfd15ffff] mem 507. PCI: 03:03.1 10 <- [0xfd160000 - 0xfd16ffff] mem 508. PCI: 03:03.1 18 <- [0xfd170000 - 0xfd17ffff] mem 509. ASSIGNED RESOURCES, bus 3 510. PCI: 01:02.1 10 <- [0xfd201000 - 0xfd201fff] mem 511. PCI: 01:03.0 1c <- [0x00002000 - 0x00002fff] bus 4 io 512. PCI: 01:03.0 24 <- [0xfd200000 - 0xfd1fffff] bus 4 prefmem 513. PCI: 01:03.0 20 <- [0xfc000000 - 0xfd0fffff] bus 4 mem 514. ASSIGN RESOURCES, bus 4 515. PCI: 04:00.0 10 <- [0xfd000000 - 0xfd000fff] mem 516. PCI: 04:00.1 10 <- [0xfd001000 - 0xfd001fff] mem 517. PCI: 04:00.2 10 <- [0xfd004000 - 0xfd0040ff] mem 518. PCI: 04:00.2 14 <- [0xfd005000 - 0xfd00501f] mem 519. PCI: 04:01.0 10 <- [0xfd002000 - 0xfd002fff] mem 520. PCI: 04:04.0 10 <- [0xfc000000 - 0xfcffffff] mem 521. PCI: 04:04.0 14 <- [0x00002000 - 0x000020ff] io 522. PCI: 04:04.0 18 <- [0xfd003000 - 0xfd003fff] mem 523. ASSIGNED RESOURCES, bus 4 524. PCI: 01:04.0 00 <- [0x00000000 - 0xffffffff] io 525. PCI: 01:04.0 00 <- [0x00000000 - 0xffffffff] mem 526. PCI: 01:04.1 20 <- [0x00003ce0 - 0x00003cef] io 527. PCI: 01:04.2 10 <- [0x00003cc0 - 0x00003cdf] io 528. PCI: 01:04.3 58 <- [0x00003000 - 0x000030ff] io 529. PCI: 01:04.5 10 <- [0x00003400 - 0x000034ff] io 530. PCI: 01:04.5 14 <- [0x00003c80 - 0x00003cbf] io 531. PCI: 01:04.6 10 <- [0x00003800 - 0x000038ff] io 532. PCI: 01:04.6 14 <- [0x00003c00 - 0x00003c7f] io 533. ASSIGNED RESOURCES, bus 1 534. PCI: 00:18.3 94 <- [0xf8000000 - 0xfbffffff] mem 535. PCI: 00:19.3 94 <- [0xf8000000 - 0xfbffffff] mem 536. ASSIGNED RESOURCES, bus 0 537. done. 538. POST: 0x88 539. Enabling resourcess... 540. PCI: 00:18.0 bridge ctrl <- 0000 541. Kid 0 of k8: bridge ctrl says: 0x0 542. Kid 1 of k8: bridge ctrl says: 0x0 543. Kid 2 of k8: bridge ctrl says: 0x8 544. setting MMIO routing for VGA reg:0x90, base: 0xa03, limit 0xd20 545. PCI: 00:18.0 cmd <- 140 546. PCI: 01:01.0 bridge ctrl <- 0003 547. PCI: 01:01.0 cmd <- 147 548. PCI: 01:01.1 cmd <- 146 549. PCI: 01:02.0 bridge ctrl <- 0003 550. PCI: 01:02.0 cmd <- 147 551. PCI: 03:01.0 cmd <- 143 552. PCI: 03:01.1 cmd <- 143 553. PCI: 03:03.0 cmd <- 142 554. PCI: 03:03.1 cmd <- 142 555. PCI: 01:02.1 cmd <- 146 556. PCI: 01:03.0 bridge ctrl <- 000b 557. PCI: 01:03.0 cmd <- 147 558. PCI: 04:00.0 cmd <- 142 559. PCI: 04:00.1 cmd <- 142 560. PCI: 04:00.2 cmd <- 142 561. PCI: 04:01.0 cmd <- 142 562. PCI: 04:04.0 cmd <- 1c3 563. PCI: 01:04.0 cmd <- 14f 564. PCI: 01:04.1 cmd <- 141 565. PCI: 01:04.2 cmd <- 141 566. PCI: 01:04.3 cmd <- 141 567. PCI: 01:04.5 cmd <- 141 568. PCI: 01:04.6 cmd <- 141 569. PCI: 00:18.1 cmd <- 140 570. PCI: 00:18.2 cmd <- 140 571. PCI: 00:18.3 cmd <- 140 572. PCI: 00:19.0 bridge ctrl <- 0000 573. Kid 0 of k8: bridge ctrl says: 0x0 574. Kid 1 of k8: bridge ctrl says: 0x0 575. Kid 2 of k8: bridge ctrl says: 0x0 576. PCI: 00:19.0 cmd <- 140 577. PCI: 00:19.1 cmd <- 140 578. PCI: 00:19.2 cmd <- 140 579. PCI: 00:19.3 cmd <- 140 580. done. 581. Initializing devices... 582. PCI: 00:18.0 init 583. PCI: 00:18.3 init 584. NB: Function 3 Misc Control.. done. 585. PCI: 00:19.0 init 586. PCI: 00:19.3 init 587. NB: Function 3 Misc Control.. done. 588. PCI: 01:01.0 init 589. PCI: 01:02.0 init 590. PNP: 002e.0 init 591. PNP: 002e.2 init 592. PNP: 002e.5 init 593. PNP: 002e.b init 594. PCI: 01:03.0 init 595. PCI: 01:04.0 init 596. RTC Init 597. Invalid CMOS LB checksum 598. enabling HPET @0xfed00000 599. PCI: 01:04.1 init 600. IDE1 IDE0 PCI: 01:04.3 init 601. set power on after power fail 602. Devices initialized 603. POST: 0x89 604. mem[0].basek = 00000000 mem[0].sizek = 00000280 605. mem[1].basek = 00000300 mem[1].sizek = 000ffd00 606. POST: 0x70 607. totalram: 1024M 608. Initializing CPU #0 609. POST: 0x60 610. Enabling cache... 611. Setting fixed MTRRs(0-88) type: UC 612. Setting fixed MTRRs(0-16) type: WB 613. Setting fixed MTRRs(24-88) type: WB 614. DONE fixed MTRRs 615. Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB 616. DONE variable MTRRs 617. Clear out the extra MTRR's 618. call intel_enable_fixed_mtrr() 619. call intel_enable_var_mtrr() 620. Leave setup_mtrrs 621. POST: 0x6a 622. done. 623. Max cpuid index : 1 624. Vendor ID : AuthenticAMD 625. Processor Type : 0x00 626. Processor Family : 0x0f 627. Processor Model : 0x05 628. Processor Mask : 0x00 629. Processor Stepping : 0x0a 630. Feature flags : 0x078bfbff 631. POST: 0x92 632. MTRR check 633. Fixed MTRRs : Enabled 634. Variable MTRRs: Enabled 635. POST: 0x93 636. setup_iorrs: setting IORR1 for AGP aperture base 0xf8000000, size 0x4000000 637. Clearing memory 0K - 1048576K: --------------- done 638. Setting up local apic... apic_id: 0 done. 639. POST: 0x9b 640. CPU #0 Initialized 641. POST: 0x75 642. secondary_cpu_init 643. Waiting for 2 CPUS to stop 644. mem[0].basek = 00000000 mem[0].sizek = 00000280 645. mem[1].basek = 00000300 mem[1].sizek = 000ffd00 646. Initializing CPU #1 647. POST: 0x60 648. Enabling cache... 649. Setting fixed MTRRs(0-88) type: UC 650. Setting fixed MTRRs(0-16) type: WB 651. Setting fixed MTRRs(24-88) type: WB 652. DONE fixed MTRRs 653. Setting variable MTRR 0, base: 0MB, range: 1024MB, type WB 654. DONE variable MTRRs 655. Clear out the extra MTRR's 656. call intel_enable_fixed_mtrr() 657. call intel_enable_var_mtrr() 658. Leave setup_mtrrs 659. POST: 0x6a 660. done. 661. Max cpuid index : 1 662. Vendor ID : AuthenticAMD 663. Processor Type : 0x00 664. Processor Family : 0x0f 665. Processor Model : 0x05 666. Processor Mask : 0x00 667. Processor Stepping : 0x0a 668. Feature flags : 0x078bfbff 669. POST: 0x92 670. MTRR check 671. Fixed MTRRs : Enabled 672. Variable MTRRs: Enabled 673. POST: 0x93 674. setup_iorrs: setting IORR1 for AGP aperture base 0xf8000000, size 0x4000000 675. Clearing memory 0K - 16384K: done 676. Setting up local apic... apic_id: 1 done. 677. POST: 0x9b 678. CPU #1 Initialized 679. secondary_cpu_init 1/1 680. All AP CPUs stopped 681. POST: 0x9a 682. Copying IRQ routing tables to 0xf0000...done. 683. Verifing copy of IRQ routing tables at 0xf0000...done 684. Checking IRQ routing table consistency... 685. /home/sjk/freebios2/src/arch/i386/boot/pirq_routing.c: 28:check_pirq_routing_ 686. table() - irq_routing_table located at: 0x000f0000 687. done. 688. POST: 0x96 689. Wrote the mp table end at: 00000020 - 000001c4 690. Wrote linuxbios table at: 00000500 - 00000d50 checksum 7af2 691. Welcome to elfboot, the open sourced starter. 692. January 2002, Eric Biederman. 693. Version 1.3 694. POST: 0xf8 695. 23:stream_init() - rom_stream: 0xfffe0000 - 0xfffeffff 696. Found ELF candiate at offset 0 697. New segment addr 0x100000 size 0x24d60 offset 0xc0 filesize 0xad28 698. (cleaned up) New segment addr 0x100000 size 0x24d60 offset 0xc0 filesize 0xad28 699. New segment addr 0x124d60 size 0x48 offset 0xae00 filesize 0x48 700. (cleaned up) New segment addr 0x124d60 size 0x48 offset 0xae00 filesize 0x48 701. Dropping non PT_LOAD segment 702. Dropping non PT_LOAD segment 703. Loading Segment: addr: 0x0000000000100000 memsz: 0x0000000000024d60 filesz: 0x00 704. 0000000000ad28 705. Clearing Segment: addr: 0x000000000010ad28 memsz: 0x000000000001a038 706. Loading Segment: addr: 0x0000000000124d60 memsz: 0x0000000000000048 filesz: 0x00 707. 00000000000048 708. Jumping to boot code at 0x107adc 709. POST: 0xfe 710. FILO version 0.4.2 (sjk at localhost.localdomain) Fri Jul 30 10:00:55 EDT 2004 711. collect_sys_info: boot eax = 0xe1fb007 712. collect_sys_info: boot ebx = 0x3ffe3ebc 713. collect_sys_info: boot arg = 0x3ffe3ebc 714. malloc_diag: alloc: 0 bytes (0 blocks), free: 16376 bytes (1 blocks) 715. malloc_diag: alloc: 24 bytes (1 blocks), free: 16352 bytes (1 blocks) 716. collect_elfboot_info: Bootloader: elfboot 717. collect_elfboot_info: Version: 1.3 718. malloc_diag: alloc: 40 bytes (2 blocks), free: 16336 bytes (1 blocks) 719. collect_linuxbios_info: Searching for LinuxBIOS tables... 720. find_lb_table: Found canidate at: 00000500 721. find_lb_table: header checksum o.k. 722. find_lb_table: table checksum o.k. 723. find_lb_table: record count o.k. 724. collect_linuxbios_info: Found LinuxBIOS table at: 00000500 725. malloc_diag: alloc: 128 bytes (3 blocks), free: 16248 bytes (1 blocks) 726. convert_memmap: 0x00000000000000 0x00000000000db0 16 727. convert_memmap: 0x00000000000db0 0x0000000009f250 1 728. convert_memmap: 0x000000000c0000 0x00000000030000 1 729. convert_memmap: 0x000000000f0000 0x00000000000400 16 730. convert_memmap: 0x000000000f0400 0x0000003ff0fc00 1 731. collect_sys_info: 0000000000000db0-00000000000a0000 732. collect_sys_info: 00000000000c0000-00000000000f0000 733. collect_sys_info: 00000000000f0400-0000000040000000 734. collect_sys_info: RAM 1024 MB 735. relocate: Current location: 0x100000-0x124da7 736. relocate: Relocating to 0x3ffdb250-0x3ffffff7... ok 737. setup_timers: CPU 1993 MHz 738. pci_init: Scanning PCI: found 8 devices 739. malloc_diag: alloc: 232 bytes (4 blocks), free: 16144 bytes (1 blocks) 740. pci_init: 00:18.0 1022:1100 0600 00 741. pci_init: 00:18.1 1022:1101 0600 00 742. pci_init: 00:18.2 1022:1102 0600 00 743. pci_init: 00:18.3 1022:1103 0600 00 744. pci_init: 00:19.0 1022:1100 0600 00 745. pci_init: 00:19.1 1022:1101 0600 00 746. pci_init: 00:19.2 1022:1102 0600 00 747. pci_init: 00:19.3 1022:1103 0600 00 748. Press for default boot, or for boot prompt... 10  9 8 7 6  749. boot: hda3:/boot/vmlinuz root=/dev/hda3 console=tty0 console=ttyS0,115200 desktop splash=silent showopts 751. malloc_diag: alloc: 344 bytes (5 blocks), free: 16032 bytes (1 blocks) 752. malloc_diag: alloc: 360 bytes (6 blocks), free: 16016 bytes (1 blocks) 753. file_open: dev=hda3, path=/boot/vmlinuz 754. find_ide_controller: PCI IDE #0 not found 755. IDE channel 0 not found 756. devopen: failed to open ide 757. malloc_diag: alloc: 344 bytes (5 blocks), free: 16032 bytes (1 blocks) 758. malloc_diag: alloc: 232 bytes (4 blocks), free: 16144 bytes (1 blocks) 759. boot: hda3:/boot/vmlinuz root=/dev/hda3 console=tty0 console=ttyS0,115200 desktop splash=silent showopts 761. malloc_diag: alloc: 344 bytes (5 blocks), free: 16032 bytes (1 blocks) 762. malloc_diag: alloc: 360 bytes (6 blocks), free: 16016 bytes (1 blocks) 763. file_open: dev=hda3, path=/boot/vmlinuz 764. find_ide_controller: PCI IDE #0 not found 765. IDE channel 0 not found 766. devopen: failed to open ide 767. malloc_diag: alloc: 344 bytes (5 blocks), free: 16032 bytes (1 blocks) 768. malloc_diag: alloc: 232 bytes (4 blocks), free: 16144 bytes (1 blocks) 769. boot: hda3:/boot/vmlinuz root=/dev/hda3 console=tty0 console=ttyS0,115200 desktop splash=silent showopts ------ Sincerely, Ken Fuchs From stepan at openbios.org Mon Aug 2 14:32:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Mon Aug 2 14:32:00 2004 Subject: AMD Serenade: Filo can't find/access ATA HD (IDE - /dev/hda) In-Reply-To: <200408021956.i72JuOcq001310@tundra.winternet.com> References: <200408021956.i72JuOcq001310@tundra.winternet.com> Message-ID: <20040802200720.GA4939@openbios.org> * Ken Fuchs [040802 21:56]: > All serial input/output is prefixed with <#>. for easier reference. > > /dev/hda3 contains SuSE GNU/Linux 9.1 on a single reiserfs filesystem. > The Linux kernel is SuSE patched /boot/vmlinuz-2.6.4-52-smp. vmlinuz > is a symbolic link to this kernel. The SuSE GNU/Linux 9.1 system > works fine when the original BIOS is used. > > The filo command used is: > > 749. boot: hda3:/boot/vmlinuz root=/dev/hda3 console=tty0 console=ttyS0,115200 desktop splash=silent showopts This is a filo "problem", it stops before it even tries to boot SUSE Linux. You need to force filo to probe all the PCI busses, not only bus 0. See the mailing list archive for more information.. Stefan From rminnich at lanl.gov Mon Aug 2 14:40:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Mon Aug 2 14:40:01 2004 Subject: Freebios2 amd/serenade keyboard init error In-Reply-To: <9B124F08B3EFDA4F8813B05102DC719501A90203@nh-ex01.nh.bench.com> Message-ID: On Wed, 28 Jul 2004 Stephen.Kimball at bench.com wrote: > I have built LinuxBIOS for the amd/serenade target and I get about 600 > lines of good output to the serial port, which ends with > > > > Initializing devices... > > PCI: 00:18.0 init > > PCI: 00:18.3 init > > NB: Function 3 Misc Control.. done. > > PCI: 00:19.0 init > > PCI: 00:19.3 init > > NB: Function 3 Misc Control.. done. > > PCI: 01:01.0 init > > PCI: 01:02.0 init > > PNP: 002e.0 init > > PNP: 002e.2 init > > PNP: 002e.5 init > > POST: 0x00 > > POST: 0x00 > > POST: 0x00 > > POST: 0x00 > > POST: 0x00 > > POST: 0x00 > > > > The last line "POST: 0x00" repeats forever. PC80/keyboard.c is trying > to initialize the keyboard. The code that is running is > > > > /* empty input buffer or any other command/data will be lost > */ > > while ((inb(0x64) & 0x02)) > > post_code(0); > > > > The inb(0x64) reads 0xff forever. I heard that the keyboard > initialization may not be needed. > > How can I fix this? Thanks. As was noted earlier on this list, that keyboard controller part is "seriously fucked up" on that board. for now, turn off the keyboard, there's something wrong on that mobo we have not worked out. Second, write user-mode linux programs to try to get that stupid part to work, and see what is wrong. ron p.s. note I am back, but under really bizarre circumstances, as you can tell by the line at the end of this note. ***** DUSA LACSI-HW ***** From dwh at lanl.gov Mon Aug 2 14:46:01 2004 From: dwh at lanl.gov (Hendricks David W.) Date: Mon Aug 2 14:46:01 2004 Subject: AMD Serenade: Filo can't find/access ATA HD (IDE - /dev/hda) In-Reply-To: <200408021956.i72JuOcq001310@tundra.winternet.com> Message-ID: Try FILO 0.4.2 if you aren't using it already. It should incorporate a PCI scanning fix that Stefan posted a while back (August?). On Mon, 2 Aug 2004, Ken Fuchs wrote: > Filo returns: > > 753. file_open: dev=hda3, path=/boot/vmlinuz > 754. find_ide_controller: PCI IDE #0 not found > 755. IDE channel 0 not found > 756. devopen: failed to open ide ------------------------- ***** DUSA LACSI-HW ***** From kfuchs at winternet.com Mon Aug 2 15:13:01 2004 From: kfuchs at winternet.com (Ken Fuchs) Date: Mon Aug 2 15:13:01 2004 Subject: AMD Serenade: Filo can't find/access ATA HD (IDE - /dev/hda) Message-ID: <200408022049.i72Kn36Z001628@tundra.winternet.com> > On Mon, 2 Aug 2004, Ken Fuchs wrote: > > Filo returns: > > > > 753. file_open: dev=hda3, path=/boot/vmlinuz > > 754. find_ide_controller: PCI IDE #0 not found > > 755. IDE channel 0 not found > > 756. devopen: failed to open ide "Hendricks David W." Wrote: > Try FILO 0.4.2 if you aren't using it already. It should incorporate a > PCI scanning fix that Stefan posted a while back (August?). Sorry, I forgot to mention that filo 0.4.2 was being used when the above error occurred. Ken Fuchs From dwh at lanl.gov Mon Aug 2 15:23:01 2004 From: dwh at lanl.gov (Hendricks David W.) Date: Mon Aug 2 15:23:01 2004 Subject: AMD Serenade: Filo can't find/access ATA HD (IDE - /dev/hda) In-Reply-To: <200408022049.i72Kn36Z001628@tundra.winternet.com> Message-ID: Is PCI_BRUTE_SCAN = 1 set in your FILO Config file? On Mon, 2 Aug 2004, Ken Fuchs wrote: > > On Mon, 2 Aug 2004, Ken Fuchs wrote: > > > Filo returns: > > > > > > 753. file_open: dev=hda3, path=/boot/vmlinuz > > > 754. find_ide_controller: PCI IDE #0 not found > > > 755. IDE channel 0 not found > > > 756. devopen: failed to open ide > > "Hendricks David W." Wrote: > > > Try FILO 0.4.2 if you aren't using it already. It should incorporate a > > PCI scanning fix that Stefan posted a while back (August?). > > Sorry, I forgot to mention that filo 0.4.2 was being used when the > above error occurred. > > Ken Fuchs > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- ------------------------- ***** DUSA LACSI-HW ***** From twarren at nvidia.com Mon Aug 2 16:48:01 2004 From: twarren at nvidia.com (Tom Warren) Date: Mon Aug 2 16:48:01 2004 Subject: DiskOnChip 16M part OK? Message-ID: Has anyone used the 16MB DOC (8MB is discontinued) on the PCCHIPS M810LMR board with the default pcchips config? Or is there anything I need to change & recompile for the larger part? Thanks, - Tom NVIDIA -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of ron minnich Sent: Monday, August 02, 2004 1:16 PM To: Stephen.Kimball at bench.com Cc: linuxbios at clustermatic.org Subject: Re: Freebios2 amd/serenade keyboard init error On Wed, 28 Jul 2004 Stephen.Kimball at bench.com wrote: > I have built LinuxBIOS for the amd/serenade target and I get about 600 > lines of good output to the serial port, which ends with > > > > Initializing devices... > > PCI: 00:18.0 init > > PCI: 00:18.3 init > > NB: Function 3 Misc Control.. done. > > PCI: 00:19.0 init > > PCI: 00:19.3 init > > NB: Function 3 Misc Control.. done. > > PCI: 01:01.0 init > > PCI: 01:02.0 init > > PNP: 002e.0 init > > PNP: 002e.2 init > > PNP: 002e.5 init > > POST: 0x00 > > POST: 0x00 > > POST: 0x00 > > POST: 0x00 > > POST: 0x00 > > POST: 0x00 > > > > The last line "POST: 0x00" repeats forever. PC80/keyboard.c is trying > to initialize the keyboard. The code that is running is > > > > /* empty input buffer or any other command/data will be > lost */ > > while ((inb(0x64) & 0x02)) > > post_code(0); > > > > The inb(0x64) reads 0xff forever. I heard that the keyboard > initialization may not be needed. > > How can I fix this? Thanks. As was noted earlier on this list, that keyboard controller part is "seriously fucked up" on that board. for now, turn off the keyboard, there's something wrong on that mobo we have not worked out. Second, write user-mode linux programs to try to get that stupid part to work, and see what is wrong. ron p.s. note I am back, but under really bizarre circumstances, as you can tell by the line at the end of this note. ***** DUSA LACSI-HW ***** _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Mon Aug 2 16:57:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Mon Aug 2 16:57:01 2004 Subject: DiskOnChip 16M part OK? In-Reply-To: Message-ID: On Mon, 2 Aug 2004, Tom Warren wrote: > Has anyone used the 16MB DOC (8MB is discontinued) on the PCCHIPS > M810LMR board with the default pcchips config? Or is there anything I > need to change & recompile for the larger part? I would just try it to start and see how it goes. I thought that DOC had a bigger 'RAM page' or some such but it should all be compatible. I hope. ron -- LANL CCS-1 email flavor: ***** Correspondance [] ***** DUSA LACSI-HW [x ] ***** DUSA LACSI-OS [ ] ***** DUSA LACSI-CS [ ] From jmiller at actuality-systems.com Wed Aug 4 08:54:01 2004 From: jmiller at actuality-systems.com (Jay Miller) Date: Wed Aug 4 08:54:01 2004 Subject: AMD Solo target : linuxbios image too big? Message-ID: Anyone know what was added to the AMD Solo image that bumped it up over 65536? Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller at acutality-systems.com From stepan at openbios.org Wed Aug 4 12:57:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Aug 4 12:57:00 2004 Subject: AMD Solo target : linuxbios image too big? In-Reply-To: References: Message-ID: <20040804183126.GA17164@openbios.org> * Jay Miller [040804 16:29]: > Anyone know what was added to the AMD Solo image that bumped it up over > 65536? I suspect it was the latest romcc changes, but I don't know. Try lowering MAXIMUM_CONSOLE_LOGLEVEL and DEFAULT_CONSOLE_LOGLEVEL to 7 (instead of 8). This will make it compile again. We should really get C-A-R in... Stefan From jmiller at actuality-systems.com Wed Aug 4 13:04:01 2004 From: jmiller at actuality-systems.com (Jay Miller) Date: Wed Aug 4 13:04:01 2004 Subject: AMD Solo target : linuxbios image too big? Message-ID: That did the trick, thanks! Jay Miller Actuality Systems, Inc. jmiller at acutality-systems.com -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Wednesday, August 04, 2004 2:31 PM To: Jay Miller Cc: linuxbios at clustermatic.org Subject: Re: AMD Solo target : linuxbios image too big? * Jay Miller [040804 16:29]: > Anyone know what was added to the AMD Solo image that bumped it up over > 65536? I suspect it was the latest romcc changes, but I don't know. Try lowering MAXIMUM_CONSOLE_LOGLEVEL and DEFAULT_CONSOLE_LOGLEVEL to 7 (instead of 8). This will make it compile again. We should really get C-A-R in... Stefan From dwh at lanl.gov Thu Aug 5 11:45:01 2004 From: dwh at lanl.gov (Hendricks David W.) Date: Thu Aug 5 11:45:01 2004 Subject: AMD Solo target : linuxbios image too big? In-Reply-To: <20040804183126.GA17164@openbios.org> Message-ID: I think last time we looked at C-A-R there were problems enabling the L1 cache that was not used for C-A-R. Seven lines of cache would work, but performance was too slow. It seems worth looking into more, of course. Did Ollie already send you his tree? On Wed, 4 Aug 2004, Stefan Reinauer wrote: > * Jay Miller [040804 16:29]: > > Anyone know what was added to the AMD Solo image that bumped it up over > > 65536? > > I suspect it was the latest romcc changes, but I don't know. Try > lowering MAXIMUM_CONSOLE_LOGLEVEL and DEFAULT_CONSOLE_LOGLEVEL to 7 > (instead of 8). This will make it compile again. > > We should really get C-A-R in... > > Stefan > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > -- ***** DUSA LACSI-HW ***** From dwh at lanl.gov Thu Aug 5 16:06:01 2004 From: dwh at lanl.gov (Hendricks David W.) Date: Thu Aug 5 16:06:01 2004 Subject: Etherboot 5.2.4 + LinuxBIOS + e1000 Message-ID: I need help with using Etherboot with LinuxBIOS to boot a Linux kernel over a network using an e1000 NIC and DHCP + TFTP. Using an old EEPro100 payload, I can get this far: Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 Searching for linuxbios tables... lb: ram start: 0000000000000BDC size: 000000000009F424 high: 00000000000A0000 lb: ram start: 00000000000C0000 size: 0000000000030000 high: 00000000000F0000 lb: ram start: 00000000000F0400 size: 000000003FF0FC00 high: 0000000040000000 base_mem_k = 640 high_mem_k = 1047552 ROM segment 0x0000 length 0x0000 reloc 0x9400 end 00000003:df08d339, start 00000002:f628d237 32-bit delta 3726 calibrate_tsc 32-bit result is 1152701 clocks_per_tick = 1152701 Etherboot 5.0.5eb1 (GPL) ELF (Multiboot) for [EEPRO100] bus 00, function C0, vendor 1022, device 1100 . . . bus 04, function 30, vendor 1002, device 4752 Probing...[EEPRO100]No adapter found Here is the output when I run "file" on the eepro100 payload: ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically linked, stripped This payload won't work since I have an e1000, not an eepro100. But when I use the e1000 ELF file generated by Etherbot 5.2.4 (make bin/e1000.elf) I get almost no useful output to help in troubleshooting: Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 Loading Etherboot version: 5.2.4 Here is the output when I run "file" on this payload: ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically linkedfile: corrupted section header size. Perhaps someone on this list can help me figure out what I am doing wrong? -- ***** DUSA LACSI-SW ***** From YhLu at tyan.com Thu Aug 5 16:42:00 2004 From: YhLu at tyan.com (YhLu) Date: Thu Aug 5 16:42:00 2004 Subject: Etherboot 5.2.4 + LinuxBIOS + e1000 Message-ID: <3174569B9743D511922F00A0C943142305A9F802@TYANWEB> I just sent you my tar ball of Etherboot, did you get that? Regards YH -----Original Message----- From: Hendricks David W. [mailto:dwh at lanl.gov] Sent: Thursday, August 05, 2004 2:42 PM To: linuxbios at clustermatic.org Subject: Etherboot 5.2.4 + LinuxBIOS + e1000 I need help with using Etherboot with LinuxBIOS to boot a Linux kernel over a network using an e1000 NIC and DHCP + TFTP. Using an old EEPro100 payload, I can get this far: Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 Searching for linuxbios tables... lb: ram start: 0000000000000BDC size: 000000000009F424 high: 00000000000A0000 lb: ram start: 00000000000C0000 size: 0000000000030000 high: 00000000000F0000 lb: ram start: 00000000000F0400 size: 000000003FF0FC00 high: 0000000040000000 base_mem_k = 640 high_mem_k = 1047552 ROM segment 0x0000 length 0x0000 reloc 0x9400 end 00000003:df08d339, start 00000002:f628d237 32-bit delta 3726 calibrate_tsc 32-bit result is 1152701 clocks_per_tick = 1152701 Etherboot 5.0.5eb1 (GPL) ELF (Multiboot) for [EEPRO100] bus 00, function C0, vendor 1022, device 1100 . . . bus 04, function 30, vendor 1002, device 4752 Probing...[EEPRO100]No adapter found Here is the output when I run "file" on the eepro100 payload: ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically linked, stripped This payload won't work since I have an e1000, not an eepro100. But when I use the e1000 ELF file generated by Etherbot 5.2.4 (make bin/e1000.elf) I get almost no useful output to help in troubleshooting: Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 Loading Etherboot version: 5.2.4 Here is the output when I run "file" on this payload: ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically linkedfile: corrupted section header size. Perhaps someone on this list can help me figure out what I am doing wrong? -- ***** DUSA LACSI-SW ***** _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From dwh at lanl.gov Thu Aug 5 16:47:02 2004 From: dwh at lanl.gov (Hendricks David W.) Date: Thu Aug 5 16:47:02 2004 Subject: Etherboot 5.2.4 + LinuxBIOS + e1000 In-Reply-To: <3174569B9743D511922F00A0C943142305A9F802@TYANWEB> Message-ID: Yes, I will experiment with it and post some questions tomorrow. Thank you! On Thu, 5 Aug 2004, YhLu wrote: > I just sent you my tar ball of Etherboot, did you get that? > > Regards > > YH > > -----Original Message----- > From: Hendricks David W. [mailto:dwh at lanl.gov] > Sent: Thursday, August 05, 2004 2:42 PM > To: linuxbios at clustermatic.org > Subject: Etherboot 5.2.4 + LinuxBIOS + e1000 > > I need help with using Etherboot with LinuxBIOS to boot a Linux > kernel over a network using an e1000 NIC and DHCP + TFTP. Using an old > EEPro100 payload, I can get this far: > > Welcome to elfboot, the open sourced starter. > January 2002, Eric Biederman. > Version 1.3 > > > Searching for linuxbios tables... > lb: ram start: 0000000000000BDC size: 000000000009F424 high: > 00000000000A0000 > lb: ram start: 00000000000C0000 size: 0000000000030000 high: > 00000000000F0000 > lb: ram start: 00000000000F0400 size: 000000003FF0FC00 high: > 0000000040000000 > base_mem_k = 640 high_mem_k = 1047552 > ROM segment 0x0000 length 0x0000 reloc 0x9400 > end 00000003:df08d339, start 00000002:f628d237 > 32-bit delta 3726 > calibrate_tsc 32-bit result is 1152701 > clocks_per_tick = 1152701 > Etherboot 5.0.5eb1 (GPL) ELF (Multiboot) for [EEPRO100] > bus 00, function C0, vendor 1022, device 1100 > . > . > . > bus 04, function 30, vendor 1002, device 4752 > Probing...[EEPRO100]No adapter found > > Here is the output when I run "file" on the eepro100 payload: > ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically > linked, stripped > > This payload won't work since I have an e1000, not an eepro100. But when > I use the e1000 ELF file generated by Etherbot 5.2.4 (make bin/e1000.elf) > I get almost no useful output to help in troubleshooting: > > Welcome to elfboot, the open sourced starter. > January 2002, Eric Biederman. > Version 1.3 > > Loading Etherboot version: 5.2.4 > > Here is the output when I run "file" on this payload: > ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically > linkedfile: corrupted section header size. > > Perhaps someone on this list can help me figure out what I am doing > wrong? > -- ***** Correspondence ***** ***** DUSA LACSI-HW ***** ***** DUSA LACSI-SW ***** ***** DUSA LACSI-OS ***** From jmiller at actuality-systems.com Fri Aug 6 10:24:00 2004 From: jmiller at actuality-systems.com (Jay Miller) Date: Fri Aug 6 10:24:00 2004 Subject: BIST disabled on AMD solo Message-ID: Is it safe to run bist on AMD solo boards? Seems like the other x86_64 boards are using it. Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller at acutality-systems.com From chenm003 at 163.com Sat Aug 7 05:37:01 2004 From: chenm003 at 163.com (chenm003 at 163.com) Date: Sat Aug 7 05:37:01 2004 Subject: [can any one give me a copy of USB BOOT] Message-ID: <200408070936.i779apK27895@nwn.definitive.org> I will study OHCI now, I want to work for linuxbios. LinuxLabs USB bootloader http://www.mail-archive.com/linuxbios at clustermatic.org/msg06472.html ????????CM ????????chenm003 AT 163 DOT com ??????????2004-08-07 From stepan at openbios.org Sat Aug 7 10:21:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Sat Aug 7 10:21:01 2004 Subject: ROM-Size-Problem In-Reply-To: <40FD01CA.80700@corscience.de> References: <40FCEC90.1050405@corscience.de> <20040720104436.GB4680@openbios.org> <40FD01CA.80700@corscience.de> Message-ID: <20040807155752.GB32669@openbios.org> * Thomas Leidenfrost [040720 13:28]: > okay, I've got a nullmodem-cable here, but how can I see if there is any > output? Connect it to your LinuxBIOS machine on the one side, and to another machine running a terminal program on the other side (ie minicom or screen) > my graphics-controller is integrated in the Cx5530A-chipset. I think it > should be supported, or am I wrong? Someone here on the list got it working, but generally speaking, it does not work out of the box. Cx5530 has a pretty broken design.. Stefan From stepan at openbios.org Sat Aug 7 13:34:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Sat Aug 7 13:34:00 2004 Subject: BIST disabled on AMD solo In-Reply-To: References: Message-ID: <20040807191018.GB2376@openbios.org> * Jay Miller [040806 17:59]: > Is it safe to run bist on AMD solo boards? > > Seems like the other x86_64 boards are using it. It should work fine. If you are able to test this on a SOLO, I can enable it in CVS. I don't have an appropriate machine here anymore. Stefan From ian at abelon.com Sat Aug 7 13:40:01 2004 From: ian at abelon.com (Ian Smith) Date: Sat Aug 7 13:40:01 2004 Subject: ROM-Size-Problem In-Reply-To: <20040807155752.GB32669@openbios.org> References: <40FCEC90.1050405@corscience.de> <20040720104436.GB4680@openbios.org> <40FD01CA.80700@corscience.de> <20040807155752.GB32669@openbios.org> Message-ID: <1091905952.2321.15.camel@ismith-lx> Thomas, On Sat, 2004-08-07 at 16:57, Stefan Reinauer wrote: > > my graphics-controller is integrated in the Cx5530A-chipset. I think it > > should be supported, or am I wrong? > > Someone here on the list got it working, but generally speaking, it does > not work out of the box. Cx5530 has a pretty broken design.. I did a quick and dirty port of LinuxBios V1 to an SBC with a GX1 CPU and a CS5530 using the cocom/voyager2 directory as a base and managed to get it up and running fairly quickly with console output on the serial port. Basic console graphics took a little longer (but not much) but unfortunately I then ran out of time before I got graphics working fully. If you want I can dig out the diffs and my config file and mail them to you but I should warn you it was a bit rough and ready so they would definitely need more work (and I don't really have time to pursue it myself right now). However a quick look at your config compared to mine shows a few lines which I have in mine which may be significant (or not): option ZKERNEL_START=0xfffc0000 option ZKERNEL_MASK=0xffff option PAYLOAD_SIZE=196608 Of course if you're using LinuxBios V2 then this won't be much use to you I'm afraid. > Stefan Cheers Ian > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios -- Ian Smith Abelon Systems From stepan at openbios.org Sat Aug 7 13:48:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Sat Aug 7 13:48:00 2004 Subject: ROM-Size-Problem In-Reply-To: <1091905952.2321.15.camel@ismith-lx> References: <40FCEC90.1050405@corscience.de> <20040720104436.GB4680@openbios.org> <40FD01CA.80700@corscience.de> <20040807155752.GB32669@openbios.org> <1091905952.2321.15.camel@ismith-lx> Message-ID: <20040807192505.GA3256@openbios.org> * Ian Smith [040807 21:12]: > Of course if you're using LinuxBios V2 then this won't be much use to > you I'm afraid. > > Cheers > > Ian Right. Geode support has not been ported to V2 yet. And I doubt somebody will do it. Even though it is pretty straight forward.. V1 works fine though and V2 gives no immediate advantages over V1 on Geode at the moment Stefan From luzader at csee.wvu.edu Sat Aug 7 19:42:01 2004 From: luzader at csee.wvu.edu (zac luzader) Date: Sat Aug 7 19:42:01 2004 Subject: Linux bios and IBM Netvista 8363 (again) Message-ID: <41157F8E.6010409@csee.wvu.edu> Awhile back (a month ago), there was some interest in using linuxbios on the IBM Netvista 8363 (aka N2200). (see http://www.mail-archive.com/linuxbios at clustermatic.org/msg07259.html) I have had one of these monstrosities for a while, and would LOVE to replace the incredibly bloated and slow IBM bios. It **should** work, since it is, in fact, a NS Geode chipset. There really isnt anything else on the board except for the requisite sound codec (NatSemi), ethernet (SiS), CF Card, RAM, bios and power supply. There are a few reasons I havent tried this: - I cannot get the thing to boot any sane operating system which would allow me to reflash the bios in situ. I have it starting a 2.4.26 kernel that I built, but although it sees the flash card it hangs on "unable to mount root fs on 00:00". The IBM bios doesnt boot like a normal PC, it is meant to either network-boot or directly load a vmlinux image without a boot loader. - The video chip has no native text display. Although it happily works with the VESA framebuffer driver. So you cant debug that way (at least not before the frame buffer loads). Normally you can use serial or POST card to debug, this is all well and good except that: - the N2200/8363 has no legacy ports (no serial, parallel, or ps/2), it has only VGA, audio, USB and ethernet. - the N2200/8363 has one PCI slot. It is a miniature non-standard connector meant to interface with a proprietary token ring adapter. So I am not too keen on spending alot of time digging up a burner and a extra chip (although I might be able to beg or borrow them) to be presented with a black screen that I can't debug. Point being: How likely is it that there will be a problem? Is it unlikely enough to try it blindly? Is there be any other way to debug a problem? From yhlu at tyan.com Sun Aug 8 21:00:00 2004 From: yhlu at tyan.com (Yinghai Lu) Date: Sun Aug 8 21:00:00 2004 Subject: [can any one give me a copy of USB BOOT] In-Reply-To: <200408070936.i779apK27895@nwn.definitive.org> Message-ID: <200408090059.i790xeK07845@nwn.definitive.org> Original USB bootloader is in freebios/src/util/baremetal but it only support UHCI. If you want OHCI support, you need to check out FILO in Etherboot. https://sourceforge.net/tracker/?func=detail&aid=943300&group_id=4233&atid=3 04233 Regards YH -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic. org] On Behalf Of chenm003 at 163.com Sent: Saturday, August 07, 2004 4:16 AM To: linuxbios Subject: [can any one give me a copy of USB BOOT] I will study OHCI now, I want to work for linuxbios. LinuxLabs USB bootloader http://www.mail-archive.com/linuxbios at clustermatic.org/msg06472.html ????????CM ????????chenm003 AT 163 DOT com ??????????2004-08-07 _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ywpark at core.kaist.ac.kr Mon Aug 9 07:18:01 2004 From: ywpark at core.kaist.ac.kr (=?ks_c_5601-1987?B?udq/tb/s?=) Date: Mon Aug 9 07:18:01 2004 Subject: stopped at "jumping_to_bootcode" @ GEODE SC1200 Message-ID: <007101c47e0f$e0d45ec0$a9a5f88f@HAHAHA> Hi there, We are developing LinuxBIOS upon GEODE SC1200 (from AMD) We want to boot Linux image from IDE Currently, we have completed the BIOS configuration & could be booting with that configuration I think that it's done to read the compressed image from IDE(0x7e00) to memory(0x100000) But We could not load linux image(stopped at "jumping_to_bootcode" , which LinuxBIOS printed) What can we do? Any help or point to the help will be appreciated Regards pywha -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Mon Aug 9 07:58:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Mon Aug 9 07:58:01 2004 Subject: stopped at "jumping_to_bootcode" @ GEODE SC1200 In-Reply-To: <007101c47e0f$e0d45ec0$a9a5f88f@HAHAHA> References: <007101c47e0f$e0d45ec0$a9a5f88f@HAHAHA> Message-ID: <20040809133434.GA27830@openbios.org> * ?????? [040809 14:53]: > Hi there, > > We are developing LinuxBIOS upon GEODE SC1200 (from AMD) > > We want to boot Linux image from IDE > Currently, we have completed the BIOS configuration & could be booting with that configuration > > I think that it's done to read the compressed image from IDE(0x7e00) to memory(0x100000) > But We could not load linux image(stopped at "jumping_to_bootcode" , which LinuxBIOS printed) > > What can we do? Did you use mkelfImage? Did you specify a kernel command line to use a serial console (console=ttyS0,115200n8 or similar) Stefan From dwh at lanl.gov Mon Aug 9 10:34:01 2004 From: dwh at lanl.gov (Hendricks David W.) Date: Mon Aug 9 10:34:01 2004 Subject: stopped at "jumping_to_bootcode" @ GEODE SC1200 In-Reply-To: <007101c47e0f$e0d45ec0$a9a5f88f@HAHAHA> Message-ID: Can you please specify the command line you are using for your payload? On Mon, 9 Aug 2004, [ks_c_5601-1987] ?????? wrote: > Hi there, > > We are developing LinuxBIOS upon GEODE SC1200 (from AMD) > > We want to boot Linux image from IDE > Currently, we have completed the BIOS configuration & could be booting with that configuration > > I think that it's done to read the compressed image from IDE(0x7e00) to memory(0x100000) > But We could not load linux image(stopped at "jumping_to_bootcode" , which LinuxBIOS printed) > > What can we do? > > Any help or point to the help will be appreciated > > Regards > > pywha > > > > > > > > -- ***** DUSA LACSI-HW ***** From dwh at lanl.gov Mon Aug 9 14:32:00 2004 From: dwh at lanl.gov (Hendricks David W.) Date: Mon Aug 9 14:32:00 2004 Subject: Linux bios and IBM Netvista 8363 (again) In-Reply-To: <41157F8E.6010409@csee.wvu.edu> Message-ID: What kind of flash part does it use? Perhaps you use a mainboard with a compatible socket rather than buying a flash device. -- ***** DUSA LACSI-HW ***** From luzader at csee.wvu.edu Mon Aug 9 20:22:00 2004 From: luzader at csee.wvu.edu (zac luzader) Date: Mon Aug 9 20:22:00 2004 Subject: Linux bios and IBM Netvista 8363 (again) In-Reply-To: References: Message-ID: <41182BF3.4050708@csee.wvu.edu> Thats a good idea. Its a 32 pin socketed PLCC, an AM29F040B, 512KB AMD Flash, data sheet: http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/21445.pdf Looks pretty standard to me, although you would know better than I. This may be moot now, as just since posting the my inital message, I got it to boot something sane of my own making, from CompactFlash (without the network, which it was previously dependent on). This significantly lessens my need to use LinuxBIOS, although I would still be happy to reduce the startup time. Also, the BIOS only understands uncompressed kernels (vmlinux). If it would accept a bzImage then booting should be faster. As an aside: Through my experimenting today, I was able to find that this entire board uses only 680mA maximum on its single 12V connector (not 3A as the nameplate states), and will run off anything between 5.5 and 30 volts (I only tested it to 14ish, the onboard switcher is rated to 30). This is fanstastic news for me, since I intended it to run right off the cigarrette lighter in my car, with only minor protection circuitry. And I only paid $99 for it. Hendricks David W. wrote: >What kind of flash part does it use? Perhaps you use a mainboard with a >compatible socket rather than buying a flash device. > From zhushisongzhu at yahoo.com Tue Aug 10 07:22:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Tue Aug 10 07:22:00 2004 Subject: boot A6T stopped at jmp 0x8000:0000 Message-ID: <20040810125922.51718.qmail@web13203.mail.yahoo.com> Hi, (1)A6T MB is based on via chipset vt8601/686b (2)IPL can successfully copy linuxbios into 0x8000:0000(I have read them out to test this point) (3)The first line of linuxbios is to output %al to port 0x80 (4)When IPL jumped to 0x8000:0000, the first line of linuxbios couldn't be executed. Halted. who have met such problem? please help. tks zhu __________________________________ Do you Yahoo!? Yahoo! Mail Address AutoComplete - You start. We finish. http://promotions.yahoo.com/new_mail From rminnich at lanl.gov Tue Aug 10 07:52:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 10 07:52:01 2004 Subject: boot A6T stopped at jmp 0x8000:0000 In-Reply-To: <20040810125922.51718.qmail@web13203.mail.yahoo.com> Message-ID: On Tue, 10 Aug 2004, zhu shi song wrote: > (4)When IPL jumped to 0x8000:0000, the first line of > linuxbios couldn't be executed. Halted. try booting memtest86, I think your memory is wrong. ron -- LANL CCS-1 email flavor: ***** Correspondence [] ***** DUSA LACSI-HW [x ] ***** DUSA LACSI-OS [ ] ***** DUSA LACSI-CS [ ] From adam at cfar.umd.edu Tue Aug 10 11:23:01 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Tue Aug 10 11:23:01 2004 Subject: Linux bios and IBM Netvista 8363 (again) In-Reply-To: <41182BF3.4050708@csee.wvu.edu> Message-ID: <20040810130119.G54010-100000@www.missl.cs.umd.edu> FWIW, you get 3A when you connect HDD and it is spinning up. On Mon, 9 Aug 2004, zac luzader wrote: > Thats a good idea. Its a 32 pin socketed PLCC, an AM29F040B, 512KB AMD > Flash, data sheet: > http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/21445.pdf > Looks pretty standard to me, although you would know better than I. > This may be moot now, as just since posting the my inital message, I got > it to boot something sane of my own making, from CompactFlash (without > the network, which it was previously dependent on). > This significantly lessens my need to use LinuxBIOS, although I would > still be happy to reduce the startup time. Also, the BIOS only > understands uncompressed kernels (vmlinux). If it would accept a bzImage > then booting should be faster. > > As an aside: > Through my experimenting today, I was able to find that this entire > board uses only 680mA maximum on its single 12V connector (not 3A as the > nameplate states), and will run off anything between 5.5 and 30 volts (I > only tested it to 14ish, the onboard switcher is rated to 30). This is > fanstastic news for me, since I intended it to run right off the > cigarrette lighter in my car, with only minor protection circuitry. And > I only paid $99 for it. > > Hendricks David W. wrote: > > >What kind of flash part does it use? Perhaps you use a mainboard with a > >compatible socket rather than buying a flash device. > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From zhushisongzhu at yahoo.com Wed Aug 11 04:46:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Wed Aug 11 04:46:00 2004 Subject: boot A6T stopped at jmp 0x8000:0000 In-Reply-To: Message-ID: <20040811102347.31626.qmail@web13201.mail.yahoo.com> I have tested my SDRAM booting memtest86. The memory is OK. Maybe vt8601 northbridge sdram init has something wrong. There is another question, how to setup the FSB of sis630ET? I've got ECS p6stmt MB based on sis630ET. After reading the values of pci registers, its bios have used synchronous mode of SDRAM. I think synchronous mode means FSB is equal to SDRAM clock. My SDRAM is 100Mhz. So I must set MB FSB to 100Mhz. The default FSB of the MB on powering is 66Mhz. tks zhu --- ron minnich wrote: > On Tue, 10 Aug 2004, zhu shi song wrote: > > > (4)When IPL jumped to 0x8000:0000, the first > line of > > linuxbios couldn't be executed. Halted. > > try booting memtest86, I think your memory is wrong. > > ron > -- > LANL CCS-1 email flavor: > ***** Correspondence [] > ***** DUSA LACSI-HW [x ] > ***** DUSA LACSI-OS [ ] > ***** DUSA LACSI-CS [ ] > > > _______________________________ Do you Yahoo!? Express yourself with Y! Messenger! Free. Download now. http://messenger.yahoo.com From tygris at cablespeed.com Wed Aug 11 17:19:00 2004 From: tygris at cablespeed.com (Kelly Price) Date: Wed Aug 11 17:19:00 2004 Subject: Supporting other mobo's? Message-ID: <411AA486.8080100@cablespeed.com> The Help CGI is not working, so I'm emailing the list: Mainboard is a Tatung t3156. Output of lspci: 00:00.0 Host bridge: VIA Technologies, Inc. VT82C598 [Apollo MVP3] (rev 04) 00:01.0 PCI bridge: VIA Technologies, Inc. VT82C598/694x [Apollo MVP3/Pro133x AGP] 00:07.0 ISA bridge: VIA Technologies, Inc. VT82C586/A/B PCI-to-ISA [Apollo VP] (rev 47) 00:07.1 IDE interface: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT823x/A/C/VT8235 PIPC Bus Master IDE (rev 06) 00:07.2 USB Controller: VIA Technologies, Inc. VT6202 [USB 2.0 controller] (rev 02) 00:07.3 Host bridge: VIA Technologies, Inc. VT82C586B ACPI (rev 10) 00:08.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) 00:09.0 Ethernet controller: Realtek Semiconductor Co., Ltd. RTL-8139/8139C/8139C+ (rev 10) 00:0a.0 Network controller: Standard Microsystems Corp [SMC] SMC2602W EZConnect / Addtron AWA-100 (rev 02) 01:00.0 VGA compatible controller: ATI Technologies Inc 3D Rage IIC AGP (rev 3a) From jmiller at actuality-systems.com Thu Aug 12 12:37:00 2004 From: jmiller at actuality-systems.com (Jay Miller) Date: Thu Aug 12 12:37:00 2004 Subject: Broadcom NVRAM support Message-ID: Hi All! We've got our boards in but the Broadcom 5704C wasn't coming up. According to Broadcom there is a DOS (or Windows) utility that we need to run to burn the 5704C boot code into nvram. Has anyone written this utility for Linux? Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller at acutality-systems.com From YhLu at tyan.com Thu Aug 12 14:19:00 2004 From: YhLu at tyan.com (YhLu) Date: Thu Aug 12 14:19:00 2004 Subject: Broadcom NVRAM support Message-ID: <3174569B9743D511922F00A0C943142305EE038E@TYANWEB> Ask Broadcom to provide one for Linux. But I guess you can not get anything from them. Maybe you can ask them give some documents about that, then you can write linux version by yourself. Regards YH -----Original Message----- From: Jay Miller [mailto:jmiller at actuality-systems.com] Sent: Thursday, August 12, 2004 11:14 AM To: linuxbios at clustermatic.org Subject: Broadcom NVRAM support Hi All! We've got our boards in but the Broadcom 5704C wasn't coming up. According to Broadcom there is a DOS (or Windows) utility that we need to run to burn the 5704C boot code into nvram. Has anyone written this utility for Linux? Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller at acutality-systems.com _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Thu Aug 12 17:19:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Thu Aug 12 17:19:01 2004 Subject: Broadcom NVRAM support In-Reply-To: Message-ID: On Thu, 12 Aug 2004, Jay Miller wrote: > Has anyone written this utility for Linux? no, but it might be easy. You could try running the dos code under testbios or dosemu to see if that works. ron -- LANL CCS-1 email flavor: ***** Correspondence [X] ***** DUSA LACSI-HW [ ] ***** DUSA LACSI-OS [ ] ***** DUSA LACSI-CS [ ] From jmiller at actuality-systems.com Thu Aug 12 17:25:01 2004 From: jmiller at actuality-systems.com (Jay Miller) Date: Thu Aug 12 17:25:01 2004 Subject: Broadcom NVRAM support Message-ID: That is a good idea but Broadcom only gave me "snippets" of the DOS code. I did manage to locate a 2.6 Linux driver (totally unlike the tg3 code), and it has the required NVRAM programming code. I've back-ported it to the tg3 driver in etherboot and I'll let you know how it goes. Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller at acutality-systems.com -----Original Message----- From: ron minnich [mailto:rminnich at lanl.gov] Sent: Thursday, August 12, 2004 6:57 PM To: Jay Miller Cc: linuxbios at clustermatic.org Subject: Re: Broadcom NVRAM support On Thu, 12 Aug 2004, Jay Miller wrote: > Has anyone written this utility for Linux? no, but it might be easy. You could try running the dos code under testbios or dosemu to see if that works. ron -- LANL CCS-1 email flavor: ***** Correspondence [X] ***** DUSA LACSI-HW [ ] ***** DUSA LACSI-OS [ ] ***** DUSA LACSI-CS [ ] From rminnich at lanl.gov Fri Aug 13 10:05:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Fri Aug 13 10:05:01 2004 Subject: m754lmr and compiling linuxbios (fwd) Message-ID: can somebody help this guy? thanks ron ---------- Forwarded message ---------- Date: Thu, 12 Aug 2004 11:59:44 -0600 From: Ross Marshall To: rminnich at lanl.gov Subject: m754lmr and compiling linuxbios sorry to bother you, I have searched the archives for help...but they missed a step someplace. when I try to compile, it errors out with: undefined reference to `framebuffer_on' I have disabled frame_buffer in the config file...which is based on the m787cl+, which uses the m1631 instead of the m1621 and m1535 instead of m1533. Which did you use? is there any place to fix this? Have you compiled and used this on the mb? Thanks for your help Ross From kfuchs at winternet.com Mon Aug 16 10:37:01 2004 From: kfuchs at winternet.com (Ken Fuchs) Date: Mon Aug 16 10:37:01 2004 Subject: Subject: Re: AMD Serenade: Filo can't find/access ATA HD (IDE - /dev/hda) References: <20040802200720.GA4939@openbios.org> Message-ID: <200408161550.i7GFoE8H003961@tundra.winternet.com> This problem was solved with help from Stefan Reinauer and David Hendricks. Many thanks to you both! Stefan Reinauer wrote: >This is a filo "problem", it stops before it even tries to boot >... Linux. >You need to force filo to probe all the PCI busses, not only bus 0. See >the mailing list archive for more information.. I started to modify pci_scan_bus() to scan all buses and then ... David W. Hendricks wrote: >Is PCI_BRUTE_SCAN = 1 set in your FILO Config file? Oops, filo 0.4.2 already has pci_scan() defined to scan all buses, if PCI_BRUTE_SCAN is set to 1. Again, thank you, Stefan and David. Sincerely, Ken Fuchs From aip at cwlinux.com Tue Aug 17 17:33:00 2004 From: aip at cwlinux.com (aip at cwlinux.com) Date: Tue Aug 17 17:33:00 2004 Subject: Mail Delivery (failure linuxbios@clustermatic.org) Message-ID: <200408172132.i7HLWDv27608@nwn.definitive.org> An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: message.scr Type: audio/x-wav Size: 29568 bytes Desc: not available URL: From sagivy at 3vium.com Wed Aug 18 02:30:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Wed Aug 18 02:30:01 2004 Subject: VIA 82C605 - chipset, VIA 686 - superio Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6A6@cronos.trivium> Which configuration file should I use? In the freebios tree ? thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: From zhushisongzhu at yahoo.com Thu Aug 19 03:36:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Thu Aug 19 03:36:00 2004 Subject: buildtarget via/epia error Message-ID: <20040819084952.70359.qmail@web13203.mail.yahoo.com> Dear lists, When I run buildtarget via/epia, there are some errors: build_dir=via/epia/epia File "via/epia/epia/config.py", line 543 self.set |= 2 ^ SyntaxError: invalid syntax My python version is 1.5.2. tks zhu __________________________________ Do you Yahoo!? Yahoo! Mail - You care about security. So do we. http://promotions.yahoo.com/new_mail From stepan at openbios.org Thu Aug 19 04:11:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Thu Aug 19 04:11:01 2004 Subject: buildtarget via/epia error In-Reply-To: <20040819084952.70359.qmail@web13203.mail.yahoo.com> References: <20040819084952.70359.qmail@web13203.mail.yahoo.com> Message-ID: <20040819092530.GA7244@openbios.org> * zhu shi song [040819 10:49]: > Dear lists, > When I run buildtarget via/epia, there are some > errors: > build_dir=via/epia/epia > File "via/epia/epia/config.py", line 543 > self.set |= 2 > ^ > SyntaxError: invalid syntax > My python version is 1.5.2. Get a python from this millenium ;-) I think 2.1 or newer works fine. From sagivy at 3vium.com Thu Aug 19 04:21:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Thu Aug 19 04:21:01 2004 Subject: problem in romcc built with gcc-3.4.1 Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6A7@cronos.trivium> There is a problem in romcc when built with gcc 3.4.1. It said something about: unsigned long long - undefined symbol. With gcc 3.3.1 the error does not appear. -------------- next part -------------- An HTML attachment was scrubbed... URL: From zhushisongzhu at yahoo.com Thu Aug 19 08:28:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Thu Aug 19 08:28:00 2004 Subject: entering protected_start halt Message-ID: <20040819134233.85949.qmail@web13207.mail.yahoo.com> I'm using QDIA6T MB based on vt8601/vt82c686. Now I can boot it using DOC IPL. I can copy linuxbios from DOC to RAM at 0x8000:0. But when linuxbios executed "data32 ljmp $ROM_CODE_SEG, $__protected_start" statement. The MB halted. help! zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - 100MB free storage! http://promotions.yahoo.com/new_mail From stepan at openbios.org Thu Aug 19 09:09:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Thu Aug 19 09:09:01 2004 Subject: entering protected_start halt In-Reply-To: <20040819134233.85949.qmail@web13207.mail.yahoo.com> References: <20040819134233.85949.qmail@web13207.mail.yahoo.com> Message-ID: <20040819142303.GB12820@openbios.org> * zhu shi song [040819 15:42]: > I'm using QDIA6T MB based on vt8601/vt82c686. Now I > can boot it using DOC IPL. I can copy linuxbios from > DOC to RAM at 0x8000:0. But when linuxbios executed > "data32 ljmp $ROM_CODE_SEG, $__protected_start" > statement. The MB halted. help! > zhu Seems your RAM is not initialized correctly?! Any room for debugging output in docipl? Stefan From dbs at stonekeep.com Thu Aug 19 16:30:01 2004 From: dbs at stonekeep.com (Dave Belfer-Shevett) Date: Thu Aug 19 16:30:01 2004 Subject: Opteron / Tyan motherboard fault on boot. Message-ID: <1092951840.2211.8.camel@jboat> We're in the process of deploying Linuxbios to boot a cluster of Opteron based blade servers. I built a new kernel, put it in /tftpboot after using: mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan and cycled the blade. Wen booting, I get: Searching for server (DHCP) Me: 192.168.1.200, Server: 192.168.1.200, Gateway 192.168.1.1 Loading 192.168.1.200:vmlinuz.tyan (ELF)... done LinuxBIOS-1.1.62.0_Fallback [date date] starting... Unknown Trwt Looking at an old message to this list, there's this snippet: http://www.mail-archive.com/linuxbios at clustermatic.org/msg03174.html where the following line(s) are, in set_Trwt()... if ((clocks < DTH_TRWT_MIN) || (clocks > DTH_TRWT_MAX)) { die("Unknown Trwt"); } What is this, and why is it happening? Is there a patch needed for LinuxBIOS to work properly on modern Opterons? Thanks, I'm in dire straights here, any help would be appreciated. -dbs -- -------------------. .----------- Dave Belfer-Shevett \ Conference Management Solutions \ Stonekeep dbs at stonekeep.com \ http://www.stonekeep.com \ Consulting ---------------------' 978 239 5902 `------------ From dwh at lanl.gov Thu Aug 19 17:20:01 2004 From: dwh at lanl.gov (Hendricks David W.) Date: Thu Aug 19 17:20:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: <1092951840.2211.8.camel@jboat> Message-ID: Is this on the S2880? The only patch you might need is for integrated ATi VGA support on some mainboards. Other than that a current CVS tree should do the trick. On Thu, 19 Aug 2004, Dave Belfer-Shevett wrote: > We're in the process of deploying Linuxbios to boot a cluster of Opteron > based blade servers. I built a new kernel, put it in /tftpboot after > using: > > mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan > > and cycled the blade. Wen booting, I get: > > Searching for server (DHCP) > Me: 192.168.1.200, Server: 192.168.1.200, Gateway 192.168.1.1 > Loading 192.168.1.200:vmlinuz.tyan (ELF)... done > > LinuxBIOS-1.1.62.0_Fallback [date date] starting... > Unknown Trwt > > Looking at an old message to this list, there's this snippet: > http://www.mail-archive.com/linuxbios at clustermatic.org/msg03174.html > > where the following line(s) are, in set_Trwt()... > if ((clocks < DTH_TRWT_MIN) || (clocks > DTH_TRWT_MAX)) { > die("Unknown Trwt"); > } > > What is this, and why is it happening? Is there a patch needed for LinuxBIOS > to work properly on modern Opterons? > > Thanks, I'm in dire straights here, any help would be appreciated. > > -dbs > > From julian at proteger.org.ar Thu Aug 19 17:24:00 2004 From: julian at proteger.org.ar (=?ISO-8859-1?Q?Juli=E1n_Nu=F1ez?=) Date: Thu Aug 19 17:24:00 2004 Subject: kobian FDSMx with linuxbios Message-ID: <4125217A.6060702@proteger.org.ar> Hi all. I'm about to test linuxbios for the first time on a kobian FDSMx motherboard. This motherboard has the VIA VT8235 southbridge, and the VIA VT8375 (aka KM266) northbridge. I see that the VT8235 is already supported in src/southbridge/via/vt8235, but I saw nothing about the km266. Do I have a chance for it to work with other VIA northbridge like the VT8623? Do I have a chance for it to work at all? And about the DOC, I saw that in the sis630 chipset the motherboard can be used as a flash-burner... does this have a chance of working in my current set, or should I be ordering a flash burner? Ok, I think this is all for now. Cheers, Julian. -- "El verdadero valor esta en hacer sin testigos, lo que podr?a hacerse delante de todo el mundo" From dbs at stonekeep.com Thu Aug 19 17:27:01 2004 From: dbs at stonekeep.com (Dave Belfer-Shevett) Date: Thu Aug 19 17:27:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: References: Message-ID: <1092955156.2211.12.camel@jboat> On Thu, 2004-08-19 at 18:34, Hendricks David W. wrote: > Is this on the S2880? The only patch you might need is for integrated ATi > VGA support on some mainboards. Other than that a current CVS tree should > do the trick. Nope, this is on an S2882... Let me try to clarify what you're saying... the version we're running (1.1.62.0) will not work properly, and we need a current version from CVS to fix this problem? No problem either way, I just want to be clear before I start down this road :) -dbs > > On Thu, 19 Aug 2004, Dave Belfer-Shevett wrote: > > > We're in the process of deploying Linuxbios to boot a cluster of Opteron > > based blade servers. I built a new kernel, put it in /tftpboot after > > using: > > > > mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan > > > > and cycled the blade. Wen booting, I get: > > > > Searching for server (DHCP) > > Me: 192.168.1.200, Server: 192.168.1.200, Gateway 192.168.1.1 > > Loading 192.168.1.200:vmlinuz.tyan (ELF)... done > > > > LinuxBIOS-1.1.62.0_Fallback [date date] starting... > > Unknown Trwt > > > > Looking at an old message to this list, there's this snippet: > > http://www.mail-archive.com/linuxbios at clustermatic.org/msg03174.html > > > > where the following line(s) are, in set_Trwt()... > > if ((clocks < DTH_TRWT_MIN) || (clocks > DTH_TRWT_MAX)) { > > die("Unknown Trwt"); > > } > > > > What is this, and why is it happening? Is there a patch needed for LinuxBIOS > > to work properly on modern Opterons? > > > > Thanks, I'm in dire straights here, any help would be appreciated. > > > > -dbs > > > > -- -------------------. .----------- Dave Belfer-Shevett \ Conference Management Solutions \ Stonekeep dbs at stonekeep.com \ http://www.stonekeep.com \ Consulting ---------------------' 978 239 5902 `------------ From YhLu at tyan.com Thu Aug 19 17:45:01 2004 From: YhLu at tyan.com (YhLu) Date: Thu Aug 19 17:45:01 2004 Subject: Opteron / Tyan motherboard fault on boot. Message-ID: <3174569B9743D511922F00A0C943142305EE0862@TYANWEB> Please let me know more info 1. How do you get the source code? 2. what's pay load? Etherboot version. 3. You may need to mkelfImage 2.5 to build the elf and put that in /tftpboot. Regards YH -----Original Message----- From: Dave Belfer-Shevett [mailto:dbs at stonekeep.com] Sent: Thursday, August 19, 2004 3:39 PM To: Hendricks David W. Cc: linuxbios at clustermatic.org Subject: Re: Opteron / Tyan motherboard fault on boot. On Thu, 2004-08-19 at 18:34, Hendricks David W. wrote: > Is this on the S2880? The only patch you might need is for integrated ATi > VGA support on some mainboards. Other than that a current CVS tree should > do the trick. Nope, this is on an S2882... Let me try to clarify what you're saying... the version we're running (1.1.62.0) will not work properly, and we need a current version from CVS to fix this problem? No problem either way, I just want to be clear before I start down this road :) -dbs > > On Thu, 19 Aug 2004, Dave Belfer-Shevett wrote: > > > We're in the process of deploying Linuxbios to boot a cluster of Opteron > > based blade servers. I built a new kernel, put it in /tftpboot after > > using: > > > > mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan > > > > and cycled the blade. Wen booting, I get: > > > > Searching for server (DHCP) > > Me: 192.168.1.200, Server: 192.168.1.200, Gateway 192.168.1.1 > > Loading 192.168.1.200:vmlinuz.tyan (ELF)... done > > > > LinuxBIOS-1.1.62.0_Fallback [date date] starting... > > Unknown Trwt > > > > Looking at an old message to this list, there's this snippet: > > http://www.mail-archive.com/linuxbios at clustermatic.org/msg03174.html > > > > where the following line(s) are, in set_Trwt()... > > if ((clocks < DTH_TRWT_MIN) || (clocks > DTH_TRWT_MAX)) { > > die("Unknown Trwt"); > > } > > > > What is this, and why is it happening? Is there a patch needed for LinuxBIOS > > to work properly on modern Opterons? > > > > Thanks, I'm in dire straights here, any help would be appreciated. > > > > -dbs > > > > -- -------------------. .----------- Dave Belfer-Shevett \ Conference Management Solutions \ Stonekeep dbs at stonekeep.com \ http://www.stonekeep.com \ Consulting ---------------------' 978 239 5902 `------------ _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Thu Aug 19 18:16:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Thu Aug 19 18:16:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: <1092951840.2211.8.camel@jboat> References: <1092951840.2211.8.camel@jboat> Message-ID: Dave Belfer-Shevett writes: > We're in the process of deploying Linuxbios to boot a cluster of Opteron > based blade servers. I built a new kernel, put it in /tftpboot after > using: > > mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan This is your first problem. mkelf-linux does not know how to bypass the BIOS calls so it will not work under LinuxBIOS. Please get mkelfImage 2.5 ftp://ftp.lnxi.com/pub/mkelfImage. > > and cycled the blade. Wen booting, I get: > > Searching for server (DHCP) > Me: 192.168.1.200, Server: 192.168.1.200, Gateway 192.168.1.1 > Loading 192.168.1.200:vmlinuz.tyan (ELF)... done > > LinuxBIOS-1.1.62.0_Fallback [date date] starting... > Unknown Trwt I would not expect to see this message after a triple fault, but stranger things have happened. > Looking at an old message to this list, there's this snippet: > http://www.mail-archive.com/linuxbios at clustermatic.org/msg03174.html > > where the following line(s) are, in set_Trwt()... > if ((clocks < DTH_TRWT_MIN) || (clocks > DTH_TRWT_MAX)) { > die("Unknown Trwt"); > } > > What is this, and why is it happening? I don't know the why. This bit is simply a sanity check that the information coming from your serial EEPROM on your dimms is fine. > Is there a patch needed for LinuxBIOS to work properly on modern Opterons? One should not be needed. > Thanks, I'm in dire straights here, any help would be appreciated. If you still have problems after you start using mkelfImage ask again. Eric From slavik914 at mrbrklyn.com Thu Aug 19 18:30:00 2004 From: slavik914 at mrbrklyn.com (Steve Milo) Date: Thu Aug 19 18:30:00 2004 Subject: PPC and K8 Thunder 2885 support. Message-ID: <20040819232925.M65204@mrbrklyn.com> Hello all my name is Steve and I'm a Linux guy. I lurked a little (maybe for two days) but I want to try to jump in ASAP. I downloaded the mailing list archives and found the 'HOW DO I' FAQ which is pretty helpful. I want to maybe clarify a few things for my understanding but a little background about me would probably be in order. I dont have hardware level programming experience, most of what I know about computers I learned through reading. I like to think I'm a bit discriminating about what I learn, but I would be wrong about that. Learning is usually, at least for me, a stumble around, trip over facts and fiction, tediously seperate the wheat from the chaff, chew on the facts on my walk home, kind of process. I am currently a student at Brooklyn College in Brooklyn New York and I am fortunate enough to work with a professor who is giving me the very generous opportunity to setup a small cluster consisting of a few dual Opteron 2885 machines. This opportunity comes to me because I am trying to start a GPL'ish software club here. Also, I own a PowerBook G4 and I run YDL 3.0.1 on it. This is the lspci output: 00:10.0 VGA compatible controller: ATI Technologies Inc Radeon Mobility M7 LW [Radeon Mobility 7500] 01:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 PCI 01:17.0 Class ff00: Apple Computer Inc. KeyLargo Mac I/O (rev 03) 01:18.0 USB Controller: Apple Computer Inc. KeyLargo USB 01:19.0 USB Controller: Apple Computer Inc. KeyLargo USB 01:1a.0 CardBus bridge: Texas Instruments PCI1410 PC card Cardbus Controller (rev 02) 06:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 Internal PCI 06:0e.0 FireWire (IEEE 1394): Lucent Microelectronics FW323 06:0f.0 Ethernet controller: Apple Computer Inc. UniNorth GMAC (Sun GEM) (rev 01) The kernel is a 2.6.6 which appears to work well. Considering the purpose of this list my questions are probably fairly obvious. Is there support for the 2885 motherboards? And is there support for the PPC platform. I had seen some posts regarding PPC support and there is apparently someone here who runs YDL as well. But I havent seen anything outright as far as support for both platforms I mentioned. Or perhaps to put it correctly, are the platforms I mentioned supported. What are the real dangerous pitfalls I should lookout for? As in the kind of pitfall that would render my machine a unique doorstop, would I would like to avoid that at all costs. Thank you, Steve M -- Open WebMail Project (http://openwebmail.org) From YhLu at tyan.com Thu Aug 19 18:37:00 2004 From: YhLu at tyan.com (YhLu) Date: Thu Aug 19 18:37:00 2004 Subject: PPC and K8 Thunder 2885 support. Message-ID: <3174569B9743D511922F00A0C943142305EE0877@TYANWEB> Welcome. You can get the source code from freebios2. It includes S2885 support. Regards YH -----Original Message----- From: Steve Milo [mailto:slavik914 at mrbrklyn.com] Sent: Thursday, August 19, 2004 5:50 PM To: linuxbios at clustermatic.org Subject: PPC and K8 Thunder 2885 support. Hello all my name is Steve and I'm a Linux guy. I lurked a little (maybe for two days) but I want to try to jump in ASAP. I downloaded the mailing list archives and found the 'HOW DO I' FAQ which is pretty helpful. I want to maybe clarify a few things for my understanding but a little background about me would probably be in order. I dont have hardware level programming experience, most of what I know about computers I learned through reading. I like to think I'm a bit discriminating about what I learn, but I would be wrong about that. Learning is usually, at least for me, a stumble around, trip over facts and fiction, tediously seperate the wheat from the chaff, chew on the facts on my walk home, kind of process. I am currently a student at Brooklyn College in Brooklyn New York and I am fortunate enough to work with a professor who is giving me the very generous opportunity to setup a small cluster consisting of a few dual Opteron 2885 machines. This opportunity comes to me because I am trying to start a GPL'ish software club here. Also, I own a PowerBook G4 and I run YDL 3.0.1 on it. This is the lspci output: 00:10.0 VGA compatible controller: ATI Technologies Inc Radeon Mobility M7 LW [Radeon Mobility 7500] 01:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 PCI 01:17.0 Class ff00: Apple Computer Inc. KeyLargo Mac I/O (rev 03) 01:18.0 USB Controller: Apple Computer Inc. KeyLargo USB 01:19.0 USB Controller: Apple Computer Inc. KeyLargo USB 01:1a.0 CardBus bridge: Texas Instruments PCI1410 PC card Cardbus Controller (rev 02) 06:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 Internal PCI 06:0e.0 FireWire (IEEE 1394): Lucent Microelectronics FW323 06:0f.0 Ethernet controller: Apple Computer Inc. UniNorth GMAC (Sun GEM) (rev 01) The kernel is a 2.6.6 which appears to work well. Considering the purpose of this list my questions are probably fairly obvious. Is there support for the 2885 motherboards? And is there support for the PPC platform. I had seen some posts regarding PPC support and there is apparently someone here who runs YDL as well. But I havent seen anything outright as far as support for both platforms I mentioned. Or perhaps to put it correctly, are the platforms I mentioned supported. What are the real dangerous pitfalls I should lookout for? As in the kind of pitfall that would render my machine a unique doorstop, would I would like to avoid that at all costs. Thank you, Steve M -- Open WebMail Project (http://openwebmail.org) _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From YhLu at tyan.com Thu Aug 19 18:44:00 2004 From: YhLu at tyan.com (YhLu) Date: Thu Aug 19 18:44:00 2004 Subject: ROMSTRAP Message-ID: <3174569B9743D511922F00A0C943142305EE087A@TYANWEB> Eric, I'm debug the one Opteron MB with NV CK 804. That chipset (SB) can use ROM Strap to set some register before control is handed to CPU. But the space it need about 0xffffffe00 to 0xfffffef. I guess that add romstarp.lds and romstrap.inc could solve the problem. And it is only needed by fallback. Please advise. Regards YH From slavik914 at mrbrklyn.com Thu Aug 19 18:47:00 2004 From: slavik914 at mrbrklyn.com (Steve Milo) Date: Thu Aug 19 18:47:00 2004 Subject: PPC and K8 Thunder 2885 support. In-Reply-To: <3174569B9743D511922F00A0C943142305EE0877@TYANWEB> References: <3174569B9743D511922F00A0C943142305EE0877@TYANWEB> Message-ID: <20040820000506.M15754@mrbrklyn.com> Straight from the 'source'. I think my Professor will be pleased to know this as well. Excellent and thank you. Steve M On Thu, 19 Aug 2004 16:59:29 -0700, YhLu wrote > Welcome. > > You can get the source code from freebios2. It includes S2885 support. > > Regards > > YH > > -----Original Message----- > From: Steve Milo [mailto:slavik914 at mrbrklyn.com] > Sent: Thursday, August 19, 2004 5:50 PM > To: linuxbios at clustermatic.org > Subject: PPC and K8 Thunder 2885 support. > > Hello all my name is Steve and I'm a Linux guy. > > I lurked a little (maybe for two days) but I want to try to jump in ASAP. > > I downloaded the mailing list archives and found the 'HOW DO I' FAQ > which is pretty helpful. I want to maybe clarify a few things for > my understanding but a little background about me would probably be > in order. > > I dont have hardware level programming experience, most of what I > know about computers I learned through reading. I like to think I'm > a bit discriminating about what I learn, but I would be wrong about > that. Learning is usually, at least for me, a stumble around, trip > over facts and fiction, tediously seperate the wheat from the chaff, > chew on the facts on my walk home, kind of process. > > I am currently a student at Brooklyn College in Brooklyn New York > and I am fortunate enough to work with a professor who is giving me > the very generous opportunity to setup a small cluster consisting of > a few dual Opteron 2885 machines. This opportunity comes to me > because I am trying to start a GPL'ish software club here. > > Also, I own a PowerBook G4 and I run YDL 3.0.1 on it. > This is the lspci output: > > 00:10.0 VGA compatible controller: ATI Technologies Inc Radeon > Mobility M7 LW [Radeon Mobility 7500] > 01:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 PCI > 01:17.0 Class ff00: Apple Computer Inc. KeyLargo Mac I/O (rev 03) > 01:18.0 USB Controller: Apple Computer Inc. KeyLargo USB > 01:19.0 USB Controller: Apple Computer Inc. KeyLargo USB > 01:1a.0 CardBus bridge: Texas Instruments PCI1410 PC card Cardbus Controller > (rev 02) > 06:0b.0 Host bridge: Apple Computer Inc. UniNorth 1.5 Internal PCI > 06:0e.0 FireWire (IEEE 1394): Lucent Microelectronics FW323 > > 06:0f.0 Ethernet controller: Apple Computer Inc. UniNorth GMAC (Sun > GEM) > (rev 01) > > The kernel is a 2.6.6 which appears to work well. > > Considering the purpose of this list my questions are probably fairly > obvious. > Is there support for the 2885 motherboards? > > And is there support for the PPC platform. I had seen some posts regarding > PPC support and there is apparently someone here who runs YDL as well. > > But I havent seen anything outright as far as support for both > platforms I mentioned. Or perhaps to put it correctly, are the > platforms I mentioned supported. What are the real dangerous > pitfalls I should lookout for? As in the kind of pitfall that would > render my machine a unique doorstop, would I would like to avoid > that at all costs. > > Thank you, > Steve M > > -- > Open WebMail Project (http://openwebmail.org) > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios -- Open WebMail Project (http://openwebmail.org) From rminnich at lanl.gov Thu Aug 19 21:57:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Thu Aug 19 21:57:00 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: Message-ID: On 19 Aug 2004, Eric W. Biederman wrote: > > > > where the following line(s) are, in set_Trwt()... > > if ((clocks < DTH_TRWT_MIN) || (clocks > DTH_TRWT_MAX)) { > > die("Unknown Trwt"); > > } > > > > What is this, and why is it happening? > > I don't know the why. This bit is simply a sanity check that the information > coming from your serial EEPROM on your dimms is fine. I have seen this when SMBUS is broken and "clocks" is 0xff (i.e. > DTH_TRWT_MAX). You might want to add a print here to see what the value of clocks is. ron From zhushisongzhu at yahoo.com Fri Aug 20 07:51:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Fri Aug 20 07:51:00 2004 Subject: entering protected_start halt In-Reply-To: <20040819142303.GB12820@openbios.org> Message-ID: <20040820130518.92399.qmail@web13208.mail.yahoo.com> I have made one romimage , it can copy linuxbios into RAM and execute it from there. That means raminit.inc init sdram ok. I have ported the init code in raminit.inc to ipl.S. The only difference of them is that ipl.S init sdram in real mode and raminit.inc init sdram in protected mode. After IPL.s initialization of sdram, IPL.s can copy code from doc to RAM at 0x8000:0000 and execute some statements. That means at least sdram can be read and written. Should I enter proteced mode before initializing sdram? Who has the experience of initializing sdram correctly in real mode using vt8601? tks zhu --- Stefan Reinauer wrote: > * zhu shi song [040819 > 15:42]: > > I'm using QDIA6T MB based on vt8601/vt82c686. Now > I > > can boot it using DOC IPL. I can copy linuxbios > from > > DOC to RAM at 0x8000:0. But when linuxbios > executed > > "data32 ljmp $ROM_CODE_SEG, > $__protected_start" > > statement. The MB halted. help! > > zhu > > Seems your RAM is not initialized correctly?! Any > room for debugging > output in docipl? > > Stefan > > _______________________________ Do you Yahoo!? Win 1 of 4,000 free domain names from Yahoo! Enter now. http://promotions.yahoo.com/goldrush From dbs at stonekeep.com Fri Aug 20 09:22:01 2004 From: dbs at stonekeep.com (Dave Belfer-Shevett) Date: Fri Aug 20 09:22:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: References: <1092951840.2211.8.camel@jboat> Message-ID: <1093012542.1819.8.camel@jboat> On Thu, 2004-08-19 at 19:29, Eric W. Biederman wrote: > > mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan > This is your first problem. > > mkelf-linux does not know how to bypass the BIOS calls so > it will not work under LinuxBIOS. Ahhhh. > Please get mkelfImage 2.5 > ftp://ftp.lnxi.com/pub/mkelfImage. Done, compiled, and installed. I'm a little worried here though: ./mkelfImage --kernel=/tftpboot/bzImage --output=/tftpboot/vmlinuz-2.tyan When I do a 'file' on the new image, I see: /tftpbot/vmlinuz-2.tyan: ELF 32-bit LSB executable, Intel 80386, version 1 (SYSV), statically linked, corrupted section header size This image (bzImage) is an Opteron compiled kernel, which should be 64 bit, unless there's no real difference in the elf header. Sorry if this is sounding pretty whiny - I'm under a lot of pressure to get this all going :) BTW - if folks are live and have suggestions, -please- feel free to IM me: AIM: bostonshayde Jabber: dbs at jabber.stonekeep.com irc.freenode.net: shayde -dbs -- -------------------. .----------- Dave Belfer-Shevett \ Conference Management Solutions \ Stonekeep dbs at stonekeep.com \ http://www.stonekeep.com \ Consulting ---------------------' 978 239 5902 `------------ From stepan at openbios.org Fri Aug 20 09:53:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Fri Aug 20 09:53:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: <1093012542.1819.8.camel@jboat> References: <1092951840.2211.8.camel@jboat> <1093012542.1819.8.camel@jboat> Message-ID: <20040820150725.GA28673@openbios.org> * Dave Belfer-Shevett [040820 16:35]: > When I do a 'file' on the new image, I see: > > /tftpbot/vmlinuz-2.tyan: ELF 32-bit LSB executable, Intel 80386, version > 1 (SYSV), statically linked, corrupted section header size > > This image (bzImage) is an Opteron compiled kernel, which should be 64 > bit, unless there's no real difference in the elf header. > > Sorry if this is sounding pretty whiny - I'm under a lot of pressure to > get this all going :) The kernel normally switches from 16bit real mode to protected mode, and from 32bit protected mode to 64bit long mode. After applying mkelfImage, the resulting kernel image is a 32bit image that switches to 64bit long mode itself. Since LinuxBIOS on Opteron is 32bit only, this is exactly what you want. No idea what goes wrong with the section header size though.. Stefan From dbs at stonekeep.com Fri Aug 20 11:10:01 2004 From: dbs at stonekeep.com (Dave Belfer-Shevett) Date: Fri Aug 20 11:10:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: References: <1092951840.2211.8.camel@jboat> Message-ID: <1093019023.1819.27.camel@jboat> On Thu, 2004-08-19 at 19:29, Eric W. Biederman wrote: > mkelf-linux does not know how to bypass the BIOS calls so > it will not work under LinuxBIOS. > > Please get mkelfImage 2.5 > > ftp://ftp.lnxi.com/pub/mkelfImage. Thanks Eric, but I think the problem is deeper than this. I just tried to start Linuxbios on the machine, with no network cable, no drives, no nothing. It starts up, comes to the Boot from (N)etwork (D)isk (F)loppy or (Q)uit. I hit 'Q' here. And I get LinuxBIOS-1.1.62.0_Fallback [date date] starting... Unknown Trwt So this is happening way before the image is even downloaded. I'm experiencing other problems with this bios image as well. I can't boot of hard drive or off floppy, it justs, for [D]isk boot "probing pci disk [IDE] LBA48mode, disk-1... Searching for image... Probing pci disk... [IDE] Probing isa disk... Boot from (N)etwork... When I replace the BIOS chip back with the AMI original image, I'm able to boot from floppy without a problem. So, my next step is to rebuild my linuxbios image, and flash it again... but... it appears that cvs.sourceforge.net is down. Does anyone have a recent checkout of the CVS tree I can wget or ftp? Please IM or mail me... -dbs -- -------------------. .----------- Dave Belfer-Shevett \ Conference Management Solutions \ Stonekeep dbs at stonekeep.com \ http://www.stonekeep.com \ Consulting ---------------------' 978 239 5902 `------------ From twarren at nvidia.com Fri Aug 20 11:28:01 2004 From: twarren at nvidia.com (Tom Warren) Date: Fri Aug 20 11:28:01 2004 Subject: ROMSTRAP Message-ID: YH, If you have specific Nvidia chipset questions, you can ask me directly, or I can point you to our developer liaison. All of our chipsets use SIP tables to allow autoprogramming of (AMD) CPU link defaults, MAC addresses, etc. The pointers to these 2 tables (safe and user) are at 0xFFFFFFE0 and 0xFFFFFFE4 (dwords). Some of the table format might be proprietary, depending on the chipset. What was Eric's original question? I didn't see it come across the reflector. - Tom Warren NVIDIA -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of YhLu Sent: Thursday, August 19, 2004 5:07 PM To: ebiederman at lnxi.com Cc: linuxbios at clustermatic.org Subject: ROMSTRAP Eric, I'm debug the one Opteron MB with NV CK 804. That chipset (SB) can use ROM Strap to set some register before control is handed to CPU. But the space it need about 0xffffffe00 to 0xfffffef. I guess that add romstarp.lds and romstrap.inc could solve the problem. And it is only needed by fallback. Please advise. Regards YH _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Fri Aug 20 11:44:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Aug 20 11:44:00 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: <20040820150725.GA28673@openbios.org> References: <1092951840.2211.8.camel@jboat> <1093012542.1819.8.camel@jboat> <20040820150725.GA28673@openbios.org> Message-ID: Stefan Reinauer writes: > * Dave Belfer-Shevett [040820 16:35]: > > When I do a 'file' on the new image, I see: > > > > /tftpbot/vmlinuz-2.tyan: ELF 32-bit LSB executable, Intel 80386, version > > 1 (SYSV), statically linked, corrupted section header size > > > > This image (bzImage) is an Opteron compiled kernel, which should be 64 > > bit, unless there's no real difference in the elf header. > > > > Sorry if this is sounding pretty whiny - I'm under a lot of pressure to > > get this all going :) > > The kernel normally switches from 16bit real mode to protected mode, and > from 32bit protected mode to 64bit long mode. > > After applying mkelfImage, the resulting kernel image is a 32bit image > that switches to 64bit long mode itself. Since LinuxBIOS on Opteron is > 32bit only, this is exactly what you want. > > No idea what goes wrong with the section header size though.. Some tools get upset when the see a ELF file with the option section header missing. They report that a section header size of 0 is ``corruption''. Eric From ebiederman at lnxi.com Fri Aug 20 11:49:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Aug 20 11:49:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: <1093019023.1819.27.camel@jboat> References: <1092951840.2211.8.camel@jboat> <1093019023.1819.27.camel@jboat> Message-ID: Dave Belfer-Shevett writes: > On Thu, 2004-08-19 at 19:29, Eric W. Biederman wrote: > > mkelf-linux does not know how to bypass the BIOS calls so > > it will not work under LinuxBIOS. > > > > Please get mkelfImage 2.5 > > > > ftp://ftp.lnxi.com/pub/mkelfImage. > > Thanks Eric, but I think the problem is deeper than this. > > I just tried to start Linuxbios on the machine, with no network cable, > no drives, no nothing. It starts up, comes to the Boot from (N)etwork > (D)isk (F)loppy or (Q)uit. > > I hit 'Q' here. The 'Q' option is generic in etherboot and it does not do anything sensible under LinuxBIOS. So you are probably triggering a triple fault again. It does look like the code you have does not know how to reboot properly but that is a minor issue. > And I get LinuxBIOS-1.1.62.0_Fallback [date date] starting... > Unknown Trwt > > So this is happening way before the image is even downloaded. > > I'm experiencing other problems with this bios image as well. I can't > boot of hard drive or off floppy, it justs, for [D]isk boot "probing > pci disk [IDE] LBA48mode, disk-1... > Searching for image... > > Probing pci disk... > [IDE] > Probing isa disk... > > Boot from (N)etwork... Unless you have an ELF header at the start of your disk that is likely the culprit. The simple path is to get etherboot working with an image created by mkelfImage. > When I replace the BIOS chip back with the AMI original image, I'm able > to boot from floppy without a problem. You have a cluster node with a floppy drive? > So, my next step is to rebuild my linuxbios image, and flash it again... > but... it appears that cvs.sourceforge.net is down. Does anyone have a > recent checkout of the CVS tree I can wget or ftp? Please IM or mail > me... From ebiederman at lnxi.com Fri Aug 20 11:57:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Aug 20 11:57:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: <1093012542.1819.8.camel@jboat> References: <1092951840.2211.8.camel@jboat> <1093012542.1819.8.camel@jboat> Message-ID: Dave Belfer-Shevett writes: > On Thu, 2004-08-19 at 19:29, Eric W. Biederman wrote: > > > mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan > > This is your first problem. > > > > mkelf-linux does not know how to bypass the BIOS calls so > > it will not work under LinuxBIOS. > > Ahhhh. > > > Please get mkelfImage 2.5 > > ftp://ftp.lnxi.com/pub/mkelfImage. > > Done, compiled, and installed. I'm a little worried here though: > > ./mkelfImage --kernel=/tftpboot/bzImage > --output=/tftpboot/vmlinuz-2.tyan > > When I do a 'file' on the new image, I see: > > /tftpbot/vmlinuz-2.tyan: ELF 32-bit LSB executable, Intel 80386, version > 1 (SYSV), statically linked, corrupted section header size > > This image (bzImage) is an Opteron compiled kernel, which should be 64 > bit, unless there's no real difference in the elf header. Stefan already gave the practical explanation. The small bit beyond that is the x86_64 kernel does not even have a valid 64bit entry point. The code is actually present in the 32bit etherboot to cope with an 64bit in for x86_64. But except for test programs I have not been able to find any native ones. Eric From YhLu at tyan.com Fri Aug 20 12:02:12 2004 From: YhLu at tyan.com (YhLu) Date: Fri Aug 20 12:02:12 2004 Subject: ROMSTRAP Message-ID: <3174569B9743D511922F00A0C943142305EE08FF@TYANWEB> I solved the problem about the ROMSTRAP by romstrap.lds and romstrap.inc. Also I change 0x10 in id.lds and id.inc to let it don't use 0xffffffe0... Current I still can not get output from serial port. And I can use postcard with your chipset. Regards YH -----Original Message----- From: Tom Warren [mailto:twarren at nvidia.com] Sent: Friday, August 20, 2004 9:42 AM To: YhLu; ebiederman at lnxi.com Cc: linuxbios at clustermatic.org Subject: RE: ROMSTRAP YH, If you have specific Nvidia chipset questions, you can ask me directly, or I can point you to our developer liaison. All of our chipsets use SIP tables to allow autoprogramming of (AMD) CPU link defaults, MAC addresses, etc. The pointers to these 2 tables (safe and user) are at 0xFFFFFFE0 and 0xFFFFFFE4 (dwords). Some of the table format might be proprietary, depending on the chipset. What was Eric's original question? I didn't see it come across the reflector. - Tom Warren NVIDIA -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of YhLu Sent: Thursday, August 19, 2004 5:07 PM To: ebiederman at lnxi.com Cc: linuxbios at clustermatic.org Subject: ROMSTRAP Eric, I'm debug the one Opteron MB with NV CK 804. That chipset (SB) can use ROM Strap to set some register before control is handed to CPU. But the space it need about 0xffffffe00 to 0xfffffef. I guess that add romstarp.lds and romstrap.inc could solve the problem. And it is only needed by fallback. Please advise. Regards YH _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From YhLu at tyan.com Fri Aug 20 12:05:01 2004 From: YhLu at tyan.com (YhLu) Date: Fri Aug 20 12:05:01 2004 Subject: Opteron / Tyan motherboard fault on boot. Message-ID: <3174569B9743D511922F00A0C943142305EE0902@TYANWEB> I guess that you have some problem with your Etherboot configuration. Also please let us know your compile environment. I will send you my pre-built image and etc..via our FTP server. Regards YH -----Original Message----- From: ebiederman at lnxi.com [mailto:ebiederman at lnxi.com] Sent: Friday, August 20, 2004 10:03 AM To: dbs at stonekeep.com Cc: linuxbios at clustermatic.org Subject: Re: Opteron / Tyan motherboard fault on boot. Dave Belfer-Shevett writes: > On Thu, 2004-08-19 at 19:29, Eric W. Biederman wrote: > > mkelf-linux does not know how to bypass the BIOS calls so > > it will not work under LinuxBIOS. > > > > Please get mkelfImage 2.5 > > > > ftp://ftp.lnxi.com/pub/mkelfImage. > > Thanks Eric, but I think the problem is deeper than this. > > I just tried to start Linuxbios on the machine, with no network cable, > no drives, no nothing. It starts up, comes to the Boot from (N)etwork > (D)isk (F)loppy or (Q)uit. > > I hit 'Q' here. The 'Q' option is generic in etherboot and it does not do anything sensible under LinuxBIOS. So you are probably triggering a triple fault again. It does look like the code you have does not know how to reboot properly but that is a minor issue. > And I get LinuxBIOS-1.1.62.0_Fallback [date date] starting... > Unknown Trwt > > So this is happening way before the image is even downloaded. > > I'm experiencing other problems with this bios image as well. I can't > boot of hard drive or off floppy, it justs, for [D]isk boot "probing > pci disk [IDE] LBA48mode, disk-1... > Searching for image... > > Probing pci disk... > [IDE] > Probing isa disk... > > Boot from (N)etwork... Unless you have an ELF header at the start of your disk that is likely the culprit. The simple path is to get etherboot working with an image created by mkelfImage. > When I replace the BIOS chip back with the AMI original image, I'm able > to boot from floppy without a problem. You have a cluster node with a floppy drive? > So, my next step is to rebuild my linuxbios image, and flash it again... > but... it appears that cvs.sourceforge.net is down. Does anyone have a > recent checkout of the CVS tree I can wget or ftp? Please IM or mail > me... _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From dbs at stonekeep.com Fri Aug 20 12:11:00 2004 From: dbs at stonekeep.com (Dave Belfer-Shevett) Date: Fri Aug 20 12:11:00 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: References: <1092951840.2211.8.camel@jboat> <1093019023.1819.27.camel@jboat> Message-ID: <1093022659.1819.47.camel@jboat> On Fri, 2004-08-20 at 13:03, Eric W. Biederman wrote: > > I hit 'Q' here. > > The 'Q' option is generic in etherboot and it does not do anything sensible > under LinuxBIOS. So you are probably triggering a triple fault again. > It does look like the code you have does not know how to reboot properly > but that is a minor issue. Okay, sounds fine. > > I'm experiencing other problems with this bios image as well. I can't > > boot of hard drive or off floppy, it justs, for [D]isk boot "probing > > pci disk [IDE] LBA48mode, disk-1... > > Searching for image... > > > > Probing pci disk... > > [IDE] > > Probing isa disk... > > > > Boot from (N)etwork... > > Unless you have an ELF header at the start of your disk that is likely > the culprit. Ummm. okay, so I need to make an elf-enabled floppy disk image? > The simple path is to get etherboot working with an image created by mkelfImage. I agree 8) > > When I replace the BIOS chip back with the AMI original image, I'm able > > to boot from floppy without a problem. > > You have a cluster node with a floppy drive? Only when I pull the blade out and manually hook a floppy drive to it so I can re-flash the bios. But getting back on track, am I doing this sequence improperly? On the boot host... cd /usr/src/linux[whatever] make bzImage [compilecompilecompile] I end up with an arch/x86_64/boot/bzImage bootable image. cp arch/x86_64/boot/bzImage /tftpboot ~/src/mkelfImage-2.5/objdir/sbin/mkelfImage --kernel=/tftpboot/bzImage --output=/tftpboot/test1 I alter dhcpd.conf to have 'filename "test1"' I restart dhcpd, restart the blade. Note the Etherboot header says: Loading Etherboot version: 5.2.4 ROM segment 0x0000 length 0x0000 reloc 0x00000000 CPU 2063mhz Etherboot 4.2.5( (GPL)... Tagged ELF for [IDE][TG3] <-- okay? Relocating _text from... Boot from (N)etwork.... After selecting 'boot from Network' I get _Probing pci nic... [ptg3-5704]Ethernet add... Tigon3 [partno... Link is up.. Searching for server Me: (addresses) Loading 192.168.1.200:test1 (ELF)... done Firmware type: LinuxBIOS _ (note the ' ' before the cursor) - at this point it's hung. Is this the right process? -- -------------------. .----------- Dave Belfer-Shevett \ Conference Management Solutions \ Stonekeep dbs at stonekeep.com \ http://www.stonekeep.com \ Consulting ---------------------' 978 239 5902 `------------ From YhLu at tyan.com Fri Aug 20 12:33:00 2004 From: YhLu at tyan.com (YhLu) Date: Fri Aug 20 12:33:00 2004 Subject: Opteron / Tyan motherboard fault on boot. Message-ID: <3174569B9743D511922F00A0C943142305EE090B@TYANWEB> In the Etherboot Src/arch/i386/Config There is an option -DCOFIG_X86_64. You need to enable it to use Etherboot boot elf with X86-64 kernel. Regards YH -----Original Message----- From: ebiederman at lnxi.com [mailto:ebiederman at lnxi.com] Sent: Friday, August 20, 2004 10:11 AM To: dbs at stonekeep.com Cc: linuxbios at clustermatic.org Subject: Re: Opteron / Tyan motherboard fault on boot. Dave Belfer-Shevett writes: > On Thu, 2004-08-19 at 19:29, Eric W. Biederman wrote: > > > mkelf-linux --rootdir=rom --ip=rom ./bzImage > vmlinuz.tyan > > This is your first problem. > > > > mkelf-linux does not know how to bypass the BIOS calls so > > it will not work under LinuxBIOS. > > Ahhhh. > > > Please get mkelfImage 2.5 > > ftp://ftp.lnxi.com/pub/mkelfImage. > > Done, compiled, and installed. I'm a little worried here though: > > ./mkelfImage --kernel=/tftpboot/bzImage > --output=/tftpboot/vmlinuz-2.tyan > > When I do a 'file' on the new image, I see: > > /tftpbot/vmlinuz-2.tyan: ELF 32-bit LSB executable, Intel 80386, version > 1 (SYSV), statically linked, corrupted section header size > > This image (bzImage) is an Opteron compiled kernel, which should be 64 > bit, unless there's no real difference in the elf header. Stefan already gave the practical explanation. The small bit beyond that is the x86_64 kernel does not even have a valid 64bit entry point. The code is actually present in the 32bit etherboot to cope with an 64bit in for x86_64. But except for test programs I have not been able to find any native ones. Eric _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Fri Aug 20 15:04:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Fri Aug 20 15:04:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: <1093022659.1819.47.camel@jboat> References: <1092951840.2211.8.camel@jboat> <1093019023.1819.27.camel@jboat> <1093022659.1819.47.camel@jboat> Message-ID: Dave Belfer-Shevett writes: > On Fri, 2004-08-20 at 13:03, Eric W. Biederman wrote: > > > I hit 'Q' here. > > > > The 'Q' option is generic in etherboot and it does not do anything sensible > > under LinuxBIOS. So you are probably triggering a triple fault again. > > It does look like the code you have does not know how to reboot properly > > but that is a minor issue. > > Okay, sounds fine. > > > I'm experiencing other problems with this bios image as well. I can't > > > boot of hard drive or off floppy, it justs, for [D]isk boot "probing > > > pci disk [IDE] LBA48mode, disk-1... > > > Searching for image... > > > > > > Probing pci disk... > > > [IDE] > > > Probing isa disk... > > > > > > Boot from (N)etwork... > > > > Unless you have an ELF header at the start of your disk that is likely > > the culprit. > > Ummm. okay, so I need to make an elf-enabled floppy disk image? dd the output of mkelfImage onto the floppy should work. Assuming you have a valid floppy image. > > The simple path is to get etherboot working with an image created by > mkelfImage. > > > I agree 8) > > > > When I replace the BIOS chip back with the AMI original image, I'm able > > > to boot from floppy without a problem. > > > > You have a cluster node with a floppy drive? > > Only when I pull the blade out and manually hook a floppy drive to it so > I can re-flash the bios. > > But getting back on track, am I doing this sequence improperly? > > On the boot host... > cd /usr/src/linux[whatever] > make bzImage > [compilecompilecompile] > I end up with an arch/x86_64/boot/bzImage bootable image. > cp arch/x86_64/boot/bzImage /tftpboot > ~/src/mkelfImage-2.5/objdir/sbin/mkelfImage --kernel=/tftpboot/bzImage > --output=/tftpboot/test1 > I alter dhcpd.conf to have 'filename "test1"' > > I restart dhcpd, restart the blade. Hmm. You have not specified any command line arguments. --append="console=ttyS0,115200" or something like that is likely needed. > Note the Etherboot header says: > > Loading Etherboot version: 5.2.4 > ROM segment 0x0000 length 0x0000 reloc 0x00000000 > CPU 2063mhz > Etherboot 4.2.5( (GPL)... Tagged ELF for [IDE][TG3] <-- okay? > Relocating _text from... > Boot from (N)etwork.... > > After selecting 'boot from Network' > > I get > _Probing pci nic... > [ptg3-5704]Ethernet add... > Tigon3 [partno... > Link is up.. > Searching for server > Me: (addresses) > Loading 192.168.1.200:test1 (ELF)... done > Firmware type: LinuxBIOS > _ > > (note the ' ' before the cursor) - at this point it's hung. > > Is this the right process? Yes. And the Firmware type: LinuxBIOS comes from the prefix mkelfImage prepended. So it is even running. My best guess is that you don't have serial console output configured. Eric From miernik at ctnet.pl Fri Aug 20 15:13:00 2004 From: miernik at ctnet.pl (Miernik) Date: Fri Aug 20 15:13:00 2004 Subject: Panasonic CF-25LJM8EAM Toughbook - what are the chances? Message-ID: I bought a Pansonic CF-25LJM8EAM notebook. All important chips on the mainboard are listed here: http://www.miernik.ctnet.pl/linuxbios/CF-25LJM8EAM-chiplist Bari, can you spot which one is the "keyboard controller" which you said is usually the critical problem on getting LinuxBIOS to a laptop? The chipset is supported (Intel TX). szrenica:~# lspci -v 0000:00:00.0 Host bridge: Intel Corp. 430TX - 82439TX MTXC (rev 01) Flags: bus master, medium devsel, latency 32 0000:00:01.0 ISA bridge: Intel Corp. 82371AB/EB/MB PIIX4 ISA (rev 01) Flags: bus master, medium devsel, latency 0 0000:00:01.1 IDE interface: Intel Corp. 82371AB/EB/MB PIIX4 IDE (rev 01) (prog-if 80 [Master]) Flags: bus master, medium devsel, latency 64 I/O ports at ffa0 [size=16] 0000:00:01.2 USB Controller: Intel Corp. 82371AB/EB/MB PIIX4 USB (rev 01) (prog-if 00 [UHCI]) Flags: medium devsel I/O ports at 1000 [size=32] 0000:00:01.3 Bridge: Intel Corp. 82371AB/EB/MB PIIX4 ACPI (rev 01) Flags: medium devsel, IRQ 9 0000:00:02.0 VGA compatible controller: Neomagic Corporation NM2093 [MagicGraph 128ZV] (rev 04) (prog-if 00 [VGA]) Flags: medium devsel Memory at 42000000 (32-bit, prefetchable) [size=4M] 0000:00:13.0 CardBus bridge: Ricoh Co Ltd RL5c476 II (rev 01) Subsystem: Matsushita Electric Industrial Co., Ltd.: Unknown device 8306 Flags: bus master, medium devsel, latency 168, IRQ 11 Memory at f0000000 (32-bit, non-prefetchable) [size=4K] Bus: primary=00, secondary=01, subordinate=04, sec-latency=176 Memory window 0: 10000000-103ff000 (prefetchable) Memory window 1: 10400000-107ff000 I/O window 0: 00004400-000044ff I/O window 1: 00004800-000048ff 16-bit legacy interface ports at 0001 0000:00:13.1 CardBus bridge: Ricoh Co Ltd RL5c476 II (rev 01) Subsystem: Matsushita Electric Industrial Co., Ltd.: Unknown device 8306 Flags: bus master, medium devsel, latency 168, IRQ 11 Memory at f0001000 (32-bit, non-prefetchable) [size=4K] Bus: primary=00, secondary=05, subordinate=08, sec-latency=176 Memory window 0: 10800000-10bff000 (prefetchable) Memory window 1: 10c00000-10fff000 I/O window 0: 00004c00-00004cff I/O window 1: 00005000-000050ff 16-bit legacy interface ports at 0001 szrenica:~# What are the chances of getting this to work? The BIOS flash is unfortunately soldered, but I thing of giving the mainboard to an electronics facility so they can desolder it and solder a socket there. Interesting, the CPU is in a socket, so it might be possible to mount a AMD K6-2 350 MHz. It is possible on other Intel 430TX motherboards after binary patching the BIOS. Here is a site with binary patches for such BIOSes in many motherboards: http://web.inter.nl.net/hcc/J.Steunebrink/k6plus.htm -- Miernik ________________________ xmpp:miernik at amessage.info ___________________/__ tel: +48888299997 __/ mailto:miernik at ctnet.pl http://www.miernik.ctnet.pl/ GPG:0xABC292D1 From bari at onelabs.com Fri Aug 20 16:25:01 2004 From: bari at onelabs.com (Bari Ari) Date: Fri Aug 20 16:25:01 2004 Subject: Panasonic CF-25LJM8EAM Toughbook - what are the chances? In-Reply-To: References: Message-ID: <41266FE9.60104@onelabs.com> Miernik wrote: > I bought a Pansonic CF-25LJM8EAM notebook. > All important chips on the mainboard are listed here: > > http://www.miernik.ctnet.pl/linuxbios/CF-25LJM8EAM-chiplist > > Bari, can you spot which one is the "keyboard controller" which you > said is usually the critical problem on getting LinuxBIOS to a laptop? The keyboard controller usually doesn't show up on lspci. You have to open the case and look at the board. > > What are the chances of getting this to work? I think the TX chipset is supported under version 1 (the old tree) of LinuxBIOS. > The BIOS flash is unfortunately soldered, but I thing of giving the > mainboard to an electronics facility so they can desolder it and > solder a socket there. > > Interesting, the CPU is in a socket, so it might be possible to mount > a AMD K6-2 350 MHz. It is possible on other Intel 430TX motherboards > after binary patching the BIOS. Here is a site with binary patches for > such BIOSes in many motherboards: > http://web.inter.nl.net/hcc/J.Steunebrink/k6plus.htm > I'd have to dig back into the TX datasheets to see how the TX handled cpu changes. It may use pinstraps vs register settings or a combination of both. -Bari From rminnich at lanl.gov Fri Aug 20 19:24:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Fri Aug 20 19:24:01 2004 Subject: Opteron / Tyan motherboard fault on boot. In-Reply-To: <20040820150725.GA28673@openbios.org> Message-ID: the elfimage looks kinda look an elf file to many linux tools but they can't quite grok it, so ignore the error from 'file'. ron From miernik at ctnet.pl Fri Aug 20 23:30:01 2004 From: miernik at ctnet.pl (Miernik) Date: Fri Aug 20 23:30:01 2004 Subject: Panasonic CF-25LJM8EAM Toughbook - what are the chances? References: <41266FE9.60104@onelabs.com> Message-ID: Bari Ari wrote: > Miernik wrote: >> I bought a Pansonic CF-25LJM8EAM notebook. >> All important chips on the mainboard are listed here: >> >> http://www.miernik.ctnet.pl/linuxbios/CF-25LJM8EAM-chiplist >> >> Bari, can you spot which one is the "keyboard controller" which you >> said is usually the critical problem on getting LinuxBIOS to a laptop? > > The keyboard controller usually doesn't show up on lspci. You have to > open the case and look at the board. In the URL above I have a list of all significantly-looking chips on the board. Can you spot anything which might be the keyboard controller? -- Miernik ________________________ xmpp:miernik at amessage.info ___________________/__ tel: +48888299997 __/ mailto:miernik at ctnet.pl http://www.miernik.ctnet.pl/ GPG:0xABC292D1 From bari at onelabs.com Sat Aug 21 03:06:00 2004 From: bari at onelabs.com (Bari Ari) Date: Sat Aug 21 03:06:00 2004 Subject: Panasonic CF-25LJM8EAM Toughbook - what are the chances? In-Reply-To: References: <41266FE9.60104@onelabs.com> Message-ID: <412705F4.80800@onelabs.com> Miernik wrote: > Bari Ari wrote: > >>Miernik wrote: >> >>>I bought a Pansonic CF-25LJM8EAM notebook. >>>All important chips on the mainboard are listed here: >>> >>>http://www.miernik.ctnet.pl/linuxbios/CF-25LJM8EAM-chiplist >>> >>>Bari, can you spot which one is the "keyboard controller" which you >>>said is usually the critical problem on getting LinuxBIOS to a laptop? It may not be a problem. It all depends on if they use the controller for enabling writes to Flash. See how far you can get with replacing the BIOS. > In the URL above I have a list of all significantly-looking chips on > the board. Can you spot anything which might be the keyboard > controller? > IC327 20+20+20+20=80 ------------------ | Mitsubishi | M38867E8AHP | IM 842A101 ------------------ Probably this 8-bit micro is used. http://documentation.renesas.com/eng/products/mpumcu/e3886g.pdf Off topic - the Toughbooks had great cases. I recall someone testing one a few years ago by shooting it at a basketball hoop and it landing on concrete and it still ran fine. -Bari From miernik at ctnet.pl Sat Aug 21 04:03:01 2004 From: miernik at ctnet.pl (Miernik) Date: Sat Aug 21 04:03:01 2004 Subject: Panasonic CF-25LJM8EAM Toughbook - what are the chances? References: <41266FE9.60104@onelabs.com> <412705F4.80800@onelabs.com> Message-ID: Bari Ari wrote: > > http://documentation.renesas.com/eng/products/mpumcu/e3886g.pdf Renesas ? So it's the one that you said you can get all nessesary documentation out of? So we have a winner! A laptop with an Intel chipset and Renesas controller. I remember you said you want to choose a rather new notebook. We'd have to check what Panasonic CF-18, CF-28 and CF-29 use, as these are the newest rugged Toughbooks, and might be a great choice if they still use Renesas controllers. Here I have a list of all toughbook models I could spot: http://www.miernik.ctnet.pl/linuxbios/toughbook.info Althrough I cannot afford anything newer than CF-27 out of that list, so I would have to wait several years to use your LinuxBIOS. > Off topic - the Toughbooks had great cases. I recall someone testing one > a few years ago by shooting it at a basketball hoop and it landing on > concrete and it still ran fine. I bought it because I damage most standard notebooks quickly, and cellphones too. I use Nokia 6250 rugged cellphone, after about 7 other cellphones didn't live more than several months in my hands. -- Miernik ________________________ xmpp:miernik at amessage.info ___________________/__ tel: +48888299997 __/ mailto:miernik at ctnet.pl http://www.miernik.ctnet.pl/ GPG:0xABC292D1 From bari at onelabs.com Sat Aug 21 12:47:00 2004 From: bari at onelabs.com (Bari Ari) Date: Sat Aug 21 12:47:00 2004 Subject: Panasonic CF-25LJM8EAM Toughbook - what are the chances? In-Reply-To: References: <41266FE9.60104@onelabs.com> <412705F4.80800@onelabs.com> Message-ID: <41278E3E.7040909@onelabs.com> Miernik wrote: > Bari Ari wrote: > >>http://documentation.renesas.com/eng/products/mpumcu/e3886g.pdf > > > Renesas ? So it's the one that you said you can get all nessesary > documentation out of? That's the link to the data sheet, and it looks like Panasonic used the "one time PROM" version of the device so there will be no reprogramming the micro. At least you have a pinout for the micro from the datasheet. -Bari From sagivy at 3vium.com Sun Aug 22 09:33:00 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Sun Aug 22 09:33:00 2004 Subject: cosole/VGA in opetron Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6A8@cronos.trivium> How can I set the linux bios in opetron machine (amd/solo) to show output on a VGA instead of a console. ? thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Sun Aug 22 09:42:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Sun Aug 22 09:42:00 2004 Subject: cosole/VGA in opetron In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6A8@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6A8@cronos.trivium> Message-ID: <20040822145644.GA23781@openbios.org> * Sagiv Yefet [040822 17:51]: > How can I set the linux bios in opetron machine (amd/solo) > to show output on a VGA instead of a console. ? > thanks. This works only with the "testbios" userspace utility currently. So you need to have a running Linux before you will see anything on vga ... see util/vgabios for more information Stefan From zhushisongzhu at yahoo.com Sun Aug 22 23:13:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Sun Aug 22 23:13:01 2004 Subject: doc2000 support? Message-ID: <20040823042803.47963.qmail@web13206.mail.yahoo.com> DOC MIL has expired. Now I have bought one doc2000(partno:MD2202-D16). How can I upgrade my DOC MIL ipl for sis630 to DOC2000? tks zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - 100MB free storage! http://promotions.yahoo.com/new_mail From jerj at coplanar.net Mon Aug 23 00:01:00 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Mon Aug 23 00:01:00 2004 Subject: status request for ECS K7S5A (SIS735) Message-ID: <41297D80.6070300@coplanar.net> Hi, I see this chipset is in freebios, but not freebios2. I've been out of the loop for a while. Can anyone give me some current status info on this board/chipset? I see it listed as "unstable" Regards, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From rminnich at lanl.gov Mon Aug 23 08:00:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Mon Aug 23 08:00:01 2004 Subject: status request for ECS K7S5A (SIS735) In-Reply-To: <41297D80.6070300@coplanar.net> Message-ID: On Mon, 23 Aug 2004, Jeremy Jackson wrote: > I see this chipset is in freebios, but not freebios2. I've been out of > the loop for a while. Can anyone give me some current status info on > this board/chipset? I see it listed as "unstable" I don't think anyone is working on it. ron From ollie at lanl.gov Mon Aug 23 09:45:01 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Mon Aug 23 09:45:01 2004 Subject: status request for ECS K7S5A (SIS735) In-Reply-To: <41297D80.6070300@coplanar.net> References: <41297D80.6070300@coplanar.net> Message-ID: <1093273212.23596.86.camel@exponential.lanl.gov> On Sun, 2004-08-22 at 23:15, Jeremy Jackson wrote: > Hi, > > I see this chipset is in freebios, but not freebios2. I've been out of > the loop for a while. Can anyone give me some current status info on > this board/chipset? I see it listed as "unstable" > How about "obsolete" ? Ollie > Regards, > > Jeremy From zhushisongzhu at yahoo.com Mon Aug 23 22:04:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Aug 23 22:04:00 2004 Subject: EPIA VGA and keyboard fail when booting from V2 linuxbios Message-ID: <20040824031851.28222.qmail@web13206.mail.yahoo.com> I have boot my epia board successfully using V2 Linuxbios. I can see filo loading linux kernel to boot..But there are some problems: (1)keyboard fail (2)vga fail (3)my kernel boot fail, I can't see any prompt message from serial. How can I configure my kernel to support serial output? tks zhu __________________________________ Do you Yahoo!? Yahoo! Mail - 50x more storage than other providers! http://promotions.yahoo.com/new_mail From rminnich at lanl.gov Tue Aug 24 00:06:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 00:06:00 2004 Subject: EPIA VGA and keyboard fail when booting from V2 linuxbios In-Reply-To: <20040824031851.28222.qmail@web13206.mail.yahoo.com> Message-ID: what version kernel? 2.6. now has a nice feature, early serial console output, useful for debug. ron From zhushisongzhu at yahoo.com Tue Aug 24 00:52:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Tue Aug 24 00:52:00 2004 Subject: EPIA VGA and keyboard fail when booting from V2 linuxbios In-Reply-To: Message-ID: <20040824060722.22098.qmail@web13208.mail.yahoo.com> (1)kernel: linux-2.4.26 (2)freebios2: latest(08/23)cvs freebios2 (3)there is no any vga handle of via epia under freebios2 zhu --- ron minnich wrote: > what version kernel? 2.6. now has a nice feature, > early serial console > output, useful for debug. > > ron > > _______________________________ Do you Yahoo!? Win 1 of 4,000 free domain names from Yahoo! Enter now. http://promotions.yahoo.com/goldrush From jerj at coplanar.net Tue Aug 24 01:36:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Tue Aug 24 01:36:01 2004 Subject: help with new motherboard Soyo 6BA+ Message-ID: <412AE56C.5030301@coplanar.net> Hi, I'm getting C1 (pause 6 seconds) C6, hang on the post card. I modified the smartcore-p3 (also 440BX based. Possibly there's 0x10 for an instant to start. I'll post all the lspci stuff tomorrow, just wondering if those post codes ring a bell for anyone. I can't find those in the code anywhere. Regards, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From stepan at openbios.org Tue Aug 24 02:14:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Tue Aug 24 02:14:01 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412AE56C.5030301@coplanar.net> References: <412AE56C.5030301@coplanar.net> Message-ID: <20040824072911.GA29659@openbios.org> * Jeremy Jackson [040824 08:51]: > Hi, > > I'm getting C1 (pause 6 seconds) C6, hang on the post card. I modified > the smartcore-p3 (also 440BX based. Possibly there's 0x10 for an > instant to start. > > I'll post all the lspci stuff tomorrow, just wondering if those post > codes ring a bell for anyone. I can't find those in the code anywhere. Any serial console output? It seems there is neither post code C1 nor C6 in all of LinuxBIOS. What's the reason for having both post_code() and intel_chip_post_macro()? I'd suggest renaming the later to post_macro() or post_code() as well.. Stefan From zhushisongzhu at yahoo.com Tue Aug 24 06:38:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Tue Aug 24 06:38:00 2004 Subject: vgainit.inc halt epia Message-ID: <20040824115311.42089.qmail@web13205.mail.yahoo.com> Q1: (1)freebios v1 (2)MB: epia (3)Kernel: 2.4.26 (4)I try to turn vga on following the steps in EPIA howto. But MB halt on executing vgainit.inc. Q2: (1)freebios V2 (2)MB: epia (3)kernel: 2.4.26 (4)I can boot filo from IDE CF, when jump to linux, I can't see any messages from vga or serial. (5)keyboard and vga are all off. It's hard for me to see how the kernel worked. zhu _______________________________ Do you Yahoo!? Express yourself with Y! Messenger! Free. Download now. http://messenger.yahoo.com From rminnich at lanl.gov Tue Aug 24 08:41:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 08:41:01 2004 Subject: EPIA VGA and keyboard fail when booting from V2 linuxbios In-Reply-To: <20040824060722.22098.qmail@web13208.mail.yahoo.com> Message-ID: On Mon, 23 Aug 2004, zhu shi song wrote: > (3)there is no any vga handle of via epia under > freebios2 You'll need to go back in this list, this type of work has been done but it gets complicated. ron From rminnich at lanl.gov Tue Aug 24 08:43:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 08:43:00 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412AE56C.5030301@coplanar.net> Message-ID: On Tue, 24 Aug 2004, Jeremy Jackson wrote: > Hi, > > I'm getting C1 (pause 6 seconds) C6, hang on the post card. I modified > the smartcore-p3 (also 440BX based. Possibly there's 0x10 for an > instant to start. 10 is an early post. C1 I will have to look up. Anyone who wants to make up a post code table is welcome ... you should try to hook up serial. ron From jerj at coplanar.net Tue Aug 24 09:15:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Tue Aug 24 09:15:01 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: References: Message-ID: <412B5116.8040806@coplanar.net> I already have serial... but the problem was an incomplete flashing. I'm guessing the NIC I was using seems to be only wired for the 1st 64k, and the previous contents in the upper half of the 128k part (old bios from other mobo) were writing the c1..c6 post codes Uniflash to the rescue! Haven't gotten around to porting devbios to MTD yet...sigh. I have to say, wow that was easy! Linuxbios really is modular. Change the superio, flash size, and off you go. Kudos! Any ideas about the etherboot no heap found? Cheers, Jeremy LinuxBIOS-1.0.0 Tue Aug 24 10:17:36 EDT 2004 starting... Ram1 Ram2 Ram3 Ram Enable 1 Ram Enable 2 Ram Enable 3 Ram Enable 4 Ram Enable 5 Ram4 Ram5 Ram6 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Tue Aug 24 10:17:36 EDT 2004 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [8086/7190] PCI: 00:01.0 [8086/7191] PCI: 00:07.0 [8086/7110] PCI: 00:07.1 [8086/7111] PCI: 00:07.2 [8086/7112] PCI: 00:07.3 [8086/7113] PCI: 00:0f.0 [8086/1229] PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [1023/9750] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:00.0 10 <- [0xe0000000 - 0xefffffff] prefmem PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xf0a00000 - 0xf09fffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xf0000000 - 0xf08fffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:00.0 10 <- [0xf0000000 - 0xf03fffff] mem PCI: 01:00.0 14 <- [0xf0800000 - 0xf081ffff] mem PCI: 01:00.0 18 <- [0xf0400000 - 0xf07fffff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:07.1 20 <- [0x00001040 - 0x0000104f] io PCI: 00:07.2 20 <- [0x00001000 - 0x0000101f] io PCI: 00:0f.0 10 <- [0xf0a00000 - 0xf0a00fff] prefmem PCI: 00:0f.0 14 <- [0x00001020 - 0x0000103f] io PCI: 00:0f.0 18 <- [0xf0900000 - 0xf09fffff] mem ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:07.0 cmd <- 07 PCI: 00:07.1 cmd <- 01 PCI: 00:07.2 cmd <- 01 PCI: 00:07.3 cmd <- 01 PCI: 00:0f.0 cmd <- 03 PCI: 01:00.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized totalram: 16M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 16MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 2 Vendor ID : GenuineIntel Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x05 Processor Mask : 0x00 Processor Stepping : 0x01 Feature flags : 0x0183fbff Cache/TLB descriptor values: 1 reads required Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x40 : No L2 cache Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries Gesc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size .TRR check .ixed MTRRs : Enabled Variable MTRRs: Enabled . ../ ... . O/. . .... . . /Disabling local apic...done. CPU #0 Initialized intel_mainboard_fixup() Testing SMI SMI disabled Enabling IDE...0x40 = 0x8000 0x42 = 0x8000 Enabled IDE for channels 1 and 2 Enabling Legacy IDE Word at 4 is now 0x0001 enabling smbus enable pm functions Setting up RTC RTC Init Invalid CMOS LB checksum done. Enabling extended BIOS access Enabling Full ISA Mode Enabling IRQ8 Enabling Mouse IRQ12 on piix4e done. Checking IRQ routing tables... /data/build/linuxbios/freebios/src/arch/i386/lib/pirq_routing.c: 30:check_pi done. Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 00000688 checksum db75 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 37:init_bytes() - zkernel_start:0xfffc0000 zkernel_mask:0x0000007f Found ELF candiate at offset 0 Loading Etherboot version: 5.2.5 Dropping non PT_LOAD segment New segment addr 0x20000 size 0xe740 offset 0xb0 filesize 0x63dc (cleaned up) New segment addr 0x20000 size 0xe740 offset 0xb0 filesize 0x63dc cLoading Segment: addr: 0x0000000000f80f68 memsz: 0x000000000000e740 filesz: 0x0 Clearing Segment: addr: 0x0000000000f87344 memsz: 0x0000000000008364 Jumping to boot code at 0x20000 ROM segment 0x0f0f length 0x161e reloc 0x00020000 CPU 360 Mhz Etherboot 5.2.5 (GPL) http://etherboot.org Tagged ELF for [EEPRO100] init_heap: No heap found. ron minnich wrote: > On Tue, 24 Aug 2004, Jeremy Jackson wrote: > > >>Hi, >> >>I'm getting C1 (pause 6 seconds) C6, hang on the post card. I modified >>the smartcore-p3 (also 440BX based. Possibly there's 0x10 for an >>instant to start. > > > 10 is an early post. C1 I will have to look up. Anyone who wants to make > up a post code table is welcome ... > > you should try to hook up serial. > > > ron > -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From jerj at coplanar.net Tue Aug 24 09:23:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Tue Aug 24 09:23:01 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412B5116.8040806@coplanar.net> References: <412B5116.8040806@coplanar.net> Message-ID: <412B52DB.1080505@coplanar.net> Jeremy Jackson wrote: > Any ideas about the etherboot no heap found? > Seems 16M isn't enough. swapping for a 256M DIMM fixes it. Son of a gun it boots fast! I can't stop giggling. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From rminnich at lanl.gov Tue Aug 24 10:22:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 10:22:01 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412B5116.8040806@coplanar.net> Message-ID: On Tue, 24 Aug 2004, Jeremy Jackson wrote: > I already have serial... but the problem was an incomplete flashing. > I'm guessing the NIC I was using seems to be only wired for the 1st 64k, > and the previous contents in the upper half of the 128k part (old bios > from other mobo) were writing the c1..c6 post codes yes, that makes sense, C1 ... C6 are common post codes from standard bios. no idea on etherboot error ... ron From rminnich at lanl.gov Tue Aug 24 10:23:04 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 10:23:04 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412B52DB.1080505@coplanar.net> Message-ID: cool, tell us more about this mobo, and send me patches for it. ron From jerj at coplanar.net Tue Aug 24 11:56:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Tue Aug 24 11:56:01 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: References: Message-ID: <412B76DA.4090505@coplanar.net> ron minnich wrote: > cool, tell us more about this mobo, and send me patches for it. Superio is it8671f, which is different from digitallogic/smartcore-p3 Well, I can netboot Linux or memetest86 using etherboot. Intel e100. Linux can mount root from an IDE CD-ROM, but the network card(s) don't work, so no NFS root. Manual ifconfig doesn't help. The cards can send, but don't seem to recieve. I suspect they're not getting interrupts. (none):~# cat /proc/interrupts CPU0 0: 65294 XT-PIC timer 1: 0 XT-PIC keyboard 2: 0 XT-PIC cascade 4: 869 XT-PIC serial 5: 0 XT-PIC eth0 14: 2271 XT-PIC ide0 NMI: 0 LOC: 65255 ERR: 0 MIS: 0 Included is linuxbios, Linux output, and lspci -v and -vv for NIC. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: minicom.cap URL: From rminnich at lanl.gov Tue Aug 24 12:04:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 12:04:00 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412B76DA.4090505@coplanar.net> Message-ID: On Tue, 24 Aug 2004, Jeremy Jackson wrote: > Well, I can netboot Linux or memetest86 using etherboot. Intel e100. > Linux can mount root from an IDE CD-ROM, but the network card(s) don't > work, so no NFS root. Manual ifconfig doesn't help. The cards can > send, but don't seem to recieve. I suspect they're not getting interrupts. what's getpir say? ron From jerj at coplanar.net Tue Aug 24 12:43:00 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Tue Aug 24 12:43:00 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: References: Message-ID: <412B81AB.5060204@coplanar.net> ron minnich wrote: > what's getpir say? Running on Linuxbios? In that case: (none):/mnt# ./getpir Opening memory... Found PCI IRQ Routing table signature at 81422ac bytes from top of the memory Validating../ Version is:256 Table size:336 Reading 19 slot entries... Checksum is ok! Closing memory Creating irq_tables.c ..... Done, you can move the file to the LinuxBios tree now. (none):/mnt# echo linuxbios booted me! USB is working... i used a memory key to run getpir/capture results. irq_tables.c attached. no idea what i'm doing. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net -------------- next part -------------- A non-text attachment was scrubbed... Name: irq_tables.c Type: text/x-csrc Size: 2980 bytes Desc: not available URL: From ollie at lanl.gov Tue Aug 24 13:39:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Tue Aug 24 13:39:00 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412B81AB.5060204@coplanar.net> References: <412B81AB.5060204@coplanar.net> Message-ID: <1093373687.23596.112.camel@exponential.lanl.gov> On Tue, 2004-08-24 at 11:58, Jeremy Jackson wrote: > ron minnich wrote: > > > what's getpir say? > > Running on Linuxbios? In that case: No, we need it under factory bios. Ollie From jerj at coplanar.net Tue Aug 24 13:49:00 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Tue Aug 24 13:49:00 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <1093373687.23596.112.camel@exponential.lanl.gov> References: <412B81AB.5060204@coplanar.net> <1093373687.23596.112.camel@exponential.lanl.gov> Message-ID: <412B9138.30701@coplanar.net> Li-Ta Lo wrote: > No, we need it under factory bios. the one generated by vendor BIOS: $ cd util/getpir $ make test .... Validating checksum, file: irq_tables.c that was in ./ at compile time... (no other tests are done) BAD CHECKSUM for IRQ Routing table !!!! If you want to make it valid, change the checksum to: 0x73 I will try what it suggests. Where is this information used? By Linuxbios or Linux? What messages would indicate that either of those has detected the table correctly or incorrectly? Regards, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net -------------- next part -------------- A non-text attachment was scrubbed... Name: irq_tables.c Type: text/x-csrc Size: 1771 bytes Desc: not available URL: From rminnich at lanl.gov Tue Aug 24 14:52:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 14:52:00 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412B81AB.5060204@coplanar.net> Message-ID: you want to use that irq_tables.c for your mainboard irq_tables.c that might fix it. I assume you ran this one NOT under linuxbios, if you did run it under linuxbios, then reboot with fuctory bios and run it again. ron From rminnich at lanl.gov Tue Aug 24 14:58:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 14:58:00 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412B9138.30701@coplanar.net> Message-ID: On Tue, 24 Aug 2004, Jeremy Jackson wrote: > I will try what it suggests. > Where is this information used? By Linuxbios or Linux? it is compiled into linuxbios. > What messages would indicate that either of those has detected the table > correctly or incorrectly? just run getpir under fuctory bios and you should be ok, try that and let us know. ron From jerj at coplanar.net Tue Aug 24 16:52:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Tue Aug 24 16:52:01 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: References: Message-ID: <412BBC29.3040706@coplanar.net> ron minnich wrote: > just run getpir under fuctory bios and you should be ok, try that and let > us know. It's ALIVE! Interrupts working now. Sorry if I bugged everyone for info in the manual, it's just so darn exciting! The only problem I had that wasn't something stupid, was that I had to correct the checksum in irq_tables.c that getpir generated. Shouldn't the generated file have the right checksum? Or maybe it doesn't matter. I can't believe it's this easy! From newb to 1st mobo up in 24 hours. Thanks for your help guys. Cheers, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From rminnich at lanl.gov Tue Aug 24 16:58:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 24 16:58:01 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: <412BBC29.3040706@coplanar.net> Message-ID: On Tue, 24 Aug 2004, Jeremy Jackson wrote: > I can't believe it's this easy! From newb to 1st mobo up in 24 hours. now you have to write up your experiences for the web page. That title above will do :-) thanks! ron > > From rsmith at bitworks.com Tue Aug 24 17:45:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Tue Aug 24 17:45:01 2004 Subject: asus p2b In-Reply-To: References: Message-ID: <412BC89B.5060706@bitworks.com> I remeber reading that asus does non-standard things with SPD. I'm trying to get a P2B up and it dosen't do ram right. Anything I can try that worked on other asus motherboards? From jpraher at yahoo.de Wed Aug 25 02:17:00 2004 From: jpraher at yahoo.de (Jakob Praher) Date: Wed Aug 25 02:17:00 2004 Subject: booting other oses Message-ID: <1093419085.5150.3.camel@jaques2> hi all, how/where does linuxbios do the loading of other oses? linuxbios loads the linux kernel from the flashrom, which then it is in real mode imho. so does it use lobos/two kernel monte or something other way to load another app? I would apprieciate source code pointers or other directions where I can look for. for instance how would linuxbios boot into for instance grub or lilo? thanks --Jakob From stepan at openbios.org Wed Aug 25 04:11:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Aug 25 04:11:01 2004 Subject: booting other oses In-Reply-To: <1093419085.5150.3.camel@jaques2> References: <1093419085.5150.3.camel@jaques2> Message-ID: <20040825092658.GA18944@openbios.org> * Jakob Praher [040825 09:31]: > how/where does linuxbios do the loading of other oses? LinuxBIOS can load an arbitrary static ELF binary from flash or disk. > linuxbios loads the linux kernel from the flashrom, which then it is in > real mode imho. It can also load a bootloader from flash, like etherboot, filo or start openbios. This is all in protected mode though. Real mode is gone for good 17 instructions after power-on > for instance how would linuxbios boot into for instance grub or lilo? grub and lilo both don't work in LinuxBIOS since they are using PCBIOS 16bit callbacks ("interrupts") for IO. If you want to use those anyways, have a look at ADLO (See mailing list archive for above phrases ;) Stefan From jpraher at yahoo.de Wed Aug 25 05:34:00 2004 From: jpraher at yahoo.de (Jakob Praher) Date: Wed Aug 25 05:34:00 2004 Subject: booting other oses In-Reply-To: <20040825092658.GA18944@openbios.org> References: <1093419085.5150.3.camel@jaques2> <20040825092658.GA18944@openbios.org> Message-ID: <1093430981.4859.11.camel@jaques2> hi Stefan, thanks f?r the info. I have included some additional questions. but lets summarize what I think I know: linuxbios is a bootstrapper thats able to load a linux kernel/elf binary from within a flash rom/file/...? or is linuxbios itself a linux kernel that is able to execute another elf binary? if the first option is true, it would probably need hardware access code for accessing ide/scsi disks without the 16bit callbacks (INT13 and friends) Am Mit, den 25.08.2004 schrieb Stefan Reinauer um 11:26: > * Jakob Praher [040825 09:31]: > > how/where does linuxbios do the loading of other oses? > > LinuxBIOS can load an arbitrary static ELF binary from flash or disk. how do you then be able to load ntldr or something like that? afaik ntldr is no elf executable it is either a COFF/PE or it is a DOS exe ... > > > linuxbios loads the linux kernel from the flashrom, which then it is in > > real mode imho. > > It can also load a bootloader from flash, like etherboot, filo or > start openbios. This is all in protected mode though. Real mode is gone > for good 17 instructions after power-on thats good to know. > > > for instance how would linuxbios boot into for instance grub or lilo? > > grub and lilo both don't work in LinuxBIOS since they are using PCBIOS > 16bit callbacks ("interrupts") for IO. If you want to use those anyways, > have a look at ADLO I understand. so what is the preferred boot loader with linuxbios? > > > (See mailing list archive for above phrases ;) hehe. -- Jakob > From daubin at actuality-systems.com Wed Aug 25 07:50:01 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Wed Aug 25 07:50:01 2004 Subject: booting other oses Message-ID: Hi Stefan, What is your goal to want to use Linux bios? If your goal is to get It to load a Linux kernel, then try etherboot. There is also etherboot With filo. Etherboot will provide an elf file for you that is network Card aware and also has support for ide hd access. There is also a flavor Of etherboot that has filo support in it. Filo gives the ability to load Off of a usb stick. Knowing this you can use the net, ide drive or usb stick To load your os. Gotta love it;) Dave -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Jakob Praher Sent: Wednesday, August 25, 2004 6:50 AM To: linuxbios Subject: Re: booting other oses hi Stefan, thanks f?r the info. I have included some additional questions. but lets summarize what I think I know: linuxbios is a bootstrapper thats able to load a linux kernel/elf binary from within a flash rom/file/...? or is linuxbios itself a linux kernel that is able to execute another elf binary? if the first option is true, it would probably need hardware access code for accessing ide/scsi disks without the 16bit callbacks (INT13 and friends) Am Mit, den 25.08.2004 schrieb Stefan Reinauer um 11:26: > * Jakob Praher [040825 09:31]: > > how/where does linuxbios do the loading of other oses? > > LinuxBIOS can load an arbitrary static ELF binary from flash or disk. how do you then be able to load ntldr or something like that? afaik ntldr is no elf executable it is either a COFF/PE or it is a DOS exe ... > > > linuxbios loads the linux kernel from the flashrom, which then it is > > in real mode imho. > > It can also load a bootloader from flash, like etherboot, filo or > start openbios. This is all in protected mode though. Real mode is > gone for good 17 instructions after power-on thats good to know. > > > for instance how would linuxbios boot into for instance grub or lilo? > > grub and lilo both don't work in LinuxBIOS since they are using PCBIOS > 16bit callbacks ("interrupts") for IO. If you want to use those > anyways, have a look at ADLO I understand. so what is the preferred boot loader with linuxbios? > > > (See mailing list archive for above phrases ;) hehe. -- Jakob > _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Wed Aug 25 09:08:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 09:08:01 2004 Subject: booting other oses In-Reply-To: <1093419085.5150.3.camel@jaques2> Message-ID: On Wed, 25 Aug 2004, Jakob Praher wrote: > linuxbios loads the linux kernel from the flashrom, which then it is in > real mode imho. ah, no, it is not. it is in 32-bit mode in linuxbios, and 32-bit paged mode in kernel. > so does it use lobos/two kernel monte or something other way to load > another app? app ==> kernel right? > for instance how would linuxbios boot into for instance grub or lilo? it won't because grub and lilo need bios callbacks that linuxbios does not provide. ron From rminnich at lanl.gov Wed Aug 25 09:17:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 09:17:00 2004 Subject: booting other oses In-Reply-To: Message-ID: On Wed, 25 Aug 2004, Dave Aubin wrote: > What is your goal to want to use Linux bios? If your goal is to get > It to load a Linux kernel, then try etherboot. goodness, this question takes us back to our roots. The fact is, the linux kernel is just about the best thing you can use to boot another kernel! Dave, think about this: are you planning to write etherboot drivers for myrinet, quadrics, infiniband, SCI, or other new networks? How about all those ugly, complicated SCSI disk systems? If yes, you're nuts and you are going to duplicate a lot of work that Linux does better. If no, then etherboot can't even be used on our 1024-node Pink cluster (which has no Ethernet, only myrinet). Another weird thing we've found: Linux, on faster machines with lots of network interfaces in them, boots nodes faster than etherboot! weird but true. I think you are not looking at a big enough picture. Etherboot is fine for a lot of cases, but if you can put Linux in flash, it's a LOT better, and as the processors get faster, Linux is faster too. ron From YhLu at tyan.com Wed Aug 25 12:27:00 2004 From: YhLu at tyan.com (YhLu) Date: Wed Aug 25 12:27:00 2004 Subject: booting other oses Message-ID: <3174569B9743D511922F00A0C943142305EE0B85@TYANWEB> Ron, So any instructions to use kernel in flash. 1. I guess use filo to load the elf ( the elf will be in flash, and filo will be in the ROM) 2. the elf is made by mkelfImage from Kernel and ramdisk. How can the kernel load another kerkel, via beoboot???? Regards YH -----Original Message----- From: ron minnich [mailto:rminnich at lanl.gov] Sent: Wednesday, August 25, 2004 7:32 AM To: Dave Aubin Cc: Jakob Praher; linuxbios Subject: RE: booting other oses On Wed, 25 Aug 2004, Dave Aubin wrote: > What is your goal to want to use Linux bios? If your goal is to get > It to load a Linux kernel, then try etherboot. goodness, this question takes us back to our roots. The fact is, the linux kernel is just about the best thing you can use to boot another kernel! Dave, think about this: are you planning to write etherboot drivers for myrinet, quadrics, infiniband, SCI, or other new networks? How about all those ugly, complicated SCSI disk systems? If yes, you're nuts and you are going to duplicate a lot of work that Linux does better. If no, then etherboot can't even be used on our 1024-node Pink cluster (which has no Ethernet, only myrinet). Another weird thing we've found: Linux, on faster machines with lots of network interfaces in them, boots nodes faster than etherboot! weird but true. I think you are not looking at a big enough picture. Etherboot is fine for a lot of cases, but if you can put Linux in flash, it's a LOT better, and as the processors get faster, Linux is faster too. ron _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Wed Aug 25 13:24:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 13:24:01 2004 Subject: booting other oses In-Reply-To: <3174569B9743D511922F00A0C943142305EE0B85@TYANWEB> Message-ID: On Wed, 25 Aug 2004, YhLu wrote: > 1. I guess use filo to load the elf ( the elf will be in flash, and filo > will be in the ROM) or if you have a big flash just put the kernel in flash. We do this on some of our K8 systems here. much easier than fooling with filo or etherboot > How can the kernel load another kerkel, via beoboot???? if you have a new enough kernel, and kexec is in there, I would use that. ron From rminnich at lanl.gov Wed Aug 25 13:29:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 13:29:01 2004 Subject: booting other oses In-Reply-To: <3174569B9743D511922F00A0C943142305EE0B85@TYANWEB> Message-ID: On Wed, 25 Aug 2004, YhLu wrote: > 1. I guess use filo to load the elf ( the elf will be in flash, and filo > will be in the ROM) oh yeah ... 1 MB is plenty big enough for even 2.6 kernel + initrd ron From YhLu at tyan.com Wed Aug 25 13:33:22 2004 From: YhLu at tyan.com (YhLu) Date: Wed Aug 25 13:33:22 2004 Subject: booting other oses Message-ID: <3174569B9743D511922F00A0C943142305EE0B96@TYANWEB> You mean put the kernel and initrd in the ROM (8Mbit) ? So can spare the flash? Regards YH -----Original Message----- From: ron minnich [mailto:rminnich at lanl.gov] Sent: Wednesday, August 25, 2004 11:40 AM To: YhLu Cc: Dave Aubin; Jakob Praher; linuxbios Subject: RE: booting other oses On Wed, 25 Aug 2004, YhLu wrote: > 1. I guess use filo to load the elf ( the elf will be in flash, and filo > will be in the ROM) oh yeah ... 1 MB is plenty big enough for even 2.6 kernel + initrd ron From rminnich at lanl.gov Wed Aug 25 13:40:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 13:40:01 2004 Subject: booting other oses In-Reply-To: <3174569B9743D511922F00A0C943142305EE0B96@TYANWEB> Message-ID: On Wed, 25 Aug 2004, YhLu wrote: > You mean put the kernel and initrd in the ROM (8Mbit) ? So can spare the > flash? No, I have a 1 Mbyte flash on the board. I put linuxbios in the top 64K, and a kernel and initrd in the bottom (1MB-64K). The kernel and initrd are munged together with mkelfimage. Voila ... kernel boots in seconds. ron From YhLu at tyan.com Wed Aug 25 13:45:00 2004 From: YhLu at tyan.com (YhLu) Date: Wed Aug 25 13:45:00 2004 Subject: booting other oses Message-ID: <3174569B9743D511922F00A0C943142305EE0B9C@TYANWEB> It should be Flash Rom? That's very interesting. Can you let me know how to build such small kernel and initrd? Regards YH -----Original Message----- From: ron minnich [mailto:rminnich at lanl.gov] Sent: Wednesday, August 25, 2004 11:55 AM To: YhLu Cc: Dave Aubin; Jakob Praher; linuxbios Subject: RE: booting other oses On Wed, 25 Aug 2004, YhLu wrote: > You mean put the kernel and initrd in the ROM (8Mbit) ? So can spare the > flash? No, I have a 1 Mbyte flash on the board. I put linuxbios in the top 64K, and a kernel and initrd in the bottom (1MB-64K). The kernel and initrd are munged together with mkelfimage. Voila ... kernel boots in seconds. ron From ebiederman at lnxi.com Wed Aug 25 14:28:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Aug 25 14:28:00 2004 Subject: booting other oses In-Reply-To: <3174569B9743D511922F00A0C943142305EE0B96@TYANWEB> References: <3174569B9743D511922F00A0C943142305EE0B96@TYANWEB> Message-ID: YhLu writes: > You mean put the kernel and initrd in the ROM (8Mbit) ? So can spare the > flash? Yes. You might want to dig up the linux-tiny which helps shrink the kernel even more but it is doable. The primary reason for working with etherboot is the prevalance of 2Mbit BIOS chips. At 4Mbit, the linux kernel becomes an option. And at 8Mbit the amount of work to squeeze a kernel and initrd into it is getting reasonable. I need to talk to Erik Henderson but hopefully he can be convinced to switch the next version of beoboot to use kexec. Two kernel monte is the same principle just older code. The kexec interface is in the stable kernel now, and the actual implementation is in 2.6.8.1-mm4. Eric From ebiederman at lnxi.com Wed Aug 25 14:34:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Aug 25 14:34:00 2004 Subject: booting other oses In-Reply-To: References: Message-ID: ron minnich writes: > On Wed, 25 Aug 2004, Dave Aubin wrote: > > > What is your goal to want to use Linux bios? If your goal is to get > > It to load a Linux kernel, then try etherboot. > > goodness, this question takes us back to our roots. > > The fact is, the linux kernel is just about the best thing you can use to > boot another kernel! > > Dave, think about this: are you planning to write etherboot drivers for > myrinet, quadrics, infiniband, SCI, or other new networks? How about all > those ugly, complicated SCSI disk systems? If yes, you're nuts and you are > going to duplicate a lot of work that Linux does better. If no, then > etherboot can't even be used on our 1024-node Pink cluster (which has no > Ethernet, only myrinet). The problem is of course fitting a Linux kernel into flash. That is usually more work than just writing an etherboot driver. > I think you are not looking at a big enough picture. Etherboot is fine for > a lot of cases, but if you can put Linux in flash, it's a LOT better, and > as the processors get faster, Linux is faster too. Long term Linux is certainly the way to go. Short term etherboot and filo work today and on systems with small flash chips. We are getting closer to the point where we can switch over but it is still going to be a little longer. Eric From rminnich at lanl.gov Wed Aug 25 14:51:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 14:51:01 2004 Subject: booting other oses In-Reply-To: <3174569B9743D511922F00A0C943142305EE0B9C@TYANWEB> Message-ID: On Wed, 25 Aug 2004, YhLu wrote: > That's very interesting. Can you let me know how to build such small kernel > and initrd? I have to find my configuration, but for our net boot it is simply configuring a minimal kernel for networking and tcp, + the inird. ron From rminnich at lanl.gov Wed Aug 25 14:56:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 14:56:00 2004 Subject: booting other oses In-Reply-To: Message-ID: On 25 Aug 2004, Eric W. Biederman wrote: > The kexec interface is in the stable kernel now, and the actual implementation > is in 2.6.8.1-mm4. good news! we'd like to get out of that business of maintaining our own type of kexec :-) ron From rminnich at lanl.gov Wed Aug 25 14:59:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 14:59:00 2004 Subject: booting other oses In-Reply-To: Message-ID: On 25 Aug 2004, Eric W. Biederman wrote: > Long term Linux is certainly the way to go. Short term etherboot and > filo work today and on systems with small flash chips. We are getting > closer to the point where we can switch over but it is still going to be > a little longer. of course, here is where EFI is our friend, as it is forcing board vendors to put on really big flash. Then we can reflash linuxbios over top of EFI :-) ron From rminnich at lanl.gov Wed Aug 25 15:08:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 15:08:01 2004 Subject: New targets Message-ID: FYI I'm doing a port for the 855PM chipset, ICH4 south, for a Pentium-M box. Let's see how it goes. This is with V2. More about the board later. I am mentioning this as I got from zero to an initial source tree that compiles to a romimage in about 90 minutes, with all the chips (not correct yet!) in place. There's enough code you can use in the V2 tree now to really move fast to build new platforms. Romcc is a big help here. I hope others will see this and take heart. There's also (finally) a transmeta platform in the works (V2 as well). ron p.s. Has anyone seen the widely publicized Intel web site with BIOS source on it? I have not yet seen it ... anyone have the URL? Someone asked me about it again yesterday, and I did not know what to tell them. Is the "Intel open source BIOS" just press releases so far with no code? From stepan at openbios.org Wed Aug 25 15:58:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Aug 25 15:58:00 2004 Subject: New targets In-Reply-To: References: Message-ID: <20040825211401.GA31555@openbios.org> * ron minnich [040825 22:23]: > p.s. Has anyone seen the widely publicized Intel web site with BIOS source > on it? I have not yet seen it ... anyone have the URL? Someone asked me > about it again yesterday, and I did not know what to tell them. Is the > "Intel open source BIOS" just press releases so far with no code? Intel have had a lot of EFI sources on their web pages for a very long time, but it was only the "payload" part of the whole story, lacking IPL code completely. I have never found anything newer. Any Intel people on this list that can shed some light on this? ;) Regards, Stefan From YhLu at tyan.com Wed Aug 25 16:36:01 2004 From: YhLu at tyan.com (YhLu) Date: Wed Aug 25 16:36:01 2004 Subject: New targets Message-ID: <3174569B9743D511922F00A0C943142305EE0BDB@TYANWEB> Intel's version should be in CPL..., I wonder if there is ACPI in it. Also FYI. In Opteron side, nvidia CK804 (PCI-E) support is done half. Till now, and It reached out to Etherboot now. What's the plan on ACPI support? Regards YH -----Original Message----- From: ron minnich [mailto:rminnich at lanl.gov] Sent: Wednesday, August 25, 2004 1:23 PM To: linuxbios at clustermatic.org Subject: New targets FYI I'm doing a port for the 855PM chipset, ICH4 south, for a Pentium-M box. Let's see how it goes. This is with V2. More about the board later. I am mentioning this as I got from zero to an initial source tree that compiles to a romimage in about 90 minutes, with all the chips (not correct yet!) in place. There's enough code you can use in the V2 tree now to really move fast to build new platforms. Romcc is a big help here. I hope others will see this and take heart. There's also (finally) a transmeta platform in the works (V2 as well). ron p.s. Has anyone seen the widely publicized Intel web site with BIOS source on it? I have not yet seen it ... anyone have the URL? Someone asked me about it again yesterday, and I did not know what to tell them. Is the "Intel open source BIOS" just press releases so far with no code? _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Wed Aug 25 19:27:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Aug 25 19:27:01 2004 Subject: booting other oses In-Reply-To: References: Message-ID: ron minnich writes: > On 25 Aug 2004, Eric W. Biederman wrote: > > > The kexec interface is in the stable kernel now, and the actual implementation > > > is in 2.6.8.1-mm4. > > good news! we'd like to get out of that business of maintaining our own > type of kexec :-) Oh, and I should mention there is i386, x86_64, and ppc support in that bundle. Eric From rminnich at lanl.gov Wed Aug 25 23:11:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Aug 25 23:11:01 2004 Subject: New targets In-Reply-To: <20040825211401.GA31555@openbios.org> Message-ID: On Wed, 25 Aug 2004, Stefan Reinauer wrote: > Intel have had a lot of EFI sources on their web pages for a very long > time, but it was only the "payload" part of the whole story, lacking > IPL code completely. I have never found anything newer. they won't build on non-windows anyway, last time I looked ... ron From zhushisongzhu at yahoo.com Thu Aug 26 07:18:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Thu Aug 26 07:18:00 2004 Subject: init hangs booting epia Message-ID: <20040826123408.216.qmail@web13203.mail.yahoo.com> I can boot epia using linuxbios now. But when executing /sbin/init linux hangs.Messages: "Freeing unused kernel memory: 248k freed Warning: unable to open an initial console. " what's the problem? zhu _______________________________ Do you Yahoo!? Win 1 of 4,000 free domain names from Yahoo! Enter now. http://promotions.yahoo.com/goldrush From jerj at coplanar.net Thu Aug 26 10:16:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Thu Aug 26 10:16:01 2004 Subject: help with new motherboard Soyo 6BA+ In-Reply-To: References: Message-ID: <412E0283.8070009@coplanar.net> ron minnich wrote: > On Tue, 24 Aug 2004, Jeremy Jackson wrote: > > >>I can't believe it's this easy! From newb to 1st mobo up in 24 hours. > > > now you have to write up your experiences for the web page. That title > above will do :-) Sadly my writeup will have to include taking a voltage reading and finding the board locked up. It will no longer boot, do to a red hot south bridge. Not sure what I did... But these 440BX boards are a dime a dozen, so I will find another to continue the work. Actually, I will still have to send the patch, I did get the board working completely before I fried it. Now on to the SiS 735... be afraid, be very afraid! -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From jerj at coplanar.net Thu Aug 26 10:23:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Thu Aug 26 10:23:01 2004 Subject: serial console int0x10 redirector Message-ID: <412E0423.9080300@coplanar.net> Hi, Has anyone thought about an Ncurses style int 0x10 redirector for serial console? Observe Memtest86's partial implementation, ALDO, etc, maybe there's something close already? This could be useful for Linuxbios, or it could be flashed into an old PCI video card, to give that capability to *any* PC, like the PC Weasel, but real cheap. Cheers, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From jerj at coplanar.net Thu Aug 26 10:43:00 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Thu Aug 26 10:43:00 2004 Subject: other features for Linuxbios Message-ID: <412E08C2.2090609@coplanar.net> Here's some ideas i've been getting: firmware debugger: perhaps using romcc, a minimal debugger would allow trying different ram initialization sequences rapidly. If it were treated as a stub, it would be possible to run make on the controlling machine, and (with some line from the serial port to the reset line on the target board) have it compile the IPL ram init sequence, reset the board, upload it, then test it. By keeping VI open in another window, you could try new code every few seconds. Where would it store this code? Well there's Eric's Cache-as-ram trick, where available, and I was thinking about all those video cards that aren't used with Linuxbios... don't almost all video cards have static ram on them? What would it take to execute code from there? I wonder how much the gdb kernel stub depends on the kernel? A serial console api could be useful there and elsewhere, to avoid duplicating the serial code in the various payloads. other ideas... it would be swell to have an IPL that could accept downloads (zmodem?) via the serial console port, and (re)flash the payload, though it would require reimplementing the flashing code. Probably nicer to use the MTD drivers in Linux. Regards, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From joshua at joshuawise.com Thu Aug 26 16:27:00 2004 From: joshua at joshuawise.com (Joshua Wise) Date: Thu Aug 26 16:27:00 2004 Subject: EPIA flash questions Message-ID: <412E5953.2090703@joshuawise.com> Hi folks, Well, I finally got myself a Linuxbios supported board (an EPIA ME-6000). Later tonight I'm going to order a flash from Mouser to swap out, but before I do, I have a few questions: On board is a PLCC form factor 39SF020A. Mouser also carries the 39SF040A, which is a 512k ROM. The pinouts seem to be the same, but I'm not sure whether the extra address lines are carried out anywhere. Does anyone know whether the EPIA will be able to use the extra 256k? Also, I was not planning on getting a BIOS savior. Does anyone have experience with hotswapping flashes on the EPIA? Will bad things happen if I do? Do I need to make myself an external board with chip select lines, or can I just hotswap? Thanks, joshua From nathanael at gnat.ca Thu Aug 26 16:34:00 2004 From: nathanael at gnat.ca (Nathanael Noblet) Date: Thu Aug 26 16:34:00 2004 Subject: EPIA flash questions In-Reply-To: <412E5953.2090703@joshuawise.com> References: <412E5953.2090703@joshuawise.com> Message-ID: On Aug 26, 2004, at 2:42 PM, Joshua Wise wrote: > Hi folks, > > Well, I finally got myself a Linuxbios supported board (an EPIA > ME-6000). Later tonight I'm going to order a flash from Mouser to swap > out, but before I do, I have a few questions: > > On board is a PLCC form factor 39SF020A. Mouser also carries the > 39SF040A, which is a 512k ROM. The pinouts seem to be the same, but > I'm not sure whether the extra address lines are carried out anywhere. > Does anyone know whether the EPIA will be able to use the extra 256k? Don't know, but would like to know so please post your success/failure back to the list > > Also, I was not planning on getting a BIOS savior. Does anyone have > experience with hotswapping flashes on the EPIA? Will bad things > happen if I do? Do I need to make myself an external board with chip > select lines, or can I just hotswap? I've hotswapped it with a little PLCC puller probably 50 something times, not a problem yet. -- Nathanael D. Noblet Gnat Solutions 412 - 135 Gorge Road E Victoria, BC V9A 1L1 T/F 250.385.4613 http://www.gnat.ca/ From rminnich at lanl.gov Thu Aug 26 16:34:06 2004 From: rminnich at lanl.gov (ron minnich) Date: Thu Aug 26 16:34:06 2004 Subject: EPIA flash questions In-Reply-To: <412E5953.2090703@joshuawise.com> Message-ID: On Thu, 26 Aug 2004, Joshua Wise wrote: > On board is a PLCC form factor 39SF020A. Mouser also carries the > 39SF040A, which is a 512k ROM. The pinouts seem to be the same, but I'm > not sure whether the extra address lines are carried out anywhere. Does > anyone know whether the EPIA will be able to use the extra 256k? I think it will, I've used that I'm pretty sure. > Also, I was not planning on getting a BIOS savior. Does anyone have > experience with hotswapping flashes on the EPIA? Will bad things happen > if I do? Do I need to make myself an external board with chip select > lines, or can I just hotswap? hot swap has always worked fine for me. ron From jbors at mail.ru Thu Aug 26 17:00:59 2004 From: jbors at mail.ru (Dmitry Borisov) Date: Thu Aug 26 17:00:59 2004 Subject: EPIA flash questions References: <412E5953.2090703@joshuawise.com> Message-ID: <00fe01c48bba$5992b020$f101a8c0@amr.corp.intel.com> ----- Original Message ----- From: "Joshua Wise" To: Sent: Thursday, August 26, 2004 2:42 PM Subject: EPIA flash questions > Hi folks, > > Well, I finally got myself a Linuxbios supported board (an EPIA > ME-6000). Later tonight I'm going to order a flash from Mouser to swap > out, but before I do, I have a few questions: > > On board is a PLCC form factor 39SF020A. Mouser also carries the > 39SF040A, which is a 512k ROM. The pinouts seem to be the same, but I'm > not sure whether the extra address lines are carried out anywhere. Does > anyone know whether the EPIA will be able to use the extra 256k? > > Also, I was not planning on getting a BIOS savior. Does anyone have > experience with hotswapping flashes on the EPIA? Will bad things happen > if I do? Do I need to make myself an external board with chip select > lines, or can I just hotswap? I would not recommend hot swap. 20 times and then your contacts will fade or break( epia has very little space ). BIOS savior is much better solution if you plan to work with Linuxbios( I've burned mine 30+ times already with it... ). Dmitry/ From marc at geekythings.com Thu Aug 26 17:15:01 2004 From: marc at geekythings.com (Marc Nicholas) Date: Thu Aug 26 17:15:01 2004 Subject: EPIA flash questions In-Reply-To: Message-ID: <000401c48bbc$825ad580$340aa8c0@geekamd> Do either of you happen to know if all the EPIA boards use the same PLCC Flash? -marc -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of ron minnich Sent: Thursday, August 26, 2004 5:50 PM To: Joshua Wise Cc: linuxbios at clustermatic.org Subject: Re: EPIA flash questions On Thu, 26 Aug 2004, Joshua Wise wrote: > On board is a PLCC form factor 39SF020A. Mouser also carries the > 39SF040A, which is a 512k ROM. The pinouts seem to be the same, but I'm > not sure whether the extra address lines are carried out anywhere. Does > anyone know whether the EPIA will be able to use the extra 256k? I think it will, I've used that I'm pretty sure. > Also, I was not planning on getting a BIOS savior. Does anyone have > experience with hotswapping flashes on the EPIA? Will bad things happen > if I do? Do I need to make myself an external board with chip select > lines, or can I just hotswap? hot swap has always worked fine for me. ron _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Thu Aug 26 22:13:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Thu Aug 26 22:13:01 2004 Subject: EPIA flash questions In-Reply-To: <000401c48bbc$825ad580$340aa8c0@geekamd> Message-ID: On Thu, 26 Aug 2004, Marc Nicholas wrote: > Do either of you happen to know if all the EPIA boards use the same PLCC > Flash? "All"? wow. There are so many. Our EPIA and EPIA-M all use the same part. I would be surprised if they did much else, since the southbridge is commonly only one of two types. ron From marc at geekythings.com Fri Aug 27 07:12:01 2004 From: marc at geekythings.com (Marc Nicholas) Date: Fri Aug 27 07:12:01 2004 Subject: EPIA flash questions In-Reply-To: Message-ID: <001e01c48c31$55171a00$340aa8c0@geekamd> Six boards are 'so many'? That's the entire EPIA range. ;-) -marc -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of ron minnich Sent: Thursday, August 26, 2004 11:29 PM To: Marc Nicholas Cc: 'Joshua Wise'; linuxbios at clustermatic.org Subject: RE: EPIA flash questions On Thu, 26 Aug 2004, Marc Nicholas wrote: > Do either of you happen to know if all the EPIA boards use the same PLCC > Flash? "All"? wow. There are so many. Our EPIA and EPIA-M all use the same part. I would be surprised if they did much else, since the southbridge is commonly only one of two types. ron _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From awinner at walkabout-comp.com Fri Aug 27 08:28:00 2004 From: awinner at walkabout-comp.com (Anthony Winner) Date: Fri Aug 27 08:28:00 2004 Subject: New targets In-Reply-To: Message-ID: <002a01c48c3b$d053abc0$3b0201c0@hhengineering.local> Ron, The 'sample' EFI code known as 'Platform Innovation Framework for EFI' is at the following link... http://developer.intel.com/technology/efi/main_sample.htm It is payload only code, used to debug EFI drivers. But the full code is rumored to be out 'soon'.... Anthony Winner WalkAbout Computers awinner at walkabout-comp.com (561)712-1200 x221 -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org]On Behalf Of ron minnich Sent: Wednesday, August 25, 2004 4:23 PM To: linuxbios at clustermatic.org Subject: New targets FYI I'm doing a port for the 855PM chipset, ICH4 south, for a Pentium-M box. Let's see how it goes. This is with V2. More about the board later. I am mentioning this as I got from zero to an initial source tree that compiles to a romimage in about 90 minutes, with all the chips (not correct yet!) in place. There's enough code you can use in the V2 tree now to really move fast to build new platforms. Romcc is a big help here. I hope others will see this and take heart. There's also (finally) a transmeta platform in the works (V2 as well). ron p.s. Has anyone seen the widely publicized Intel web site with BIOS source on it? I have not yet seen it ... anyone have the URL? Someone asked me about it again yesterday, and I did not know what to tell them. Is the "Intel open source BIOS" just press releases so far with no code? _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From daniel at electricrain.com Fri Aug 27 09:08:00 2004 From: daniel at electricrain.com (Dan Sully) Date: Fri Aug 27 09:08:00 2004 Subject: EPIA-M build problem for freebios2 Message-ID: <20040827142416.GC18337@electricrain.com> So first of all, it's not clear from any of the outdated documentation whether one should be using freebios or freebios2. So, I'm jumping in and trying to use 2 - but getting this error: ar cr linuxbios.a malloc.o apic_timer.o pci_ops.o vt8235.o chip.o memset.o fallback_boot.o keyboard.o cpuid.o pnp_device.o printk.o irq_tables.o pgtbl.o tables.o pci_device.o console.o cpufixup.o elfboot.o hardwaremain.o boot.o linuxbios_table.o delay.o version.o memcmp.o isa-dma.o hypertransport.o vtxprintf.o root_device.o mtrr.o uart8250.o device_util.o ./option_table.o compute_ip_checksum.o device.o memcpy.o northbridge.o clog2.o pirq_routing.o memmove.o mc146818rtc.o rom_stream.o c_start.o vsprintf.o cpu.o static.o gcc -nostdlib -r -o linuxbios_c.o c_start.o mainboard.o uart8250_console.o linuxbios.a /usr/lib/gcc-lib/i486-linux/3.3.4/libgcc.a gcc -nostdlib -nostartfiles -static -o linuxbios_c -T /home/dsully/src/freebios2/src/config/linuxbios_c.ld linuxbios_c.o linuxbios_c.o(.data+0x1e4): undefined reference to `mainboard_via_epia_m_control' collect2: ld returned 1 exit status make: *** [linuxbios_c] Error 1 targets/via/epia-m/epia-m/normal/static.c which includes: src/mainboard/via/epia-m/chip.h where mainboard_via_epia_m_control is set as extern. Any thoughts? Thanks. -D -- Oh, I cook bacon naked all the time. You just have to keep the heat on med-low. From rminnich at lanl.gov Fri Aug 27 15:25:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Fri Aug 27 15:25:01 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: <20040827142416.GC18337@electricrain.com> Message-ID: On Fri, 27 Aug 2004, Dan Sully wrote: > So first of all, it's not clear from any of the outdated documentation > whether one should be using freebios or freebios2. oh well :-) > > So, I'm jumping in and trying to use 2 - but getting this error: > > ar cr linuxbios.a malloc.o apic_timer.o pci_ops.o vt8235.o chip.o memset.o fallback_boot.o keyboard.o cpuid.o pnp_device.o printk.o irq_tables.o pgtbl.o tables.o pci_device.o console.o cpufixup.o elfboot.o hardwaremain.o boot.o linuxbios_table.o delay.o version.o memcmp.o isa-dma.o hypertransport.o vtxprintf.o root_device.o mtrr.o uart8250.o device_util.o ./option_table.o compute_ip_checksum.o device.o memcpy.o northbridge.o clog2.o pirq_routing.o memmove.o mc146818rtc.o rom_stream.o c_start.o vsprintf.o cpu.o static.o > gcc -nostdlib -r -o linuxbios_c.o c_start.o mainboard.o uart8250_console.o linuxbios.a /usr/lib/gcc-lib/i486-linux/3.3.4/libgcc.a > gcc -nostdlib -nostartfiles -static -o linuxbios_c -T /home/dsully/src/freebios2/src/config/linuxbios_c.ld linuxbios_c.o > linuxbios_c.o(.data+0x1e4): undefined reference to `mainboard_via_epia_m_control' > collect2: ld returned 1 exit status > make: *** [linuxbios_c] Error 1 > > targets/via/epia-m/epia-m/normal/static.c arg. I'll try to look at this monday unless somebody beats me to it. ron From stepan at openbios.org Fri Aug 27 17:27:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Fri Aug 27 17:27:00 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: References: <20040827142416.GC18337@electricrain.com> Message-ID: <20040827224306.GA7565@openbios.org> * ron minnich [040827 22:41]: > > So first of all, it's not clear from any of the outdated documentation > > whether one should be using freebios or freebios2. Dan, the LinuxBIOS project can use a good explanation if you find time to write one. > > So, I'm jumping in and trying to use 2 - but getting this error: > > > > linuxbios_c.o(.data+0x1e4): undefined reference to `mainboard_via_epia_m_control' i made a small change to fix this. please go ahead and test it. Stefan From rminnich at lanl.gov Fri Aug 27 21:46:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Fri Aug 27 21:46:00 2004 Subject: Help for geode (fwd) Message-ID: can someone help this person, I am out until next week. ron ---------- Forwarded message ---------- Date: Sat, 28 Aug 2004 10:33:57 +0900 (KST) From: minyoung at cselab.snu.ac.kr To: rminnich at lanl.gov Subject: Help for geode Dear Ron Minnich, I'm going to work on linuxbios for geode sc1200 board. Could you provide me with a sample config file for it? The linuxbios status page says nano/nano is supported but I could find the config file. Best regards, Minyoung From YhLu at tyan.com Sat Aug 28 01:32:01 2004 From: YhLu at tyan.com (YhLu) Date: Sat Aug 28 01:32:01 2004 Subject: Nvidia CK804 and Tyan S2895 support Message-ID: <3174569B9743D511922F00A0C943142305EE0DF4@TYANWEB> Just FYI. I just finished the LinuxBIOS support to S2895 (it has two CK804 onboard). Connection is CPU1<----->CPU0<---->8131 | | | | CK804 CK804. Regards YH From daniel at electricrain.com Sat Aug 28 02:25:01 2004 From: daniel at electricrain.com (Dan Sully) Date: Sat Aug 28 02:25:01 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: <20040827224306.GA7565@openbios.org> References: <20040827224306.GA7565@openbios.org> Message-ID: <20040828074120.GA15927@electricrain.com> * Stefan Reinauer shaped the electrons to say... >* ron minnich [040827 22:41]: >> > So first of all, it's not clear from any of the outdated documentation >> > whether one should be using freebios or freebios2. > >Dan, the LinuxBIOS project can use a good explanation if you find time >to write one. Once I get everything working (and get back from Burning Man), I will. >> > So, I'm jumping in and trying to use 2 - but getting this error: >> > >> > linuxbios_c.o(.data+0x1e4): undefined reference to `mainboard_via_epia_m_control' > >i made a small change to fix this. please go ahead and test it. Thanks, that did the trick. So I'm able to boot v1, but haven't been able to get vgabios working. I've extracted it using the following command: dd if=/proc/kcore of=vgabios.bin bs=1 count=65536 skip=790528 What's the current status of EPIA-M in V2 with VGA? Also - can someone clear up in my head - is vgabios needed just for using the onboard CLE266 video? I actually have either an NVidia or ATI card I'd prefer to use. Thanks. Here's my v1 config (based off of Dmitri's) - can someone please double check it? # # LinuxBIOS config file for: VIA epia-m mini-itx # target /home/dsully/src/freebios/build # via epia mainboard via/epia-m # Enable Serial Console for debugging option SERIAL_CONSOLE=1 option TTYS0_BAUD=115200 option DEFAULT_CONSOLE_LOGLEVEL=0 option MAXIMUM_CONSOLE_LOGLEVEL=9 option DEBUG=0 option HAVE_FRAMEBUFFER=1 #option VIDEO_CONSOLE=1 option CONFIG_UDELAY_TIMER2=1 option SMA_SIZE=32 option VGA_HARDWARE_FIXUP=1 # Use 256KB Standard Flash as Normal BIOS option RAMTEST=1 option USE_GENERIC_ROM=1 option STD_FLASH=1 #option ZKERNEL_START=0xfffd0000 option ROM_SIZE=262144 # payload size = 192KB option PAYLOAD_SIZE=196608 # use ELF Loader to load Etherboot option USE_ELF_BOOT=1 # Use Etherboot as our payload payload /home/dsully/src/filo-0.4.2/filo.elf # the logo is displayed for VIDEO_SHOW_LOGO seconds. # beginning (0xfffe0000) option VIDEO_SHOW_LOGO=10 #option ROM_IMAGE_SIZE=131072 option PCX_FILE_LOCATION=0xfffd0000 option LOGOFILE=$(TOP)/src/pc80/linuxbioslogo.pcx addaction romimage dd if=$(LOGOFILE) of=romimage bs=65540 seek=1 conv=notrunc; addaction romimage python -c "import struct,sys; f=open('$(LOGOFILE)','rb'); f.seek(0,2); sys.stdout.write(struct.pack('i',f.tell()));" | dd of=romimage bs=65536 seek=1 conv=notrunc option CONFIG_VGABIOS=1 option CONFIG_REALMODE_IDT=1 dir src/bioscall option CONFIG_PCIBIOS=1 option VGABIOS_START=0xfffe0000 option USE_ELF_BOOT=1 addaction romimage dd if=../vgabios.bin of=romimage bs=65536 seek=2 conv=sync conv=notrunc -D -- "You can usually recover from production flaws...but you can never recover from a bad design". From daniel at electricrain.com Sat Aug 28 14:13:00 2004 From: daniel at electricrain.com (Dan Sully) Date: Sat Aug 28 14:13:00 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: <20040828074120.GA15927@electricrain.com> References: <20040827224306.GA7565@openbios.org> <20040828074120.GA15927@electricrain.com> Message-ID: <20040828192921.GB8336@electricrain.com> * Dan Sully shaped the electrons to say... >Thanks, that did the trick. > >So I'm able to boot v1, but haven't been able to get vgabios working. Replying to my own email here - I now have VGA working using an NVidia card. I can't do much though, given the ram constraints of V1. I've tried V2, but it just hangs when rebooted with no console or serial output. >What's the current status of EPIA-M in V2 with VGA? So this question still stands. =) -D -- It's Dr. Evil, I didn't spend six years in Evil Medical School to be called "mister," thank you very much. From rminnich at lanl.gov Sat Aug 28 18:36:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Sat Aug 28 18:36:00 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: <20040828192921.GB8336@electricrain.com> Message-ID: On Sat, 28 Aug 2004, Dan Sully wrote: > I've tried V2, but it just hangs when rebooted with no console or serial > output. OK, I have an epia-m here and next week if there is time we'll try it out. ron From jerj at coplanar.net Sun Aug 29 01:23:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Sun Aug 29 01:23:01 2004 Subject: ECS K7S5A and NOT DOC Message-ID: <41317A13.6090805@coplanar.net> I see that the raminit lives in northsouthbridge/sis/735/ipl.S There are conditionals for STD_FLASH, but how do I use this? in my config, I tried docipl northsouthbridge/sis/735/ipl.S but it builds romimage without the reset vector, and an extra "docipl" that's only 64k Neither works correctly when written to flash. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From miernik at ctnet.pl Sun Aug 29 06:46:01 2004 From: miernik at ctnet.pl (Miernik) Date: Sun Aug 29 06:46:01 2004 Subject: EPIA flash questions References: <412E5953.2090703@joshuawise.com> <00fe01c48bba$5992b020$f101a8c0@amr.corp.intel.com> Message-ID: Dmitry Borisov wrote: > > I would not recommend hot swap. 20 times and then your contacts will fade or > break( epia has very little space ). > BIOS savior is much better solution if you plan to work with Linuxbios( I've > burned mine 30+ times already with it... ). Does anyone have any schematics of a BUIS savior (to do it yourself). I'm interested in making these, and maybe even selling them to interested people, but before I start designing my own schematics, maybe someone has seen it somewhere. -- Miernik ________________________ xmpp:miernik at amessage.info ___________________/__ tel: +48888299997 __/ mailto:miernik at ctnet.pl http://www.miernik.ctnet.pl/ GPG:0xABC292D1 From sven.luebke at mikrosol.de Sun Aug 29 09:43:00 2004 From: sven.luebke at mikrosol.de (Sven Luebke) Date: Sun Aug 29 09:43:00 2004 Subject: EPIA flash questions In-Reply-To: References: <412E5953.2090703@joshuawise.com> <00fe01c48bba$5992b020$f101a8c0@amr.corp.intel.com> Message-ID: <5.1.1.6.2.20040829165834.01616750@pop.onlinehome.de> At 12:02 29.08.2004 +0000, Miernik wrote: Hi Miernik! > > I would not recommend hot swap. 20 times and then your contacts will > fade or > > break( epia has very little space ). > > BIOS savior is much better solution if you plan to work with Linuxbios( > I've > > burned mine 30+ times already with it... ). > >Does anyone have any schematics of a BUIS savior (to do it yourself). >I'm interested in making these, and maybe even selling them to >interested people, but before I start designing my own schematics, >maybe someone has seen it somewhere. Look at: http://www.clustermatic.org/pipermail/linuxbios/2003-September/005136.html It's a hack of a BIOS savior using one FlashROM, no PCB, just a switch and three wires. I don't know what the BIOS saviour is doing exactly, but generally you could wire two identical FlashROMs in parallel (except the /CE signal). Then you connect the /CE signal coming from the Mainboard to the switch. The other two pins of the switch are connected to the /CE signal of the two FlashROMs. That's all... Disadvantage: You'll need a 32pin PLCC-Plugin-Adapter (I don't know the right name)! Best regards, Sven From pyro at linuxlabs.com Sun Aug 29 09:49:01 2004 From: pyro at linuxlabs.com (Steven James) Date: Sun Aug 29 09:49:01 2004 Subject: ECS K7S5A and NOT DOC In-Reply-To: <41317A13.6090805@coplanar.net> References: <41317A13.6090805@coplanar.net> Message-ID: Greetings, It's been a long time since I've used that one, so things may have changed, but at that time, iot was necessary to use dd to put the binary pieces together into a working image after doing make. I'll have to see if I can dig up some notes on that (or it may be in a mailing list archive back a few years, my how time flys). G'day, sjames ||||| |||| ||||||||||||| ||| by Linux Labs International, Inc. Steven James, CTO 55 Marietta Street Suite 1830 Atlanta, Ga 30303 866 824 9737 support On Sun, 29 Aug 2004, Jeremy Jackson wrote: > I see that the raminit lives in northsouthbridge/sis/735/ipl.S > > There are conditionals for STD_FLASH, but how do I use this? > > in my config, I tried > > docipl northsouthbridge/sis/735/ipl.S > > but it builds romimage without the reset vector, and an extra "docipl" > that's only 64k > > Neither works correctly when written to flash. > > -- > Jeremy Jackson > Coplanar Networks > (519)897-1516 > http://www.coplanar.net > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From joshua at joshuawise.com Sun Aug 29 13:41:01 2004 From: joshua at joshuawise.com (Joshua Wise) Date: Sun Aug 29 13:41:01 2004 Subject: EPIA flash questions In-Reply-To: References: <412E5953.2090703@joshuawise.com> <00fe01c48bba$5992b020$f101a8c0@amr.corp.intel.com> Message-ID: <41322710.1060201@joshuawise.com> > Does anyone have any schematics of a BUIS savior (to do it yourself). > I'm interested in making these, and maybe even selling them to > interested people, but before I start designing my own schematics, > maybe someone has seen it somewhere. It's just a switch hooked up to the chip enable line of the ROMs. joshua From joshua at joshuawise.com Sun Aug 29 13:46:01 2004 From: joshua at joshuawise.com (Joshua Wise) Date: Sun Aug 29 13:46:01 2004 Subject: EPIA flash questions In-Reply-To: <5.1.1.6.2.20040829165834.01616750@pop.onlinehome.de> References: <412E5953.2090703@joshuawise.com> <00fe01c48bba$5992b020$f101a8c0@amr.corp.intel.com> <5.1.1.6.2.20040829165834.01616750@pop.onlinehome.de> Message-ID: <41322841.10100@joshuawise.com> > It's a hack of a BIOS savior using one FlashROM, no PCB, just a switch > and three > wires. I don't know what the BIOS saviour is doing exactly, but > generally you could > wire two identical FlashROMs in parallel (except the /CE signal). Heck, you could wire as many as you'd like in parallel, as long as the motherboard's fanout is great enough. The disadvantage to the hack using the 040 is that you only get 256k per side - with a /CE hack, it is theoretically possible to get 512k per side, given that you have a big enough flash chip. Also put a pull-up resistor on the /CE of both flash parts so that when the switch is not selecting one of them, the /CE line is not floating. joshua From sagivy at 3vium.com Mon Aug 30 03:33:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Mon Aug 30 03:33:01 2004 Subject: no Northbridge Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A5C@cronos.trivium> Is it possible to use linuxbios when I don't northbridge on the mainboard ? thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: From sagivy at 3vium.com Mon Aug 30 03:39:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Mon Aug 30 03:39:01 2004 Subject: Etherboot for AMD64 Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6AA@cronos.trivium> What image suit AMD64 in the etherboot project ? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Mon Aug 30 04:27:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Mon Aug 30 04:27:01 2004 Subject: no Northbridge In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A5C@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A5C@cronos.trivium> Message-ID: <20040830094337.GB16243@openbios.org> * Sagiv Yefet [040830 11:53]: > Is it possible to use linuxbios when I don't northbridge on the > mainboard ? What kind of system should this be? There are many systems with the northbridge integrated in the CPU or in the Southbridge, and they work fine with LinuxBIOS. If you just tare the northbridge off the board, I would not expect any BIOS to run though ;) Stefan From stepan at openbios.org Mon Aug 30 04:28:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Mon Aug 30 04:28:01 2004 Subject: Etherboot for AMD64 In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6AA@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6AA@cronos.trivium> Message-ID: <20040830094420.GC16243@openbios.org> * Sagiv Yefet [040830 11:59]: > What image suit AMD64 in the etherboot project ? > Thanks. You should try tg3--ide_disk.zelf. Or better use YhLu's patches to add filo and sata Stefan From jmiller at actuality-systems.com Mon Aug 30 07:01:00 2004 From: jmiller at actuality-systems.com (Jay Miller) Date: Mon Aug 30 07:01:00 2004 Subject: USB Enable = PCI State Loss Message-ID: Trying to resolve some issues on FILO w/USB support on a new board with Athlon64, 8151, 8131, 8111. It appears that when I turn on ohci, the USB controller probes for devices but the CPU loses all PCI state after it's enabled. As seen through HDT debugger. This is a new board, so I'm not ruling out HW as the issue, but I'm just curious if anyone has seen this on their boards? Thanks, Jay Miller 781-229-7812x117 Actuality Systems, Inc. jmiller at acutality-systems.com From rminnich at lanl.gov Mon Aug 30 08:43:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Mon Aug 30 08:43:01 2004 Subject: no Northbridge In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A5C@cronos.trivium> Message-ID: what kind of system are you talking about? ron From fishor at mail.ru Mon Aug 30 13:02:00 2004 From: fishor at mail.ru (Alex Fisher) Date: Mon Aug 30 13:02:00 2004 Subject: bios re flash Message-ID: Hi all I killed my bios in notebook and I can't finde any original. Is it possible to yous linuxbios instead? I have notebook samsung nv5000. sst28sf040a chip. PIIX. Thank you. From aip at cwlinux.com Mon Aug 30 17:32:02 2004 From: aip at cwlinux.com (aip at cwlinux.com) Date: Mon Aug 30 17:32:02 2004 Subject: Mail Delivery (failure linuxbios@clustermatic.org) Message-ID: <200408302131.i7ULV3v07104@nwn.definitive.org> An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: message.scr Type: audio/x-wav Size: 29568 bytes Desc: not available URL: From liutao at safe-mail.net Mon Aug 30 21:32:00 2004 From: liutao at safe-mail.net (Liu Tao) Date: Mon Aug 30 21:32:00 2004 Subject: Errors on download page? Message-ID: <4133E734.1090704@safe-mail.net> Hello, I think on the download page http://www.linuxbios.org/developer/download/index.html the cvs host name should be cvs.sourceforge.net but not cvs.freebios.sourceforge.net? -- Regards, Liu Tao From YhLu at tyan.com Mon Aug 30 22:22:00 2004 From: YhLu at tyan.com (YhLu) Date: Mon Aug 30 22:22:00 2004 Subject: ROMCC problem Message-ID: <3174569B9743D511922F00A0C943142305EE0EAF@TYANWEB> Eric, the current romcc seems have problem to process "asm". Or bist cause the problem? Regards YH In Failover.E normal_image: asm("jmp __normal_image" : : "a" (bist) : ); cpu_reset: asm("jmp __cpu_reset" : : "a"(bist) : ); fallback_image: will produce Lfailover1063: /* main,failover.c:68.11 */ Lfailover1064: /* ,:0.0 */ /* unknown %eax */ /* unknown %ebx */ /* unknown %ecx */ /* unknown %edx */ #ASM #NOT ASM Old romcc result it right Lfailover61: /* main,failover.c:21.28 */ /* main,failover.c:67.18 */ mov $0 , %eax #ASM jmp __normal_image #NOT ASM /* main,failover.c:68.11 */ Lfailover62: /* main,failover.c:21.28 */ /* main,failover.c:73.18 */ mov $0 , %eax #ASM jmp __cpu_reset #NOT ASM /* main,failover.c:74.16 */ Lfailover63: /* ,failover.c:82.1 */ Lfailover64: /* max inline depth 6 */ From kfuchs at winternet.com Mon Aug 30 22:30:01 2004 From: kfuchs at winternet.com (Ken Fuchs) Date: Mon Aug 30 22:30:01 2004 Subject: Nvidia CK804 and Tyan S2895 support References: <8E8200E838D692429246225038E1736302F83FAA@mn-ex02.mn.bench.com> Message-ID: <200408310346.i7V3klA13751@ecstasy1.winternet.com> YhLu wrote: >Just FYI. >I just finished the LinuxBIOS support to S2895 (it has two CK804 >onboard). >Connection is > CPU1<----->CPU0<---->8131 > | | > | | > CK804 CK804 That was really, really fast work! Where can one access the LinuxBIOS source code for the Tyan S2895 mainboard (dual CK8-04 chips)? ------ I asked about CK8-04 chip support a rather short time ago in this thread: http://www.clustermatic.org/pipermail/linuxbios/2004-June/008326.html Thanks again Ron and David for your responses and especially YhLu for this very encouraging response: http://www.clustermatic.org/pipermail/linuxbios/2004-June/008328.html Again, I must say that was very quick work for such a new chip! Sincerely, Ken Fuchs From YhLu at tyan.com Mon Aug 30 22:42:01 2004 From: YhLu at tyan.com (YhLu) Date: Mon Aug 30 22:42:01 2004 Subject: Nvidia CK804 and Tyan S2895 support Message-ID: <3174569B9743D511922F00A0C943142305EE0EB1@TYANWEB> Still wait for Nvidia releasing the chipset. Some one said it will be released this Oct. Also I hope more guys can push Nvidia to let us to release the code for that. Nvidia doesn't make the final decision if they will support LinuxBIOS. Regards YH -----Original Message----- From: Ken Fuchs [mailto:kfuchs at winternet.com] Sent: Monday, August 30, 2004 8:47 PM To: linuxbios at clustermatic.org Subject: Re: Nvidia CK804 and Tyan S2895 support YhLu wrote: >Just FYI. >I just finished the LinuxBIOS support to S2895 (it has two CK804 >onboard). >Connection is > CPU1<----->CPU0<---->8131 > | | > | | > CK804 CK804 That was really, really fast work! Where can one access the LinuxBIOS source code for the Tyan S2895 mainboard (dual CK8-04 chips)? ------ I asked about CK8-04 chip support a rather short time ago in this thread: http://www.clustermatic.org/pipermail/linuxbios/2004-June/008326.html Thanks again Ron and David for your responses and especially YhLu for this very encouraging response: http://www.clustermatic.org/pipermail/linuxbios/2004-June/008328.html Again, I must say that was very quick work for such a new chip! Sincerely, Ken Fuchs _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ebiederman at lnxi.com Mon Aug 30 23:28:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Mon Aug 30 23:28:01 2004 Subject: ROMCC problem In-Reply-To: <3174569B9743D511922F00A0C943142305EE0EAF@TYANWEB> References: <3174569B9743D511922F00A0C943142305EE0EAF@TYANWEB> Message-ID: YhLu writes: > Eric, > the current romcc seems have problem to process "asm". Or bist cause the > problem? The optimizer took a look at the asm realized no one used the output of it. And optimized the instruction away. Correct but annoying. Just mark the asm as volatile and the code will work fine. Eric From YhLu at tyan.com Mon Aug 30 23:57:01 2004 From: YhLu at tyan.com (YhLu) Date: Mon Aug 30 23:57:01 2004 Subject: ROMCC problem Message-ID: <3174569B9743D511922F00A0C943142305EE0EB3@TYANWEB> Thanks, It works. Regards YH -----Original Message----- From: ebiederman at lnxi.com [mailto:ebiederman at lnxi.com] Sent: Monday, August 30, 2004 9:45 PM To: YhLu Cc: ron minnich; linuxbios Subject: Re: ROMCC problem YhLu writes: > Eric, > the current romcc seems have problem to process "asm". Or bist cause the > problem? The optimizer took a look at the asm realized no one used the output of it. And optimized the instruction away. Correct but annoying. Just mark the asm as volatile and the code will work fine. Eric From sagivy at 3vium.com Tue Aug 31 04:36:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Tue Aug 31 04:36:01 2004 Subject: using the cosole device Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6AE@cronos.trivium> I am working on AMD64. What are the definition in the Config.lb file define the console device (rs232) Superio winbond/w83627hf Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: From zhushisongzhu at yahoo.com Tue Aug 31 07:35:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Tue Aug 31 07:35:01 2004 Subject: unsupport int error when vga init Message-ID: <20040831125219.95719.qmail@web13206.mail.yahoo.com> Dear lists, I have two questions: (1) I use getpir(8.30 freebios v1) to get irq_tables.c of epia-500. I have compared mine with one under mainboard/via/epia. They are always different. What cause it? My irq_tables.c is as following: /* This file was generated by getpir.c, do not modify! (but if you do, please run checkpir on it to verify) Contains the IRQ Routing Table dumped directly from your memory , wich BIOS s ets up Documentation at : http://www.microsoft.com/hwdev/busbios/PCIIRQ.HTM */ #include const struct irq_routing_table intel_irq_routing_table = { PIRQ_SIGNATURE, /* u32 signature */ PIRQ_VERSION, /* u16 version */ 32+16*5, /* there can be total 5 devices on the bus */ 0, /* Where the interrupt router lies (bus) */ 0, /* Where the interrupt router lies (dev) */ 0x1c00, /* IRQs devoted exclusively to PCI usage */ 0, /* Vendor */ 0, /* Device */ 0, /* Crap (miniport) */ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */ 0x88, /* u8 checksum , this hase to set to some value that woul d give 0 after the sum of all bytes for this structure (including checksum) */ { {0,0x98, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xd eb8}}, 0x2, 0}, {0,0x50, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xd eb8}}, 0x3, 0}, {0,0x58, {{0x4, 0xdeb8}, {0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xd eb8}}, 0x4, 0}, {0,0x8, {{0x1, 0xdeb8}, {0x2, 0xdeb8}, {0x3, 0xdeb8}, {0x4, 0xde b8}}, 0, 0}, {0x50,0, {{0, 0}, {0, 0}, {0, 0}, {0, 0}}, 0, 0}, } }; (2) I've got QDIA6T MB based on vt8601 and vt82c686. I have made some progress on this MB(8.30 freebios v1). The romimage can find VGABIOS, but unsupport int error occurred. The output log is as following: LinuxBIOS-1.0.0 Tue Aug 31 19:52:18 CST 2004 starting... Enabled first bank of RAM: 0x10000000 bytes Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Tue Aug 31 19:52:18 CST 2004 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1106/0601] PCI: 00:01.0 [1106/8601] PCI: 00:07.0 [1106/0686] PCI: 00:07.2 [1106/3038] PCI: 00:07.3 [1106/3038] PCI: 00:07.4 [1106/3057] PCI: 00:07.5 [1106/3058] PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [1023/8500] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xfe900000 - 0xfe8fffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfd800000 - 0xfe8fffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:00.0 10 <- [0xfd800000 - 0xfdffffff] mem PCI: 01:00.0 14 <- [0xfe800000 - 0xfe81ffff] mem PCI: 01:00.0 18 <- [0xfe000000 - 0xfe7fffff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:07.2 20 <- [0x00001400 - 0x0000141f] io PCI: 00:07.3 20 <- [0x00001420 - 0x0000143f] io PCI: 00:07.5 10 <- [0x00001000 - 0x000010ff] io PCI: 00:07.5 14 <- [0x00001440 - 0x00001443] io PCI: 00:07.5 18 <- [0x00001450 - 0x00001453] io ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:07.0 cmd <- 87 PCI: 00:07.2 cmd <- 01 PCI: 00:07.3 cmd <- 01 PCI: 00:07.4 cmd <- 00 PCI: 00:07.5 cmd <- 01 PCI: 01:00.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized Disable Cache Bank0 256MB (MA type 0xe) bank 2 MA 0x0: 0 bytes bank 2 MA 0x8: 0 bytes bank 2 MA 0xe: 0 bytes bank 4 MA 0x0: 0 bytes bank 4 MA 0x8: 0 bytes bank 4 MA 0xe: 0 bytes Enable Cache Total 248MB + frame buffer 8MB Enabling shadow DRAM at 0xC0000-0xFFFFF: done totalram: 248M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB Setting fixed MTRRs(24-88) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 128MB, type WB Setting variable MTRR 1, base: 128MB, range: 64MB, type WB Setting variable MTRR 2, base: 192MB, range: 32MB, type WB Setting variable MTRR 3, base: 224MB, range: 16MB, type WB Setting variable MTRR 4, base: 240MB, range: 8MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 2 Vendor ID : GenuineIntel Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x08 Processor Mask : 0x00 Processor Stepping : 0x0a Feature flags : 0x0383fbff Cache/TLB descriptor values: 1 reads required Desc 0x01 : Instr TLB: 4KB pages, 4-way set assoc, 32 entries Desc 0x02 : Instr TLB: 4MB pages, fully assoc, 2 entries Desc 0x03 : Data TLB: 4KB pages, 4-way set assoc, 64 entries Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x00 : null Desc 0x41 : L2 Unified cache: 128K bytes, 4-way set assoc, 32 byte line size Desc 0x08 : Inst cache: 16K bytes, 4-way set assoc, 32 byte line size Desc 0x04 : Data TLB: 4MB pages, 4-way set assoc, 8 entries Desc 0x0c : Data cache: 16K bytes, 2-way or 4-way set assoc, 32 byte line size MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Disabling local apic...done. CPU #0 Initialized Mainboard fixup IDE enable in reg. 48 is 0x3 set IDE reg. 48 to 0x1 IRQs in reg. 4a are 0x4 setting reg. 4a to 0x44 IDE enable in reg.1-40 is 0x8 set IDE reg.1-40 to 0x3 IDE enable in reg.1-40 read back is 0x3 enables in reg 0x9 0x8f enables in reg 0x9 read back as 0x8a command in reg 0x4 0x80 command in reg 0x4 reads back as 0x85 keyboard_on Final mainboard fixup Southbridge fixup keyboard_on IDE enable in reg. 48 is 0x5 set IDE reg. 48 to 0x5 IRQs in reg. 4a are 0x4 setting reg. 4a to 0x44 IDE enable in reg.1-40 is 0x3 set IDE reg.1-40 to 0x3 IDE enable in reg.1-40 read back is 0x3 enables in reg 0x9 0x8a enables in reg 0x9 read back as 0x8a command in reg 0x4 0x85 command in reg 0x4 reads back as 0x85 setting southbridge Assigning IRQ 10 to 0:7.5 Readback = 10 Assigning IRQ 11 to 1:0.0 Readback = 11 INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1023, did=8500 0x55 0xaa 0x60 0xeb 0x4d 0x37 0x34 0x30 0x30 0x30 0x37 0xdc 0x73 0x2a 0x2a 0x52 bus/devfn = 0x100 biosint: # 0x1a, eax 0xb109 ebx 0x100 ecx 0x100 edx 0xb1bf biosint: ebp 0x10fd8 esp 0xfc9 edi 0x2 esi 0x13f60 biosint: ip 0x56e8 cs 0xc000 flags 0x16 0xb109: bus 1 devfn 0x0 reg 0x2 val 0x8500 biosint: # 0xd8, eax 0xc000 ebx 0x100 ecx 0x8500 edx 0x3c2 biosint: ebp 0x10fd8 esp 0xfc7 edi 0x2 esi 0x13f60 biosint: ip 0x2329 cs 0xc000 flags 0x246 biosint: Unsupport int #0xd8 biosint: # 0xcd, eax 0xc000 ebx 0x100 ecx 0x8500 edx 0x3c2 biosint: ebp 0x10fd8 esp 0xfc7 edi 0x2 esi 0x13f60 biosint: ip 0x2329 cs 0xc000 flags 0x246 biosint: Unsupport int #0xcd __________________________________ Do you Yahoo!? Yahoo! Mail - 50x more storage than other providers! http://promotions.yahoo.com/new_mail From rsmith at bitworks.com Tue Aug 31 08:18:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Tue Aug 31 08:18:00 2004 Subject: unsupport int error when vga init In-Reply-To: <20040831125219.95719.qmail@web13206.mail.yahoo.com> References: <20040831125219.95719.qmail@web13206.mail.yahoo.com> Message-ID: <41347E6B.3080806@bitworks.com> zhu shi song wrote: > Dear lists, > I have two questions: > (1) I use getpir(8.30 freebios v1) to get > irq_tables.c of epia-500. I have compared mine with > one under mainboard/via/epia. They are always > different. What cause it? My irq_tables.c is as > following: I don't know about your pir difference problems but your irq_tables and the "unsupported int" messages in the vga translation code are not really related to each other. The unsupported int is telling you that the vga bios made a int call that is not suppoted by linuxbios. These are software interrupts and only remotly related to irqs which are hardware interrupts. From rminnich at lanl.gov Tue Aug 31 09:02:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 31 09:02:01 2004 Subject: Nvidia CK804 and Tyan S2895 support In-Reply-To: <3174569B9743D511922F00A0C943142305EE0EB1@TYANWEB> Message-ID: On Mon, 30 Aug 2004, YhLu wrote: > Also I hope more guys can push Nvidia to let us to release the code for > that. Nvidia doesn't make the final decision if they will support LinuxBIOS. so those who want this, please contact nvidia directly and let them know. ron From snow2moutain at hotmail.com Tue Aug 31 09:10:01 2004 From: snow2moutain at hotmail.com (Chiu Gerald) Date: Tue Aug 31 09:10:01 2004 Subject: VGA Problem about 440bx chipset Message-ID: HI,all I run linuxbios on a 440bx chipset mainboard using adlo+bochs,I can boot linux but still havn't started up the vga. what should I do if I want to bring up the vga card? I found the work done about vga are: (1) allocate_vga_resource() in newpci.c enbale io/mem of the vga adapter then walk up the bridges setting the VGA enable (2) copy the vga bios to 0xc0000 using adlo,and run bochs bios. I'm not sure if it had initilized the vga controller enough. And I found there are some registers about AGP from 440bx northbridge datasheet ( 82443bx hostbridge/controller),such as AGP capability identifier register,AGP command register,AGP status register... But this work hadn't been done in linuxbios,maybe I need to set these registers correctly according to the datasheet to enable AGP? Regards, Gerald _________________________________________________________________ ???? MSN Explorer: http://explorer.msn.com/lccn From rminnich at lanl.gov Tue Aug 31 09:11:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 31 09:11:01 2004 Subject: unsupport int error when vga init In-Reply-To: <20040831125219.95719.qmail@web13206.mail.yahoo.com> Message-ID: On Tue, 31 Aug 2004, zhu shi song wrote: > (2) I've got QDIA6T MB based on vt8601 and vt82c686. that's why irq_tables.c is different. you need to look up what those unsupported int's are and see if they are real or an error or some sort. ron From rminnich at lanl.gov Tue Aug 31 09:13:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 31 09:13:01 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: Message-ID: V1 or V2? ron From rsmith at bitworks.com Tue Aug 31 10:01:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Tue Aug 31 10:01:01 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: References: Message-ID: <4134968F.60708@bitworks.com> ron minnich wrote: > V1 or V2? > 440bx support is not in V2 (if it is I didn't add it) so it has to be V1 From rsmith at bitworks.com Tue Aug 31 10:17:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Tue Aug 31 10:17:00 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: References: Message-ID: <41349A4F.7060501@bitworks.com> Chiu Gerald wrote: > I found the work done about vga are: > (1) allocate_vga_resource() in newpci.c > enbale io/mem of the vga adapter > then walk up the bridges setting the VGA enable That should all be done already. > (2) copy the vga bios to 0xc0000 using adlo,and run bochs bios. > I'm not sure if it had initilized the vga controller enough. And I You will get a vga bios boot screen if it works. > found there are some registers about AGP from 440bx northbridge > datasheet ( 82443bx hostbridge/controller),such as AGP capability > identifier register,AGP command register,AGP status register... > But this work hadn't been done in linuxbios,maybe I need to set these > registers correctly according to the datasheet to enable AGP? This is probally your problem. None of the AGP stuff is setup in the 440bx code. Only PCI cards have been used to date. You will have to write AGP init code. Does V2 know anything about agp? If so then its probally time to port the 440bx stuff over to v2 From rminnich at lanl.gov Tue Aug 31 10:35:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 31 10:35:01 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: <41349A4F.7060501@bitworks.com> Message-ID: On Tue, 31 Aug 2004, Richard Smith wrote: > Does V2 know anything about agp? If so then its probally time to port > the 440bx stuff over to v2 if it does not, it's much easier to put it in. It does know in some ways. ron From YhLu at tyan.com Tue Aug 31 11:06:00 2004 From: YhLu at tyan.com (YhLu) Date: Tue Aug 31 11:06:00 2004 Subject: using the cosole device Message-ID: <3174569B9743D511922F00A0C943142305EE0EB6@TYANWEB> You mean baud rate or others. The freebios2 has two Config.lb, one in the mainboard and the other in targets Freebios2/src/mainboard/ Freebios2/targets/. The chipset seeting is in mainboard, and others in targes. Regards YH _____ From: Sagiv Yefet [mailto:sagivy at 3vium.com] Sent: Tuesday, August 31, 2004 3:56 AM To: linuxbios at clustermatic.org Subject: using the cosole device I am working on AMD64. What are the definition in the Config.lb file define the console device (rs232) Superio winbond/w83627hf Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Tue Aug 31 11:26:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Aug 31 11:26:00 2004 Subject: using the cosole device In-Reply-To: <3174569B9743D511922F00A0C943142305EE0EB6@TYANWEB> Message-ID: On Tue, 31 Aug 2004, YhLu wrote: > You mean baud rate or others. > > The freebios2 has two Config.lb, one in the mainboard and the other in > targets If you are NOT making a new motherboard, you should only be messing with the target Config.lb, and if you have to change it make a new Config.lb of your own. if you ARE making a new motherboard you'll need to make a new src/mainboard// directory and fill it with the right files. ron From aip at cwlinux.com Tue Aug 31 17:37:01 2004 From: aip at cwlinux.com (aip at cwlinux.com) Date: Tue Aug 31 17:37:01 2004 Subject: Mail Delivery (failure linuxbios@clustermatic.org) Message-ID: <200408312136.i7VLaUv13241@nwn.definitive.org> An HTML attachment was scrubbed... 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