Ronald G. Minnich
rminnich at lanl.gov
Tue Dec 14 16:01:00 CET 2004
On Wed, 15 Dec 2004, Gin wrote:
> The serial interrupt? Shouldn't it be easy like assigning it an irq?
> What other causes that you've found out? One possibility I can think of
> is the cache. It was turned off.
well, that was the other possibility I was going to mention, on our first
tries at smp four years ago we'd see things run fast until the other SMP
CPU got turned on, then run slow. Turns out the cache was only enabled on
one cpu ...
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