ACPI DSDT
Eric W. Biederman
ebiederman at lnxi.com
Tue Jun 1 23:16:00 CEST 2004
ron minnich <rminnich at lanl.gov> writes:
> Worked fine.
The alpha port worked but it is not something I savor repeating,
there were too many real limitations.
There are some things that I find strongly architecturally questionable
about Tiano, in the context of Intel hardware. Unfortunately neither
Tiano or the Intel hardware I am thinking about has been released...
Consider what it takes to maintain a cache-as-ram implementation.
Eric
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