testbios and the system timer
stuge-linuxbios at cdy.org
Thu Jun 3 11:41:01 CEST 2004
On Thu, Jun 03, 2004 at 03:56:29AM -0500, Richard Smith wrote:
> timer. In numerious locations my Vbios is writing a 0x00 to IO 0x43 and
> then does 2 reads from 0x40. So its latching the value of counter 0 and
> then reading it out.
Right, it also sets counter mode 0, zero detection interrupt. Are
there any hints of the code actually using the interrupt anywhere?
> I'm guesing that what it uses for delays.
Indeed. It's the only way I know for measuring <ms without rdtsc.
> The delay routine is written such that it polls for a rollover to mark
> the increment of 838.1 ns. For this to happen the latch values must be
> equal. In a system where the cpu instructions are running much faster
> than one timer clock cycle I guess would not be much of a problem.
838.1ns is one tick, not a complete 16-bit rollover, right?
> What I don't understand though was how this ever was reliable.
> Consider the following:
> Am I missing somthing?
The resolution could be lowered.. Are there any writes to 0x40
setting a divisor? If not, then the snippet will simply not be
reliable down to the exact iteration.
Since the code uses jb to detect when to stop looping the count
doesn't have to be an exact match. Even if an extra tick passes,
the loop will still end.
I don't think the timing is critical in any other way than that it
should be as short as possible to keep the user happy, but with a
minimum limit decided by hardware.
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