Using Cache As Ram for K8
stepan at openbios.org
Thu Jun 24 18:19:00 CEST 2004
* Eric W. Biederman <ebiederman at lnxi.com> [040625 00:27]:
> On the fun side it would be extremely interesting is if you could get
> enough memory working to start paging and we could go into 64bit mode :)
> That is likely tempting fate too much.....
Ack! With all C code compiled by gcc this sounds like a reasonable goal.
But will any payloads work with this?
> > Eric,
> > What is the "effective" or "equalvalent" stack size of ROMCC ?
> > Is 448 bytes of stack adquant for ROMCC "linted" code in general ?
> 8 (gpr) + 8 (mmx) + 8 (sse) registers each 4 bytes long = 96 bytes.
> Looking at the hdama configuration my max inline depth is 14
> procedures so that likely totals to another 14 *4 = 56 bytes in
> return addresses. So 448 bytes would be a small improvement.
With current CVS the code shrinks from about 90k object size to 10k.
This is actually not bad for a small improvement. I have not tried major
hand tuning with romcc's anti-inline tags yet.
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