=?gb2312?b?tPC4tA==?=: Tyan Changes for 1.1.6

ron minnich rminnich at lanl.gov
Fri Mar 12 12:05:05 CET 2004

On 12 Mar 2004, Eric W. Biederman wrote:

> I am setting the caching attributes on the memory I am clearing to
> Write-Combining in the MTRRs which is better than ZFOD because it
> bypasses the cache.  This runs at nearly the theoretical speed of
> memory and has done so for years.  This is the way I have always coded
> this on x86.  I guess you have not needed to look at that section
> of code?

That's how I remember it working, but I thought maybe something special 
had been done on K8 as it is just not running fast. 

We may be talking a different ZFOD. In MIPS you could create a ZFOD cache 
line in one instruction and blast it to memory when invalidate happened. I 
don't see the K8 beating this but I will have to look more at the code. 

I just noticed that clearing a Gbyte takes several tens of seconds.  I
don't see how this could be theoretical memory speed. Something's not
working right. We'll look some more. Overall it's still quite nice, so 
don't take my comments as anything but observations. 


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