PCI IRQ tables
liutao at safe-mail.net
Mon Oct 18 04:06:00 CEST 2004
>SMP or single CPU?
>If SMP, and io apci is enabled, you may only focus on mptable.c and
>irq-tables.c may only contain device that point to the peer roots bus.
How about single CPU with IO-APIC enabled in linux?
We are designing a new AMD64 mainboard and want to use linuxbios,
the IO architecture is showed in the attached picture. I'm not sure how
to specify the "PCI IRQ Router" in pirq table for this architecture. Since
each AMD8131 and AMD8111 all provide legacy PIC mode interrupt
controller, I think maybe there isn't a global legacy PIC mode PCI IRQ
router for different NCHT channels? Maybe APIC is the better choice?
More information about the coreboot