From stepan at openbios.org Wed Sep 1 03:38:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Sep 1 03:38:00 2004 Subject: Etherboot for AMD64 In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A6A@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A6A@cronos.trivium> Message-ID: <20040901085525.GA8102@openbios.org> This question was there before on this list. Does anyone have a pointer or some details? * Sagiv Yefet [040901 11:23]: > In the north bridge section of amd/serenade there are the following > entries: > northbridge amd/amdk8 "mc0" > #pci 0:18.0 > #pci 0:18.0 > #pci 0:18.0 > #pci 0:18.1 > #pci 0:18.2 > #pci 0:18.3 > why is 0:18.0 repeated three times ? > > -----Original Message----- > From: Stefan Reinauer [mailto:stepan at openbios.org] > Sent: Monday, August 30, 2004 11:44 AM > To: Sagiv Yefet > Cc: linuxbios at clustermatic.org > Subject: Re: Etherboot for AMD64 > > * Sagiv Yefet [040830 11:59]: > > What image suit AMD64 in the etherboot project ? > > Thanks. > > You should try tg3--ide_disk.zelf. Or better use YhLu's patches to add > filo and sata > > Stefan > > > > From zhushisongzhu at yahoo.com Wed Sep 1 05:58:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Wed Sep 1 05:58:01 2004 Subject: vgabios halt Message-ID: <20040901111445.15129.qmail@web13202.mail.yahoo.com> My MB is A6T based on vt8601 and vt82c686. When call vgabios(at 0xc000:0003), it halted. ... INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1023, did=8500 0x55 0xAA ...(16 bytes) bus/devfn = 0x100 biosint: # 0x1a, eax 0xb109 ebx 0x100 ecx 0x100 edx 0xb29f biosint: ebp 0x10fd8 esp 0xfc9 edi 0x2 esi 0x14040 biosint: ip 0x56e8 cs 0xc000 flags 0x16 0xb109: bus 1 devfn 0x0 reg 0x2 val 0x8500 biosint: # 0x58, eax 0xc000 ebx 0x100 ecx 0x8500 edx 0x3c2 biosint: ebp 0x10fd8 esp 0xfc7 edi 0x2 esi 0x14040 biosint: ip 0x2329 cs 0xc000 flags 0x246 biosint: Unsupport int #0x58 biosint: # 0xcd, eax 0xc000 ebx 0x100 ecx 0x8500 edx 0x3c2 biosint: ebp 0x10fd8 esp 0xfc7 edi 0x2 esi 0x14040 biosint: ip 0x2329 cs 0xc000 flags 0x246 biosint: Unsupport int #0xcd (halted) __________________________________ Do you Yahoo!? Take Yahoo! Mail with you! Get it on your mobile phone. http://mobile.yahoo.com/maildemo From stepan at openbios.org Wed Sep 1 06:14:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Sep 1 06:14:01 2004 Subject: vgabios halt In-Reply-To: <20040901111445.15129.qmail@web13202.mail.yahoo.com> References: <20040901111445.15129.qmail@web13202.mail.yahoo.com> Message-ID: <20040901113050.GA11614@openbios.org> * zhu shi song [040901 13:14]: > My MB is A6T based on vt8601 and vt82c686. When call > vgabios(at 0xc000:0003), it halted. > ... > INSTALL REAL-MODE IDT > DO THE VGA BIOS > found VGA: vid=1023, did=8500 > 0x55 0xAA ...(16 bytes) > bus/devfn = 0x100 > biosint: # 0x1a, eax 0xb109 ebx 0x100 ecx 0x100 edx > 0xb29f > biosint: ebp 0x10fd8 esp 0xfc9 edi 0x2 esi 0x14040 > biosint: ip 0x56e8 cs 0xc000 flags 0x16 > 0xb109: bus 1 devfn 0x0 reg 0x2 val 0x8500 > biosint: # 0x58, eax 0xc000 ebx 0x100 ecx 0x8500 edx 0x3c2 ^^^^^^ This looks already weird. Go check the code what happens in bios int 1a eax 0xb109 and have a look at Ralph Browns Interrupt List whether there is an int 58 at all (I doubt it) Might be some special callback between graphics and main bios, too.. VIA did this IIRC. > biosint: ebp 0x10fd8 esp 0xfc7 edi 0x2 esi 0x14040 > biosint: ip 0x2329 cs 0xc000 flags 0x246 > biosint: Unsupport int #0x58 > biosint: # 0xcd, eax 0xc000 ebx 0x100 ecx 0x8500 edx > 0x3c2 > biosint: ebp 0x10fd8 esp 0xfc7 edi 0x2 esi 0x14040 > biosint: ip 0x2329 cs 0xc000 flags 0x246 > biosint: Unsupport int #0xcd > (halted) > > > > > __________________________________ > Do you Yahoo!? > Take Yahoo! Mail with you! Get it on your mobile phone. > http://mobile.yahoo.com/maildemo > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From ian at abelon.com Wed Sep 1 07:04:00 2004 From: ian at abelon.com (Ian Smith) Date: Wed Sep 1 07:04:00 2004 Subject: vgabios halt In-Reply-To: <20040901113050.GA11614@openbios.org> References: <20040901111445.15129.qmail@web13202.mail.yahoo.com> <20040901113050.GA11614@openbios.org> Message-ID: <6.1.2.0.2.20040901125435.0af83200@mail.abelon.com> At 12:30 01/09/2004, Stefan Reinauer wrote: >* zhu shi song [040901 13:14]: > > My MB is A6T based on vt8601 and vt82c686. When call > > vgabios(at 0xc000:0003), it halted. > > ... > > INSTALL REAL-MODE IDT > > DO THE VGA BIOS > > found VGA: vid=1023, did=8500 > > 0x55 0xAA ...(16 bytes) > > bus/devfn = 0x100 > > biosint: # 0x1a, eax 0xb109 ebx 0x100 ecx 0x100 edx > > 0xb29f > > biosint: ebp 0x10fd8 esp 0xfc9 edi 0x2 esi 0x14040 > > biosint: ip 0x56e8 cs 0xc000 flags 0x16 > > 0xb109: bus 1 devfn 0x0 reg 0x2 val 0x8500 > > biosint: # 0x58, eax 0xc000 ebx 0x100 ecx 0x8500 edx 0x3c2 > ^^^^^^ > >This looks already weird. Go check the code what happens in >bios int 1a eax 0xb109 and have a look at Ralph Browns Interrupt List >whether there is an int 58 at all (I doubt it) Might be some special >callback between graphics and main bios, too.. VIA did this IIRC. This is a VIA VGA Bios special... It makes all sorts of Int 21 callbacks and they need to be handled (even if only by a default handler). A lot of them are also undocumented (at least in their Northbridge docs). However, Dave Ashley (who also posts to this list and did a good bit of the ground work to make VGA on EPIA work) also found another beaut - their VGA bios code had/has a bug in it where it will make interrupt calls with invalid interrupt numbers, which may be the problem here. To quote from a mail from Dave: >Under linuxbios the problem would manifest itself where during the vgabios >init code you'd get into an endless loop of invalid INT callbacks. So it >would stop the system from booting. > >My "fix" was to only allow certain INT's in the callback and so if an >invalid one happens, we just abort out of the VGA init code. Search the mail list archives for the title "Epia-MII VGA not working and PCMCIA rebooting" and you should be able to find the original posts - they were a great help to me when I was trying to get an VIA-based system up for a customer. Cheers Ian > > biosint: ebp 0x10fd8 esp 0xfc7 edi 0x2 esi 0x14040 > > biosint: ip 0x2329 cs 0xc000 flags 0x246 > > biosint: Unsupport int #0x58 > > biosint: # 0xcd, eax 0xc000 ebx 0x100 ecx 0x8500 edx > > 0x3c2 > > biosint: ebp 0x10fd8 esp 0xfc7 edi 0x2 esi 0x14040 > > biosint: ip 0x2329 cs 0xc000 flags 0x246 > > biosint: Unsupport int #0xcd > > (halted) > > > > > > > > > > __________________________________ > > Do you Yahoo!? > > Take Yahoo! Mail with you! Get it on your mobile phone. > > http://mobile.yahoo.com/maildemo > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios From snow2moutain at hotmail.com Wed Sep 1 07:32:00 2004 From: snow2moutain at hotmail.com (Chiu Gerald) Date: Wed Sep 1 07:32:00 2004 Subject: VGA Problem about 440bx chipset Message-ID: >From: Richard Smith >To: snow2moutain at hotmail.com >CC: linuxbios at clustermatic.org >Subject: Re: VGA Problem about 440bx chipset >Date: Tue, 31 Aug 2004 10:33:35 -0500 > >Chiu Gerald wrote: > > > I found the work done about vga are: > > (1) allocate_vga_resource() in newpci.c > > enbale io/mem of the vga adapter > > then walk up the bridges setting the VGA enable > >That should all be done already. > > > (2) copy the vga bios to 0xc0000 using adlo,and run bochs bios. > > I'm not sure if it had initilized the vga controller enough. And I > >You will get a vga bios boot screen if it works. > > > found there are some registers about AGP from 440bx northbridge > > datasheet ( 82443bx hostbridge/controller),such as AGP capability > > identifier register,AGP command register,AGP status register... > > But this work hadn't been done in linuxbios,maybe I need to set these > > registers correctly according to the datasheet to enable AGP? > >This is probally your problem. None of the AGP stuff is setup in the >440bx code. Only PCI cards have been used to date. You will have to >write AGP init code. you mean that PCI card works? Now I changed to a PCI video card,and bochs had run the vga bios,but still nothing happened! I have no idea what should I do next. _________________________________________________________________ ???? MSN Explorer: http://explorer.msn.com/lccn/ From daubin at actuality-systems.com Wed Sep 1 07:48:01 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Wed Sep 1 07:48:01 2004 Subject: Redirect your console to the network Message-ID: Hi, I just came across this and I thought I'd pass it along as a nice tool to have. Especially when one doesn't have VGA and serial isn't working for you. I hope someone else finds it as useful for them as it does for me:) http://technocrat.net/article.pl?sid=04/08/14/0236245&mode=nested Enjoy, Dave -------------- next part -------------- An HTML attachment was scrubbed... URL: From rsmith at bitworks.com Wed Sep 1 09:48:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Wed Sep 1 09:48:00 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: References: Message-ID: <4135E514.6090008@bitworks.com> Chiu Gerald wrote: > you mean that PCI card works? Yes some PCI cards work. I've made several Assiliant 65550 and 69000 based PCI cards work and some S3 based cards work. There are reports of some ATI cards working but I am still having problems getting my ATI M1 based card to work. > Now I changed to a PCI video card,and bochs had run the vga bios,but > still nothing happened! > I have no idea what should I do next. Are you setting up the shadowing correctly? You have to setup the shadowing in loader.s or bochs and the video bios never make it into ram. The stock ADLO setup won't work on the 440bx. I've attached my loader.s which sets up the shadowing correctly. Also the DEBUG_SERIAL option in rombios.c is very useful. You can enable it and all the bochs bios messages will be redirected out the serial port. This way you can see if bochs rombios is even getting called. You have to turn it back off to get text on the VGA screen. But your cards VSYNC should happen regardless. (assuming the vbios runs correctly) I leave in a few hours and won't be back till Tuesday the 2nd so you are on your own for a few days. I'll try to check email during that time but I'm not promising anything. Search the mailing list for things like "ADLO", "vgabios", etc there are several threads on getting this up. -------------- next part -------------- An embedded and charset-unspecified text was scrubbed... Name: loader.s URL: From rminnich at lanl.gov Wed Sep 1 09:51:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 1 09:51:00 2004 Subject: Redirect your console to the network In-Reply-To: Message-ID: yes, we have used that off and on for a while. I hope they improved it to be a real module, but if not I have an iproved version here ... thanks for the pointer. ron From jdarby at powercom.net Wed Sep 1 11:35:01 2004 From: jdarby at powercom.net (Justin C. Darby) Date: Wed Sep 1 11:35:01 2004 Subject: Tyan Thunder K8S Pro (S2882) Message-ID: <4135FE53.4050903@powercom.net> Hi folks, I haven't been paying attention recently to the list in regards to amd64 support, but I was wondering if the Tyan Thunder K8S Pro (S2882) is yet supported? I tried to check the status page, but there isn't a single 2004 date on it. We have 8 of these boards coming in for a webserver cluster, and just need to boot off of IDE (actually, CF via IDE). I know someone around here works on Tyan boards, so I figure this is the quickest way to an answer. :) Thanks, Justin From bmaly at angstrom.com Wed Sep 1 11:47:01 2004 From: bmaly at angstrom.com (Brian Maly) Date: Wed Sep 1 11:47:01 2004 Subject: Tyan Thunder K8S Pro (S2882) In-Reply-To: <4135FE53.4050903@powercom.net> References: <4135FE53.4050903@powercom.net> Message-ID: <1094058683.15677.68.camel@localhost> tyan s2882 is supported... its in the freebios2 tree On Wed, 2004-09-01 at 12:52, Justin C. Darby wrote: > Hi folks, > > I haven't been paying attention recently to the list in regards to amd64 > support, but I was wondering if the Tyan Thunder K8S Pro (S2882) is yet > supported? I tried to check the status page, but there isn't a single > 2004 date on it. We have 8 of these boards coming in for a webserver > cluster, and just need to boot off of IDE (actually, CF via IDE). I know > someone around here works on Tyan boards, so I figure this is the > quickest way to an answer. :) > > Thanks, > Justin > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Wed Sep 1 11:50:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 1 11:50:01 2004 Subject: Tyan Thunder K8S Pro (S2882) In-Reply-To: <4135FE53.4050903@powercom.net> Message-ID: On Wed, 1 Sep 2004, Justin C. Darby wrote: > I haven't been paying attention recently to the list in regards to amd64 > support, but I was wondering if the Tyan Thunder K8S Pro (S2882) is yet > supported? I tried to check the status page, but there isn't a single > 2004 date on it. We have 8 of these boards coming in for a webserver > cluster, and just need to boot off of IDE (actually, CF via IDE). I know > someone around here works on Tyan boards, so I figure this is the > quickest way to an answer. :) sorry about that, we're trying to get new maintainers for the web pages and had some volunteers but that did not work out -- it's hard to make that kind of commitment. Yes, it's supported. ron From peter at pantasys.com Wed Sep 1 13:31:00 2004 From: peter at pantasys.com (Peter Buckingham) Date: Wed Sep 1 13:31:00 2004 Subject: DK8S2? Message-ID: <4136197C.7070204@pantasys.com> Hi, I've built my linuxbios.rom for Iwill's dk8s2. the only change i made was to the ROM_SIZE (i needed it to be 512k, not 1mb). i've plugged in the prom and a serial console set to 115200 bps. i don't actually see anything. what sort of output should i be seeing? i've tried turning up the debug level, but still see no output. does anyone have any experience with this board? thanks, peter From daubin at actuality-systems.com Wed Sep 1 13:55:00 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Wed Sep 1 13:55:00 2004 Subject: Redirect your console to the network Message-ID: Hey Ron, If your tool doesn't have to support polling can you please pass that on to me? That's one side effect of the netconsole tool. You need to have polling enabled in the Network driver. I've been having trouble getting that to fly actually. Thanks, Dave -----Original Message----- From: ron minnich [mailto:rminnich at lanl.gov] Sent: Wednesday, September 01, 2004 11:08 AM To: Dave Aubin Cc: linuxbios at clustermatic.org Subject: Re: Redirect your console to the network yes, we have used that off and on for a while. I hope they improved it to be a real module, but if not I have an iproved version here ... thanks for the pointer. ron From Trellix78 at aol.com Wed Sep 1 13:58:01 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Wed Sep 1 13:58:01 2004 Subject: epia-m vga cromwell bios Message-ID: <4F5E2746.282579EF.029B16BB@aol.com> This is actually 2 questions in one. I've been having some problems getting VGA to work on my epia-m board. I was able to get etherboot to load the kernel, etc, but when I made the recent changes for VGA, elfboot doesn't like what I did. I've included a capture of the serial output and my configuration file. I also was interested in doing something like the cromwell open-source bios for the Xbox, where vga is fully initialized from the start and a nice graphical screen can be set up to enable booting from etherboot, cd-rom or the hard disk via grub. My Xbox mod-chip is also 256kb, so I'm guessing it should work. Here's the serial port capture: LinuxBIOS-1.0.0 Thu Aug 26 13:21:59 EDT 2004 starting... 80 08 07 0d 0a 01 40 00 04 75 75 00 82 08 00 01 0e 04 0c 01 02 20 c0 a0 75 00 00 50 3c 50 2d 40 a0 a0 50 50 00 00 00 00 00 41 4b 34 32 75 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu Aug 26 13:21:59 EDT 2004 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1106/3123] PCI: 00:01.0 [1106/b091] PCI: 00:0d.0 [1106/3044] PCI: 00:10.0 [1106/3038] PCI: 00:10.1 [1106/3038] PCI: 00:10.2 [1106/3038] PCI: 00:10.3 [1106/3104] PCI: 00:11.0 [1106/3177] PCI: 00:11.1 [1106/0571] PCI: 00:11.5 [1106/3059] PCI: 00:12.0 [1106/3065] PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [1106/3122] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xf8000000 - 0xfbffffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfc000000 - 0xfcffffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:00.0 10 <- [0xf8000000 - 0xfbffffff] prefmem PCI: 01:00.0 14 <- [0xfc000000 - 0xfcffffff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:0d.0 10 <- [0xfd000000 - 0xfd0007ff] mem PCI: 00:0d.0 14 <- [0x00001800 - 0x0000187f] io PCI: 00:10.0 20 <- [0x00001880 - 0x0000189f] io PCI: 00:10.1 20 <- [0x000018a0 - 0x000018bf] io PCI: 00:10.2 20 <- [0x000018c0 - 0x000018df] io PCI: 00:10.3 10 <- [0xfd001000 - 0xfd0010ff] mem PCI: 00:11.1 20 <- [0x000018e0 - 0x000018ef] io PCI: 00:11.5 10 <- [0x00001000 - 0x000010ff] io PCI: 00:12.0 10 <- [0x00001400 - 0x000014ff] io PCI: 00:12.0 14 <- [0xfd002000 - 0xfd0020ff] mem ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:0d.0 cmd <- 83 PCI: 00:10.0 cmd <- 01 PCI: 00:10.1 cmd <- 01 PCI: 00:10.2 cmd <- 01 PCI: 00:10.3 cmd <- 02 PCI: 00:11.0 cmd <- 07 PCI: 00:11.1 cmd <- 07 PCI: 00:11.5 cmd <- 01 PCI: 00:12.0 cmd <- 83 PCI: 01:00.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized totalram: 96M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB Setting variable MTRR 1, base: 64MB, range: 32MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x09 Processor Mask : 0x00 Processor Stepping : 0x01 Feature flags : 0x0380b135 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Disabling local apic...done. CPU #0 Initialized Mainboard fixup Final mainboard fixup Southbridge fixup setting firewire Assigning IRQ 10 to 0:d.0 Readback = 10 setting usb Assigning IRQ 11 to 0:10.0 Readback = 11 Assigning IRQ 10 to 0:10.1 Readback = 10 Assigning IRQ 12 to 0:10.2 Readback = 12 Assigning IRQ 5 to 0:10.3 Readback = 5 setting vt8235 Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 12 to 0:11.5 Readback = 12 setting ethernet Assigning IRQ 11 to 0:12.0 Readback = 11 setting vga Assigning IRQ 11 to 1:0.0 Readback = 11 setting pci slot setting vt8235 slot Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 12 to 0:11.5 Readback = 12 Checking IRQ routing tables... /home/dhillman/freebios/src/arch/i386/lib/pirq_routing.c: 30:check_pirq_routing_table() - irq_routing_table located at: 0x00008c60 done. Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 00000654 checksum d443 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 37:init_bytes() - zkernel_start:0xfff00000 zkernel_mask:0x0000ffff Cannot Load ELF Image What should I be looking for if it's successful, besides the output on the monitor? Here's my config file: # # LinuxBIOS config file for: VIA epia-m mini-itx # target /home/dhillman/epia # via epia mainboard via/epia-m # Enable Serial Console for debugging option SERIAL_CONSOLE=1 option TTYS0_BAUD=115200 option DEFAULT_CONSOLE_LOGLEVEL=9 option DEBUG=1 # Use 256KB Standard Flash as Normal BIOS option RAMTEST=1 option USE_GENERIC_ROM=1 option STD_FLASH=1 option ROM_SIZE=262144 option ZKERNEL_START=0xfffd0000 # payload size = 192KB option PAYLOAD_SIZE=196608 # use ELF Loader to load Etherboot option USE_ELF_BOOT=1 # Use Etherboot as our payload #payload /home/dhillman/etherboot-5.0.8/src/bin32/via-rhine.ebi #payload /home/dhillman/epia/payload.adlo #payload /home/dhillman/epia/vga+eb.bin payload /home/dhillman/epia/vgabios.bin # for VGA support (optional) option HAVE_FRAMEBUFFER=1 option SMA_SIZE=8 option CONFIG_VGABIOS=1 option CONFIG_REALMODE_IDT=1 option CONFIG_PCIBIOS=1 option VGABIOS_START=0xfffe0000 #option VGABIOS_START=0xfff00000 addaction romimage dd if=vgabios.bin of=romimage bs=65536 seek=2 conv=sync conv=notrunc dir src/bioscall # end VGA support From rminnich at lanl.gov Wed Sep 1 14:06:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 1 14:06:00 2004 Subject: DK8S2? In-Reply-To: <4136197C.7070204@pantasys.com> Message-ID: On Wed, 1 Sep 2004, Peter Buckingham wrote: > I've built my linuxbios.rom for Iwill's dk8s2. the only change i made > was to the ROM_SIZE (i needed it to be 512k, not 1mb). I wish david hendriks were here ... I wonder if your romimage is any good. You can send to me for a quick look. We had some interest from iwill and even sent them a system of theirs running linuxbios etc. but I have not heard from them lately. I don't know what they plan to do. > i've plugged in the prom and a serial console set to 115200 bps. i don't > actually see anything. you should test your serial console setup under fuctory bios before you try it under linuxbios. Use minicom at each end, set the baud rates, and so on. > does anyone have any experience with this board? we had some and I will look and see if we still do. ron From rminnich at lanl.gov Wed Sep 1 14:08:10 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 1 14:08:10 2004 Subject: Redirect your console to the network In-Reply-To: Message-ID: I'll try to find it. The other change I made was to turn it into a real device (which they may also have done) and have it not start sending output until the first open. This change was needed to ensure it would not try to use the network stack until it was actually there ... ron From peter at pantasys.com Wed Sep 1 14:15:00 2004 From: peter at pantasys.com (Peter Buckingham) Date: Wed Sep 1 14:15:00 2004 Subject: DK8S2? In-Reply-To: References: Message-ID: <413623D1.4000605@pantasys.com> Hi Ron, ron minnich wrote: > I wonder if your romimage is any good. You can send to me for a quick > look. i'll send it to you off line. > We had some interest from iwill and even sent them a system of theirs > running linuxbios etc. but I have not heard from them lately. I don't know > what they plan to do. at least i know that it's meant to work ;-) > you should test your serial console setup under fuctory bios before you > try it under linuxbios. Use minicom at each end, set the baud rates, and > so on. i've been using a null modem cable that i use for kernel debugging, should i be using a straight through cable? thanks, peter From rminnich at lanl.gov Wed Sep 1 14:28:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 1 14:28:00 2004 Subject: DK8S2? In-Reply-To: <413623D1.4000605@pantasys.com> Message-ID: On Wed, 1 Sep 2004, Peter Buckingham wrote: > i've been using a null modem cable that i use for kernel debugging, > should i be using a straight through cable? what you use doesn't matter as long as you test it before you try using it with linuxbios. thanks ron From ollie at lanl.gov Wed Sep 1 14:34:01 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Wed Sep 1 14:34:01 2004 Subject: DK8S2? In-Reply-To: <413623D1.4000605@pantasys.com> References: <413623D1.4000605@pantasys.com> Message-ID: <1094068267.8702.51.camel@exponential.lanl.gov> On Wed, 2004-09-01 at 13:32, Peter Buckingham wrote: > Hi Ron, > > ron minnich wrote: > > I wonder if your romimage is any good. You can send to me for a quick > > look. > > i'll send it to you off line. > > > We had some interest from iwill and even sent them a system of theirs > > running linuxbios etc. but I have not heard from them lately. I don't know > > what they plan to do. > > at least i know that it's meant to work ;-) > > > you should test your serial console setup under fuctory bios before you > > try it under linuxbios. Use minicom at each end, set the baud rates, and > > so on. > > i've been using a null modem cable that i use for kernel debugging, > should i be using a straight through cable? > The DK8S2 should work without problem. We had that long time ago. What did you do to shrink the romimage size ? How did you flash the flash ? Ollie From peter at pantasys.com Wed Sep 1 14:57:00 2004 From: peter at pantasys.com (Peter Buckingham) Date: Wed Sep 1 14:57:00 2004 Subject: DK8S2? In-Reply-To: <1094068267.8702.51.camel@exponential.lanl.gov> References: <413623D1.4000605@pantasys.com> <1094068267.8702.51.camel@exponential.lanl.gov> Message-ID: <41362DA1.8010601@pantasys.com> Li-Ta Lo wrote: > The DK8S2 should work without problem. We had that long time ago. What > did you do to shrink the romimage size ? How did you flash the flash ? i just changed ROM_SIZE to be 512K rather than 1024K. i flashed it with a universal device programmer from BP microsystems (this has worked fine for other bios releases). i have been using a serial cable that works fine for other kernel debugging. peter From daubin at actuality-systems.com Wed Sep 1 16:58:01 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Wed Sep 1 16:58:01 2004 Subject: Redirect your console to the network Message-ID: How to get netconsole to work: 1. Build your 2.6 kernel with tg3 support AND netconsole as part of the kernel A. This is the easiest way, I couldn't do it via modules as I couldn't get the polling to work. 2. Pass in to the kernel as a parameter the netconsole information A. This will automatically send the console information to the destination address when eth0 is up. Doing this worked for me, but a little bit of a pain was involved. Hope this helped. Dave -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Dave Aubin Sent: Wednesday, September 01, 2004 3:12 PM To: ron minnich Cc: linuxbios at clustermatic.org Subject: RE: Redirect your console to the network Hey Ron, If your tool doesn't have to support polling can you please pass that on to me? That's one side effect of the netconsole tool. You need to have polling enabled in the Network driver. I've been having trouble getting that to fly actually. Thanks, Dave -----Original Message----- From: ron minnich [mailto:rminnich at lanl.gov] Sent: Wednesday, September 01, 2004 11:08 AM To: Dave Aubin Cc: linuxbios at clustermatic.org Subject: Re: Redirect your console to the network yes, we have used that off and on for a while. I hope they improved it to be a real module, but if not I have an iproved version here ... thanks for the pointer. ron _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From hansolofalcon at worldnet.att.net Wed Sep 1 17:05:01 2004 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Wed Sep 1 17:05:01 2004 Subject: Redirect your console to the network In-Reply-To: Message-ID: <001701c49072$39afa3a0$6501a8c0@who5> Hello from Gregg C Levine Ron, Dave, is this something that became part of the basic 2.6 series kernel? I looked at the website that Dave suggested, and it looks to be something that makes sense. However, I'm wrapped up in something else, and I can't test a 2.6 kernel for a while. I should have an idea in about 20 days or so, that's when an evaluation for one of my examples is up. Ron if you don't want me sending some messages directly to you, and to the correspondent, (Dave), and then to the list, I'll delete your address from the To: entry next time. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of ron minnich > Sent: Wednesday, September 01, 2004 3:23 PM > To: Dave Aubin > Cc: linuxbios at clustermatic.org > Subject: RE: Redirect your console to the network > > I'll try to find it. > > The other change I made was to turn it into a real device (which they may > also have done) and have it not start sending output until the first open. > This change was needed to ensure it would not try to use the network stack > until it was actually there ... > > ron > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From rminnich at lanl.gov Wed Sep 1 17:12:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 1 17:12:01 2004 Subject: DK8S2? In-Reply-To: <41362DA1.8010601@pantasys.com> Message-ID: On Wed, 1 Sep 2004, Peter Buckingham wrote: > i just changed ROM_SIZE to be 512K rather than 1024K. i flashed it with > a universal device programmer from BP microsystems (this has worked fine > for other bios releases). i have been using a serial cable that works > fine for other kernel debugging. my only other worry would be that Iwill has change the mobo in some way and we don't know it. For first time users, I really do recommend you go with a Tyan board since they have vendor support for linuxbios and can answer questions such as this. Sorry I didn't say this earlier. ron From jerj at coplanar.net Wed Sep 1 17:57:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Wed Sep 1 17:57:01 2004 Subject: Firmware hub/ICH top block swap Message-ID: <413657DC.7060003@coplanar.net> Has anyone pursued this feature of the i8xx series chipsets? Seems it could do what the Bios saviour does, even for boards with a soldered on flash chip. At least for the 810e, there is a "top block swap" feature: The FWH flash part is a 512kB (or more) part, of 8x (or more) 64kB blocks. The top block can be write protected separately via a jumper. The other blocks can also be collectively write protected by a jumper. The ICH (like a southbridge I guess) contains the CMOS batter-backed ram. One extra bit in CMOS can be set in the PCI config space of the ICH. The "top block swap" can be used for failsafe top or "boot" block updates to the FWH flash. The update utility first copies the top block to the block just below it, and verifies the flash operation. It then sets the top block swap bit. From this point on, if a flash operation to the top block fails, the power is lost, etc, the system will boot to the 2nd from top block, which presumably contains enough code to load the flash utility from some device (floppy/cdrom?) Once the update has completed successfully, the top block swap is disabled. I have verified this using setpci. On an IBM NetVista 6341-23U, it works in that the system fails to boot upon setting the bit, and clearing the CMOS restores the system to normal. The chipset docs also advertise a power-on strapping option for the ICH, but the system I tested had neither that or the write protect jumpers. ( It did have a recovery jumper, but that seems to just activate recovery mode in the top block's boot block code, not force a top block swap) I'm going to try using this as a way of trying out Linuxbios with a way to get back the vendor bios (the FWH is soldered on); flash linuxbios to the 2nd from top block, set the swap bit. If it breaks, clear CMOS, recover the vendor bios. BTW - does anyone have any working code to flash an ST M50FW0404 or an Intel 82802? Uniflash/devbios don't support the ST at least. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From jerj at coplanar.net Wed Sep 1 20:06:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Wed Sep 1 20:06:01 2004 Subject: reset16.inc and 32bit reset vector Message-ID: <413675EB.3020301@coplanar.net> . = 0x8; .code32 jmp protected_start .previous What in the world would use this? Is there am i386 CPU that starts in protected mode? -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From ebiederman at lnxi.com Wed Sep 1 21:47:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 1 21:47:00 2004 Subject: reset16.inc and 32bit reset vector In-Reply-To: <413675EB.3020301@coplanar.net> References: <413675EB.3020301@coplanar.net> Message-ID: Jeremy Jackson writes: > . = 0x8; > .code32 > jmp protected_start > .previous > > What in the world would use this? Is there am i386 CPU that starts in protected > mode? The normal LinuxBIOS image. The fallback LinuxBIOS image starts at the reset vector. Then it checks the cmos options to see if everything is ok. Decrements the counter in the cmos in case the count gets too high. Then it jumps to the end of the normal image. Essentially it is easier to fix the end address then to fix the start address. Eric From ebiederman at lnxi.com Wed Sep 1 22:05:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 1 22:05:01 2004 Subject: Firmware hub/ICH top block swap In-Reply-To: <413657DC.7060003@coplanar.net> References: <413657DC.7060003@coplanar.net> Message-ID: Jeremy Jackson writes: > Has anyone pursued this feature of the i8xx series chipsets? Seems it could do > what the Bios saviour does, even for boards with a soldered on flash chip. Largely this requires a cooperative BIOS if you want to restore to something besides LinuxBIOS. Once you have LinuxBIOS we implement essentially the same thing in software so the benefit is minor. And by doing it in software we have it for every kind of flash chip. Eric From jerj at coplanar.net Wed Sep 1 22:51:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Wed Sep 1 22:51:01 2004 Subject: linuxbios external api Message-ID: <41369CC7.1010203@coplanar.net> Maybe this has been asked before, but i've been thinking about exporting functions like serial console, debugger entry points, etc. the PC BIOS uses the interrupt vectors as, well, vectors. I remember the C=64 had a jump table at a fixed address. I was wondering how hard it would be to use an ELF symbol table as a jump table, or at least as the source of information to build one. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From jerj at coplanar.net Wed Sep 1 22:55:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Wed Sep 1 22:55:01 2004 Subject: Firmware hub/ICH top block swap In-Reply-To: References: <413657DC.7060003@coplanar.net> Message-ID: <41369DBA.9020307@coplanar.net> Eric W. Biederman wrote: > Jeremy Jackson writes: > > >>Has anyone pursued this feature of the i8xx series chipsets? Seems it could do >>what the Bios saviour does, even for boards with a soldered on flash chip. > > > Largely this requires a cooperative BIOS if you want to restore to something > besides LinuxBIOS. I have a specific case in mind: a motherboard with a soldered in flash chip, and a 'cooperative' BIOS. I need to keep the option of restoring the vendor BIOS open until Linuxbios is working 100%. > Once you have LinuxBIOS we implement essentially the same thing in software > so the benefit is minor. And by doing it in software we have it for > every kind of flash chip. Will this work for a sector erase flash? Is there any documentation I can look at? > > Eric -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From jerj at coplanar.net Wed Sep 1 22:58:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Wed Sep 1 22:58:01 2004 Subject: reset16.inc and 32bit reset vector In-Reply-To: References: <413675EB.3020301@coplanar.net> Message-ID: <41369E04.9050607@coplanar.net> Eric W. Biederman wrote: > The normal LinuxBIOS image. > > > The fallback LinuxBIOS image starts at the reset vector. > Then it checks the cmos options to see if everything is ok. > Decrements the counter in the cmos in case the count gets too high. > Then it jumps to the end of the normal image. I could use some pointers, I find this a bit cryptic. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From snow2moutain at hotmail.com Thu Sep 2 04:36:01 2004 From: snow2moutain at hotmail.com (Chiu Gerald) Date: Thu Sep 2 04:36:01 2004 Subject: VGA Problem about 440bx chipset Message-ID: thanks,Richard! >Yes some PCI cards work. I've made several Assiliant 65550 and >69000 >based PCI cards work and some S3 based cards work. There are >reports of >some ATI cards working but I am still having problems getting my ATI >M1 >based card to work. My card is ATI,too.:( Maybe I need to look for another PCI card to try. > >Are you setting up the shadowing correctly? You have to setup the >shadowing in loader.s or bochs and the video bios never make it into >ram. The stock ADLO setup won't work on the 440bx. > >I've attached my loader.s which sets up the shadowing correctly. > Thanks,the shadow setting is correct ,and I debugged into rombios.c ,found that it halts when it run into vga bios and never return back. _________________________________________________________________ ???? MSN Explorer: http://explorer.msn.com/lccn From stepan at openbios.org Thu Sep 2 05:47:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Thu Sep 2 05:47:00 2004 Subject: linuxbios external api In-Reply-To: <41369CC7.1010203@coplanar.net> References: <41369CC7.1010203@coplanar.net> Message-ID: <20040902110417.GA29879@openbios.org> * Jeremy Jackson [040902 06:08]: > Maybe this has been asked before, but i've been thinking about exporting > functions like serial console, debugger entry points, etc. the PC BIOS > uses the interrupt vectors as, well, vectors. I remember the C=64 had a > jump table at a fixed address. I was wondering how hard it would be to > use an ELF symbol table as a jump table, or at least as the source of > information to build one. LinuxBIOS exports some information in a data structure called the LinuxBIOS table. It has been the expressed wish of many here to not have any callback functionality in LinuxBIOS, so no entry points or function calls to LinuxBIOS code. If you want this, have a look at OpenBIOS as a payload on top of LinuxBIOS. It provides IEEE 1275-1994 (Open Firmware) compliant callbacks to the operating system. Stefan From zhushisongzhu at yahoo.com Thu Sep 2 07:28:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Thu Sep 2 07:28:00 2004 Subject: testbios halt Message-ID: <20040902124453.12163.qmail@web13205.mail.yahoo.com> I have made my ADIA6T MB (vt8601/vt82c686B) booting from linuxbios(freebios V1). I can't make vgabios work in linuxbios. So I try to use testbios to make VGA work. But testbios halt the MB. The output log is as following: [root at localhost /sbin]# ./testbios -s 65536 ./a6tvga.bios.bin running file ./a6tvga.bios.bin No base specified. defaulting to 0xc0000 No initial code segment specified. defaulting to 0xc000 No initial instruction pointer specified. defaulting to 0x0003 eax=0x9 ecx=0x8500 eflags=0x90 [halt linux] _______________________________ Do you Yahoo!? Win 1 of 4,000 free domain names from Yahoo! Enter now. http://promotions.yahoo.com/goldrush From rminnich at lanl.gov Thu Sep 2 09:05:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Thu Sep 2 09:05:00 2004 Subject: reset16.inc and 32bit reset vector In-Reply-To: <413675EB.3020301@coplanar.net> Message-ID: On Wed, 1 Sep 2004, Jeremy Jackson wrote: > . = 0x8; > .code32 > jmp protected_start > .previous note the offset of 8. this is called by code once we're in protected mode. This is not the reset vector ron From jerj at coplanar.net Thu Sep 2 09:08:00 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Thu Sep 2 09:08:00 2004 Subject: reset16.inc and 32bit reset vector In-Reply-To: References: Message-ID: <41372D06.8050506@coplanar.net> ron minnich wrote: > On Wed, 1 Sep 2004, Jeremy Jackson wrote: > > >> . = 0x8; >> .code32 >> jmp protected_start >> .previous > > > note the offset of 8. this is called by code once we're in protected mode. > This is not the reset vector I gathered that, I was wondering what code might be calling it, and does it have to be there for that code to find it. -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From rminnich at lanl.gov Thu Sep 2 09:11:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Thu Sep 2 09:11:00 2004 Subject: linuxbios external api In-Reply-To: <41369CC7.1010203@coplanar.net> Message-ID: well, the original goal was that the external api was linux. I still hate to abandon this goal. I'll let eric say more :-) ron From yhlu at tyan.com Thu Sep 2 11:21:01 2004 From: yhlu at tyan.com (Yinghai Lu) Date: Thu Sep 2 11:21:01 2004 Subject: elf for USB boot in FILO in Etherboot In-Reply-To: Message-ID: <200409021520.i82FK9v27612@nwn.definitive.org> I remember that some time ago, Miller met the problem with the use FILO and FILO in Etherboot to boot elf made by mkelfImage 2.5....from Kernel and Init. The kernel said that can not find the init. Yesterday I met the same problem under following configuration: Kernel: 2.6.8.1 compiled under Suse 9.1 AMD64 ( gcc 3.3.3). Used mkelfImage under Redhat 9 to produce the final elf. When I use 2.6.5, 2.6.6, 2.6.7 with Suse 9 compiler gcc 3.3.1, all work well. Miller seems have problem with 2.6.6 and Suse 9.1. So I guess there is some problem with gcc 3.3.3 in Suse 9. or there is some optimization for (EM86T) cause problem. Miller, Can you try to compile your kernel under Suse 9.? Regards YH From daubin at actuality-systems.com Thu Sep 2 11:53:00 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Thu Sep 2 11:53:00 2004 Subject: elf for USB boot in FILO in Etherboot Message-ID: Here's is what I've found and made filo & elf work. I build with AMD64, 2.6.6 compiled under Suse 9.0, gcc 3.3.1. I build with mkelfImage also on Suse 9.0, Amd 64. There is a problem loading any mkelf image with an initrd. I don't think it has anything to do with the tools as I've tried An elf made with all 32 bit tools and an older compiler got the Same failure with the initrd portion. I suspect it is the elf Decompression in filo with a multipart built elf. I know mkelfImage with multipart works in etherboot, so I further think It is filo's elf reader. That said here's what I did to get around The problem. Don't use a kernel & initrd approach. Use a different early file system Approach. I use initramfs. It is one Big Fat Kernel (BFK). When I use this Approach it works for me. I hope this helps those who wish to use filo & etherboot. Thanks, Dave -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Yinghai Lu Sent: Thursday, September 02, 2004 12:37 PM To: 'ron minnich' Cc: 'LinuxBIOS' Subject: elf for USB boot in FILO in Etherboot I remember that some time ago, Miller met the problem with the use FILO and FILO in Etherboot to boot elf made by mkelfImage 2.5....from Kernel and Init. The kernel said that can not find the init. Yesterday I met the same problem under following configuration: Kernel: 2.6.8.1 compiled under Suse 9.1 AMD64 ( gcc 3.3.3). Used mkelfImage under Redhat 9 to produce the final elf. When I use 2.6.5, 2.6.6, 2.6.7 with Suse 9 compiler gcc 3.3.1, all work well. Miller seems have problem with 2.6.6 and Suse 9.1. So I guess there is some problem with gcc 3.3.3 in Suse 9. or there is some optimization for (EM86T) cause problem. Miller, Can you try to compile your kernel under Suse 9.? Regards YH _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From zhushisongzhu at yahoo.com Fri Sep 3 05:36:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Fri Sep 3 05:36:01 2004 Subject: use ramdisk as root file system Message-ID: <20040903105302.96340.qmail@web13203.mail.yahoo.com> I now can boot my QDIA6T(vt8601/vt82c686b) MB using hard disk as root file system though there is no vga turned on. But I don't need HD. I hope I can mount RAMDisk as my root filesystem which can be read and written. How should I do to start such work? I have read some material about initrd but I don't understand it very clearly. tks zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - 100MB free storage! http://promotions.yahoo.com/new_mail From Antony at Soft-Solutions.co.uk Fri Sep 3 05:59:00 2004 From: Antony at Soft-Solutions.co.uk (Antony Stone) Date: Fri Sep 3 05:59:00 2004 Subject: use ramdisk as root file system In-Reply-To: <20040903105302.96340.qmail@web13203.mail.yahoo.com> References: <20040903105302.96340.qmail@web13203.mail.yahoo.com> Message-ID: <200409031216.03474.Antony@Soft-Solutions.co.uk> On Friday 03 September 2004 11:53 am, zhu shi song wrote: > I now can boot my QDIA6T(vt8601/vt82c686b) MB using > hard disk as root file system though there is no vga > turned on. But I don't need HD. I hope I can mount > RAMDisk as my root filesystem which can be read and > written. How should I do to start such work? I have > read some material about initrd but I don't understand > it very clearly. See if the following help: http://lists.debian.org/debian-user/2001/05/msg01251.html http://www.linux4.be/~jroark/howto/ramdisk.html http://www.lissot.net/partition/ramdisk.html http://www.linux.org/docs/ldp/howto/Bootdisk-HOWTO/buildroot.html Regards, Antony. -- "Black holes are where God divided by zero." - Steven Wright Please reply to the list; please don't CC me. From daubin at actuality-systems.com Fri Sep 3 07:49:00 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Fri Sep 3 07:49:00 2004 Subject: use ramdisk as root file system Message-ID: Here is a good way to do initramfs. Initramfs becomes part of the kernel and Then executes it's programs in user space which makes things nice. But there Are other advantages as well. Feel free to read these while on the thrown;) http://linuxfromscratch.org/pipermail/lfs-hackers/2004-June/001424.html http://seclists.org/lists/linux-kernel/2004/Jul/0154.html http://lwn.net/Articles/14776/ For my needs initramfs is a life saver, but initrd is good too. Heck you could Go NFS if you wish. Enjoy, Dave:) -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of zhu shi song Sent: Friday, September 03, 2004 6:53 AM To: linuxbios at clustermatic.org Subject: use ramdisk as root file system I now can boot my QDIA6T(vt8601/vt82c686b) MB using hard disk as root file system though there is no vga turned on. But I don't need HD. I hope I can mount RAMDisk as my root filesystem which can be read and written. How should I do to start such work? I have read some material about initrd but I don't understand it very clearly. tks zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - 100MB free storage! http://promotions.yahoo.com/new_mail _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From zhushisongzhu at yahoo.com Fri Sep 3 08:07:00 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Fri Sep 3 08:07:00 2004 Subject: use ramdisk as root file system In-Reply-To: Message-ID: <20040903132431.43064.qmail@web13207.mail.yahoo.com> I've made one initrd to try. But when executing at /sbin/init, linux halts. Output log is as following: RAMDISK: Compressed image found at block 0 Freeing initrd memory: 3687k freed VFS: Mounted root (ext2 filesystem) readonly. Freeing unused kernel memory: 64k freed Warning: unable to open an initial console. [end] By the way, using initramfs, can I have rw root fs on ramdisk? tks zhu --- Dave Aubin wrote: > Here is a good way to do initramfs. Initramfs > becomes part of the > kernel and > Then executes it's programs in user space which > makes things nice. But > there > Are other advantages as well. Feel free to read > these while on the > thrown;) > > http://linuxfromscratch.org/pipermail/lfs-hackers/2004-June/001424.html > http://seclists.org/lists/linux-kernel/2004/Jul/0154.html > http://lwn.net/Articles/14776/ > > For my needs initramfs is a life saver, but initrd > is good too. Heck > you could > Go NFS if you wish. > > Enjoy, > Dave:) > > > > -----Original Message----- > From: linuxbios-admin at clustermatic.org > [mailto:linuxbios-admin at clustermatic.org] On Behalf > Of zhu shi song > Sent: Friday, September 03, 2004 6:53 AM > To: linuxbios at clustermatic.org > Subject: use ramdisk as root file system > > I now can boot my QDIA6T(vt8601/vt82c686b) MB using > hard disk as root > file system though there is no vga turned on. But I > don't need HD. I > hope I can mount RAMDisk as my root filesystem which > can be read and > written. How should I do to start such work? I > have read some material > about initrd but I don't understand it very clearly. > > tks > zhu > > > > > __________________________________ > Do you Yahoo!? > New and Improved Yahoo! Mail - 100MB free storage! > http://promotions.yahoo.com/new_mail > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > __________________________________ Do you Yahoo!? Read only the mail you want - Yahoo! Mail SpamGuard. http://promotions.yahoo.com/new_mail From zhushisongzhu at yahoo.com Fri Sep 3 08:15:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Fri Sep 3 08:15:01 2004 Subject: use ramdisk as root file system In-Reply-To: Message-ID: <20040903133141.16693.qmail@web13203.mail.yahoo.com> initramfs can only be supported under 2.6 kernel. I'm using kernel 2.4. --- Dave Aubin wrote: > Here is a good way to do initramfs. Initramfs > becomes part of the > kernel and > Then executes it's programs in user space which > makes things nice. But > there > Are other advantages as well. Feel free to read > these while on the > thrown;) > > http://linuxfromscratch.org/pipermail/lfs-hackers/2004-June/001424.html > http://seclists.org/lists/linux-kernel/2004/Jul/0154.html > http://lwn.net/Articles/14776/ > > For my needs initramfs is a life saver, but initrd > is good too. Heck > you could > Go NFS if you wish. > > Enjoy, > Dave:) > > > > -----Original Message----- > From: linuxbios-admin at clustermatic.org > [mailto:linuxbios-admin at clustermatic.org] On Behalf > Of zhu shi song > Sent: Friday, September 03, 2004 6:53 AM > To: linuxbios at clustermatic.org > Subject: use ramdisk as root file system > > I now can boot my QDIA6T(vt8601/vt82c686b) MB using > hard disk as root > file system though there is no vga turned on. But I > don't need HD. I > hope I can mount RAMDisk as my root filesystem which > can be read and > written. How should I do to start such work? I > have read some material > about initrd but I don't understand it very clearly. > > tks > zhu > > > > > __________________________________ > Do you Yahoo!? > New and Improved Yahoo! Mail - 100MB free storage! > http://promotions.yahoo.com/new_mail > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - Send 10MB messages! http://promotions.yahoo.com/new_mail From daubin at actuality-systems.com Fri Sep 3 08:21:02 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Fri Sep 3 08:21:02 2004 Subject: use ramdisk as root file system Message-ID: Pass the following in to your kernel parameter list console=tty0, console=ttyS0,115200 Then connect a serial line to your serial port and to another machine and Look at the serial output with hyperterm or something. I didn't want to Do this at first, but it has made my life sooooo much easier. If you can't Do this, consider also that 2.6 kernel has netconsole. Netconsole can Send the same serial information over the network so you can see what is Failing. -----Original Message----- From: zhu shi song [mailto:zhushisongzhu at yahoo.com] Sent: Friday, September 03, 2004 9:25 AM To: Dave Aubin; linuxbios at clustermatic.org Subject: RE: use ramdisk as root file system I've made one initrd to try. But when executing at /sbin/init, linux halts. Output log is as following: RAMDISK: Compressed image found at block 0 Freeing initrd memory: 3687k freed VFS: Mounted root (ext2 filesystem) readonly. Freeing unused kernel memory: 64k freed Warning: unable to open an initial console. [end] By the way, using initramfs, can I have rw root fs on ramdisk? tks zhu --- Dave Aubin wrote: > Here is a good way to do initramfs. Initramfs becomes part of the > kernel and Then executes it's programs in user space which makes > things nice. But there Are other advantages as well. Feel free to > read these while on the > thrown;) > > http://linuxfromscratch.org/pipermail/lfs-hackers/2004-June/001424.html > http://seclists.org/lists/linux-kernel/2004/Jul/0154.html > http://lwn.net/Articles/14776/ > > For my needs initramfs is a life saver, but initrd is good too. Heck > you could Go NFS if you wish. > > Enjoy, > Dave:) > > > > -----Original Message----- > From: linuxbios-admin at clustermatic.org > [mailto:linuxbios-admin at clustermatic.org] On Behalf Of zhu shi song > Sent: Friday, September 03, 2004 6:53 AM > To: linuxbios at clustermatic.org > Subject: use ramdisk as root file system > > I now can boot my QDIA6T(vt8601/vt82c686b) MB using hard disk as root > file system though there is no vga turned on. But I don't need HD. I > hope I can mount RAMDisk as my root filesystem which can be read and > written. How should I do to start such work? I have read some > material about initrd but I don't understand it very clearly. > > tks > zhu > > > > > __________________________________ > Do you Yahoo!? > New and Improved Yahoo! Mail - 100MB free storage! > http://promotions.yahoo.com/new_mail > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > __________________________________ Do you Yahoo!? Read only the mail you want - Yahoo! Mail SpamGuard. http://promotions.yahoo.com/new_mail From peter at pantasys.com Fri Sep 3 11:24:00 2004 From: peter at pantasys.com (Peter Buckingham) Date: Fri Sep 3 11:24:00 2004 Subject: use ramdisk as root file system In-Reply-To: <20040903132431.43064.qmail@web13207.mail.yahoo.com> References: <20040903132431.43064.qmail@web13207.mail.yahoo.com> Message-ID: <41389ED1.6050902@pantasys.com> Hi zhu, zhu shi song wrote: > I've made one initrd to try. But when executing at > /sbin/init, linux halts. Output log is as following: > RAMDISK: Compressed image found at block 0 > Freeing initrd memory: 3687k freed > VFS: Mounted root (ext2 filesystem) readonly. > Freeing unused kernel memory: 64k freed > Warning: unable to open an initial console. > [end] i had similar problems initially. i have added the following options to boot/cmdline to get a standard ramdisk to work: load_ramdisk=1 initrd=rootfs.gz network root=/dev/ram0 ramdisk_size=536870912 let me know if that helps peter From stepan at openbios.org Fri Sep 3 13:38:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Fri Sep 3 13:38:01 2004 Subject: use ramdisk as root file system In-Reply-To: <41389ED1.6050902@pantasys.com> References: <20040903132431.43064.qmail@web13207.mail.yahoo.com> <41389ED1.6050902@pantasys.com> Message-ID: <20040903185512.GA25773@openbios.org> * Peter Buckingham [040903 18:41]: > Hi zhu, > > i had similar problems initially. i have added the following options to > boot/cmdline to get a standard ramdisk to work: > > load_ramdisk=1 initrd=rootfs.gz network root=/dev/ram0 > ramdisk_size=536870912 ^^^^^^^^^ 536 Megabytes? :-) Stefan From peter at pantasys.com Fri Sep 3 13:43:00 2004 From: peter at pantasys.com (Peter Buckingham) Date: Fri Sep 3 13:43:00 2004 Subject: use ramdisk as root file system In-Reply-To: <20040903185512.GA25773@openbios.org> References: <20040903132431.43064.qmail@web13207.mail.yahoo.com> <41389ED1.6050902@pantasys.com> <20040903185512.GA25773@openbios.org> Message-ID: <4138BF49.70302@pantasys.com> >>load_ramdisk=1 initrd=rootfs.gz network root=/dev/ram0 >>ramdisk_size=536870912 > > ^^^^^^^^^ 536 Megabytes? > :-) that is actually right, it was for some testing.. i could go into it but i'd have to kill you ;-) peter From jerj at coplanar.net Fri Sep 3 14:38:00 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Fri Sep 3 14:38:00 2004 Subject: Soldered flash part recommendations Message-ID: <4138CC3E.7000405@coplanar.net> Any suggestions? The top block swap in intel's ICH2 helps, but the ICH/ICH0 doesn't have that feature, and that's what the Dell Optiplex GX110 has. Has anyone run across a prototyping socket for a TSOP? -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From bari at onelabs.com Fri Sep 3 15:03:00 2004 From: bari at onelabs.com (Bari Ari) Date: Fri Sep 3 15:03:00 2004 Subject: Soldered flash part recommendations In-Reply-To: <4138CC3E.7000405@coplanar.net> References: <4138CC3E.7000405@coplanar.net> Message-ID: <4138D256.9030600@onelabs.com> Jeremy Jackson wrote: > Any suggestions? The top block swap in intel's ICH2 helps, but the > ICH/ICH0 doesn't have that feature, and that's what the Dell Optiplex > GX110 has. > > Has anyone run across a prototyping socket for a TSOP? How much space do you have for a ZIF TSOP socket? http://www.adapters.com/ -Bari From stuge-linuxbios at cdy.org Fri Sep 3 15:08:00 2004 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Fri Sep 3 15:08:00 2004 Subject: Soldered flash part recommendations In-Reply-To: <4138CC3E.7000405@coplanar.net> References: <4138CC3E.7000405@coplanar.net> Message-ID: <20040903202456.GA10910@foo.birdnet.se> On Fri, Sep 03, 2004 at 03:55:42PM -0400, Jeremy Jackson wrote: > Has anyone run across a prototyping socket for a TSOP? Yes. Emulation Technology has test sockets for TSOP packages. http://www.emulation.com/catalog/off-the-shelf_solutions/sockets/tsop/ I got a quote for single pieces at $15 or so a while back from a local distributor here in Sweden. //Peter From Trellix78 at aol.com Fri Sep 3 16:02:01 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Fri Sep 3 16:02:01 2004 Subject: use ramdisk as root file system Message-ID: <1CBD9410.5C45D4BA.029B16BB@aol.com> Here's a step-by-step way to do an initial ramdisk: Much of this is from memory an bits of notes. I'm assuming that the elfboot system is being used, along with kernel 2.4 or greater. The way I did it is to have the boot system interrupted in the ramdisk without ever getting to init, but it's simple to go all the way using the full init or the busybox version. Ok, here's how to build the ramdisk: 1. enable ramdisk and initial ramdisk support in the kernel 2. at the prompt, type (without quotes) "#>dd if=/dev/zero of=initrd bs=1k count=8000" that'll build an 8 megabyte ramdisk so substitute 8000 for the needed size 3. build the filesystem using: "#>/sbin/mke2fs -F -m0 initrd" 4. the file can then be mounted by typing "#>mount -t ext2 -o loop initrd /mnt/initrd" Make sure /mnt/initrd exists. 5. copy all needed files to /mnt/initrd The next part can be done a couple of different ways. One way is to have a script called linuxrc (or some other) in the root filesystem of initrd that sets everything up and then drops to a shell. Another way is to have init in the usual place, with /etc/inittab set to run a setup script, along with agetty to monitor the serial port. One other way is to use busybox's init. You can get an automatic login that way by just starting a shell on the console by having this in inittab: "ttyS0::respawn:/bin/sh". Busybox init can also run without an /etc/inittab file. It'll automatically detect that the console is on the serial port and put a shell there. Now, to booting with etherboot. Serial console support needs to be compiled into the kernel. I used mkelfImage from the freebios util directory to make a combined kernel and initrd elf image. Here's the actual command: #> mkelfImage --kernel= --ramdisk= --output= --command-line="root=0100 rw init=/linuxrc console=ttyS0,115200n8" The rw is there to enable initrd to be read/write. The init=/linuxrc should be taken out if /sbin/init is to be used. I used the major and minor numbers but root=/dev/ram0 can be used. Make sure ACPI is turned off the first time around. That should work. From jerj at coplanar.net Fri Sep 3 16:14:00 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Fri Sep 3 16:14:00 2004 Subject: Soldered flash part recommendations In-Reply-To: <4138D256.9030600@onelabs.com> References: <4138CC3E.7000405@coplanar.net> <4138D256.9030600@onelabs.com> Message-ID: <4138E2A7.8000906@coplanar.net> Another thought occurs... what about putting an SBC in the PCI slot? I guess the first issue would be making sure there's only one PCI bus arbiter. In the case of the SBC, is that usually on the backplane or the SBC motherboard? It would be real slick to pop the SBC into a motherboard with bad code in the soldered in flash chip, and re-flash it. Bari Ari wrote: > Jeremy Jackson wrote: > >> Any suggestions? The top block swap in intel's ICH2 helps, but the >> ICH/ICH0 doesn't have that feature, and that's what the Dell Optiplex >> GX110 has. >> >> Has anyone run across a prototyping socket for a TSOP? > > > How much space do you have for a ZIF TSOP socket? > > http://www.adapters.com/ -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From Trellix78 at aol.com Fri Sep 3 16:17:01 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Fri Sep 3 16:17:01 2004 Subject: epia-m VGA bios update Message-ID: <733204AC.60D5EF26.029B16BB@aol.com> I am still trying to get VGA output on an epia-M10000. I've tried many configurations and none actually work. Here's a part of the BIOS output log: Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu Sep 2 21:09:55 EDT 2004 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1106/3123] PCI: 00:01.0 [1106/b091] PCI: 00:0d.0 [1106/3044] PCI: 00:10.0 [1106/3038] PCI: 00:10.1 [1106/3038] PCI: 00:10.2 [1106/3038] PCI: 00:10.3 [1106/3104] PCI: 00:11.0 [1106/3177] PCI: 00:11.1 [1106/0571] PCI: 00:11.5 [1106/3059] PCI: 00:12.0 [1106/3065] PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [1106/3122] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done Allocating PCI resources... PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it PCI: 00:00.0 register 10(00000008), read-only ignoring it ASSIGN RESOURCES, bus 0 PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xf8000000 - 0xfbffffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfc000000 - 0xfcffffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:00.0 10 <- [0xf8000000 - 0xfbffffff] prefmem PCI: 01:00.0 14 <- [0xfc000000 - 0xfcffffff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:0d.0 10 <- [0xfd000000 - 0xfd0007ff] mem PCI: 00:0d.0 14 <- [0x00001800 - 0x0000187f] io PCI: 00:10.0 20 <- [0x00001880 - 0x0000189f] io PCI: 00:10.1 20 <- [0x000018a0 - 0x000018bf] io PCI: 00:10.2 20 <- [0x000018c0 - 0x000018df] io PCI: 00:10.3 10 <- [0xfd001000 - 0xfd0010ff] mem PCI: 00:11.1 20 <- [0x000018e0 - 0x000018ef] io PCI: 00:11.5 10 <- [0x00001000 - 0x000010ff] io PCI: 00:12.0 10 <- [0x00001400 - 0x000014ff] io PCI: 00:12.0 14 <- [0xfd002000 - 0xfd0020ff] mem ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:0d.0 cmd <- 83 PCI: 00:10.0 cmd <- 01 PCI: 00:10.1 cmd <- 01 PCI: 00:10.2 cmd <- 01 PCI: 00:10.3 cmd <- 02 PCI: 00:11.0 cmd <- 07 PCI: 00:11.1 cmd <- 07 PCI: 00:11.5 cmd <- 01 PCI: 00:12.0 cmd <- 83 PCI: 01:00.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized totalram: 96M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB Setting variable MTRR 1, base: 64MB, range: 32MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x09 Processor Mask : 0x00 Processor Stepping : 0x01 Feature flags : 0x0380b135 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Disabling local apic...done. CPU #0 Initialized Mainboard fixup Final mainboard fixup Southbridge fixup setting firewire Assigning IRQ 10 to 0:d.0 Readback = 10 setting usb Assigning IRQ 11 to 0:10.0 Readback = 11 Assigning IRQ 10 to 0:10.1 Readback = 10 Assigning IRQ 12 to 0:10.2 Readback = 12 Assigning IRQ 5 to 0:10.3 Readback = 5 setting vt8235 Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 12 to 0:11.5 Readback = 12 setting ethernet Assigning IRQ 11 to 0:12.0 Readback = 11 setting vga Assigning IRQ 11 to 1:0.0 Readback = 11 setting pci slot setting vt8235 slot Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 12 to 0:11.5 Readback = 12 INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1106, did=3122 write_protect_vgabios 0x55 0xaa 0x7d 0xe9 0x26 0x7f 0x5e 0x1b 0xfa 0xf9 0xf4 0x82 0x0 0x0 0x0 0x0 bus/devfn = 0x100 biosint: # 0x15, eax 0x5f00 ebx 0x100 ecx 0x100 edx 0x12 biosint: ebp 0x1191c esp 0xff2 edi 0xd96c esi 0x12230 biosint: ip 0x637f cs 0xc000 flags 0x46 biosint: # 0x1a, eax 0xb108 ebx 0x0 ecx 0x0 edx 0x3d5 biosint: ebp 0x1191c esp 0xfcc edi 0xf6 esi 0x155eb biosint: ip 0x40da cs 0xc000 flags 0x46 0xb108: bus 0 devfn 0x0 reg 0xf6 val 0x3 biosint: # 0x15, eax 0x5f02 ebx 0x100 ecx 0x101 edx 0x3d5 biosint: ebp 0x1191c esp 0xfb8 edi 0x44 esi 0x155eb biosint: ip 0x63cb cs 0xc000 flags 0x46 biosint: # 0x15, eax 0x5f02 ebx 0x100 ecx 0x101 edx 0x3d5 biosint: ebp 0x1191c esp 0xfb8 edi 0x44 esi 0x155eb biosint: ip 0x63cb cs 0xc000 flags 0x46 biosint: # 0x15, eax 0x5f02 ebx 0x100 ecx 0x101 edx 0x3d5 biosint: ebp 0x1191c esp 0xfb8 edi 0x44 esi 0x155eb biosint: ip 0x63cb cs 0xc000 flags 0x46 biosint: # 0x15, eax 0x5f0f ebx 0x100 ecx 0x100 edx 0x3d5 biosint: ebp 0x1191c esp 0xfee edi 0x44 esi 0x12230 biosint: ip 0x647e cs 0xc000 flags 0x2 biosint: # 0x15, eax 0x5f02 ebx 0x0 ecx 0x1 edx 0x0 biosint: ebp 0x1191c esp 0xfdc edi 0x44 esi 0x12230 biosint: ip 0x63cb cs 0xc000 flags 0x46 biosint: # 0xff, eax 0x707 ebx 0x0 ecx 0x700 edx 0x0 biosint: ebp 0x10fca esp 0xfbe edi 0xb9f0 esi 0x1010a biosint: ip 0x3333 cs 0xc000 flags 0x246 biosint: Unsupport int #0xff Checking IRQ routing tables... /home/dhillman/freebios-modified/src/arch/i386/lib/pirq_routing.c: 30:check_pirq_routing_table() - irq_routing_table located at: 0x00009360 done. Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 0000066c checksum e855 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 ------------------------------------------- What is that unsupport int 0xff? That's the only unusual thing that I see. It boots all the way to a login prompt on the serial port but nothing shows up on the monitor. It feels like I'm almost there. From snow2moutain at hotmail.com Sat Sep 4 01:44:01 2004 From: snow2moutain at hotmail.com (Chiu Gerald) Date: Sat Sep 4 01:44:01 2004 Subject: VGA Problem about 440bx chipset Message-ID: Wow! I got it! I use another S3 video card,and succeeded in bringing up the VGA,and booted RedHat linux. So wonderful linuxbios is! Richard Smith,thanks for your help very very much! >From: Richard Smith >To: LinuxBIOS >Subject: Re: VGA Problem about 440bx chipset >Date: Wed, 01 Sep 2004 10:04:52 -0500 > >Chiu Gerald wrote: > >>you mean that PCI card works? > >Yes some PCI cards work. I've made several Assiliant 65550 and >69000 >based PCI cards work and some S3 based cards work. There are >reports of >some ATI cards working but I am still having problems getting my ATI >M1 >based card to work. > >>Now I changed to a PCI video card,and bochs had run the vga >>bios,but still nothing happened! > >>I have no idea what should I do next. > >Are you setting up the shadowing correctly? You have to setup the >shadowing in loader.s or bochs and the video bios never make it into >ram. The stock ADLO setup won't work on the 440bx. > >I've attached my loader.s which sets up the shadowing correctly. > >Also the DEBUG_SERIAL option in rombios.c is very useful. You can >enable it and all the bochs bios messages will be redirected out the >serial port. This way you can see if bochs rombios is even getting >called. You have to turn it back off to get text on the VGA screen. >But your cards VSYNC should happen regardless. (assuming the vbios >runs >correctly) > >I leave in a few hours and won't be back till Tuesday the 2nd so you >are >on your own for a few days. I'll try to check email during that >time >but I'm not promising anything. > >Search the mailing list for things like "ADLO", "vgabios", etc there >are >several threads on getting this up. _________________________________________________________________ ?????????????? MSN Messenger: http://messenger.msn.com/cn From adam at cfar.umd.edu Sat Sep 4 09:30:01 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Sat Sep 4 09:30:01 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: Message-ID: <20040904105410.A50408-100000@www.missl.cs.umd.edu> is this with ADLO? neat! On Sat, 4 Sep 2004, Chiu Gerald wrote: > Wow! I got it! > I use another S3 video card,and succeeded in bringing up the VGA,and booted > RedHat linux. > So wonderful linuxbios is! > Richard Smith,thanks for your help very very much! > > > > >From: Richard Smith > >To: LinuxBIOS > >Subject: Re: VGA Problem about 440bx chipset > >Date: Wed, 01 Sep 2004 10:04:52 -0500 > > > >Chiu Gerald wrote: > > > >>you mean that PCI card works? > > > >Yes some PCI cards work. I've made several Assiliant 65550 and > >69000 > >based PCI cards work and some S3 based cards work. There are > >reports of > >some ATI cards working but I am still having problems getting my ATI > >M1 > >based card to work. > > > >>Now I changed to a PCI video card,and bochs had run the vga > >>bios,but still nothing happened! > > > >>I have no idea what should I do next. > > > >Are you setting up the shadowing correctly? You have to setup the > >shadowing in loader.s or bochs and the video bios never make it into > >ram. The stock ADLO setup won't work on the 440bx. > > > >I've attached my loader.s which sets up the shadowing correctly. > > > >Also the DEBUG_SERIAL option in rombios.c is very useful. You can > >enable it and all the bochs bios messages will be redirected out the > >serial port. This way you can see if bochs rombios is even getting > >called. You have to turn it back off to get text on the VGA screen. > >But your cards VSYNC should happen regardless. (assuming the vbios > >runs > >correctly) > > > >I leave in a few hours and won't be back till Tuesday the 2nd so you > >are > >on your own for a few days. I'll try to check email during that > >time > >but I'm not promising anything. > > > >Search the mailing list for things like "ADLO", "vgabios", etc there > >are > >several threads on getting this up. > > _________________________________________________________________ > ???????????????????????????? MSN Messenger: http://messenger.msn.com/cn > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From bari at onelabs.com Sat Sep 4 13:50:01 2004 From: bari at onelabs.com (Bari Ari) Date: Sat Sep 4 13:50:01 2004 Subject: Soldered flash part recommendations In-Reply-To: <4138E2A7.8000906@coplanar.net> References: <4138CC3E.7000405@coplanar.net> <4138D256.9030600@onelabs.com> <4138E2A7.8000906@coplanar.net> Message-ID: <413A12A8.4030702@onelabs.com> Jeremy Jackson wrote: > Another thought occurs... what about putting an SBC in the PCI slot? > I guess the first issue would be making sure there's only one PCI bus > arbiter. Or having a proper PCI bridge in place. In the case of the SBC, is that usually on the backplane or > the SBC motherboard? Backplanes and SBC's come however you spec them. > > It would be real slick to pop the SBC into a motherboard with bad code > in the soldered in flash chip, and re-flash it. Even if you had the proper PCI bridge setup the SBC would not be able to access the motherboard's flash since the motherboard's BIOS (in your example) is bad so the motherboard's hardware would not be properly initialized to handle the transaction. -Bari From jerj at coplanar.net Sat Sep 4 19:50:01 2004 From: jerj at coplanar.net (Jeremy Jackson) Date: Sat Sep 4 19:50:01 2004 Subject: Soldered flash part recommendations In-Reply-To: <413A12A8.4030702@onelabs.com> References: <4138CC3E.7000405@coplanar.net> <4138D256.9030600@onelabs.com> <4138E2A7.8000906@coplanar.net> <413A12A8.4030702@onelabs.com> Message-ID: <413A66CC.7080904@coplanar.net> Bari Ari wrote: > Even if you had the proper PCI bridge setup the SBC would not be able to > access the motherboard's flash since the motherboard's BIOS (in your > example) is bad so the motherboard's hardware would not be properly > initialized to handle the transaction. Well, at least from the host (CPU) 's prespective, the BIOS is the one thing that must be configured at power on reset. You're right though, there's no guarantee that a PCI master/bridge could access the BIOS without the host initializing things. My current thought is to do it the other way around, to have a PCI target on a plugin adapter, that decodes the BIOS region. At least on the i8xx ICH/ICH2, the southbridge powers up in subtractive decode mode. The datasheets describe this specific scenario as being possible. I haven't seen such a card on google, so i've been giving some thought to the following hacks: Option A: This wouldn't allow flashing the bios on a dead board, but it would allow getting Linuxbios working 100% before committing to the point of no return (flashing the soldered in part): Take a PCI NIC with a rom socket. put a switch on the PCI RESET# line. close the switch. boot from vendor bios. flash the NIC boot rom. set the NIC BAR to 0xffff0000. open the switch. reset the system. it will now use the NIC rom as the BIOS rom. Option B: As above, but set the BAR with the card in a working system. open the reset switch. keeping the card powered, put it in the dead system, and it should boot from the PCI card. Well there's some fantasy involved in this one :) Cheers, Jeremy -- Jeremy Jackson Coplanar Networks (519)897-1516 http://www.coplanar.net From Trellix78 at aol.com Sun Sep 5 04:05:01 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Sun Sep 5 04:05:01 2004 Subject: VIA fastboot MII debug message Message-ID: <3F27AA0D.6DE4F2AA.029B16BB@aol.com> I just found something interesting. I was playing around with VIA's fastboot debug USB-boot BIOS image for the Epia MII and came across a linuxbios message at the very end after the bootloader complained about not finding a suitable USB boot device. There is no such message in the IDE or CD-ROM images. The fastboot MII images are very fast but they don't work for the non-MII epia and I find it funny that VIA didn't include a way to use hooks like they did for the pre-MII fastboot. I say this because I've been struggling with CLE266 video and linuxbios while VIA releases binary-only images with a linuxbios message that don't work on the epia M. From snow2moutain at hotmail.com Sun Sep 5 08:00:01 2004 From: snow2moutain at hotmail.com (Chiu Gerald) Date: Sun Sep 5 08:00:01 2004 Subject: VGA Problem about 440bx chipset Message-ID: right. linuxbios+ADLO+Bochs >From: Adam Sulmicki >To: Chiu Gerald >CC: rsmith at bitworks.com, >Subject: Re: VGA Problem about 440bx chipset >Date: Sat, 4 Sep 2004 10:54:45 -0400 (EDT) > > >is this with ADLO? > >neat! > >On Sat, 4 Sep 2004, Chiu Gerald wrote: > > > Wow! I got it! > > I use another S3 video card,and succeeded in bringing up the VGA,and booted > > RedHat linux. > > So wonderful linuxbios is! > > Richard Smith,thanks for your help very very much! > > > > > > > > >From: Richard Smith > > >To: LinuxBIOS > > >Subject: Re: VGA Problem about 440bx chipset > > >Date: Wed, 01 Sep 2004 10:04:52 -0500 > > > > > >Chiu Gerald wrote: > > > > > >>you mean that PCI card works? > > > > > >Yes some PCI cards work. I've made several Assiliant 65550 and > > >69000 > > >based PCI cards work and some S3 based cards work. There are > > >reports of > > >some ATI cards working but I am still having problems getting my ATI > > >M1 > > >based card to work. > > > > > >>Now I changed to a PCI video card,and bochs had run the vga > > >>bios,but still nothing happened! > > > > > >>I have no idea what should I do next. > > > > > >Are you setting up the shadowing correctly? You have to setup the > > >shadowing in loader.s or bochs and the video bios never make it into > > >ram. The stock ADLO setup won't work on the 440bx. > > > > > >I've attached my loader.s which sets up the shadowing correctly. > > > > > >Also the DEBUG_SERIAL option in rombios.c is very useful. You can > > >enable it and all the bochs bios messages will be redirected out the > > >serial port. This way you can see if bochs rombios is even getting > > >called. You have to turn it back off to get text on the VGA screen. > > >But your cards VSYNC should happen regardless. (assuming the vbios > > >runs > > >correctly) > > > > > >I leave in a few hours and won't be back till Tuesday the 2nd so you > > >are > > >on your own for a few days. I'll try to check email during that > > >time > > >but I'm not promising anything. > > > > > >Search the mailing list for things like "ADLO", "vgabios", etc there > > >are > > >several threads on getting this up. > > > > _________________________________________________________________ > > ?????????????? MSN Messenger: http://messenger.msn.com/cn > > > > _______________________________________________ > > Linuxbios mailing list > > Linuxbios at clustermatic.org > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios _________________________________________________________________ ?????????????? MSN Messenger: http://messenger.msn.com/cn From adam at cfar.umd.edu Sun Sep 5 12:03:58 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Sun Sep 5 12:03:58 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: Message-ID: <20040905132511.W50408-100000@www.missl.cs.umd.edu> perhaps it would make sense to summarize "lessons learned" and send them to list, so that whoever will play with ADLO next can benefit from the knowledge Just put in all right keywords so that it is easie to find it later on, like ADLO, S3, etc. The shadow patch probably isn't big either. On Sun, 5 Sep 2004, Chiu Gerald wrote: > right. > > linuxbios+ADLO+Bochs > > >From: Adam Sulmicki > >To: Chiu Gerald > >CC: rsmith at bitworks.com, > >Subject: Re: VGA Problem about 440bx chipset > >Date: Sat, 4 Sep 2004 10:54:45 -0400 (EDT) > > > > > >is this with ADLO? > > > >neat! > > > >On Sat, 4 Sep 2004, Chiu Gerald wrote: > > > > > Wow! I got it! > > > I use another S3 video card,and succeeded in bringing up the VGA,and > booted > > > RedHat linux. > > > So wonderful linuxbios is! > > > Richard Smith,thanks for your help very very much! > > > > > > > > > > > > >From: Richard Smith > > > >To: LinuxBIOS > > > >Subject: Re: VGA Problem about 440bx chipset > > > >Date: Wed, 01 Sep 2004 10:04:52 -0500 > > > > > > > >Chiu Gerald wrote: > > > > > > > >>you mean that PCI card works? > > > > > > > >Yes some PCI cards work. I've made several Assiliant 65550 and > > > >69000 > > > >based PCI cards work and some S3 based cards work. There are > > > >reports of > > > >some ATI cards working but I am still having problems getting my ATI > > > >M1 > > > >based card to work. > > > > > > > >>Now I changed to a PCI video card,and bochs had run the vga > > > >>bios,but still nothing happened! > > > > > > > >>I have no idea what should I do next. > > > > > > > >Are you setting up the shadowing correctly? You have to setup the > > > >shadowing in loader.s or bochs and the video bios never make it into > > > >ram. The stock ADLO setup won't work on the 440bx. > > > > > > > >I've attached my loader.s which sets up the shadowing correctly. > > > > > > > >Also the DEBUG_SERIAL option in rombios.c is very useful. You can > > > >enable it and all the bochs bios messages will be redirected out the > > > >serial port. This way you can see if bochs rombios is even getting > > > >called. You have to turn it back off to get text on the VGA screen. > > > >But your cards VSYNC should happen regardless. (assuming the vbios > > > >runs > > > >correctly) > > > > > > > >I leave in a few hours and won't be back till Tuesday the 2nd so you > > > >are > > > >on your own for a few days. I'll try to check email during that > > > >time > > > >but I'm not promising anything. > > > > > > > >Search the mailing list for things like "ADLO", "vgabios", etc there > > > >are > > > >several threads on getting this up. > > > > > > _________________________________________________________________ > > > ???????????????????????????? MSN Messenger: > http://messenger.msn.com/cn > > > > > > _______________________________________________ > > > Linuxbios mailing list > > > Linuxbios at clustermatic.org > > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > > > >_______________________________________________ > >Linuxbios mailing list > >Linuxbios at clustermatic.org > >http://www.clustermatic.org/mailman/listinfo/linuxbios > > _________________________________________________________________ > ???????????????????????????? MSN Messenger: http://messenger.msn.com/cn > From rimy2000 at hotmail.com Mon Sep 6 00:47:00 2004 From: rimy2000 at hotmail.com (elife elife) Date: Mon Sep 6 00:47:00 2004 Subject: usbboot in EPIA-5000 Message-ID: Hi, I am trying to use baremetal/usbboot in EPIA-5000(I use the newest cvs of freebios) but fail: I only got endless "BOUNCE!". I check the code and see in uhci.c for(i=0; i<40; i++) { udelay(10000+usec_offset); value = inw(port); if(value & 0x02) { outw(value, port); i=0; DPRINTF("BOUNCE!\n"); } } What does this means and what should I do? The usb can work when I use lb+eb+kernel. Below is the log. Best Regards! Loading 192.168.2.157:usbboot.elf ...(ELF)... About to prepare segment [02000000,020280F0) ........................done rhine disable LinuxLabs USB bootloader Found LinuxBIOS table at: 500 raw frame_list is at 02020020 frame_list is at 02021000 frame_list_link: addr: 0201f030 frame_list_link: raw addr: 0201f030 frame_list_link: terminate: 0 frame_list_link: queue: 1 frame_list_link: depth: 0 dummy_td = 02016fc0 raw frame_list is at 02022020 frame_list is at 02023000 frame_list_link: addr: 0201f050 frame_list_link: raw addr: 0201f050 frame_list_link: terminate: 0 frame_list_link: queue: 1 frame_list_link: depth: 0 dummy_td = 02017000 raw frame_list is at 02024020 frame_list is at 02025000 frame_list_link: addr: 0201f070 frame_list_link: raw addr: 0201f070 frame_list_link: terminate: 0 frame_list_link: queue: 1 frame_list_link: depth: 0 dummy_td = 02017040 raw frame_list is at 02026020 frame_list is at 02027000 frame_list_link: addr: 0201f090 frame_list_link: raw addr: 0201f090 frame_list_link: terminate: 0 frame_list_link: queue: 1 frame_list_link: depth: 0 dummy_td = 02017080 Found UHCI at fffe Resetting UHCI clocks_per_usec: 640 hc_init setting framelist to: 02021000 Starting UHCI UHCI at fffe Found UHCI at fffe Resetting UHCI hc_init setting framelist to: 02023000 Starting UHCI UHCI at fffe Found UHCI at fffe Resetting UHCI hc_init setting framelist to: 02025000 Starting UHCI UHCI at fffe Connection on port 0010 BOUNCE! BOUNCE! ...... _________________________________________________________________ ??????????????? MSN Hotmail? http://www.hotmail.com From zhushisongzhu at yahoo.com Mon Sep 6 01:59:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Sep 6 01:59:01 2004 Subject: linuxbios can work on QDIA6T MB Message-ID: <20040906071657.97520.qmail@web13202.mail.yahoo.com> My linuxbios (V1) can boot my linux(linux-2.4.26) well. And I can login on serial tty. But vga can't work. There is still one problem that reboot linux make MB halt. When I reboot my linux, the MB halt while bios post code equal 0x10. tks zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - Send 10MB messages! http://promotions.yahoo.com/new_mail From zhushisongzhu at yahoo.com Mon Sep 6 05:40:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Mon Sep 6 05:40:01 2004 Subject: (no subject) Message-ID: <20040906105833.78420.qmail@web13203.mail.yahoo.com> I've got one QDIP2E MB(northbridge: Intel 82845E MCH southbridge: Intel 82801DB ICH4 ). I hope I can make linuxbios work on this MB. Who have done some work I can share? tks zhu __________________________________ Do you Yahoo!? Yahoo! Mail Address AutoComplete - You start. We finish. http://promotions.yahoo.com/new_mail From pyro at linuxlabs.com Mon Sep 6 10:23:00 2004 From: pyro at linuxlabs.com (Steven James) Date: Mon Sep 6 10:23:00 2004 Subject: usbboot in EPIA-5000 In-Reply-To: References: Message-ID: Greetings, bit 2 of that port flags a cionnect status change (something connected or disconnected). BOUNCE means that the the root hub is continually reporting a connect and disconnect in a short time. That's not uncommon in some hardware status and is known as a bounce. In this case, it's more likely that something isn't set up properly and the port is reading 0xffff which confuses the code. That code is/was more than a bit rough around the edges. You might want to look at filo+etherboot. Yinghai Lu merged the USB boot code into that, did a LOT of cleanup, and added OHCI support. G'day, sjames ||||| |||| ||||||||||||| ||| by Linux Labs International, Inc. Steven James, CTO 55 Marietta Street Suite 1830 Atlanta, Ga 30303 866 824 9737 support On Mon, 6 Sep 2004, elife elife wrote: > > Hi, > I am trying to use baremetal/usbboot in EPIA-5000(I use the newest cvs of > freebios) but fail: I only got endless "BOUNCE!". I check the code and see > in uhci.c > > for(i=0; i<40; i++) { > udelay(10000+usec_offset); > value = inw(port); > if(value & 0x02) { > outw(value, port); > i=0; > DPRINTF("BOUNCE!\n"); > } > } > What does this means and what should I do? The usb can work when I use > lb+eb+kernel. > > Below is the log. > > Best Regards! > > > Loading 192.168.2.157:usbboot.elf ...(ELF)... > About to prepare segment [02000000,020280F0) > ........................done > rhine disable > LinuxLabs USB bootloader > Found LinuxBIOS table at: 500 > raw frame_list is at 02020020 > frame_list is at 02021000 > frame_list_link: addr: 0201f030 > frame_list_link: raw addr: 0201f030 > frame_list_link: terminate: 0 > frame_list_link: queue: 1 > frame_list_link: depth: 0 > dummy_td = 02016fc0 > raw frame_list is at 02022020 > frame_list is at 02023000 > frame_list_link: addr: 0201f050 > frame_list_link: raw addr: 0201f050 > frame_list_link: terminate: 0 > frame_list_link: queue: 1 > frame_list_link: depth: 0 > dummy_td = 02017000 > raw frame_list is at 02024020 > frame_list is at 02025000 > frame_list_link: addr: 0201f070 > frame_list_link: raw addr: 0201f070 > frame_list_link: terminate: 0 > frame_list_link: queue: 1 > frame_list_link: depth: 0 > dummy_td = 02017040 > raw frame_list is at 02026020 > frame_list is at 02027000 > frame_list_link: addr: 0201f090 > frame_list_link: raw addr: 0201f090 > frame_list_link: terminate: 0 > frame_list_link: queue: 1 > frame_list_link: depth: 0 > dummy_td = 02017080 > Found UHCI at fffe > Resetting UHCI > clocks_per_usec: 640 > hc_init setting framelist to: 02021000 > Starting UHCI > UHCI at fffe > Found UHCI at fffe > Resetting UHCI > hc_init setting framelist to: 02023000 > Starting UHCI > UHCI at fffe > Found UHCI at fffe > Resetting UHCI > hc_init setting framelist to: 02025000 > Starting UHCI > UHCI at fffe > Connection on port 0010 > BOUNCE! > BOUNCE! > ...... > > _________________________________________________________________ > ?????????????????????????????? MSN Hotmail?? http://www.hotmail.com > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From Trellix78 at aol.com Mon Sep 6 17:12:00 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Mon Sep 6 17:12:00 2004 Subject: epia m vga + memcpy failed Message-ID: <3096CB91.7002CFDE.029B16BB@aol.com> I was trying to figure why VGA wasn't being properly set on my epia m when I found that the code in mainboard.c was looking for device id 0x3123 while my epia m has device id 0x3122 for the CLE266. After changing the id, memcpy is failing to copy the bios code. Anyone know why that could be? Here's a piece of the log: . . . setting ethernet Assigning IRQ 11 to 0:12.0 Readback = 11 setting vga Assigning IRQ 11 to 1:0.0 Readback = 11 setting pci slot setting vt8235 slot Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 12 to 0:11.5 Readback = 12 INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1106, did=3122 Setting up VGA, VGABIOS_START: 0xfffe0000 First 16 bytes of VGA_ROM: 0x55 0xaa 0x7d 0xe9 0x26 0x7f 0x5e 0x1b 0xfa 0xf9 0xf4 0x82 0x0 0x0 0x0 0x0 Failed to copy VGA BIOS to 0xc0000 First 16 bytes of 0xc0000: 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff setting VGA up anyway bus/devfn = 0x100 biosint: # 0x6, eax 0x100 ebx 0x100 ecx 0x100 edx 0x12 biosint: ebp 0x11a2c esp 0xff6 edi 0xda8c esi 0x12350 biosint: ip 0x3 cs 0xc000 flags 0x46 biosint: Oops, exception 6 Stack contents: 0x0003 0xc000 0x0046 0x4d75 0x0000 biosint: Bailing out Checking IRQ routing tables... . . . From rimy2000 at hotmail.com Mon Sep 6 17:20:01 2004 From: rimy2000 at hotmail.com (elife elife) Date: Mon Sep 6 17:20:01 2004 Subject: usbboot in EPIA-5000 Message-ID: Hi Steven, Thanks for your help. Another question: Where can I find Yinghai Lu's eb+filo+usbboot patch? I found a post of him in the lb archive(http://www.mail-archive.com/linuxbios at clustermatic.org/msg07219.html) but the link he gave is the diff against a patched eb tree. Best Regards! _________________________________________________________________ ?????????????? MSN Messenger: http://messenger.msn.com/cn From pyro at linuxlabs.com Mon Sep 6 17:43:01 2004 From: pyro at linuxlabs.com (Steven James) Date: Mon Sep 6 17:43:01 2004 Subject: usbboot in EPIA-5000 In-Reply-To: References: Message-ID: Greetings, The best one I have has one reject against the Makefile, but was fairly easy to fix-up. It compiles, but I can't test it yet (old board died, porting toa new one). I'll attach that off list if you want to try it. G'day, sjames ||||| |||| ||||||||||||| ||| by Linux Labs International, Inc. Steven James, CTO 55 Marietta Street Suite 1830 Atlanta, Ga 30303 866 824 9737 support On Mon, 6 Sep 2004, elife elife wrote: > > Hi Steven, > Thanks for your help. Another question: Where can I find Yinghai Lu's > eb+filo+usbboot patch? I found a post of him in the lb > archive(http://www.mail-archive.com/linuxbios at clustermatic.org/msg07219.html) > but the link he gave is the diff against a patched eb tree. > > Best Regards! > > _________________________________________________________________ > ?????????????? MSN Messenger: http://messenger.msn.com/cn > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From rimy2000 at hotmail.com Mon Sep 6 21:33:00 2004 From: rimy2000 at hotmail.com (elife elife) Date: Mon Sep 6 21:33:00 2004 Subject: lb+eb+filo in epia-5000 Message-ID: Hi, I am trying to use linuxbios+etherboot+filo to boot from usb stick. I use etherboot-5.2.4_btext_filo_usb.diff.bz2(Thanks, sjames). But the filo can't boot my kernel, below is th output: boot: uda1:/bzImage LinuxLabs USB bootloader New USB device, setting address 2 00000008:00000005:00000050 Manufacturor: USB Product: B???????? Serial: ????????~? boot: uda1:/bzImage Then I enable the debug info: [FILO]boot eax = 0xfbffffff boot ebx = 0xffffffff boot arg = 0xffffffff FILO version 0.4.1 (beatms at beatms) 2004Ä?? 09ÔÂ07ÈÕÐÇÆÚ¶þ Press for default boot, or for boot prompt... 2 1 timed out boot: uda1:/bzImage dev=uda1, path=/bzImage LinuxLabs USB bootloader Found UHCI at 00001c00 Resetting UHCI uhc_init setting framelist to: 036a5d10 Starting UHCI HCI at 00001c00 Found UHCI at 00001c20 Resetting UHCI uhc_init setting framelist to: 036a5d10 Starting UHCI HCI at 00001c20 frame_list is at ffffe2f0 frame_list_link: addr: 00058270 frame_list_link: raw addr: 036fdf80 frame_list_link: terminate: 00000000 frame_list_link: queue: 00000001 frame_list_link: depth: 00000000 frame_list is at ffffc2f0 frame_list_link: addr: 00058290 frame_list_link: raw addr: 036fdfa0 frame_list_link: terminate: 00000000 frame_list_link: queue: 00000001 frame_list_link: depth: 00000000 poll_usb1 i=0 poll_u_root_hub1 v=00000580 poll_u_root_hub1 v=00001493 poll_u_root_hub2 v=00001493 poll_u_root_hub21 v=00001493 Connection on port 00001c12 New USB device, setting address 2 uhci_control_msg: request_type = 00000000 request = 00000005 wLength=0 HCI at 00001c00 failed_transaction: TD(00050280): failed_transaction: type: SETUP failed_transaction: retries: 00000003 failed_transaction: IOC failed_transaction: active: 00000001 failed_transaction: device_addr: 00000000 failed_transaction: endpoint: 00000000 failed_transaction: data_toggle: 00000000 failed_transaction: max_transfer: 00000007 failed_transaction: actual: 00000000 failed_transaction: link: failed_transaction: ²ÿÿaddr: 000502a0 failed_transaction: ²ÿÿ raw addr: 036f5fb0 failed_transaction: ²ÿÿterminate: 00000000 failed_transaction: ²ÿÿqueue: 00000000 failed_transaction: ²ÿÿdepth: 00000000 failed_transaction: TD(000502a0): failed_transaction: type: IN failed_transaction: retries: 00000000 failed_transaction: active: 00000001 failed_transaction: device_addr: 00000000 failed_transaction: endpoint: 00000000 failed_transaction: data_toggle: 00000001 failed_transaction: max_transfer: 000007ff failed_transaction: actual: 00000000 failed_transaction: link: failed_transaction: addr: fc95a2f0 failed_transaction:  raw addr: 00000000 failed_transaction: terminate: 00000001 failed_transaction: queue: 00000000 failed_transaction: depth: 00000000 configure_device: set_address failed! poll_usb1 i=1 poll_u_root_hub1 v=00000180 poll_u_root_hub1 v=00000080 poll_usb1 i=0 poll_u_root_hub1 v=00000580 poll_u_root_hub1 v=00000493 poll_u_root_hub2 v=00000493 poll_u_root_hub21 v=00000493 Connection on port 00001c12 The usb stick works properly in lb+eb. What do above info mean and what should I do? Thanks a lot! _________________________________________________________________ ???????????????????????????? MSN Messenger: http://messenger.msn.com/cn From snow2moutain at hotmail.com Mon Sep 6 21:39:00 2004 From: snow2moutain at hotmail.com (Chiu Gerald) Date: Mon Sep 6 21:39:00 2004 Subject: epia m vga + memcpy failed Message-ID: Before memcpying,you need to shadow on 0xc0000-0xcffff ,please refer to your northbridge datasheet,and set a register on host-pci bridge(device 0) correctly ! >From: Trellix78 at aol.com >To: linuxbios at clustermatic.org >Subject: epia m vga + memcpy failed >Date: Mon, 06 Sep 2004 18:30:27 -0400 > >I was trying to figure why VGA wasn't being properly set on my epia m >when I found that the code in mainboard.c was looking for device id 0x3123 >while my epia m has device id 0x3122 for the CLE266. After changing >the id, memcpy is failing to copy the bios code. Anyone know why that >could be? Here's a piece of the log: >. >. >. >setting ethernet >Assigning IRQ 11 to 0:12.0 > Readback = 11 >setting vga >Assigning IRQ 11 to 1:0.0 > Readback = 11 >setting pci slot >setting vt8235 slot >Assigning IRQ 5 to 0:11.1 > Readback = 5 >Assigning IRQ 12 to 0:11.5 > Readback = 12 >INSTALL REAL-MODE IDT >DO THE VGA BIOS >found VGA: vid=1106, did=3122 >Setting up VGA, VGABIOS_START: 0xfffe0000 >First 16 bytes of VGA_ROM: 0x55 0xaa 0x7d 0xe9 0x26 0x7f 0x5e 0x1b 0xfa 0xf9 0xf4 0x82 0x0 0x0 0x0 0x0 >Failed to copy VGA BIOS to 0xc0000 >First 16 bytes of 0xc0000: 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff 0xff >setting VGA up anyway >bus/devfn = 0x100 >biosint: # 0x6, eax 0x100 ebx 0x100 ecx 0x100 edx 0x12 >biosint: ebp 0x11a2c esp 0xff6 edi 0xda8c esi 0x12350 >biosint: ip 0x3 cs 0xc000 flags 0x46 >biosint: Oops, exception 6 >Stack contents: 0x0003 0xc000 0x0046 0x4d75 0x0000 >biosint: Bailing out >Checking IRQ routing tables... >. >. >. >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios _________________________________________________________________ ?????????????? MSN Messenger: http://messenger.msn.com/cn From snow2moutain at hotmail.com Tue Sep 7 04:26:01 2004 From: snow2moutain at hotmail.com (Gerald Chiu) Date: Tue Sep 7 04:26:01 2004 Subject: Summarization on using ADLO to bring up VGA Message-ID: >perhaps it would make sense to summarize "lessons learned" and send them >to list, so that whoever will play with ADLO next can benefit from the >knowledge Ok,after Richard Smith's help ,I succeded in booting linux with VGA supported. Mainboard: intel 440bx Video Card: S3 Trio64V+ (PCI card) And Richard said that he made Assiliant 65550 and 69000 PCI cards work and some S3 based cards work on 440bx mainboard. I had tried to use a ATI PCI card,but failed when the program run into VGA Bios ,and never return back.I also having problem on bringing up AGP video card,although I had set some registers about AGP enabling(maybe I hadn't set correctly,anyway, I don't care AGP too much now). Prepare pirq,vga bios(get them from a running os),then use ADLO to copy them to proper address,maybe you need to modify loader.s about setting up shadowing. Attached loader.s which was modified by Richard Smith sets up the shadowing correctly. I used it and succeeded,too.Thanks. ;***************************************************** ; $Id: loader.s,v 1.1 2002/11/25 02:07:53 rminnich Exp $ ;***************************************************** USE32 ; code it is loaded into memory at 0x7C00 ;***************************************************** nop nop ;***************************************************** ; A) setup GDT, so that we do not depend on program ; that loaded us for GDT. ; Ex: LinuxBIOS and EtherBOOT use different GDT's. ;----------------------------------------------------- ; 0) cli ;----------------------------------------------------- ; I) lgdt [0x7C00+protected_gdt] ;----------------------------------------------------- ; II) setup CS jmp 0x08:0x7C00+newpgdt newpgdt: nop ;----------------------------------------------------- ; III) setup all other segments mov ax, #0x10 mov ss, ax mov ds, ax mov es, ax mov fs, ax mov gs, ax ;----------------------------------------------------- ; IV) ; not now ;sti ;***************************************************** nop nop ; Outputs a value to PCI config space ; put the bus,dev,function,offset in eax ; and the byte value in dl then call this macro MACRO PCI_CONFIG_WRITE_BYTE shl edx, #8 mov dl, al and dl, #3 shl edx, #16 or eax, #0x80000000 and eax, #0xfffffffc mov dx, #0x0cf8 out dx, eax shr edx, #16 mov al, dh mov dh, #0 add edx, #0x0cfc out dx, al MEND ;***************************************************** ; B) shadow - ON (enable/read/write) ; This is orginal shadowing setup code ; Works on the Matsonic 7308e mainboard ;mov eax, #0x80000070 ;mov dx, #0x0cf8 ;out dx, eax ;mov eax, #0xFFFFFFFF ;mov dx, #0x0cfc ;out dx, eax ; This enables shadowing for the 0x0f0000 - ; 0x0fffff range and the 0x0C0000 - 0x0cffff range ; for the 440bx chipset. mov eax, #0x59 mov edx, #0x20 PCI_CONFIG_WRITE_BYTE mov eax, #0x5A mov edx, #0x22 PCI_CONFIG_WRITE_BYTE mov eax, #0x5b mov edx, #0x22 PCI_CONFIG_WRITE_BYTE ;***************************************************** nop nop ;***************************************************** ; C) copy -- boch bios ; counter - 64kb. mov ecx, #0x10000 ; source - 0x8000 ( 0x7C00+0x400 = 0x8000 ) mov ax, #0x10 ; src-segment - 2nd entry in GDT mov ds, ax mov eax, #0x8000 ; src-offset - 0x8000 mov esi, eax ; destination - 0xF0000 mov ax, #0x10 ; dst-segment - 2nd entry in GDT mov es, ax mov eax, #0xF0000 ; dst-offset - 0xF0000 mov edi, eax ; clear direction flag cld ; the copy rep movsb ;***************************************************** nop nop ;***************************************************** ; D) copy -- video bios ; on my system video bios is just 48KB (0x0C000) ; but just for paranoida we copy 64kb (0X10000) ; counter - 64kb mov ecx, #0x10000 ; source - 0x18000 ( 0x8000+0x10000 = 0x18000 ) mov ax, #0x10 ; src-segment - 2nd entry in GDT mov ds, ax mov eax, #0x18000 ; src-offset - 0x18000 mov esi, eax ; destination - 0xC0000 mov ax, #0x10 ; dst-segment - 2nd entry in GDT mov es, ax mov eax, #0xC0000 ; dst-offset - 0xC0000 mov edi, eax ; clear direction flag cld ; the copy rep movsb ;***************************************************** nop nop ;***************************************************** ; E) copy -- pirq table ; on my system video bios is just 48KB (0x0C000) ; but just for paranoida we copy 64kb (0X10000) ; counter - 256kb -- 0x100 mov ecx, #0x100 ; source - 0x7F00 ( 0x7C00+0x300 = 0x7F00 ) mov ax, #0x10 ; src-segment - 2nd entry in GDT mov ds, ax mov eax, #0x7F00 ; src-offset - 0x7F00 mov esi, eax ; destination - 0xFFD00 mov ax, #0x10 ; dst-segment - 2nd entry in GDT mov es, ax mov eax, #0xFFD00 ; dst-offset - 0xFD00 mov edi, eax ; clear direction flag cld ; the copy rep movsb ;***************************************************** nop nop ;***************************************************** ; X) copy -- LinuxBIOS table into safe place. ;; TODO. ;; Q1 : what is the size of table. ;; Q2 : where to copy? ;***************************************************** nop nop ;***************************************************** ; E) shadow - OFF (write) mov eax, #0x59 mov edx, #0x30 PCI_CONFIG_WRITE_BYTE mov eax, #0x5A mov edx, #0x33 PCI_CONFIG_WRITE_BYTE mov eax, #0x5b mov edx, #0x33 PCI_CONFIG_WRITE_BYTE ;mov eax, #0x80000070 ;mov dx, #0x0cf8 ;out dx, eax ;mov eax, #0xFFFFFFFF ;mov eax, #0x0000FFFF ;mov dx, #0x0cfc ;out dx, eax ;***************************************************** nop nop ;***************************************************** ; F) do a little prep work. ;----------------------------------------------------- ; I) disable cache ; if you disable cache, GRUB's GFX mode will be VERY slow. ; so DO NOT DISABLE ;mov eax, cr0 ;or eax, #0x60000000 ;wbinvd ;mov cr0, eax ;wbinvd ;----------------------------------------------------- ; II) disable MTRR ; clear the "E" (0x800) and "FE" (0x400) flags in ; IA32_MTRRdefType register (0x2FF) ;----------------------- ;mov ECX,#0x2FF ; select either of the two below ; depending on if your compiler suports ; {RD,WR}MSR or not ;rdmsr ; .byte 0x0F, 0x32 ;xor edx, edx ; xor eax, eax ;and eax, #0xFFFFF3FF ; select either of the two below ; depending on if your compiler suports ; {RD,WR}MSR or not ;wrmsr ; .byte 0x0F, 0x30 ;----------------------- ;; This is what PC BIOS is setting. -- P6STMT. ; add VIDEO BIOS cacheable!!!! ;----------------------- ; Fixed Range C0--C8 ;mov ECX,#0x268 ;mov EDX,#0x05050505 ;mov EAX,#0x05050505 ;wrmsr ;----------------------- ; Fixed Range C8--CF ;mov ECX,#0x269 ;mov EDX,#0x0 ;mov EAX,#0x05050505 ;wrmsr ;----------------------- ;----------------------------------------------------- ; III) tell BOCHS' BIOS we want to boot from hdd. ; 0x00 - floppy ; 0x02 - hdd ; In future there will be 'fd failover'option in bochs. mov al, #0x3d ;; cmos_reg out 0x70, al mov al, #0x02 ;; val (hdd) out 0x71, al ;----------------------------------------------------- ; IV) tell BOCHS' BIOS length of our mem block @ 1mb. ; This is for Int 15 / EAX=E820 ; 119mb = 0x77 00 00 00 ; (this is for 128mb of ram) ; (FIXME: this value is currently hard coded) ; (it should be being passed from LinuxBIOS ) ; for WinFast 6300 ; 07 70 = 0770 ; 06 80 = 0770 - 00F0 << ALT (for unpatched bochs) ; for P6STMT - 10kb less ram ; 077F - 10 = 07 6F ; 07 6F - 00 F0 = 06 7F mov al, #0x35 ;; cmos_reg out 0x70, al mov al, #0x06 ;; val out 0x71, al mov al, #0x34 ;; cmos_reg out 0x70, al mov al, #0x7F ;; val out 0x71, al mov al, #0x31 ;; cmos_reg out 0x70, al mov al, #0x00 ;; val out 0x71, al mov al, #0x30 ;; cmos_reg out 0x70, al mov al, #0x00 ;; val out 0x71, al ;----------------------------------------------------- ; V) tell BOCHS' BIOS we want to have LBA translation. ; 0x00 - NONE ; 0x01 - LBA <<<< ; 0x02 - LARGE ; 0x03 - R-CHS ; In future there will be 'fd failover'option in bochs. mov al, #0x39 ;; cmos_reg out 0x70, al mov al, #0x01 ;; val (LBA) out 0x71, al ;***************************************************** nop nop ;***************************************************** ; G) the switch -- protected to real mode ; IASDM, Vol 3 ; (8-14) 8.8.2 Switching Back to Real-Address Mode ;===================================================== ; 1) disable interrupts cli ;===================================================== nop ;===================================================== ; 2) paging ;not enabled, so not applicable. ;===================================================== ; 3) setup CS segment limit (64kb) ; I) lgdt [0x7C00+new_gdt] ;----------------------------------------------------- ; II) jmp 0x08:0x7C00+new64lim new64lim: nop ;===================================================== nop ;===================================================== ; 4) setup all other segments mov ax, #0x10 mov ss, ax mov ds, ax mov es, ax mov fs, ax mov gs, ax ;===================================================== nop ;===================================================== ; 5) LIDT ; I) ; set up Real Mode IDT table (0...3FF) ; for BOCH's BIOS the address 0xF000:0xFF53 ; cantains value 0xCF which is IRET opcode. ; counter mov cx, #0xFF ;1024 bytes(255 interrupts)(4*255=0x3FF) ; destination - 0x00000 = ES:EDI mov ax, #0x10 ; dst-segment - 2nd entry in GDT mov es, ax mov eax, #0x00000 ; dst-offset - 0x00000 mov edi, eax ; data to store -- 0xF000:FF53 mov eax, #0xF000FF53 ; clear direction flag cld ; the store rep stosd ;----------------------------------------------------- ; II) ; load interrupt descriptor table lidt [0x7C00+new_idt] ;===================================================== nop nop ;===================================================== ; 6) clear the PE flag in CR0 register. ; I) ; switch to 16 bit segments mov ax, #0x20 mov ss, ax mov ds, ax mov es, ax mov fs, ax mov gs, ax ;----------------------------------------------------- ; II) ; switch to 16 bit CS jmp 0x018:0x7C00+new16bit USE16 new16bit: nop ;----------------------------------------------------- ; III) ; the switch ;xor eax, eax mov eax, cr0 and eax, #0xFFFFFFFE mov cr0, eax ;switch to RM ;===================================================== nop nop ;===================================================== ; 7) far jump -- (to real mode address) jmp 0x0:0x7C00+realcs realcs: nop ;===================================================== ; 8) set all segment registers to 0's mov ax, #0x0 mov ss, ax mov ds, ax mov es, ax mov fs, ax mov gs, ax ;===================================================== ; 9) re-enable interrupts sti ;***************************************************** nop nop ;***************************************************** ; G) jump to BIOS. jmp 0xFFFF:0x0000 ;jmp 0xF000:0xFFF0 ;***************************************************** ;***************************************************** nop nop nop nop ;***************************************************** ;***************************************************** USE32 new_idt: dw 0x03ff ;; limit 15:00 dw 0x0000 ;; base 15:00 dw 0x0000 ;; base 23:16 new_gdt: dw 0x0028 ;; limit 15:00 dw 0x7C00+new_gdt_table ;; base 15:00 dw 0x0000 ;; base 23:16 protected_gdt: dw 0x0018 ;; limit 15:00 dw 0x7C00+pmode_gdt_table ;; base 15:00 dw 0x0000 ;; base 23:16 ;----------------------------------------------------- new_gdt_table: ;// 1 2 3 4 ;//0 dd 0x00000000 dd 0x00000000 ;//8 dd 0x0000ffff dd 0x00409E00 ;//10 dd 0x0000ffff dd 0x00409200 ;//18 dd 0x0000ffff dd 0x00009a00 ;//20 dd 0x0000ffff dd 0x00009200 ;------------------------- pmode_gdt_table: ;// 1 2 3 4 ;//0 dd 0x00000000 dd 0x00000000 ;//8 dd 0x0000ffff dd 0x00CF9E00 ;//10 dd 0x0000ffff dd 0x00CF9200 ;***************************************************** ;***************************************************** ; the file size must be 1024 bytes. ; -0x100 b/c we put $PIR table here. .org 0x400-1-0x100 ; dd 0xdeadbeef db 0x0 ;***************************************************** _________________________________________________________________ ??????????????? MSN Hotmail? http://www.hotmail.com From snow2moutain at hotmail.com Tue Sep 7 04:52:01 2004 From: snow2moutain at hotmail.com (Gerald Chiu) Date: Tue Sep 7 04:52:01 2004 Subject: VGA Problem about 440bx chipset Message-ID: Hello,Adam, I have problem on booting win2000,but the ADLO status said win2k is fully supported. The information displayed on screen is below: =============== Please select the operating system to start: Microsoft Windows 2000 Professional Microsoft Windows 98 Use your arrow keys to move the highlight to your choice. Please touch Enter to choose. Seconds until highlighted choice will be started automatically: 0 For troubleshooting and advanced startup options for Windows 2000, press F8. ================ When I choose win2k and touch Enter,it halts, the screen even not change to show progress bar! When I choose win98 ,after showed the welcome logo,it halts with the cursor flashing on the left_upper corner of screen. I want to boot win2k, then could you give me some idea on debugging? >From: Adam Sulmicki >To: Chiu Gerald >CC: linuxbios at clustermatic.org >Subject: Re: VGA Problem about 440bx chipset >Date: Sun, 5 Sep 2004 13:26:32 -0400 (EDT) > > >perhaps it would make sense to summarize "lessons learned" and send them >to list, so that whoever will play with ADLO next can benefit from the >knowledge > >Just put in all right keywords so that it is easie to find it later on, >like ADLO, S3, etc. The shadow patch probably isn't big either. > > > >On Sun, 5 Sep 2004, Chiu Gerald wrote: > > > right. > > > > linuxbios+ADLO+Bochs > > > > >From: Adam Sulmicki > > >To: Chiu Gerald > > >CC: rsmith at bitworks.com, > > >Subject: Re: VGA Problem about 440bx chipset > > >Date: Sat, 4 Sep 2004 10:54:45 -0400 (EDT) > > > > > > > > >is this with ADLO? > > > > > >neat! > > > > > >On Sat, 4 Sep 2004, Chiu Gerald wrote: > > > > > > > Wow! I got it! > > > > I use another S3 video card,and succeeded in bringing up the VGA,and > > booted > > > > RedHat linux. > > > > So wonderful linuxbios is! > > > > Richard Smith,thanks for your help very very much! > > > > > > > > > > > > > > > > >From: Richard Smith > > > > >To: LinuxBIOS > > > > >Subject: Re: VGA Problem about 440bx chipset > > > > >Date: Wed, 01 Sep 2004 10:04:52 -0500 > > > > > > > > > >Chiu Gerald wrote: > > > > > > > > > >>you mean that PCI card works? > > > > > > > > > >Yes some PCI cards work. I've made several Assiliant 65550 and > > > > >69000 > > > > >based PCI cards work and some S3 based cards work. There are > > > > >reports of > > > > >some ATI cards working but I am still having problems getting my ATI > > > > >M1 > > > > >based card to work. > > > > > > > > > >>Now I changed to a PCI video card,and bochs had run the vga > > > > >>bios,but still nothing happened! > > > > > > > > > >>I have no idea what should I do next. > > > > > > > > > >Are you setting up the shadowing correctly? You have to setup the > > > > >shadowing in loader.s or bochs and the video bios never make it into > > > > >ram. The stock ADLO setup won't work on the 440bx. > > > > > > > > > >I've attached my loader.s which sets up the shadowing correctly. > > > > > > > > > >Also the DEBUG_SERIAL option in rombios.c is very useful. You can > > > > >enable it and all the bochs bios messages will be redirected out the > > > > >serial port. This way you can see if bochs rombios is even getting > > > > >called. You have to turn it back off to get text on the VGA screen. > > > > >But your cards VSYNC should happen regardless. (assuming the vbios > > > > >runs > > > > >correctly) > > > > > > > > > >I leave in a few hours and won't be back till Tuesday the 2nd so you > > > > >are > > > > >on your own for a few days. I'll try to check email during that > > > > >time > > > > >but I'm not promising anything. > > > > > > > > > >Search the mailing list for things like "ADLO", "vgabios", etc there > > > > >are > > > > >several threads on getting this up. > > > > > > > > _________________________________________________________________ > > > > ?????????????? MSN Messenger: > > http://messenger.msn.com/cn > > > > > > > > _______________________________________________ > > > > Linuxbios mailing list > > > > Linuxbios at clustermatic.org > > > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > > > > > > >_______________________________________________ > > >Linuxbios mailing list > > >Linuxbios at clustermatic.org > > >http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > _________________________________________________________________ > > ?????????????? MSN Messenger: http://messenger.msn.com/cn > > > >_______________________________________________ >Linuxbios mailing list >Linuxbios at clustermatic.org >http://www.clustermatic.org/mailman/listinfo/linuxbios _________________________________________________________________ ??????????????? MSN Hotmail? http://www.hotmail.com From adam at cfar.umd.edu Tue Sep 7 08:22:01 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Tue Sep 7 08:22:01 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: Message-ID: <20040907094632.W50408-100000@www.missl.cs.umd.edu> umm. that part was unfortunatelly a bit of black magic. make sure you have mouse on your ps2 port. win2k would freak out for some reason if it did not. also you may want to edit the win2k config files not to display that prompt but go straight to win2k and see if it helps. then you may want to play with timings in the IDE driver in bochs.. On Tue, 7 Sep 2004, Gerald Chiu wrote: > Hello,Adam, > I have problem on booting win2000,but the ADLO status said win2k is fully > supported. > > The information displayed on screen is below: > > =============== > Please select the operating system to start: > Microsoft Windows 2000 Professional > Microsoft Windows 98 > > Use your arrow keys to move the highlight to your choice. > Please touch Enter to choose. > Seconds until highlighted choice will be started automatically: 0 > For troubleshooting and advanced startup options for Windows 2000, press > F8. > ================ > > When I choose win2k and touch Enter,it halts, the screen even not change to > show progress bar! > When I choose win98 ,after showed the welcome logo,it halts with the cursor > flashing on the left_upper corner of screen. > > I want to boot win2k, then could you give me some idea on debugging? > > > >From: Adam Sulmicki > >To: Chiu Gerald > >CC: linuxbios at clustermatic.org > >Subject: Re: VGA Problem about 440bx chipset > >Date: Sun, 5 Sep 2004 13:26:32 -0400 (EDT) > > > > > >perhaps it would make sense to summarize "lessons learned" and send them > >to list, so that whoever will play with ADLO next can benefit from the > >knowledge > > > >Just put in all right keywords so that it is easie to find it later on, > >like ADLO, S3, etc. The shadow patch probably isn't big either. > > > > > > > >On Sun, 5 Sep 2004, Chiu Gerald wrote: > > > > > right. > > > > > > linuxbios+ADLO+Bochs > > > > > > >From: Adam Sulmicki > > > >To: Chiu Gerald > > > >CC: rsmith at bitworks.com, > > > >Subject: Re: VGA Problem about 440bx chipset > > > >Date: Sat, 4 Sep 2004 10:54:45 -0400 (EDT) > > > > > > > > > > > >is this with ADLO? > > > > > > > >neat! > > > > > > > >On Sat, 4 Sep 2004, Chiu Gerald wrote: > > > > > > > > > Wow! I got it! > > > > > I use another S3 video card,and succeeded in bringing up the > VGA,and > > > booted > > > > > RedHat linux. > > > > > So wonderful linuxbios is! > > > > > Richard Smith,thanks for your help very very much! > > > > > > > > > > > > > > > > > > > > >From: Richard Smith > > > > > >To: LinuxBIOS > > > > > >Subject: Re: VGA Problem about 440bx chipset > > > > > >Date: Wed, 01 Sep 2004 10:04:52 -0500 > > > > > > > > > > > >Chiu Gerald wrote: > > > > > > > > > > > >>you mean that PCI card works? > > > > > > > > > > > >Yes some PCI cards work. I've made several Assiliant 65550 and > > > > > >69000 > > > > > >based PCI cards work and some S3 based cards work. There are > > > > > >reports of > > > > > >some ATI cards working but I am still having problems getting my > ATI > > > > > >M1 > > > > > >based card to work. > > > > > > > > > > > >>Now I changed to a PCI video card,and bochs had run the vga > > > > > >>bios,but still nothing happened! > > > > > > > > > > > >>I have no idea what should I do next. > > > > > > > > > > > >Are you setting up the shadowing correctly? You have to setup the > > > > > >shadowing in loader.s or bochs and the video bios never make it > into > > > > > >ram. The stock ADLO setup won't work on the 440bx. > > > > > > > > > > > >I've attached my loader.s which sets up the shadowing correctly. > > > > > > > > > > > >Also the DEBUG_SERIAL option in rombios.c is very useful. You can > > > > > >enable it and all the bochs bios messages will be redirected out > the > > > > > >serial port. This way you can see if bochs rombios is even > getting > > > > > >called. You have to turn it back off to get text on the VGA > screen. > > > > > >But your cards VSYNC should happen regardless. (assuming the vbios > > > > > >runs > > > > > >correctly) > > > > > > > > > > > >I leave in a few hours and won't be back till Tuesday the 2nd so > you > > > > > >are > > > > > >on your own for a few days. I'll try to check email during that > > > > > >time > > > > > >but I'm not promising anything. > > > > > > > > > > > >Search the mailing list for things like "ADLO", "vgabios", etc > there > > > > > >are > > > > > >several threads on getting this up. > > > > > > > > > > _________________________________________________________________ > > > > > ???????????????????????????? MSN Messenger: > > > http://messenger.msn.com/cn > > > > > > > > > > _______________________________________________ > > > > > Linuxbios mailing list > > > > > Linuxbios at clustermatic.org > > > > > http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > > > > > > > > > >_______________________________________________ > > > >Linuxbios mailing list > > > >Linuxbios at clustermatic.org > > > >http://www.clustermatic.org/mailman/listinfo/linuxbios > > > > > > _________________________________________________________________ > > > ???????????????????????????? MSN Messenger: > http://messenger.msn.com/cn > > > > > > >_______________________________________________ > >Linuxbios mailing list > >Linuxbios at clustermatic.org > >http://www.clustermatic.org/mailman/listinfo/linuxbios > > _________________________________________________________________ > ?????????????????????????????? MSN Hotmail?? http://www.hotmail.com > From rminnich at lanl.gov Tue Sep 7 08:44:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 7 08:44:00 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: References: Message-ID: On Sat, 4 Sep 2004, Chiu Gerald wrote: > I use another S3 video card,and succeeded in bringing up the VGA,and booted > RedHat linux. a little email describing the whole procedure would be welcome. ron From rminnich at lanl.gov Tue Sep 7 08:48:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 7 08:48:00 2004 Subject: VIA fastboot MII debug message In-Reply-To: <3F27AA0D.6DE4F2AA.029B16BB@aol.com> References: <3F27AA0D.6DE4F2AA.029B16BB@aol.com> Message-ID: On Sun, 5 Sep 2004 Trellix78 at aol.com wrote: > I just found something interesting. I was playing around > with VIA's fastboot debug USB-boot BIOS image for the Epia MII and came across a linuxbios message at the very end after > the bootloader complained about not finding a suitable USB boot device. There is no such message in the IDE or CD-ROM > images. The fastboot MII images are very fast but they don't work for the non-MII epia and I find it funny that VIA didn't include a way to use hooks like they did for the pre-MII fastboot. I say this because I've been struggling with CLE266 video and linuxbios while VIA releases binary-only images with a linuxbios message that don't work on the epia M. any via people on this list care to comment? ron From rminnich at lanl.gov Tue Sep 7 08:55:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 7 08:55:01 2004 Subject: linuxbios can work on QDIA6T MB In-Reply-To: <20040906071657.97520.qmail@web13202.mail.yahoo.com> References: <20040906071657.97520.qmail@web13202.mail.yahoo.com> Message-ID: On Mon, 6 Sep 2004, zhu shi song wrote: > My linuxbios (V1) can boot my linux(linux-2.4.26) > well. And I can login on serial tty. But vga can't > work. There is still one problem that reboot linux > make MB halt. When I reboot my linux, the MB halt > while bios post code equal 0x10. 10 is a very early POST code from linuxbios, I would guess that the hardware is in a funny state. First, for reboot, we should be planning in the long term to use kexec. Second, for hard reset, I had patches long ago for power off and reset. I had stopped working on them because I assumed by now that linux would have native support (via ACPI or similar) for real hardware reset via the chipset. I was wrong. perhaps I need to revive my old code for newer linux. ron From rminnich at lanl.gov Tue Sep 7 09:01:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 7 09:01:00 2004 Subject: epia m vga + memcpy failed In-Reply-To: <3096CB91.7002CFDE.029B16BB@aol.com> References: <3096CB91.7002CFDE.029B16BB@aol.com> Message-ID: On Mon, 6 Sep 2004 Trellix78 at aol.com wrote: > I was trying to figure why VGA wasn't being properly set on my epia m > when I found that the code in mainboard.c was looking for device id 0x3123 > while my epia m has device id 0x3122 for the CLE266. After changing > the id, memcpy is failing to copy the bios code. Anyone know why that > could be? Here's a piece of the log: damn. shadow memory is not set up right. I am sorry, I keep forgetting, is this V1 or V2? ron From daniel at electricrain.com Tue Sep 7 10:06:01 2004 From: daniel at electricrain.com (Dan Sully) Date: Tue Sep 7 10:06:01 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: References: <20040828192921.GB8336@electricrain.com> Message-ID: <20040907152405.GA14244@electricrain.com> * ron minnich shaped the electrons to say... >> I've tried V2, but it just hangs when rebooted with no console or serial >> output. > >OK, I have an epia-m here and next week if there is time we'll try it out. Hi Ron - did ya'll get a chance to work on this at all? Thanks! -D -- You know, for kids. From yhlu at tyan.com Tue Sep 7 11:02:00 2004 From: yhlu at tyan.com (Yinghai Lu) Date: Tue Sep 7 11:02:00 2004 Subject: [Etherboot-developers] lb+eb+filo in epia-5000 In-Reply-To: Message-ID: <200409071501.i87F1jv25004@nwn.definitive.org> Are you using the last patch? What's your USB controller model and etc? Regards YH -----Original Message----- From: etherboot-developers-admin at lists.sourceforge.net [mailto:etherboot-developers-admin at lists.sourceforge.net] On Behalf Of elife elife Sent: Monday, September 06, 2004 7:50 PM To: etherboot-developers at lists.sourceforge.net Cc: linuxbios at clustermatic.org Subject: [Etherboot-developers] lb+eb+filo in epia-5000 Hi, I am trying to use linuxbios+etherboot+filo to boot from usb stick. I use etherboot-5.2.4_btext_filo_usb.diff.bz2(Thanks, sjames). But the filo can't boot my kernel, below is th output: boot: uda1:/bzImage LinuxLabs USB bootloader New USB device, setting address 2 00000008:00000005:00000050 Manufacturor: USB Product: B???????? Serial: ????????~? boot: uda1:/bzImage Then I enable the debug info: [FILO]boot eax = 0xfbffffff boot ebx = 0xffffffff boot arg = 0xffffffff FILO version 0.4.1 (beatms at beatms) 2004Ä? 09ÔÂ07ÈÕÐÇÆÚ¶þ Press for default boot, or for boot prompt... 2 1 timed out boot: uda1:/bzImage dev=uda1, path=/bzImage LinuxLabs USB bootloader Found UHCI at 00001c00 Resetting UHCI uhc_init setting framelist to: 036a5d10 Starting UHCI HCI at 00001c00 Found UHCI at 00001c20 Resetting UHCI uhc_init setting framelist to: 036a5d10 Starting UHCI HCI at 00001c20 frame_list is at ffffe2f0 frame_list_link: addr: 00058270 frame_list_link: raw addr: 036fdf80 frame_list_link: terminate: 00000000 frame_list_link: queue: 00000001 frame_list_link: depth: 00000000 frame_list is at ffffc2f0 frame_list_link: addr: 00058290 frame_list_link: raw addr: 036fdfa0 frame_list_link: terminate: 00000000 frame_list_link: queue: 00000001 frame_list_link: depth: 00000000 poll_usb1 i=0 poll_u_root_hub1 v=00000580 poll_u_root_hub1 v=00001493 poll_u_root_hub2 v=00001493 poll_u_root_hub21 v=00001493 Connection on port 00001c12 New USB device, setting address 2 uhci_control_msg: request_type = 00000000 request = 00000005 wLength=0 HCI at 00001c00 failed_transaction: TD(00050280): failed_transaction: type: SETUP failed_transaction: retries: 00000003 failed_transaction: IOC failed_transaction: active: 00000001 failed_transaction: device_addr: 00000000 failed_transaction: endpoint: 00000000 failed_transaction: data_toggle: 00000000 failed_transaction: max_transfer: 00000007 failed_transaction: actual: 00000000 failed_transaction: link: failed_transaction: ²ÿÿaddr: 000502a0 failed_transaction: ²ÿÿ raw addr: 036f5fb0 failed_transaction: ²ÿÿterminate: 00000000 failed_transaction: ²ÿÿqueue: 00000000 failed_transaction: ²ÿÿdepth: 00000000 failed_transaction: TD(000502a0): failed_transaction: type: IN failed_transaction: retries: 00000000 failed_transaction: active: 00000001 failed_transaction: device_addr: 00000000 failed_transaction: endpoint: 00000000 failed_transaction: data_toggle: 00000001 failed_transaction: max_transfer: 000007ff failed_transaction: actual: 00000000 failed_transaction: link: failed_transaction: addr: fc95a2f0 failed_transaction:  raw addr: 00000000 failed_transaction: terminate: 00000001 failed_transaction: queue: 00000000 failed_transaction: depth: 00000000 configure_device: set_address failed! poll_usb1 i=1 poll_u_root_hub1 v=00000180 poll_u_root_hub1 v=00000080 poll_usb1 i=0 poll_u_root_hub1 v=00000580 poll_u_root_hub1 v=00000493 poll_u_root_hub2 v=00000493 poll_u_root_hub21 v=00000493 Connection on port 00001c12 The usb stick works properly in lb+eb. What do above info mean and what should I do? Thanks a lot! _________________________________________________________________ ?????????????? MSN Messenger: http://messenger.msn.com/cn ------------------------------------------------------- This SF.Net email is sponsored by BEA Weblogic Workshop FREE Java Enterprise J2EE developer tools! Get your free copy of BEA WebLogic Workshop 8.1 today. http://ads.osdn.com/?ad_id=5047&alloc_id=10808&op=click _______________________________________________ Etherboot-developers mailing list Etherboot-developers at lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/etherboot-developers From rsmith at bitworks.com Tue Sep 7 12:52:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Tue Sep 7 12:52:00 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: <20040905132511.W50408-100000@www.missl.cs.umd.edu> References: <20040905132511.W50408-100000@www.missl.cs.umd.edu> Message-ID: <413DF991.8010701@bitworks.com> >> > Wow! I got it! >> > I use another S3 video card,and succeeded in bringing up the VGA,and Excellent. Its really touchy about what VBIOS will work and what won't. I haven't been able to narrow it down as to what the missing piece is yet. ATI seems to be the worst though. Probally because of all the bios extensions they use. > perhaps it would make sense to summarize "lessons learned" and send them > to list, so that whoever will play with ADLO next can benefit from the > knowledge Setting up a "known to work" table of chipsets vs cards may be a good idea as well. > Just put in all right keywords so that it is easie to find it later on, > like ADLO, S3, etc. The shadow patch probably isn't big either. After my initial post of the patch (about a 1.5 years ago) I never really tried to push the patch upstream since its chipset specific. What's really needed here is vga expansion rom shadowing support in the pci resource allocation code. So that you could do something like this in the config file. option SHADOW_VGA_BIOS=1 option SHADOW_VGA_BIOS_DEST=0xC0000 Then the mainboard chipset code could handle copying it from the PCI ROM to the shadow location and ADLO would not need to know anything about how to shadow for a specific chipset. I for one could really use this feature. I'd offer to code up an implementation for the 440bx but I don't have much of a clue on how the PCI resource allocation works. From rimy2000 at hotmail.com Tue Sep 7 17:26:01 2004 From: rimy2000 at hotmail.com (elife elife) Date: Tue Sep 7 17:26:01 2004 Subject: [Etherboot-developers] lb+eb+filo in epia-5000 Message-ID: Hi Yinghai Lu, I don't know whether I am using the last patch. Where can I find the last patch? I browse the eb's cvs tree but seems filo not merge yet. My hardware is VIA EPIA-5000 board. The output of lspci just said 00:00.0 Host bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia] (rev 05) 00:01.0 PCI bridge: VIA Technologies, Inc. VT8601 [Apollo ProMedia AGP] 00:11.0 ISA bridge: VIA Technologies, Inc. VT8231 [PCI-to-ISA Bridge] (rev 10) 00:11.1 IDE interface: VIA Technologies, Inc. VT82C586A/B/VT82C686/A/B/VT8233/A/C/VT8235 PIPC Bus Master IDE (rev 06) 00:11.2 USB Controller: VIA Technologies, Inc. USB (rev 1e) 00:11.3 USB Controller: VIA Technologies, Inc. USB (rev 1e) 00:11.4 Non-VGA unclassified device: VIA Technologies, Inc. VT8235 ACPI (rev 10)00:11.5 Multimedia audio controller: VIA Technologies, Inc. VT82C686 AC97 Audio Controller (rev 40) 00:11.6 Communication controller: VIA Technologies, Inc. Intel 537 [AC97 Modem] (rev 20) 00:12.0 Ethernet controller: VIA Technologies, Inc. VT6102 [Rhine-II] (rev 51) 01:00.0 VGA compatible controller: Trident Microsystems CyberBlade/i1 (rev 6a) And when I boot from lb, related boot info: usb.c: registered new driver usbdevfs usb.c: registered new driver hub host/usb-uhci.c: $Revision: 1.275 $ time 11:08:56 Sep 6 2004 host/usb-uhci.c: High bandwidth mode enabled PCI: Found IRQ 11 for device 00:11.2 IRQ routing conflict for 00:11.2, have irq 12, want irq 11 IRQ routing conflict for 00:11.3, have irq 12, want irq 11 PCI: Sharing IRQ 11 with 00:12.0 host/usb-uhci.c: USB UHCI at I/O 0x1c00, IRQ 12 host/usb-uhci.c: Detected 2 ports usb.c: new USB bus registered, assigned bus number 1 hub.c: USB hub found hub.c: 2 ports detected PCI: Found IRQ 11 for device 00:11.3 IRQ routing conflict for 00:11.2, have irq 12, want irq 11 IRQ routing conflict for 00:11.3, have irq 12, want irq 11 PCI: Sharing IRQ 11 with 00:12.0 host/usb-uhci.c: USB UHCI at I/O 0x1c20, IRQ 12 host/usb-uhci.c: Detected 2 ports usb.c: new USB bus registered, assigned bus number 2 hub.c: USB hub found hub.c: 2 ports detected host/usb-uhci.c: v1.275:USB Universal Host Controller Interface driver Thanks a lot! >From: "Yinghai Lu" >To: "'elife elife'" , >CC: >Subject: RE: [Etherboot-developers] lb+eb+filo in epia-5000 >Date: Tue, 7 Sep 2004 09:19:57 -0700 > >Are you using the last patch? > >What's your USB controller model and etc? > >Regards > >YH > _________________________________________________________________ ???? MSN Explorer: http://explorer.msn.com/lccn/ From rminnich at lanl.gov Tue Sep 7 17:37:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Sep 7 17:37:00 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: <20040907152405.GA14244@electricrain.com> Message-ID: On Tue, 7 Sep 2004, Dan Sully wrote: > Hi Ron - did ya'll get a chance to work on this at all? no, sorry, will try this week :-) ron From rminnich at lanl.gov Tue Sep 7 17:43:00 2004 From: rminnich at lanl.gov (ron minnich) Date: Tue Sep 7 17:43:00 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: <413DF991.8010701@bitworks.com> Message-ID: On Tue, 7 Sep 2004, Richard Smith wrote: > option SHADOW_VGA_BIOS=1 > option SHADOW_VGA_BIOS_DEST=0xC0000 we'll put this on the list, though not quite this way (unless you want it in V1) ron From rsmith at bitworks.com Tue Sep 7 18:11:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Tue Sep 7 18:11:00 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: References: Message-ID: <413E4445.90707@bitworks.com> ron minnich wrote: >>option SHADOW_VGA_BIOS=1 >>option SHADOW_VGA_BIOS_DEST=0xC0000 > > we'll put this on the list, though not quite this way (unless you want it > in V1) Well until myself or some other industrious soul ports the 440bx stuff to V2 its not much use to me unless its V1. It dosen't really matter to me how its implemented in V1. If you have what you think is the "right" way then I'm game. And if someone will guide me through what needs to be done in the PCI allocation stuff I'll give it a whirl but at first blush that PCI allocation stuff appears fairly complex. I guess the part I need help on would be the methodology of the ROM expansion address assignment. The actual copy seems pretty trivial. - Scan for the id of the vga device. - Get the rom address and enable the decode. - set the shadowing. - do the copy. - disable writes to the shadow. - disable the ROM decode. Yes? From Trellix78 at aol.com Tue Sep 7 18:57:00 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Tue Sep 7 18:57:00 2004 Subject: epia m vga + memcpy failed Message-ID: <15B776C9.406006B6.029B16BB@aol.com> That message is from the original freebios. I was thinking that shadowing is not corretly set up and that maybe the segment is write-protected. After setting up shadowing, the chipset my turn on write protection by default, anyway. I don't know how to turn write protection off specifically for the C00000 segment. So far, the only reference that I can find about write protection is in the Pentium developer's manual. It says to have bit 16 of CR0 be zero to turn off write protection. From jbors at mail.ru Tue Sep 7 21:30:01 2004 From: jbors at mail.ru (Dmitry Borisov) Date: Tue Sep 7 21:30:01 2004 Subject: EPIA-M build problem for freebios2 References: Message-ID: <008c01c4954e$589b7fb0$0200a8c0@amr.corp.intel.com> From: "ron minnich" To: "Dan Sully" Cc: "Stefan Reinauer" ; Sent: Tuesday, September 07, 2004 3:54 PM Subject: Re: EPIA-M build problem for freebios2 > On Tue, 7 Sep 2004, Dan Sully wrote: > > > Hi Ron - did ya'll get a chance to work on this at all? > > no, sorry, will try this week :-) > > ron C'mon Ron, You just lazy. Jump on it ! Dmitry/ From stuge-linuxbios at cdy.org Tue Sep 7 21:52:01 2004 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Tue Sep 7 21:52:01 2004 Subject: epia m vga + memcpy failed In-Reply-To: <15B776C9.406006B6.029B16BB@aol.com> References: <15B776C9.406006B6.029B16BB@aol.com> Message-ID: <20040908031020.GA20106@foo.birdnet.se> On Tue, Sep 07, 2004 at 08:15:47PM -0400, Trellix78 at aol.com wrote: > That message is from the original freebios. I was thinking that > shadowing is not corretly set up and that maybe the > segment is write-protected. After setting up shadowing, > the chipset my turn on write protection by default, anyway. I > don't know how to turn write protection off specifically for the > C00000 segment. So far, the only reference that I can find about > write protection is in the Pentium developer's manual. It says to > have bit 16 of CR0 be zero to turn off write protection. That's controlled by the descriptor table flags for the particular descriptor in use. (cs/ds/es) Trying to write to protected memory would cause a page fault that LB probably doesn't recover from. (Are PF:s handled at all?) //Peter From stuge-linuxbios at cdy.org Tue Sep 7 21:56:00 2004 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Tue Sep 7 21:56:00 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: <008c01c4954e$589b7fb0$0200a8c0@amr.corp.intel.com> References: <008c01c4954e$589b7fb0$0200a8c0@amr.corp.intel.com> Message-ID: <20040908031457.GB20106@foo.birdnet.se> On Tue, Sep 07, 2004 at 07:48:38PM -0700, Dmitry Borisov wrote: > > > > > Hi Ron - did ya'll get a chance to work on this at all? > > > > no, sorry, will try this week :-) > > > > ron > > C'mon Ron, > You just lazy. Jump on it ! > Dmitry/ Dmitry, I believe most readers on the list do understand that this was just a joke, but you could've afforded a smiley anyway. I'm just glad that LANL employees are back in the LB business since they have a lot of useful knowledge and experience with the project! //Peter From rminnich at lanl.gov Tue Sep 7 22:06:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 7 22:06:01 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: <413E4445.90707@bitworks.com> References: <413E4445.90707@bitworks.com> Message-ID: > It dosen't really matter to me how its implemented in V1. If you have what you > think is the "right" way then I'm game. And if someone will guide me through > what needs to be done in the PCI allocation stuff I'll give it a whirl but at > first blush that PCI allocation stuff appears fairly complex. For V1, we're not too worried about pretty. I'll try to work up an example for you. ron From jbors at mail.ru Tue Sep 7 22:09:00 2004 From: jbors at mail.ru (Dmitry Borisov) Date: Tue Sep 7 22:09:00 2004 Subject: EPIA-M build problem for freebios2 References: <008c01c4954e$589b7fb0$0200a8c0@amr.corp.intel.com> <20040908031457.GB20106@foo.birdnet.se> Message-ID: <00d601c49553$d0364be0$0200a8c0@amr.corp.intel.com> :) ----- Original Message ----- To: Sent: Tuesday, September 07, 2004 8:14 PM Subject: Re: EPIA-M build problem for freebios2 > > Dmitry, I believe most readers on the list do understand that this > was just a joke, but you could've afforded a smiley anyway. > > I'm just glad that LANL employees are back in the LB business since > they have a lot of useful knowledge and experience with the project! > From rminnich at lanl.gov Tue Sep 7 22:10:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 7 22:10:01 2004 Subject: EPIA-M build problem for freebios2 In-Reply-To: <008c01c4954e$589b7fb0$0200a8c0@amr.corp.intel.com> References: <008c01c4954e$589b7fb0$0200a8c0@amr.corp.intel.com> Message-ID: > C'mon Ron, > You just lazy. Jump on it ! > Dmitry/ I would but it really cuts into my nap time :-) ron From rminnich at lanl.gov Tue Sep 7 22:11:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 7 22:11:01 2004 Subject: epia m vga + memcpy failed In-Reply-To: <20040908031020.GA20106@foo.birdnet.se> References: <15B776C9.406006B6.029B16BB@aol.com> <20040908031020.GA20106@foo.birdnet.se> Message-ID: On Wed, 8 Sep 2004, Peter Stuge wrote: > On Tue, Sep 07, 2004 at 08:15:47PM -0400, Trellix78 at aol.com wrote: > > That message is from the original freebios. I was thinking that > > shadowing is not corretly set up and that maybe the > > segment is write-protected. After setting up shadowing, > > the chipset my turn on write protection by default, anyway. I > > don't know how to turn write protection off specifically for the > > C00000 segment. So far, the only reference that I can find about > > write protection is in the Pentium developer's manual. It says to > > have bit 16 of CR0 be zero to turn off write protection. > > That's controlled by the descriptor table flags for the particular > descriptor in use. (cs/ds/es) ah,well, sorta. There are north bridge issues. There are lots of ways in the x86 architecture for writes to fail ... > Trying to write to protected memory would cause a page fault that > LB probably doesn't recover from. (Are PF:s handled at all?) no, that's not necessarily the case ... ron From ian at abelon.com Wed Sep 8 02:26:01 2004 From: ian at abelon.com (Ian Smith) Date: Wed Sep 8 02:26:01 2004 Subject: epia m vga + memcpy failed In-Reply-To: <15B776C9.406006B6.029B16BB@aol.com> References: <15B776C9.406006B6.029B16BB@aol.com> Message-ID: <6.1.2.0.2.20040908083548.02ed39a8@mail.abelon.com> At 01:15 08/09/2004, Trellix78 at aol.com wrote: >That message is from the original freebios. I was thinking that shadowing >is not corretly set up and that maybe the >segment is write-protected. After setting up shadowing, >the chipset my turn on write protection by default, anyway. I don't know >how to turn write protection off specifically for the C00000 segment. So >far, the only reference that I can find about write protection is in the >Pentium developer's manual. It says to have bit 16 of CR0 be zero to turn >off write protection. On the VIA VT8622/8623 you need to write 0xFF to Device 0, offset 0x61, and this will write enable the shadow RAM area 0xC0000-0xCFFFF. To write protect it afterwards write 0xAA to the same register. BTW - according to the datasheet both read and write are disabled by default (same goes for all shadow RAM areas) Cheers Ian From sagivy at 3vium.com Wed Sep 8 03:13:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Wed Sep 8 03:13:01 2004 Subject: tyan-s2850 Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A70@cronos.trivium> I am trying to build target to tyan-s2850 and there is a compilation error: setup_default_resource_map undeclared The problem is that there is no src/mainboard/tyan/s2850/resourcemap.c What should I do ? thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: From sagivy at 3vium.com Wed Sep 8 04:15:00 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Wed Sep 8 04:15:00 2004 Subject: elf for tyan s2850 Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A71@cronos.trivium> What elf file should I use for tyan s2850 ? thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: From zhushisongzhu at yahoo.com Wed Sep 8 07:26:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Wed Sep 8 07:26:01 2004 Subject: port linuxbios(v1) to i845GV based MB Message-ID: <20040908124448.98251.qmail@web13206.mail.yahoo.com> intel i845GV is very popular now. I've got P4i45GV MB based on i845GV(northbridge:i845GV, southbridge:82801db, superio: winfast w83627hf ). I try to port linuxbios(v1) to this board. Today I have built my first romimage for it. There met one problem when using it to boot. Serial output is unreadable code. I have checked the baud rate it's ok. Maybe setup_serial has some bug. tks zhu _______________________________ Do you Yahoo!? Win 1 of 4,000 free domain names from Yahoo! Enter now. http://promotions.yahoo.com/goldrush From Trellix78 at aol.com Wed Sep 8 07:37:01 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Wed Sep 8 07:37:01 2004 Subject: epia m vga + memcpy update Message-ID: <65.3320c719.2e705b24@aol.com> hate to be clogging up the list but memcpy works!! It looks like the VT8622/8623/8635 all have the same way of dealing with this shadow copy stuff. After losing a couple of hours sleep, I've hit another snag here (partial log): ==================================== setting pci slot setting vt8235 slot Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 12 to 0:11.5 Readback = 12 INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1106, did=3122 Setting up VGA, VGABIOS_START: 0xfffc0000 write_protect_vgabios Looks like VGA_ROM is good: 0x55 0xaa VGA copy looks good bus/devfn = 0x100 biosint: # 0x15, eax 0x5f00 ebx 0x100 ecx 0x100 edx 0x12 biosint: ebp 0x138dc esp 0xff2 edi 0xf934 esi 0x141f8 biosint: ip 0x637f cs 0xc000 flags 0x46 calling handleint21() done with handleint21() returning from biosint()...ret=-1 biosint: # 0x1a, eax 0xb108 ebx 0x0 ecx 0x0 edx 0x3d5 biosint: ebp 0x138dc esp 0xfcc edi 0xf6 esi 0x155eb biosint: ip 0x40da cs 0xc000 flags 0x46 calling pcibios() 0xb108: bus 0 devfn 0x0 reg 0xf6 val 0x3 done with pcibios() returning from biosint()...ret=0 ================================================= I've tried to put some debugging outputs but the system just grinds to a halt after the second call to biosint(). It's now my belief that directly manipulating the registers on the Apollo CLE266 northbridge might yield better results for the epia M. VIA doesn't seem inclined to give out the datasheets or source code, as the posts on viaarena indicate. I wonder if looking at the linux driver patches for kernel 2.4 and greater might offer some clues. Any help would be greatly appreciated! -------------- next part -------------- An HTML attachment was scrubbed... URL: From beltsw at mindspring.com Wed Sep 8 07:43:00 2004 From: beltsw at mindspring.com (Dave Belt) Date: Wed Sep 8 07:43:00 2004 Subject: Windows over LinuxBIOS Message-ID: <001501c495a3$fdf77f40$6401a8c0@BeltCo4> I have a customer building a custom PC based board. I have been presenting LinuxBIOS as a viable BIOS option; however, they have a serious interest in running Windows, likely 2K & XP, on this board. Does anybody have experience in this area to share? I'm currently trying to get a grasp of the effort required beyond the LinuxBIOS port itself. Also, what kind of reliability are you getting with your implementation? Any info you could provide would be much appreciated. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Wed Sep 8 08:29:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Wed Sep 8 08:29:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <65.3320c719.2e705b24@aol.com> References: <65.3320c719.2e705b24@aol.com> Message-ID: ok, I hate to say this, but I think you should run linuxbios without the vga stuff, boot linux, and run that vgabios under testbios and see if that is better. This will let you know if the vgabios is doing something really weird. ron From stepan at openbios.org Wed Sep 8 08:51:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Sep 8 08:51:01 2004 Subject: port linuxbios(v1) to i845GV based MB In-Reply-To: <20040908124448.98251.qmail@web13206.mail.yahoo.com> References: <20040908124448.98251.qmail@web13206.mail.yahoo.com> Message-ID: <20040908141002.GA1400@openbios.org> * zhu shi song [040908 14:44]: > intel i845GV is very popular now. I've got P4i45GV MB > based on i845GV(northbridge:i845GV, > southbridge:82801db, superio: winfast w83627hf ). I > try to port linuxbios(v1) to this board. Today I have > built my first romimage for it. There met one problem > when using it to boot. Serial output is unreadable > code. I have checked the baud rate it's ok. Maybe > setup_serial has some bug. Some mainboards need to do some magic for baud rate setting or otherwise the actual baud rate is only half of what is specified. If you see something at all you are almost there Stefan From sagivy at 3vium.com Wed Sep 8 09:26:00 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Wed Sep 8 09:26:00 2004 Subject: winbond 83782D Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A72@cronos.trivium> I need to build rom for tyan2850 with superio - winbond 83782D. Where can I get sources ? -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Wed Sep 8 09:36:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Sep 8 09:36:00 2004 Subject: winbond 83782D In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A72@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A72@cronos.trivium> Message-ID: <20040908145440.GA3120@openbios.org> * Sagiv Yefet [040908 17:48]: > I need to build rom for tyan2850 with superio - winbond 83782D. > Where can I get sources ? In CVS or at http://snapshots.linuxbios.org Stefan From rsmith at bitworks.com Wed Sep 8 09:59:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Wed Sep 8 09:59:01 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: References: <413E4445.90707@bitworks.com> Message-ID: <413F22A6.6010401@bitworks.com> Ronald G. Minnich wrote: I'm changing the subject to something more specific. >>think is the "right" way then I'm game. And if someone will guide me through >>what needs to be done in the PCI allocation stuff I'll give it a whirl but at >>first blush that PCI allocation stuff appears fairly complex. > > For V1, we're not too worried about pretty. I'll try to work up an example > for you. Dude, you've got plenty to do.... A few rough explanations on whats going on may be all I need. I dug through the PCI code last night and I seem to be getting the jist of how it goes. I don't quite yet grok the actual allocation "scheme" but the magic seems to be happening in pci_set_resource() in linuxpci.c and compute_allocate_resource in newpci.c. Neither of these seem to understand expansion roms. What resource flags will be set for a device with expansion roms? MEM? but with perhaps with IORESOURCE_SHADOWABLE? I don't see anything specific to expansion roms. The red book so far hasn't been much help. Or I just haven't found the right section. Eric (or anybody else): where did you get your info when you re-factored all this code? From rsmith at bitworks.com Wed Sep 8 10:10:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Wed Sep 8 10:10:01 2004 Subject: epia m vga + memcpy update In-Reply-To: References: <65.3320c719.2e705b24@aol.com> Message-ID: <413F251F.1060503@bitworks.com> Ronald G. Minnich wrote: > ok, I hate to say this, but I think you should run linuxbios without the > vga stuff, boot linux, and run that vgabios under testbios and see if that > is better. This will let you know if the vgabios is doing something really > weird. If you have the space. Try X >= 4.3 as well and use: option "InitPrimary" "true" in the Screens section. It's my experience that on some cards X will bring the card to life when testbios won't. From YhLu at tyan.com Wed Sep 8 11:08:00 2004 From: YhLu at tyan.com (YhLu) Date: Wed Sep 8 11:08:00 2004 Subject: tyan-s2850 Message-ID: <3174569B9743D511922F00A0C94314230624B878@TYANWEB> You need to include northbridge/amd/amdk8/resourcemap.c in the auto.c Someone split the function from raminit.c Regards Yinghai Lu _____ From: Sagiv Yefet [mailto:sagivy at 3vium.com] Sent: Wednesday, September 08, 2004 2:35 AM To: linuxbios at clustermatic.org Subject: tyan-s2850 I am trying to build target to tyan-s2850 and there is a compilation error: setup_default_resource_map undeclared The problem is that there is no src/mainboard/tyan/s2850/resourcemap.c What should I do ? thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: From YhLu at tyan.com Wed Sep 8 11:13:01 2004 From: YhLu at tyan.com (YhLu) Date: Wed Sep 8 11:13:01 2004 Subject: elf for tyan s2850 Message-ID: <3174569B9743D511922F00A0C94314230624B87A@TYANWEB> Elf may come from FILO, Etherboot, FILO with Ethrboot. The onboard Broadcom NIC doesnt work with Etherboot 5.2.4 and I didnt test if it works with 5.2.5 or 5.3etc. Regards YH _____ From: Sagiv Yefet [mailto:sagivy at 3vium.com] Sent: Wednesday, September 08, 2004 3:38 AM To: linuxbios at clustermatic.org Subject: elf for tyan s2850 What elf file should I use for tyan s2850 ? thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: From ollie at lanl.gov Wed Sep 8 11:17:01 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Wed Sep 8 11:17:01 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <413F22A6.6010401@bitworks.com> References: <413E4445.90707@bitworks.com> <413F22A6.6010401@bitworks.com> Message-ID: <1094661130.13475.24.camel@exponential.lanl.gov> On Wed, 2004-09-08 at 09:17, Richard Smith wrote: > Ronald G. Minnich wrote: > > I'm changing the subject to something more specific. > > >>think is the "right" way then I'm game. And if someone will guide me through > >>what needs to be done in the PCI allocation stuff I'll give it a whirl but at > >>first blush that PCI allocation stuff appears fairly complex. > > > > For V1, we're not too worried about pretty. I'll try to work up an example > > for you. > > Dude, you've got plenty to do.... A few rough explanations on whats > going on may be all I need. > > I dug through the PCI code last night and I seem to be getting the jist > of how it goes. I don't quite yet grok the actual allocation "scheme" > but the magic seems to be happening in pci_set_resource() in linuxpci.c > and compute_allocate_resource in newpci.c. > > Neither of these seem to understand expansion roms. What resource flags > will be set for a device with expansion roms? MEM? but with perhaps > with IORESOURCE_SHADOWABLE? I don't see anything specific to expansion > roms. > I don't think either V1 or V2 can do expansion ROM. It is the first thing on my todo list for porting testbios into LB. > The red book so far hasn't been much help. Or I just haven't found the > right section. Eric (or anybody else): where did you get your info when > you re-factored all this code? > What's red book ? Ollie From YhLu at tyan.com Wed Sep 8 11:21:28 2004 From: YhLu at tyan.com (YhLu) Date: Wed Sep 8 11:21:28 2004 Subject: port linuxbios(v1) to i845GV based MB Message-ID: <3174569B9743D511922F00A0C94314230624B87E@TYANWEB> I suggest you start the work from freebios2. The similar northbridge E7501 is already there. You may just need to change some pci_write_conf32 to mem io for memory controller initialization. Other 82801er and Winbond 83627hf is there too. The Mainboard is tyan s2735. Regards YH -----Original Message----- From: zhu shi song [mailto:zhushisongzhu at yahoo.com] Sent: Wednesday, September 08, 2004 5:45 AM To: linuxbios at clustermatic.org Subject: port linuxbios(v1) to i845GV based MB intel i845GV is very popular now. I've got P4i45GV MB based on i845GV(northbridge:i845GV, southbridge:82801db, superio: winfast w83627hf ). I try to port linuxbios(v1) to this board. Today I have built my first romimage for it. There met one problem when using it to boot. Serial output is unreadable code. I have checked the baud rate it's ok. Maybe setup_serial has some bug. tks zhu _______________________________ Do you Yahoo!? Win 1 of 4,000 free domain names from Yahoo! Enter now. http://promotions.yahoo.com/goldrush _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From daubin at actuality-systems.com Wed Sep 8 11:23:37 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Wed Sep 8 11:23:37 2004 Subject: Windows over LinuxBIOS Message-ID: Hi, Read this: http://pcburn.com/article.php?op=Print&sid=62 ________________________________ From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Dave Belt Sent: Wednesday, September 08, 2004 9:02 AM To: linuxbios at clustermatic.org Subject: Windows over LinuxBIOS I have a customer building a custom PC based board. I have been presenting LinuxBIOS as a viable BIOS option; however, they have a serious interest in running Windows, likely 2K & XP, on this board. Does anybody have experience in this area to share? I'm currently trying to get a grasp of the effort required beyond the LinuxBIOS port itself. Also, what kind of reliability are you getting with your implementation? Any info you could provide would be much appreciated. Thanks -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Wed Sep 8 11:26:08 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 8 11:26:08 2004 Subject: port linuxbios(v1) to i845GV based MB In-Reply-To: <20040908141002.GA1400@openbios.org> Message-ID: On Wed, 8 Sep 2004, Stefan Reinauer wrote: > Some mainboards need to do some magic for baud rate setting or otherwise > the actual baud rate is only half of what is specified. If you see > something at all you are almost there yes, mess around with the baud rate on your minicom or whatever and see if you're getting output at the wrong baud rate. I just love PC chipsets ... ron From rminnich at lanl.gov Wed Sep 8 11:29:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 8 11:29:01 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <413F22A6.6010401@bitworks.com> Message-ID: What I'd say for your one option which was something like: option ENABLE_SHADOW_C000 is that you would put code in northbridge.c to enable that shadow. The other one is probably not needed. ron From rsmith at bitworks.com Wed Sep 8 11:32:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Wed Sep 8 11:32:01 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <1094661130.13475.24.camel@exponential.lanl.gov> References: <413E4445.90707@bitworks.com> <413F22A6.6010401@bitworks.com> <1094661130.13475.24.camel@exponential.lanl.gov> Message-ID: <413F3813.5090802@bitworks.com> Li-Ta Lo wrote: > > I don't think either V1 or V2 can do expansion ROM. It is the first > thing on my todo list for porting testbios into LB. > Correct. They don't. I'm trying to see what it will take to make them. I don't need general expansion rom support. All I need for ADLO is a valid memory range assigned to the VGA expansion ROM. Then my chipset code can enable the rom and do the shadowing copy. >>The red book so far hasn't been much help. Or I just haven't found the >>right section. Eric (or anybody else): where did you get your info when >>you re-factored all this code? > > What's red book ? "PCI Hardware and Software. Architecture and Design" by Edward Solari and George Willse. It has a red cover. From ollie at lanl.gov Wed Sep 8 11:40:01 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Wed Sep 8 11:40:01 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <413F3813.5090802@bitworks.com> References: <413E4445.90707@bitworks.com> <413F22A6.6010401@bitworks.com> <1094661130.13475.24.camel@exponential.lanl.gov> <413F3813.5090802@bitworks.com> Message-ID: <1094662734.13475.30.camel@exponential.lanl.gov> On Wed, 2004-09-08 at 10:49, Richard Smith wrote: > > What's red book ? > > "PCI Hardware and Software. Architecture and Design" by Edward Solari > and George Willse. It has a red cover. Do you have a copy of the real spec ? It is in chapter 6. The expansion rom base addres is at 0x30 instead of the 0x10 - 0x24 is IO/MEM bar. The bit 0 of the register is enable bit and bit 11-31 is the address. Ollie From rsmith at bitworks.com Wed Sep 8 11:42:14 2004 From: rsmith at bitworks.com (Richard Smith) Date: Wed Sep 8 11:42:14 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: References: Message-ID: <413F3A56.4010402@bitworks.com> ron minnich wrote: > What I'd say for your one option which was something like: > option ENABLE_SHADOW_C000 > What I'm thinking of would only be for the VGA device so perhaps ENABLE_VBIOS_SHADOW_C000 would be more descriptive? V1 has lots of options that don't really match what they do and I'd rather not contribute to expanding that list. > is that you would put code in northbridge.c to enable that shadow. > The other one is probably not needed. On our prior desing we had a ISA PCMCIA bridge that only seemed to work at c000 and we had to move the VGA shadow to e000. But now that everything is PCI thats probally not an issue anymore. From rminnich at lanl.gov Wed Sep 8 12:17:01 2004 From: rminnich at lanl.gov (ron minnich) Date: Wed Sep 8 12:17:01 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <413F3A56.4010402@bitworks.com> Message-ID: On Wed, 8 Sep 2004, Richard Smith wrote: > What I'm thinking of would only be for the VGA device so perhaps > > ENABLE_VBIOS_SHADOW_C000 yes, that name is fine. The issue is that the handling of that option (in V1) would be done in code in northbridge.c for almost every chipset we support in v1 ron From rsmith at bitworks.com Wed Sep 8 13:12:02 2004 From: rsmith at bitworks.com (Richard Smith) Date: Wed Sep 8 13:12:02 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: References: Message-ID: <413F4FD7.7080009@bitworks.com> ron minnich wrote: >>ENABLE_VBIOS_SHADOW_C000 > > yes, that name is fine. The issue is that the handling of that option (in > V1) would be done in code in northbridge.c for almost every chipset we > support in v1 I don't understand. Shadowing is chipset specific and would have to be done for all chipsets in v1 or v2. Putting it in the chipsets northbridge.c is way better than having to modify and keep a special version of ADLO's loader.s thats only works for one specfic chipset. But who said anything about doing it for all chipsets in v1? Ther are only a few of us that are trying to use ADLO. Let those who desire this add the necessary code. All this does is provide an nice easy method of getting the vbios into C000. Rather than the multi-step method of boot card in machine with COTS bios, copy bios to file, add file to the ADLO build, rebuild linuxbios, boot card under linuxbios+adlo. From adam at cfar.umd.edu Wed Sep 8 17:23:00 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Sep 8 17:23:00 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <413F4FD7.7080009@bitworks.com> Message-ID: <20040908184620.B98308-100000@www.missl.cs.umd.edu> > >>ENABLE_VBIOS_SHADOW_C000 > > > > yes, that name is fine. The issue is that the handling of that option (in > > V1) would be done in code in northbridge.c for almost every chipset we > > support in v1 > > I don't understand. Shadowing is chipset specific and would have to be > done for all chipsets in v1 or v2. Putting it in the chipsets > northbridge.c is way better than having to modify and keep a special > version of ADLO's loader.s thats only works for one specfic chipset. > > But who said anything about doing it for all chipsets in v1? Ther are > only a few of us that are trying to use ADLO. Let those who desire this > add the necessary code. > > All this does is provide an nice easy method of getting the vbios into > C000. Rather than the multi-step method of boot card in machine with > COTS bios, copy bios to file, add file to the ADLO build, rebuild > linuxbios, boot card under linuxbios+adlo. this obviously assumes non-integrated vga bios. On SiS 650 (IIRC) the VGA BIOS would be on the same chip as PC BIOS but yeah, otherwise it sounds like a neat trick. I assume LB would do all copying? IIRC ADLO would turn off write access once copying it was done. The " E) shadow - OFF (write)" Not sure if that's strictly necessary but it does happen after the copy operation. From rsmith at bitworks.com Wed Sep 8 18:16:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Wed Sep 8 18:16:01 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <20040908184620.B98308-100000@www.missl.cs.umd.edu> References: <20040908184620.B98308-100000@www.missl.cs.umd.edu> Message-ID: <413F9728.4070504@bitworks.com> Adam Sulmicki wrote: > this obviously assumes non-integrated vga bios. On SiS 650 (IIRC) the VGA > BIOS would be on the same chip as PC BIOS Thats the way the Bitworks board works as well. We have the vbios included the LB image because our video chips are on board. But if you are trying to debug things and try other video cards via a slot its a real pain. I end up with like 6 or 7 different flash chips that I have to plug in depending on what video card I am trying to mess with. > I assume LB would do all copying? Yes. That way ADLO dosen't have to care about the shadowing. I'll probally ifdef out all the the shadow copy stuff from loader.s when LB can handle the vbios shadow since it already does PIRQ. Not really sure how I'll handle the vbios-in-system-image yet but something similar exists with the vbios via real mode IDT code. > IIRC ADLO would turn off write access > once copying it was done. The " E) shadow - OFF (write)" Not sure if > that's strictly necessary but it does happen after the copy operation. Yeah you RC. Thats the way it works. The off isn't strictly necessary. I ran for about 6 months before I realized I wasn't turning write access to that range back off. As long as no stray process goes plowing through that range it dosen't matter. Of course if that happens you have other problems. From adam at cfar.umd.edu Wed Sep 8 19:23:00 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Sep 8 19:23:00 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <413F9728.4070504@bitworks.com> Message-ID: <20040908204347.T98308-100000@www.missl.cs.umd.edu> On Wed, 8 Sep 2004, Richard Smith wrote: > > IIRC ADLO would turn off write access > > once copying it was done. The " E) shadow - OFF (write)" Not sure if > > that's strictly necessary but it does happen after the copy operation. > > Yeah you RC. Thats the way it works. The off isn't strictly necessary. > I ran for about 6 months before I realized I wasn't turning write access > to that range back off. As long as no stray process goes plowing > through that range it dosen't matter. Of course if that happens you > have other problems. that is a good news. it would really simplify the design and eliminate needs for any call-backs. still where would the LB code make the original image available? it seems that we still need ADLO-specific "plugin" in LB for ALDO proper to work. ie a) make vbios image available b) setup shadow ram c) copy the vbios image into shadow ram. I seem to recall some talk on (b) in this thread.. which would be chip-set specific. I suppose (a) and (c) could be some fairly generic routines for just about any expansion rom. From ebiederman at lnxi.com Wed Sep 8 19:40:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 8 19:40:00 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <413F4FD7.7080009@bitworks.com> References: <413F4FD7.7080009@bitworks.com> Message-ID: Richard Smith writes: > ron minnich wrote: > > >>ENABLE_VBIOS_SHADOW_C000 > > yes, that name is fine. The issue is that the handling of that option (in V1) > > would be done in code in northbridge.c for almost every chipset we support in > > v1 > > I don't understand. Shadowing is chipset specific and would have to be done for > all chipsets in v1 or v2. Putting it in the chipsets northbridge.c is way > better than having to modify and keep a special version of ADLO's loader.s thats > only works for one specfic chipset. Enabling everything as memory except the legacy vga bios hole should be done. On an Intel chipset it should just be properly setting the PAM register. Unless there is a good reason not to every chipsets northbridge should do this. And there is no reason to make it conditional. > But who said anything about doing it for all chipsets in v1? Ther are only a > few of us that are trying to use ADLO. Let those who desire this add the > necessary code. Agreed. > All this does is provide an nice easy method of getting the vbios into C000. > Rather than the multi-step method of boot card in machine with COTS bios, copy > bios to file, add file to the ADLO build, rebuild linuxbios, boot card under > linuxbios+adlo. As for the copy that is something different. ADLO should really look at the pci options roms and do the appropriate thing, so if LinuxBIOS can reserve a hole in the memory address space to map the ROM into, ADLO should do the rest. That way ADLO can support all options ROMS. Eric From snow2moutain at hotmail.com Wed Sep 8 23:17:01 2004 From: snow2moutain at hotmail.com (Gerald Chiu) Date: Wed Sep 8 23:17:01 2004 Subject: VGA Problem about 440bx chipset Message-ID: >From: Adam Sulmicki >To: Gerald Chiu >CC: linuxbios at clustermatic.org >Subject: Re: VGA Problem about 440bx chipset >Date: Tue, 7 Sep 2004 09:48:20 -0400 (EDT) > > >umm. that part was unfortunatelly a bit of black magic. > >make sure you have mouse on your ps2 port. win2k would freak out for some >reason if it did not. > >also you may want to edit the win2k config files not to display that >prompt but go straight to win2k and see if it helps. > I tried all you mentioned,but still failed.:( >then you may want to play with timings in the IDE driver in bochs.. > Could you offer me more clues on modifying timngs stuff dealing with IDE driver? >On Tue, 7 Sep 2004, Gerald Chiu wrote: > > > Hello,Adam, > > I have problem on booting win2000,but the ADLO status said win2k is fully > > supported. > > > > The information displayed on screen is below: > > > > =============== > > Please select the operating system to start: > > Microsoft Windows 2000 Professional > > Microsoft Windows 98 > > > > Use your arrow keys to move the highlight to your choice. > > Please touch Enter to choose. > > Seconds until highlighted choice will be started automatically: 0 > > For troubleshooting and advanced startup options for Windows 2000, press > > F8. > > ================ > > > > When I choose win2k and touch Enter,it halts, the screen even not change to > > show progress bar! > > When I choose win98 ,after showed the welcome logo,it halts with the cursor > > flashing on the left_upper corner of screen. > > > > I want to boot win2k, then could you give me some idea on debugging? > > > > _________________________________________________________________ ???? MSN Explorer: http://explorer.msn.com/lccn/ From Trellix78 at aol.com Thu Sep 9 00:30:00 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Thu Sep 9 00:30:00 2004 Subject: epia m vga XFree86 4.3 works Message-ID: <1ca.2a80aa6b.2e7148a3@aol.com> Well, I'm definitely making some progress with the epia m vga. I downloaded the very latest freebios from CVS and I see that I was indeed missing the shadow copy stuff in mainboard.c and also, I was using the wrong value for the vt8623 PCI id. Now, I have a different problem. I'm able to get XFree86 4.3 to start up on tty0 but it complains about AGP, DRI and linear memory. I believe there's a post about that but it didn't mention a fix. I get no output on the monitor until then. Adding AGP support in the 2.6.6 kernel causes the system to hang after the driver is loaded. I'll compile a 2.4 kernel + maybe enable framebuffer support in the kernel to test. Other things that I've tried so far is to enable VIDEO_CONSOLE and the fixup code but I still don't get any output prior to X starting up. I'm currently clueless about why video mode + PCX loading stuff can be done even before the PCI stuff. The upside to all this is that I'm now very familiar with the code. I know there's stuff in the FAQ, but would anyone object if I posted a map of the code for the epia m from entry16 all the way to elfboot() as an example? I've drawn such a map to help navigate through the directories and code and IMHO all the cool stuff happens at hardwaremain(), anyway. Cheers and thanks for all the help. -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Thu Sep 9 02:28:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Thu Sep 9 02:28:00 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: References: <413F4FD7.7080009@bitworks.com> Message-ID: <20040909074707.GC13092@openbios.org> * Eric W. Biederman [040909 02:58]: > > I don't understand. Shadowing is chipset specific and would have to be done for > > all chipsets in v1 or v2. Putting it in the chipsets northbridge.c is way > > better than having to modify and keep a special version of ADLO's loader.s thats > > only works for one specfic chipset. > > Enabling everything as memory except the legacy vga bios hole should > be done. On an Intel chipset it should just be properly setting > the PAM register. > > Unless there is a good reason not to every chipsets northbridge should > do this. And there is no reason to make it conditional. > > All this does is provide an nice easy method of getting the vbios into C000. > > Rather than the multi-step method of boot card in machine with COTS bios, copy > > bios to file, add file to the ADLO build, rebuild linuxbios, boot card under > > linuxbios+adlo. > > As for the copy that is something different. > > ADLO should really look at the pci options roms and do the appropriate > thing, so if LinuxBIOS can reserve a hole in the memory address space > to map the ROM into, ADLO should do the rest. This would require to actively change the PAM registers during ADLO still, would it not? With our current abstraction, this is something that should clearly go to LinuxBIOS though since it is chipset specific. Ok, we don't want callbacks, but could we not store the information on how to cope with PAM registers in the LinuxBIOS table, probably as some array of PCI addresses to read+[&|]+write to? This would allow to keep ADLO completely generic. Thinking forward, we should store much more information in the LinuxBIOS table. For example on machines where LinuxBIOS initializes video itself (ATI XL, Trident Cyberblade) the LinuxBIOS table should contain an entry with the framebuffer address, the resolution and the color depth. Then any payload can spare reinitializing video without having to make ventured assumptions on the status of the hardware. Stefan From stepan at openbios.org Thu Sep 9 02:32:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Thu Sep 9 02:32:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <413F251F.1060503@bitworks.com> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> Message-ID: <20040909075028.GD13092@openbios.org> * Richard Smith [040908 17:28]: > Ronald G. Minnich wrote: > > >ok, I hate to say this, but I think you should run linuxbios without the > >vga stuff, boot linux, and run that vgabios under testbios and see if that > >is better. This will let you know if the vgabios is doing something really > >weird. > > If you have the space. Try X >= 4.3 as well and use: > option "InitPrimary" "true" > in the Screens section. It's my experience that on some cards X will > bring the card to life when testbios won't. We should definitely merge our x86emu efforts with those of X.org. I talked about that with Egbert Eich a while ago, but I never got to set something up since then yet. It might take some efforts cleaning out the core of x86emu so that it smoothly fits into both X and our "testbios" payload. But it is definitely worth the effort. Stefan From ian at abelon.com Thu Sep 9 02:58:01 2004 From: ian at abelon.com (Ian Smith) Date: Thu Sep 9 02:58:01 2004 Subject: epia m vga XFree86 4.3 works In-Reply-To: <1ca.2a80aa6b.2e7148a3@aol.com> References: <1ca.2a80aa6b.2e7148a3@aol.com> Message-ID: <6.1.2.0.2.20040909090711.02ea3f80@mail.abelon.com> An HTML attachment was scrubbed... URL: From adam at cfar.umd.edu Thu Sep 9 08:21:00 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Thu Sep 9 08:21:00 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: Message-ID: <20040909094022.J98308-100000@www.missl.cs.umd.edu> On Thu, 9 Sep 2004, Gerald Chiu wrote: > >then you may want to play with timings in the IDE driver in bochs.. > Could you offer me more clues on modifying timngs stuff dealing with IDE > driver? not really it is sort of black magic. i can't really tell what's different between my old setup and your current that causes XP to fail. do make sure that it does boot correctly under old bios before booting it under LB/ADLO. then it is a bit of experimenting, see where it fails and try to slow it down or speed up. add more debugging/prompts to XP and/or remove them. another idea you might want to try. grab latest bochs bios from BOCHS projects, merge the patches I made, as ndeeded, and see if it works.... although last time I looked at it they did not make there any significant changes.. at least on the first look. ... it is clear that bochs bios could use some improvements, but on upside one they are made it could boot more than just 2K.... the Win98 did not seem that far off either... That is, if you are ready to spend some work on that. yet another idea, check bochs mailing list to see what kind of problems they had getting 2K to run. they may or may not apply here.. in general bochs bios was written for emulator so most of the issues with geting it to run on real hardware were timing related. dunno if that helps. From rsmith at bitworks.com Thu Sep 9 09:14:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Thu Sep 9 09:14:01 2004 Subject: Allocateing resouces for PCI expansion roms... (was 440bx VGA probs) In-Reply-To: <20040909074707.GC13092@openbios.org> References: <413F4FD7.7080009@bitworks.com> <20040909074707.GC13092@openbios.org> Message-ID: <41406998.3030201@bitworks.com> Stefan Reinauer wrote: >>ADLO should really look at the pci options roms and do the appropriate >>thing, so if LinuxBIOS can reserve a hole in the memory address space >>to map the ROM into, ADLO should do the rest. > > This would require to actively change the PAM registers during ADLO > still, would it not? > With our current abstraction, this is something that should clearly go > to LinuxBIOS though since it is chipset specific. > > Ok, we don't want callbacks, but could we not store the information on > how to cope with PAM registers in the LinuxBIOS table, probably as some > array of PCI addresses to read+[&|]+write to? This would allow to keep > ADLO completely generic. Are you guys discussing how this needs to be done for V2? Because for V1 this is really starting to sound complicated which was not what I was attemping to suggest. The only thing that BOCHS needs is a copy of the ROM extension in the legacy range. It already scans the range and runs any extension it finds. ADLO currently does this copy because LB dosen't. All I need is an address assigned to the ROM that won't conflict. Then a few changes in the chipsets northbridge code will make this work for on card expansion ROMS. Simple and fairly non-intrusive. The only intrusive change is the assignment of a mem-address to the ROM. Why make it more complex than that? Am I just missing something here? From pyro at linuxlabs.com Thu Sep 9 10:52:01 2004 From: pyro at linuxlabs.com (Steven James) Date: Thu Sep 9 10:52:01 2004 Subject: port linuxbios(v1) to i845GV based MB In-Reply-To: <20040908141002.GA1400@openbios.org> References: <20040908124448.98251.qmail@web13206.mail.yahoo.com> <20040908141002.GA1400@openbios.org> Message-ID: Greetings, It looks like it can run double or half depending on the board unless register 0x24 bit 6 is set correctly. 0=24MHz clock, 1=48MHz clock. G'day, sjames ||||| |||| ||||||||||||| ||| by Linux Labs International, Inc. Steven James, CTO 55 Marietta Street Suite 1830 Atlanta, Ga 30303 866 824 9737 support On Wed, 8 Sep 2004, Stefan Reinauer wrote: > * zhu shi song [040908 14:44]: > > intel i845GV is very popular now. I've got P4i45GV MB > > based on i845GV(northbridge:i845GV, > > southbridge:82801db, superio: winfast w83627hf ). I > > try to port linuxbios(v1) to this board. Today I have > > built my first romimage for it. There met one problem > > when using it to boot. Serial output is unreadable > > code. I have checked the baud rate it's ok. Maybe > > setup_serial has some bug. > > Some mainboards need to do some magic for baud rate setting or otherwise > the actual baud rate is only half of what is specified. If you see > something at all you are almost there > > Stefan > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From ollie at lanl.gov Thu Sep 9 11:07:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Thu Sep 9 11:07:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040909075028.GD13092@openbios.org> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> Message-ID: <1094747164.3158.14.camel@exponential.lanl.gov> On Thu, 2004-09-09 at 01:50, Stefan Reinauer wrote: > * Richard Smith [040908 17:28]: > > Ronald G. Minnich wrote: > > > > >ok, I hate to say this, but I think you should run linuxbios without the > > >vga stuff, boot linux, and run that vgabios under testbios and see if that > > >is better. This will let you know if the vgabios is doing something really > > >weird. > > > > If you have the space. Try X >= 4.3 as well and use: > > option "InitPrimary" "true" > > in the Screens section. It's my experience that on some cards X will > > bring the card to life when testbios won't. > > We should definitely merge our x86emu efforts with those of X.org. I > talked about that with Egbert Eich a while ago, but I never got to set > something up since then yet. It might take some efforts cleaning out the > core of x86emu so that it smoothly fits into both X and our "testbios" > payload. But it is definitely worth the effort. > Did they do anything on the "core" x86emu? Last time I checked, XF86 4.4.0 has almost the same x86emu as testbios. BTW, I think a fork of x86emu is inevitable. If we want to move testbios into LinuxBIOS, we have to remove all OS/libc dependence from the emulator. Ollie From rsmith at bitworks.com Thu Sep 9 11:50:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Thu Sep 9 11:50:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <1094747164.3158.14.camel@exponential.lanl.gov> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> Message-ID: <41408E0F.7030808@bitworks.com> Li-Ta Lo wrote: > > Did they do anything on the "core" x86emu? Last time I checked, > XF86 4.4.0 has almost the same x86emu as testbios. Something is differnt even with 4.3. I can run my ATI M1 bios under testbios and it dosen't work but X with InitPrimary enabled works. > BTW, I think a fork of x86emu is inevitable. If we want to move > testbios into LinuxBIOS, we have to remove all OS/libc dependence > from the emulator. There is also a softboot program for the DRI project. I tried to mess with it but it currently requires devmapper to do the ROM mapping it didn't want to work for me. From hansolofalcon at worldnet.att.net Thu Sep 9 12:12:01 2004 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Thu Sep 9 12:12:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <41408E0F.7030808@bitworks.com> Message-ID: <000001c49692$c4ed63a0$6401a8c0@who5> Hello from Gregg C Levine Richard your statement, "There is also a softboot program for the DRI project. I tried to mess with it but it currently requires devmapper to do the ROM mapping it didn't want to work for me." It sounds interesting to me, here, but I only have access to the ATI Mach64 based, Rage Pro 3D, video, on one of my machines, and the ATI Rage 128 video, on this one. Can you elaborate? ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of Richard Smith > Sent: Thursday, September 09, 2004 1:09 PM > To: ollie at lanl.gov > Cc: Stefan Reinauer; rminnich at lanl.gov; Trellix78 at aol.com; LinuxBIOS; > eich at suse.de > Subject: Re: epia m vga + memcpy update > > Li-Ta Lo wrote: > > > > > Did they do anything on the "core" x86emu? Last time I checked, > > XF86 4.4.0 has almost the same x86emu as testbios. > > Something is differnt even with 4.3. I can run my ATI M1 bios under > testbios and it dosen't work but X with InitPrimary enabled works. > > > BTW, I think a fork of x86emu is inevitable. If we want to move > > testbios into LinuxBIOS, we have to remove all OS/libc dependence > > from the emulator. > > There is also a softboot program for the DRI project. I tried to mess > with it but it currently requires devmapper to do the ROM mapping it > didn't want to work for me. > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From ollie at lanl.gov Thu Sep 9 12:12:44 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Thu Sep 9 12:12:44 2004 Subject: epia m vga + memcpy update In-Reply-To: <41408E0F.7030808@bitworks.com> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <41408E0F.7030808@bitworks.com> Message-ID: <1094751034.3523.0.camel@exponential.lanl.gov> On Thu, 2004-09-09 at 11:08, Richard Smith wrote: > Li-Ta Lo wrote: > > > > > Did they do anything on the "core" x86emu? Last time I checked, > > XF86 4.4.0 has almost the same x86emu as testbios. > > Something is differnt even with 4.3. I can run my ATI M1 bios under > testbios and it dosen't work but X with InitPrimary enabled works. > Interesting. Do you have any idea why ? Ollie From rsmith at bitworks.com Thu Sep 9 12:40:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Thu Sep 9 12:40:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <1094751034.3523.0.camel@exponential.lanl.gov> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <41408E0F.7030808@bitworks.com> <1094751034.3523.0.camel@exponential.lanl.gov> Message-ID: <414099BB.6090406@bitworks.com> Li-Ta Lo wrote: >>>Did they do anything on the "core" x86emu? Last time I checked, >>>XF86 4.4.0 has almost the same x86emu as testbios. >> >>Something is differnt even with 4.3. I can run my ATI M1 bios under >>testbios and it dosen't work but X with InitPrimary enabled works. >> > Interesting. Do you have any idea why ? > Not really. There's lots of variables. I do have machines that testbios does work with my M1 bios. But these machines boot a COTS bios rather than LB. For one thing I think the emu in X handles the reads and writes to the timer rather than letting the bios get to the hardware. The stock M1 bios won't run under vgabios at all. The delay functions go into loops that only exit by chance. The X emu will run that code fine. I have a modified version of the M1 bios that works around the delay issue by effectively removing them so it runs under testbios but it still dosen't bring the card to life. Its possible that my "fix" is part of the problem since timeing can be critical but I wouldn't expect the emulator to running too fast and I don't think too slow would be a problem. From rsmith at bitworks.com Thu Sep 9 12:47:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Thu Sep 9 12:47:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <000001c49692$c4ed63a0$6401a8c0@who5> References: <000001c49692$c4ed63a0$6401a8c0@who5> Message-ID: <41409B8D.2070108@bitworks.com> Gregg C Levine wrote: > It sounds interesting to me, here, but I only have access to the ATI > Mach64 based, Rage Pro 3D, video, on one of my machines, and the ATI > Rage 128 video, on this one. Can you elaborate? I got the code from a something that came across the fremebuffer dev list. But it should all be in the DRI cvs. check http://dri.sourceforge.net for all the details. From ollie at lanl.gov Thu Sep 9 12:57:01 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Thu Sep 9 12:57:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <414099BB.6090406@bitworks.com> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <41408E0F.7030808@bitworks.com> <1094751034.3523.0.camel@exponential.lanl.gov> <414099BB.6090406@bitworks.com> Message-ID: <1094753725.3523.2.camel@exponential.lanl.gov> On Thu, 2004-09-09 at 11:58, Richard Smith wrote: > Li-Ta Lo wrote: > > >>>Did they do anything on the "core" x86emu? Last time I checked, > >>>XF86 4.4.0 has almost the same x86emu as testbios. > >> > >>Something is differnt even with 4.3. I can run my ATI M1 bios under > >>testbios and it dosen't work but X with InitPrimary enabled works. > >> > > Interesting. Do you have any idea why ? > > > > Not really. There's lots of variables. I do have machines that > testbios does work with my M1 bios. But these machines boot a COTS bios > rather than LB. > > For one thing I think the emu in X handles the reads and writes to the > timer rather than letting the bios get to the hardware. The stock M1 > bios won't run under vgabios at all. The delay functions go into loops > that only exit by chance. The X emu will run that code fine. > > I have a modified version of the M1 bios that works around the delay > issue by effectively removing them so it runs under testbios but it > still dosen't bring the card to life. Its possible that my "fix" is > part of the problem since timeing can be critical but I wouldn't expect > the emulator to running too fast and I don't think too slow would be a > problem. > So you still think it is the timer ? Did you try to access the timer HW in testbios ? Ollie From rsmith at bitworks.com Thu Sep 9 13:40:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Thu Sep 9 13:40:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <1094753725.3523.2.camel@exponential.lanl.gov> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <41408E0F.7030808@bitworks.com> <1094751034.3523.0.camel@exponential.lanl.gov> <414099BB.6090406@bitworks.com> <1094753725.3523.2.camel@exponential.lanl.gov> Message-ID: <4140A7E7.8090204@bitworks.com> Li-Ta Lo wrote: > So you still think it is the timer ? It may not be the only problem. But its one problem. The flaky results I get seem to match up with wierd timeing problems. I haven't allocated a lot of time on this because we have found that our board has hardware problems with the pci bus. And it's difficult to seperate out all the individual issues. But testbios dosen't work on an ASUS P2B booting LB or COTS and my modified ATI vbios. Nor does LB+ADLO+BOCHS with the original M1 vbios. X with InitPrimary works both under COTS and LB but that was using using the orginal M1 bios not my "fixed" version. So see I still have a lot of apples->oranges comparisons. I'll try to scratch out sometime and build a consistent maxrix of everything that works and what dosen't. This is where having that PCI expansion ROM stuff working would come in _real_ handy. > Did you try to access the timer > HW in testbios ? I think HW access is what you _don't_ want to happen. Rather than allow the vbios to fiddle with the actuall timer hw it needs to provide a software legacy timer interface that increments consistent with the emu "clock". The only hardware IO that should be allowed untrapped is the IO range requested by the card and the Legacy VGA ranges. Currently testbios lets the vbios access any port it wishes. The X emu must be doing this or the ATI M1 bios would not work. This has to happen for non-x86 platform stuff as well which don't even have a x86 type timer. From Trellix78 at aol.com Thu Sep 9 13:53:00 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Thu Sep 9 13:53:00 2004 Subject: epia m vga XFree86 4.3 works update Message-ID: <1ea.2a2736cf.2e7204dd@aol.com> It's obvious that something strange is happening with AGP and XFree86 4.4. The latest patched driver for the epia M crashes in backend.c, function agp_backend_initialize() of the agpgart driver, at bridge->driver->configure(). Commenting out that line will enable the driver to be installed but Xwindows will crash hard while attempting to play mpeg videos. I was able to use AGP stuff posted by Dave Ashley in "Question about AGP (epia-m)" post but my system will not crash everytime will attempting to set the graphics aperture size. Since this is getting into kernel issues, I'll simply post the log that I have, grab V2 and start from there. Thanks. LinuxBIOS-1.0.0 Thu Sep 9 10:03:48 EDT 2004 starting... 80 08 07 0d 0a 01 40 00 04 75 75 00 82 08 00 01 0e 04 0c 01 02 20 c0 a0 75 00 00 50 3c 50 2d 40 a0 a0 50 50 00 00 00 00 00 41 4b 34 32 75 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 06 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 Copying LinuxBIOS to ram. Jumping to LinuxBIOS. LinuxBIOS-1.0.0 Thu Sep 9 10:03:48 EDT 2004 booting... Finding PCI configuration type. PCI: Using configuration type 1 Scanning PCI bus...PCI: pci_scan_bus for bus 0 PCI: 00:00.0 [1106/3123] PCI: 00:01.0 [1106/b091] PCI: 00:0d.0 [1106/3044] PCI: 00:10.0 [1106/3038] PCI: 00:10.1 [1106/3038] PCI: 00:10.2 [1106/3038] PCI: 00:10.3 [1106/3104] PCI: 00:11.0 [1106/3177] PCI: 00:11.1 [1106/0571] PCI: 00:11.5 [1106/3059] PCI: 00:12.0 [1106/3065] PCI: pci_scan_bus for bus 1 PCI: 01:00.0 [1106/3122] PCI: pci_scan_bus returning with max=01 PCI: pci_scan_bus returning with max=01 done turning framebuffer on Allocating PCI resources... ASSIGN RESOURCES, bus 0 PCI: 00:00.0 10 <- [0x00000000 - 0xf7ffffff] prefmem PCI: 00:01.0 1c <- [0x00001000 - 0x00000fff] bus 1 io PCI: 00:01.0 24 <- [0xf8000000 - 0xfbffffff] bus 1 prefmem PCI: 00:01.0 20 <- [0xfc000000 - 0xfcffffff] bus 1 mem ASSIGN RESOURCES, bus 1 PCI: 01:00.0 10 <- [0xf8000000 - 0xfbffffff] prefmem PCI: 01:00.0 14 <- [0xfc000000 - 0xfcffffff] mem ASSIGNED RESOURCES, bus 1 PCI: 00:0d.0 10 <- [0xfd000000 - 0xfd0007ff] mem PCI: 00:0d.0 14 <- [0x00001800 - 0x0000187f] io PCI: 00:10.0 20 <- [0x00001880 - 0x0000189f] io PCI: 00:10.1 20 <- [0x000018a0 - 0x000018bf] io PCI: 00:10.2 20 <- [0x000018c0 - 0x000018df] io PCI: 00:10.3 10 <- [0xfd001000 - 0xfd0010ff] mem PCI: 00:11.1 20 <- [0x000018e0 - 0x000018ef] io PCI: 00:11.5 10 <- [0x00001000 - 0x000010ff] io PCI: 00:12.0 10 <- [0x00001400 - 0x000014ff] io PCI: 00:12.0 14 <- [0xfd002000 - 0xfd0020ff] mem ASSIGNED RESOURCES, bus 0 Allocating VGA resource done. Enabling PCI resourcess...PCI: 00:00.0 cmd <- 06 PCI: 00:01.0 cmd <- 07 PCI: 00:0d.0 cmd <- 83 PCI: 00:10.0 cmd <- 01 PCI: 00:10.1 cmd <- 01 PCI: 00:10.2 cmd <- 01 PCI: 00:10.3 cmd <- 02 PCI: 00:11.0 cmd <- 07 PCI: 00:11.1 cmd <- 07 PCI: 00:11.5 cmd <- 01 PCI: 00:12.0 cmd <- 83 PCI: 01:00.0 cmd <- 03 done. Initializing PCI devices... PCI devices initialized totalram: 96M Initializing CPU #0 Enabling cache... Setting fixed MTRRs(0-88) type: UC Setting fixed MTRRs(0-16) type: WB DONE fixed MTRRs Setting variable MTRR 0, base: 0MB, range: 64MB, type WB Setting variable MTRR 1, base: 64MB, range: 32MB, type WB DONE variable MTRRs Clear out the extra MTRR's call intel_enable_fixed_mtrr() call intel_enable_var_mtrr() Leave setup_mtrrs done. Max cpuid index : 1 Vendor ID : CentaurHauls Processor Type : 0x00 Processor Family : 0x06 Processor Model : 0x09 Processor Mask : 0x00 Processor Stepping : 0x01 Feature flags : 0x0380b135 MTRR check Fixed MTRRs : Enabled Variable MTRRs: Enabled Disabling local apic...done. CPU #0 Initialized mainboard fixup northbridge_fixup southbridge_fixup final mainboard fixup final Southbridge fixup enabling video shadow RAM setting firewire Assigning IRQ 10 to 0:d.0 Readback = 10 setting usb Assigning IRQ 11 to 0:10.0 Readback = 11 Assigning IRQ 10 to 0:10.1 Readback = 10 Assigning IRQ 12 to 0:10.2 Readback = 12 Assigning IRQ 5 to 0:10.3 Readback = 5 setting vt8235 Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 12 to 0:11.5 Readback = 12 setting ethernet Assigning IRQ 11 to 0:12.0 Readback = 11 setting vga Assigning IRQ 11 to 1:0.0 Readback = 11 setting pci slot setting vt8235 slot Assigning IRQ 5 to 0:11.1 Readback = 5 Assigning IRQ 12 to 0:11.5 Readback = 12 INSTALL REAL-MODE IDT DO THE VGA BIOS found VGA: vid=1106, did=3122 Setting up VGA, VGABIOS_START: 0xfffc0000 Looks like VGA_ROM is good: 0x55 0xaa VGA copy looks good write_protect_vgabios bus/devfn = 0x100 biosint: # 0x15, eax 0x5f00 ebx 0x100 ecx 0x100 edx 0x12 biosint: ebp 0x11af4 esp 0xff2 edi 0xdb4c esi 0x12410 biosint: ip 0x637f cs 0xc000 flags 0x46 biosint: # 0x1a, eax 0xb108 ebx 0x0 ecx 0x0 edx 0x3d5 biosint: ebp 0x11af4 esp 0xfcc edi 0xf6 esi 0x155eb biosint: ip 0x40da cs 0xc000 flags 0x46 0xb108: bus 0 devfn 0x0 reg 0xf6 val 0x3 biosint: # 0x15, eax 0x5f02 ebx 0x100 ecx 0x101 edx 0x3d5 biosint: ebp 0x11af4 esp 0xfb8 edi 0x44 esi 0x155eb biosint: ip 0x63cb cs 0xc000 flags 0x46 biosint: # 0x15, eax 0x5f02 ebx 0x100 ecx 0x101 edx 0x3d5 biosint: ebp 0x11af4 esp 0xfb8 edi 0x44 esi 0x155eb biosint: ip 0x63cb cs 0xc000 flags 0x46 biosint: # 0x15, eax 0x5f02 ebx 0x100 ecx 0x101 edx 0x3d5 biosint: ebp 0x11af4 esp 0xfb8 edi 0x44 esi 0x155eb biosint: ip 0x63cb cs 0xc000 flags 0x46 biosint: # 0x15, eax 0x5f0f ebx 0x100 ecx 0x100 edx 0x3d5 biosint: ebp 0x11af4 esp 0xfee edi 0x44 esi 0x12410 biosint: ip 0x647e cs 0xc000 flags 0x2 biosint: # 0x15, eax 0x5f02 ebx 0x0 ecx 0x1 edx 0x0 biosint: ebp 0x11af4 esp 0xfdc edi 0x44 esi 0x12410 biosint: ip 0x63cb cs 0xc000 flags 0x46 biosint: # 0x15, eax 0x5f18 ebx 0x1 ecx 0x0 edx 0x0 biosint: ebp 0x11af4 esp 0xfde edi 0x44 esi 0x12410 biosint: ip 0x6496 cs 0xc000 flags 0x46 Checking IRQ routing tables... Copying IRQ routing tables to 0xf0000...done. Verifing priq routing tables copy at 0xf0000...failed Wrote linuxbios table at: 00000500 - 0000066c checksum c8a8 Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.2 37:init_bytes() - zkernel_start:0xfffd0000 zkernel_mask:0x0000ffff Found ELF candiate at offset 0 New segment addr 0x94000 size 0x71e8 offset 0x80 filesize 0x3650 (cleaned up) New segment addr 0x94000 size 0x71e8 offset 0x80 filesize 0x3650 Dropping non PT_LOAD segment Loading Segment: addr: 0x0000000000094000 memsz: 0x00000000000071e8 filesz: 0x0000000000003650 Clearing Segment: addr: 0x0000000000097650 memsz: 0x0000000000003b98 Jumping to boot code at 0x94000 ROM segment 0x9bb4 length 0x36f0 reloc 0x9400 Etherboot 5.0.8 (GPL) Tagged ELF for [VIA 86C100] Boot from (N)etwork or from (L)ocal? clocks_per_tick = 630286 N Probing...[VIA 86C100]Found VIA 6102 ROM address 0x0000 rhine.c v1.0.0 2000-01-07 IO address 1400 Ethernet Address: 00:40:63:CC:22:C3 Analyzing Media type,this will take several seconds........OK Linespeed=100Mbs Fullduplex The PCI BIOS has not enabled this device! Updating PCI command 0083->0087. pci_bus 00 pci_device_fn 90 Searching for server (DHCP)... ..Me: 192.168.1.116, Server: 192.168.1.100, Gateway 192.168.1.1 Loading 192.168.1.100:etherboot/bzImage ...(ELF)... ...................................................................................................... .............................................................................. .............................................................................. .......................................................done rhine disable Unknown bootloader class! type=0x00000000 data=0x000986AE Firmware type: LinuxBIOS Linux version 2.6.6-epia (_root at dhlinux1_ (mailto:root at dhlinux1) ) (gcc version 3.3.1 (SuSE Linux)) #12 Wed Sep 8 23:13:05 EDT 2004 BIOS-provided physical RAM map: BIOS-e820: 0000000000000000 - 00000000000006d8 (reserved) BIOS-e820: 00000000000006d8 - 00000000000a0000 (usable) BIOS-e820: 0000000000100000 - 0000000006000000 (usable) 0MB HIGHMEM available. 96MB LOWMEM available. On node 0 totalpages: 24576 DMA zone: 4096 pages, LIFO batch:1 Normal zone: 20480 pages, LIFO batch:5 HighMem zone: 0 pages, LIFO batch:1 DMI not present. ACPI: Unable to locate RSDP Built 1 zonelists Kernel command line: root=0100 rw console=ttyS0,115200n8 console=tty0 Initializing CPU#0 : : : EXT3 FS on hda1, internal journal EXT3-fs: recovery complete. EXT3-fs: mounted filesystem with ordered data mode. BusyBox v1.00-rc2 (2004.08.11-20:42+0000) Built-in shell (ash) Enter 'help' for a list of built-in commands. $ $ insmod agpgart.ko Linux agpgart interface v0.100 (c) Dave Jones $ insmod via-agp.ko agpgart: Detected VIA CLE266 chipset agpgart: Maximum main memory to use for agp memory: 62M agpgart: ok, memset(bridge->key_list, 0, PAGE_SIZE * 4) agpgart: disabling bridge->driver->configure() call for now (epia M AGP is spawn of the Devil) agpgart: AGP aperture is 128M @ 0x0 $ /usr/X11R6/bin/xinit /etc/site.xinitrc -- /usr/X11R6/bin/XFree86 tty0 _XSERVTransSocketOpenCOTSServer: Unable to open socket for inet6 _XSERVTransOpen: transport open failed for inet6/(none):0 _XSERVTransMakeAllCOTSServerListeners: failed to open listener for inet6 XFree86 Version 4.4.0 Release Date: 29 February 2004 X Protocol Version 11, Revision 0, Release 6.6 Build Operating System: Linux 2.4.21-99-smp4G i686 [ELF] Current Operating System: Linux (none) 2.6.6-epia #12 Wed Sep 8 23:13:05 EDT 2004 i686 Build Date: 16 July 2004 Changelog Date: 29 February 2004 Before reporting problems, check _http://www.XFree86.Org/_ (http://www.XFree86.Org/) to make sure that you have the latest version. Module Loader present Markers: (--) probed, (**) from config file, (==) default setting, (++) from command line, (!!) notice, (II) informational, (WW) warning, (EE) error, (NI) not implemented, (??) unknown. (==) Log file: "/var/log/XFree86.0.log", Time: Thu Jan 2 11:43:29 2003 (==) Using config file: "/etc/X11/XF86Config-4" (EE) VIA(0): vm86() syscall generated signal 8. Linear memory allocation failed (EE) VIA(0): [XvMC] Cannot use XvMC without DRI! (EE) Couldn't load XKB keymap, falling back to pre-XKB keymap atkbd.c: Unknown key released (translated set 2, code 0x7a on isa0060/serio0). atkbd.c: This is an XFree86 bug. It shouldn't access hardware directly. atkbd.c: Unknown key released (translated set 2, code 0x7a on isa0060/serio0). atkbd.c: This is an XFree86 bug. It shouldn't access hardware directly. Could not init font path element /usr/X11R6/lib/X11/fonts/local, removing from list! This should not happen! An unresolved function was called! Fatal server error: When reporting a problem related to a server crash, please send the full server output, not just the last messages. This can be found in the log file "/var/log/XFree86.0.log". Please report problems to _xfree86 at xfree86.org_ (mailto:xfree86 at xfree86.org) . -------------- next part -------------- An HTML attachment was scrubbed... URL: From ollie at lanl.gov Thu Sep 9 14:15:01 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Thu Sep 9 14:15:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <4140A7E7.8090204@bitworks.com> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <41408E0F.7030808@bitworks.com> <1094751034.3523.0.camel@exponential.lanl.gov> <414099BB.6090406@bitworks.com> <1094753725.3523.2.camel@exponential.lanl.gov> <4140A7E7.8090204@bitworks.com> Message-ID: <1094758428.3523.5.camel@exponential.lanl.gov> On Thu, 2004-09-09 at 12:58, Richard Smith wrote: > Li-Ta Lo wrote: > > > So you still think it is the timer ? > > It may not be the only problem. But its one problem. The flaky results > I get seem to match up with wierd timeing problems. > > I haven't allocated a lot of time on this because we have found that > our board has hardware problems with the pci bus. And it's difficult to > seperate out all the individual issues. > > But testbios dosen't work on an ASUS P2B booting LB or COTS and my > modified ATI vbios. Nor does LB+ADLO+BOCHS with the original M1 vbios. > X with InitPrimary works both under COTS and LB but that was using > using the orginal M1 bios not my "fixed" version. > > So see I still have a lot of apples->oranges comparisons. I'll try to > scratch out sometime and build a consistent maxrix of everything that > works and what dosen't. > > This is where having that PCI expansion ROM stuff working would come in > _real_ handy. > > > Did you try to access the timer > > HW in testbios ? > > I think HW access is what you _don't_ want to happen. Rather than allow > the vbios to fiddle with the actuall timer hw it needs to provide a > software legacy timer interface that increments consistent with the emu > "clock". The only hardware IO that should be allowed untrapped is the > IO range requested by the card and the Legacy VGA ranges. Currently > testbios lets the vbios access any port it wishes. The X emu must be > doing this or the ATI M1 bios would not work. > Do you mean the InitPrimary thing has software emulation for the timer ? Ollie From rsmith at bitworks.com Thu Sep 9 14:25:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Thu Sep 9 14:25:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <1094758428.3523.5.camel@exponential.lanl.gov> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <41408E0F.7030808@bitworks.com> <1094751034.3523.0.camel@exponential.lanl.gov> <414099BB.6090406@bitworks.com> <1094753725.3523.2.camel@exponential.lanl.gov> <4140A7E7.8090204@bitworks.com> <1094758428.3523.5.camel@exponential.lanl.gov> Message-ID: <4140B283.8060504@bitworks.com> Li-Ta Lo wrote: >>"clock". The only hardware IO that should be allowed untrapped is the >>IO range requested by the card and the Legacy VGA ranges. Currently >>testbios lets the vbios access any port it wishes. The X emu must be >>doing this or the ATI M1 bios would not work. >> > Do you mean the InitPrimary thing has software emulation for the timer ? By default X only softboots secondary display adapters. If you specifiy Option "InitPrimary" "true" in the Screens section it will try to softboot the card even if its the primary display. So when I say with InitPrimary I mean using X 4.3's emu. From adam at cfar.umd.edu Thu Sep 9 20:12:01 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Thu Sep 9 20:12:01 2004 Subject: VGA Problem about 440bx chipset In-Reply-To: <20040909094022.J98308-100000@www.missl.cs.umd.edu> Message-ID: <20040909213631.R38276-100000@www.missl.cs.umd.edu> On Thu, 9 Sep 2004, Adam Sulmicki wrote: > grab latest bochs bios from BOCHS projects, merge the patches I made, as > ndeeded, and see if it works.... although last time I looked at it they > did not make there any significant changes.. at least on the first look. it seems the development of the bios has speed up as of late this is the change log http://bochs.sourceforge.net/cgi-bin/topper.pl?name=CVS+Access+Information&url=http://sourceforge.net/cvs/qmrkgroup_ideq12580 so it might be interesting to see how well latest bios owuld work with ADLO. you still would need to appy some patches. they should be in patch subdirectory in the ADLO sources iirc > ... it is clear that bochs bios could use some improvements, but on upside > one they are made it could boot more than just 2K.... the Win98 did not > seem that far off either... That is, if you are ready to spend some work > on that. > in general bochs bios was written for emulator so most of the issues with > geting it to run on real hardware were timing related. From linuxg33k at shaw.ca Thu Sep 9 21:21:00 2004 From: linuxg33k at shaw.ca (linuxg33k) Date: Thu Sep 9 21:21:00 2004 Subject: about linux, linuxbios and bootup times Message-ID: <41410A7C.1030603@shaw.ca> Hi everyone. I'm a new member, I joined the list to learn more about the Linuxbios project. A question for anyone that can point me in the right direction to information: Q: I read everything on linuxbios.org as well as googled until i got a nosebleed, but i can't find any real world examples of linuxbios + linuxdistro setups. I am looking right now to purchase a linux bios compatable mobo based on the list from linuxbios.org to play around with, but what i was wondering is, just how can linuxbios speed up the boot process of a linux based system? Pardon my newbieness, but I have never had a bios be anything more than a fraction of the total bootup time on any linux system, so does linuxbios have the capability to litterally boot a linux system to cli login prompt of any distro within seconds or not? I realize it's a general question, assume I'm running debian base install ( no x, no desktop environment, boot staright to command line), most of the bootup process is taken up by the bootup scripts checking the hardware and starting up various services (I probably have too many and unoptimized i'm sure but thats another issue alltogether). From everything that I have read, I am understanding that basically its a faster bios that jumps to the distros bootloader when done? Or does this redefine the bootup process where the linuxbios is the bootloader and upon coming to life jumps straight to the distro kernel? If it jumps to the distro bootloader surely the time savings are a few seconds at best? If linuxbios takes over some of the bootloader functions, how does this affect a typicall install if at all? Sorry for the overgeneralized questions, I just need a few answers here, even if vague to help me create a knowledge sandbox into which i can then drill down to proper understanding. By the way, i read an article recently of an interview with the president of Tyan. According to the interview Tyan will be shipping all motherboards with Linuxbios. I have no idea if they are using the real deal from cvs, or forking it, or what, but goddamn that really cool stuff. I'm hoping some of the answers to my question will mean that linux on the desktop has a bright future vis a vis Tyan at least. If anyone wants a copy of it, email me and I will attach the html document - I knew they would take it down as indeed they have. Thanks aforehand!!!! - Rob From daubin at actuality-systems.com Fri Sep 10 09:28:00 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Fri Sep 10 09:28:00 2004 Subject: about linux, linuxbios and bootup times Message-ID: Ok, I will add my 2 cents. This is my setup. 1. Linux bios configures the MB (takes about 1-2 seconds for me and my Tyan) 2. Then it loads etherboot (add maybe another second here) 3. Etherboot remotely loads Kernel from a machine already running thus saving disk spin up time (4-5 seconds) A. I suppose you could have this in RAM and send over a gig pipe or 10 gig pipe if speed is an issue 4. Then Kernel runs (5-10 seconds later) 5. Bash prompt with a well configured linux system What is great about Linux bios is it is flexible. It is also faster than my standard bios as it doesn't Do memory checks and such. It just get's right on to it. Although you can add in your own tests in the Bios or in the payload area. FYI: I've heard a bproc setup gets going in about 10 seconds from power on to running. Here is an even faster plausible setup, you can't do this with a proprietary bios;) 1. Linux bios configures the MB (takes about 1-2 seconds for me and my Tyan) 2. Then it jumps to the linux kernel itself embedded on the BIOS itself 3. Kernel is done loading about 5 to 10 seconds later and you're at cli prompt. This is an ideal case for speed if you have a big enough bios size. M-Tech is Supposed to have an LPC interface to their DOC (disk on chip). This would have made My life so nice, but as far as I know it isn't ready yet. Hope this helps. Oh and the support from this email list is quite awesome. People Here always help me so I try to return the favor as much as I can. Dave -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of linuxg33k Sent: Thursday, September 09, 2004 9:59 PM To: linuxbios at clustermatic.org Subject: about linux, linuxbios and bootup times Hi everyone. I'm a new member, I joined the list to learn more about the Linuxbios project. A question for anyone that can point me in the right direction to information: Q: I read everything on linuxbios.org as well as googled until i got a nosebleed, but i can't find any real world examples of linuxbios + linuxdistro setups. I am looking right now to purchase a linux bios compatable mobo based on the list from linuxbios.org to play around with, but what i was wondering is, just how can linuxbios speed up the boot process of a linux based system? Pardon my newbieness, but I have never had a bios be anything more than a fraction of the total bootup time on any linux system, so does linuxbios have the capability to litterally boot a linux system to cli login prompt of any distro within seconds or not? I realize it's a general question, assume I'm running debian base install ( no x, no desktop environment, boot staright to command line), most of the bootup process is taken up by the bootup scripts checking the hardware and starting up various services (I probably have too many and unoptimized i'm sure but thats another issue alltogether). From everything that I have read, I am understanding that basically its a faster bios that jumps to the distros bootloader when done? Or does this redefine the bootup process where the linuxbios is the bootloader and upon coming to life jumps straight to the distro kernel? If it jumps to the distro bootloader surely the time savings are a few seconds at best? If linuxbios takes over some of the bootloader functions, how does this affect a typicall install if at all? Sorry for the overgeneralized questions, I just need a few answers here, even if vague to help me create a knowledge sandbox into which i can then drill down to proper understanding. By the way, i read an article recently of an interview with the president of Tyan. According to the interview Tyan will be shipping all motherboards with Linuxbios. I have no idea if they are using the real deal from cvs, or forking it, or what, but goddamn that really cool stuff. I'm hoping some of the answers to my question will mean that linux on the desktop has a bright future vis a vis Tyan at least. If anyone wants a copy of it, email me and I will attach the html document - I knew they would take it down as indeed they have. Thanks aforehand!!!! - Rob _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From rsmith at bitworks.com Fri Sep 10 09:31:59 2004 From: rsmith at bitworks.com (Richard Smith) Date: Fri Sep 10 09:31:59 2004 Subject: about linux, linuxbios and bootup times In-Reply-To: <41410A7C.1030603@shaw.ca> References: <41410A7C.1030603@shaw.ca> Message-ID: <4141BEFB.9010306@bitworks.com> linuxg33k wrote: > > By the way, i read an article recently of an interview with the > president of Tyan. According to the interview Tyan will be shipping all > motherboards with Linuxbios. So nuff' Heres the link to the interview. Wow thats awesome. LB is about to go big time. If Tyan leads you can bet many others will follow. http://www.digitimes.com/NewsShow/NewsSearch.asp?DocID=00000000000000000000000000002188&query=TYAN Ron, surely you are part of this. He lists the US goverment as the prime reason for the switch. Whats the full scoop? From ollie at lanl.gov Fri Sep 10 10:20:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Fri Sep 10 10:20:00 2004 Subject: about linux, linuxbios and bootup times In-Reply-To: <4141BEFB.9010306@bitworks.com> References: <41410A7C.1030603@shaw.ca> <4141BEFB.9010306@bitworks.com> Message-ID: <1094830710.3523.9.camel@exponential.lanl.gov> On Fri, 2004-09-10 at 08:49, Richard Smith wrote: > linuxg33k wrote: > > > > > By the way, i read an article recently of an interview with the > > president of Tyan. According to the interview Tyan will be shipping all > > motherboards with Linuxbios. > > So nuff' Heres the link to the interview. Wow thats awesome. LB is > about to go big time. If Tyan leads you can bet many others will follow. > > http://www.digitimes.com/NewsShow/NewsSearch.asp?DocID=00000000000000000000000000002188&query=TYAN > Registeration required. Can you send a copy ? Ollie > Ron, surely you are part of this. He lists the US goverment as the > prime reason for the switch. Whats the full scoop? > > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From kfuchs at winternet.com Fri Sep 10 10:43:01 2004 From: kfuchs at winternet.com (Ken Fuchs) Date: Fri Sep 10 10:43:01 2004 Subject: about linux, linuxbios and bootup times Message-ID: <200409101602.i8AG2PCC005545@tundra.winternet.com> Hi Rob, >I'm a new member, I joined the list to learn more about the Linuxbios >project. A question for anyone that can point me in the right direction >to information: Other then reading all the old (at least more recent) posts to this list, joining the list and working with LinuxBIOS are excellent ways to learn about LinuxBIOS. >Q: I read everything on linuxbios.org as well as googled until i got a >nosebleed, but i can't find any real world examples of linuxbios + >linuxdistro setups. I am looking right now to purchase a linux bios >compatible mobo based on the list from linuxbios.org to play around >with, but what i was wondering is, just how can linuxbios speed up the >boot process of a linux based system? The http://www.linuxbios.org/ web site is anywhere from 1-4 years out of date. No one is updating the web site and I believe the primary LinuxBIOS developers are looking for someone to keep the web site current. The LinuxBIOS developers are too busy designing/writing/porting/debugging code (including helping people get LinuxBIOS working a new mainboard, etc. Even if they had the time to update the web site, it would be better for someone with more skill in web design to do this type of work. >Pardon my newbieness, but I have >never had a bios be anything more than a fraction of the total bootup >time on any linux system, so does linuxbios have the capability to >literally boot a linux system to CLI login prompt of any distro within >seconds or not? I realize it's a general question, assume I'm running >debian base install ( no x, no desktop environment, boot straight to >command line), most of the bootup process is taken up by the bootup >scripts checking the hardware and starting up various services (I >probably have too many and unoptimized I'm sure but that's another issue >altogether). From everything that I have read, I am understanding >that basically its a faster bios that jumps to the distros bootloader >when done? Or does this redefine the bootup process where the linuxbios >is the bootloader and upon coming to life jumps straight to the distro >kernel? If it jumps to the distro bootloader surely the time savings >are a few seconds at best? If linuxbios takes over some of the >bootloader functions, how does this affect a typical install if at all? If a Linux system is taking more time to boot than the COTS BIOS takes to initialize and start a boot loader that Linux system needs a major tune up. Maybe it is not using DMA and perhaps starting up services that aren't needed, etc. LinuxBIOS goes into 32 bit mode within a few seconds of powerup/reset whereas a COTS BIOS initializes all hardware in 16 bit mode. Furthermore, LinuxBIOS only does the minimum hardware initialization that a Linux kernel doesn't do, so the Linux kernel finishes the hardware initialization. When the various layers of code (BIOS, OS) don't repeat the same initializations, this alone can drastically reduce boot up time. LinuxBIOS is composed to two parts, the LinuxBIOS kernel and a Linux kernel: The LinuxBIOS kernel initializes the hardware enough that a Linux kernel can finish the job. This initial kernel is often loaded from an ATA flash, since LinuxBIOS is too fast for most hard drives to be ready (not spun up to speed yet). This initial Linux kernel can be used as the final Linux kernel, but the original intent of the LinuxBIOS was to let the initial Linux kernel do the bulk of the hardware initialization and boot another Linux kernel from any device that the initial Linux kernel supports (Linux boots Linux). >Sorry for the overgeneralized questions, I just need a few answers here, >even if vague to help me create a knowledge sandbox into which i can >then drill down to proper understanding. Follow the discussion on the mailing list for a few months or follow selected threads in the archives or read the LinuxBIOS code for a better understanding of LinuxBIOS. If interested in using LinuxBIOS for AMD64 mainboards see: http://www.openbios.org/LinuxBIOS-AMD64.pdf BTW, Tyan supports LinuxBIOS on eight of its AMD-8000 chipset mainboards. See the Tyan directory in the LinuxBIOS source. Tyan also has LinuxBIOS working on one of its nVidia CK8-04 chipsets (including two CK8-04 chips), but this chip isn't officially released yet and nVidia hasn't yet decided to support LinuxBIOS, I beleive. Anyone interested in using LinuxBIOS on nVidia chipsets, please contact nVidia and let them know now. >By the way, i read an article recently of an interview with the >president of Tyan. According to the interview Tyan will be shipping all >motherboards with Linuxbios. I have no idea if they are using the real >deal from CVS, or forking it, or what, but goddamn that really cool >stuff. I'm hoping some of the answers to my question will mean that >linux on the desktop has a bright future vis a vis Tyan at least. If >anyone wants a copy of it, email me and I will attach the html document >- I knew they would take it down as indeed they have. All the code for Tyan AMD-8000 chipset based mainboards is already in the LinuxBIOS CVS codebase plus code for the S2735 mainboard. See freebios2/targets/tyan in the CVS tree. This clearly isn't all Tyan mainboards yet, but of course it doesn't count LinuxBIOS supported mainboards whose LinuxBIOS code isn't yet in CVS for a variety of reasons. I see that someone has recently posted a URL to the interveiw! Thanks. Sincerely, Ken Fuchs From rsmith at bitworks.com Fri Sep 10 10:52:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Fri Sep 10 10:52:01 2004 Subject: about linux, linuxbios and bootup times In-Reply-To: <1094830710.3523.9.camel@exponential.lanl.gov> References: <41410A7C.1030603@shaw.ca> <4141BEFB.9010306@bitworks.com> <1094830710.3523.9.camel@exponential.lanl.gov> Message-ID: <4141D223.8000405@bitworks.com> Li-Ta Lo wrote: >> >>http://www.digitimes.com/NewsShow/NewsSearch.asp?DocID=00000000000000000000000000002188&query=TYAN > > Registeration required. Can you send a copy ? Really? I got that from a google search.. Worked for me w/o registration. Try this. Scroll down and click on the link to the article works for me. This will surely wrap so rebuild the url. http://216.239.39.104/search?q=cache:n6Te6JG-c0IJ:www.linuxforums.org/forum/viewtopic.php%3Ft%3D22231+tyan+linuxbios&hl=en From rminnich at lanl.gov Fri Sep 10 11:11:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Sep 10 11:11:01 2004 Subject: about linux, linuxbios and bootup times In-Reply-To: References: Message-ID: On Fri, 10 Sep 2004, Dave Aubin wrote: > FYI: I've heard a bproc setup gets going in about 10 seconds from power > on to running. yes indeed. > 1. Linux bios configures the MB (takes about 1-2 seconds for me and my > Tyan) > 2. Then it jumps to the linux kernel itself embedded on the BIOS itself you want to copy that to ram ... > 3. Kernel is done loading about 5 to 10 seconds later and you're at cli > prompt. yes, we used to do that. fast. ron From rminnich at lanl.gov Fri Sep 10 11:14:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Sep 10 11:14:00 2004 Subject: about linux, linuxbios and bootup times In-Reply-To: <4141BEFB.9010306@bitworks.com> References: <41410A7C.1030603@shaw.ca> <4141BEFB.9010306@bitworks.com> Message-ID: On Fri, 10 Sep 2004, Richard Smith wrote: > So nuff' Heres the link to the interview. Wow thats awesome. LB is about to > go big time. If Tyan leads you can bet many others will follow. > > http://www.digitimes.com/NewsShow/NewsSearch.asp?DocID=0000000000000000000000000 > 0002188&query=TYAN > > Ron, surely you are part of this. He lists the US goverment as the prime > reason for the switch. Whats the full scoop? I think it boils down to Tyan being a very forward-thinking company. And yes, at least $30M in RFPs from LANL have gone out requiring linuxbios, and yes, a lot of companies were unable to bid due to lack of ability to provide linuxbios. ron From rminnich at lanl.gov Fri Sep 10 11:19:18 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Sep 10 11:19:18 2004 Subject: about linux, linuxbios and bootup times In-Reply-To: <200409101602.i8AG2PCC005545@tundra.winternet.com> References: <200409101602.i8AG2PCC005545@tundra.winternet.com> Message-ID: On Fri, 10 Sep 2004, Ken Fuchs wrote: > The http://www.linuxbios.org/ web site is anywhere from 1-4 years out of > date. No one is updating the web site and I believe the primary > LinuxBIOS developers are looking for someone to keep the web site > current. The LinuxBIOS developers are too busy > designing/writing/porting/debugging code (including helping people get > LinuxBIOS working a new mainboard, etc. Even if they had the time to > update the web site, it would be better for someone with more skill in > web design to do this type of work. yep. volunteers welcome. > LinuxBIOS goes into 32 bit mode within a few seconds of powerup/reset yeah, even a few instructions :-) ron From kfuchs at winternet.com Fri Sep 10 12:29:01 2004 From: kfuchs at winternet.com (Ken Fuchs) Date: Fri Sep 10 12:29:01 2004 Subject: about linux, linuxbios and bootup times References: Message-ID: <200409101748.i8AHm9Zr005836@tundra.winternet.com> >Ken Fuchs wrote: >> LinuxBIOS goes into 32 bit mode within a few seconds of powerup/reset Ron Minnich wrote: >yeah, even a few instructions :-) Thanks for the gentle correction. I meant a few instructions rather than a few seconds. Sorry. I need to proof read my posts a bit better before sending them. Sincerely, Ken Fuchs From Trellix78 at aol.com Fri Sep 10 12:42:00 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Fri Sep 10 12:42:00 2004 Subject: about linux, linuxbios and bootup times Message-ID: I think the nice thing about linuxbios is the flexibility it provides. You're not limited by what the mainboard manufacturer gives you and can be more creative. With a video chip, you can have accelerated video 2 seconds after the system boots like, say, the xbox. This is on a regular off-the-shelf motherboard. I've been working for the past few weeks on my epia M 10000 motherboard to do some nice things with the video subsystem in the BIOS. It's been great so far and the folks on the message board have done a fantastic job answering questions. I couldn't have gotten anywhere with a closed source BIOS. -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Fri Sep 10 14:23:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Sep 10 14:23:00 2004 Subject: about linux, linuxbios and bootup times [PMX:#] In-Reply-To: References: Message-ID: On Fri, 10 Sep 2004 Trellix78 at aol.com wrote: > I think the nice thing about linuxbios is the flexibility it provides. > ... This is the kind of comment that makes this project worth doing. thanks ron From linuxg33k at shaw.ca Fri Sep 10 20:49:01 2004 From: linuxg33k at shaw.ca (linuxg33k) Date: Fri Sep 10 20:49:01 2004 Subject: Thanks for all the great answers! Message-ID: <414241B9.2040006@shaw.ca> Wow! Allright that answers a whole lot then. I will have more answers when the mobo arrives, I think I'll order a Tyan and an Ecs depending on spec, etc. Does anyone have any recommendations for particular models? Any favourites and why? I understand how the fast boot times now work. This completely changes my pedestrian understanding of computer boot process - what you guys describe is revolutionary. I have a feeling my plans for systems upgrade will be drastically changed after i grok LB (we were planing on refreshing desktops and moving to debian, but LB alone opens up a whole new set of possibilites). As I have buying power for our company, I would like to send encouraging words to Tyan and Nvidia. Does anyone know of any 'in' emails i could send encouraging words to - the corporate websites hide behind low level cronies and fake webreply systems and I'm never sure if the message gets passed on or deleted? Obviously a lot of research is left to be done on our part, but if what i think is possible with LB, we will be standardizing on a single motherboard and single chipset and Linux Bios - this is a message I want to get to the right parties. As a former professional graphic/web designer, I'll take on the challenge of the website if the project needs help. The site is small so I can maintain it fairly easily, but as well, I think we can move to a CMS that would allow users to update info as they want without doing any html. The new mozilla.org website is a wonderfull example of a clean design that I prefer, perhaps something with different esthetics but similar clean layout would be appropriate? Just a thought. If any of the owners are interested email me, I can get started right away. I really think the first thing that is necessary is to toss up as much updated info as possible, so let's get going. As a side note, Linux Bios may or may need a logo like the one mozilla has. Now, the artist for mozilla far outstrips my talents, thats some world class logo work, but, what I thought would be neat tho is to have a LinuxBios official logo that manufacturers can put on their motherboards/systems to indicate it has a linux bios inside. Obviously my marketing side is showing up so if it's feeling a bit gross, I appologize. Any opinions on this idea? And thanks again for the torrent of answers, it's helped a great deal! - Rob From linuxbios at mikebell.org Fri Sep 10 21:27:01 2004 From: linuxbios at mikebell.org (linuxbios at mikebell.org) Date: Fri Sep 10 21:27:01 2004 Subject: about linux, linuxbios and bootup times In-Reply-To: <41410A7C.1030603@shaw.ca> References: <41410A7C.1030603@shaw.ca> Message-ID: <20040911024702.GE736@tinyvaio.nome.ca> On Thu, Sep 09, 2004 at 06:59:24PM -0700, linuxg33k wrote: > From everything that I have read, I am understanding > that basically its a faster bios that jumps to the distros bootloader > when done? Or does this redefine the bootup process where the linuxbios > is the bootloader and upon coming to life jumps straight to the distro > kernel? If it jumps to the distro bootloader surely the time savings > are a few seconds at best? If linuxbios takes over some of the > bootloader functions, how does this affect a typicall install if at all? LinuxBIOS (plus the payload) will get you as far as loading your linux kernel. It doesn't do anything for speeding up the time from loading of kernel to launching of process 1, or the time from launching of process 1 to usability. _However_, it's actually a relatively simple process to get from jumping to the kernel to, for instance, a directfb based GUI in under 3 seconds, so those few seconds LinuxBIOS saves you can make a big, big difference. A lot of the focus of LinuxBIOS has not been around improved boot times, which is why stuff like the EPIA-M's terrible boot time has gone unfixed (there are sleeps in there, and also it defaults to a compressed linuxbios image) but you take what you can get with free software, at least linuxbios is GPLed, so if you care enough you can fix it yourself and contribute those changes back for everyone else. From sagivy at 3vium.com Sun Sep 12 04:27:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Sun Sep 12 04:27:01 2004 Subject: building romimage for tyan s2850 mainboard Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB2367E1@cronos.trivium> I am trying to build and run a romimage for tyan s2850: Hardware: No disks Superio : w83627hf Ethernet: broadcom Southbridge: 8111 It looks like the default mainboard configuration. In order to start I wanted to build only the normal image. Only to see some output in the console. I made the following changes in Config.lb: * put the romimage "fallback" statement in comment. * FALLBACK_SIZE =0. * HAVE_FALLBACK_BOOT = 0 * remove "fallback from build: buildrom ./linuxbios.rom ROM_SIZE "normal" * Use filo boot. I built the romimage, burn it and the console doesn't show output. The problem is not in the cable. What am I doing wrong ? Thanks, Sagiv -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Sun Sep 12 05:09:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Sun Sep 12 05:09:00 2004 Subject: building romimage for tyan s2850 mainboard In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB2367E1@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB2367E1@cronos.trivium> Message-ID: <20040912102806.GA27797@openbios.org> * Sagiv Yefet [040912 12:50]: > In order to start I wanted to build only the normal image. Only to see > some output in the console. > > I made the following changes in Config.lb: > > * put the romimage "fallback" statement in comment. > * FALLBACK_SIZE =0. > * HAVE_FALLBACK_BOOT = 0 > * remove "fallback from build: buildrom ./linuxbios.rom ROM_SIZE > "normal" The way LinuxBIOS is built you need to build a fallback image without normal image instead. This will work. The fallback image is more a "base image" whereas the normal image is an "add on image". Stefan From stepan at openbios.org Mon Sep 13 07:07:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Mon Sep 13 07:07:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <1094747164.3158.14.camel@exponential.lanl.gov> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> Message-ID: <20040913122608.GA9955@openbios.org> * Li-Ta Lo [040909 18:26]: > Did they do anything on the "core" x86emu? Last time I checked, > XF86 4.4.0 has almost the same x86emu as testbios. Yes. But not only the x86 emulation itself is interesting, but also the legacy bios emulation around it. There are so many branches and forks out there, we _have_ to do something to unite them, otherwise we cannot reach our goal in this area. Nobody knows what the others are really doing. I am going to set up an GNU Arch repository on openbios.org asap so we can set a starting point for development. We need some clarification on what parts belong in this repository, and which ones don't. Like, where do the PCI access functions go, logically, in this picture? Stefan From ollie at lanl.gov Mon Sep 13 10:01:01 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Mon Sep 13 10:01:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <16709.21894.41734.724783@xf14.fra.suse.de> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <16709.21894.41734.724783@xf14.fra.suse.de> Message-ID: <1095088847.17240.8.camel@exponential.lanl.gov> On Mon, 2004-09-13 at 02:08, Egbert Eich wrote: > Li-Ta Lo writes: > > > > Did they do anything on the "core" x86emu? Last time I checked, > > XF86 4.4.0 has almost the same x86emu as testbios. > > Any XF86 stuff may be outdated. > Then, what is the most updated thing? X.org ? > > > > BTW, I think a fork of x86emu is inevitable. If we want to move > > testbios into LinuxBIOS, we have to remove all OS/libc dependence > > from the emulator. > > > > A fork would be crazy. x86emu is hard enough to maintain as it is: > the main sources are hosted by scitech somewhere deep down under > then it is also living in the X.Org tree in extras/ where the stuff > that's maintained elsewhere exists. > Scitech has this stupid version control system called 'Perforce'. > I have been unable to commit my stuff back there although > Kendall Bennett and I have tired hard to make write access work for > me. > > Removing OS/libc dependences is a valid proposal which should be persued > in the main version. > I would like to move hosting someplace else. I could host it on > freedesktop.org - although it is not primarily desktop related. > I have not done it so far for lack of time, however if somebody > would volunteer to help we could get started on this. > Since we (LinuxBIOS) are pretty much depending on x86emu for initializing the VGA and probably other "obscured" device, I am willing to help. Ollie From rsmith at bitworks.com Mon Sep 13 10:04:00 2004 From: rsmith at bitworks.com (Richard Smith) Date: Mon Sep 13 10:04:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <16709.22607.181349.963456@xf14.fra.suse.de> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <41408E0F.7030808@bitworks.com> <1094751034.3523.0.camel@exponential.lanl.gov> <414099BB.6090406@bitworks.com> <1094753725.3523.2.camel@exponential.lanl.gov> <4140A7E7.8090204@bitworks.com> <16709.22607.181349.963456@xf14.fra.suse.de> Message-ID: <4145BB48.5060305@bitworks.com> Egbert Eich wrote: > > But testbios dosen't work on an ASUS P2B booting LB or COTS and my > > modified ATI vbios. Nor does LB+ADLO+BOCHS with the original M1 vbios. > > X with InitPrimary works both under COTS and LB but that was using > > using the orginal M1 bios not my "fixed" version. > > The X version has eveloved quite a lot and is a lot smarter now as the > version of vbios that it originally forked off. Where does the smartest version now live? X.org or whats in Xfree86 4.4? > > IO range requested by the card and the Legacy VGA ranges. Currently > > testbios lets the vbios access any port it wishes. The X emu must be > > doing this or the ATI M1 bios would not work. > > Currently the emulator in X doesn't do this either. > It intercepts certain port accesses like 0x43 and 0x5c and attempts to > emulate the action behind it. Also it tries to intercept PCI accesses, > however this is only true if they happen 32bit wise. So it just handles the timer. Well it does it better than testbios. Seems a sync would be a good thing. How hard is that currently? Do you have to pull the entire xc tree down? From ollie at lanl.gov Mon Sep 13 10:08:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Mon Sep 13 10:08:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040913122608.GA9955@openbios.org> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> Message-ID: <1095089226.17240.15.camel@exponential.lanl.gov> On Mon, 2004-09-13 at 06:26, Stefan Reinauer wrote: > * Li-Ta Lo [040909 18:26]: > > Did they do anything on the "core" x86emu? Last time I checked, > > XF86 4.4.0 has almost the same x86emu as testbios. > > Yes. But not only the x86 emulation itself is interesting, but also the > legacy bios emulation around it. There are so many branches and forks > out there, we _have_ to do something to unite them, otherwise we cannot > reach our goal in this area. Nobody knows what the others are really > doing. > > I am going to set up an GNU Arch repository on openbios.org asap so we > can set a starting point for development. > > We need some clarification on what parts belong in this repository, and > which ones don't. Like, where do the PCI access functions go, logically, > in this picture? Why do we need PCI access function in the emulator ? If the BIOS wants to access PCI CS, it jsut do it by itself. If you are talking about the int 0x1A emulation, it should be in the "helper functions" as the IO/MEM access routines. So the x86emu should be seperated in two parts, one is the core x86 instruction emulation/virtual machine and other is the IO/MEM/INT support functions. Ollie From ollie at lanl.gov Mon Sep 13 10:11:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Mon Sep 13 10:11:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040913122608.GA9955@openbios.org> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> Message-ID: <1095089369.17240.18.camel@exponential.lanl.gov> On Mon, 2004-09-13 at 06:26, Stefan Reinauer wrote: > * Li-Ta Lo [040909 18:26]: > > Did they do anything on the "core" x86emu? Last time I checked, > > XF86 4.4.0 has almost the same x86emu as testbios. > > Yes. But not only the x86 emulation itself is interesting, but also the > legacy bios emulation around it. There are so many branches and forks > out there, we _have_ to do something to unite them, otherwise we cannot > reach our goal in this area. Nobody knows what the others are really > doing. > Do you have a list of people who is doing things on x86emu ? I only one I found the the old scitech ftp and XF86 distribution. Ollie From rsmith at bitworks.com Mon Sep 13 10:20:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Mon Sep 13 10:20:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040913122608.GA9955@openbios.org> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> Message-ID: <4145BF36.1000803@bitworks.com> Stefan Reinauer wrote: > * Li-Ta Lo [040909 18:26]: >>Did they do anything on the "core" x86emu? Last time I checked, >>XF86 4.4.0 has almost the same x86emu as testbios. > Yes. But not only the x86 emulation itself is interesting, but also the > legacy bios emulation around it. There are so many branches and forks This is probally where the difference matters most for things like vbios. support of the legacy bios calls. VGA card bioses are really fragile. One wrong return value and its off the trolly or hung in some sort of loop. > out there, we _have_ to do something to unite them, otherwise we cannot > reach our goal in this area. Nobody knows what the others are really > doing. > I am going to set up an GNU Arch repository on openbios.org asap so we > can set a starting point for development. Cool. I'm going to route this info back to Jon Smirl who seems to be in charge of the DRI x86emu stuff hopefully he can merge in any improvements from his stuff. From ollie at lanl.gov Mon Sep 13 12:33:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Mon Sep 13 12:33:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <16709.56463.924536.617422@xf14.fra.suse.de> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> <4145BF36.1000803@bitworks.com> <16709.56463.924536.617422@xf14.fra.suse.de> Message-ID: <1095097966.24445.1.camel@exponential.lanl.gov> On Mon, 2004-09-13 at 11:44, Egbert Eich wrote: > > Cool. I'm going to route this info back to Jon Smirl who seems to be in > > charge of the DRI x86emu stuff hopefully he can merge in any > > improvements from his stuff. > > > > I would prefer to do this stuff myself as Jon is mostly working on > top of my old code. I would rather use the code from X.Org as a basis > for enhancements as it had more public exposure and testing. Are you working on the core instruction emulation or something else like the PCI BIOS you mentioned ? Ollie From beltsw at mindspring.com Mon Sep 13 13:15:01 2004 From: beltsw at mindspring.com (Dave Belt) Date: Mon Sep 13 13:15:01 2004 Subject: mkelfImage Message-ID: <004901c499c0$4ef312e0$6401a8c0@BeltCo4> There appear to be a couple versions of mkelfImage floating around and I've heard reports of varying degrees of reliability with them. Could anyone enlighten me on differences here? We're trying to boot Linux via Etherboot and are getting the following: Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 Loading Etherboot version: 5.2.2 ROM segment 0x2e81 length 0x7938 reloc 0x00020000 CPU 1664 Mhz Etherboot 5.2.2 (GPL) http://etherboot.org Tagged ELF for [3C90X] get_memsizes | linuxbios Relocating _text from: [000244e0,00034330) to [efef01b0,eff00000) Probing pci nic... [3c905b-tpo100] 3C90X Driver 2.00 Copyright 1999 LightSys Technology Services, Inc. Portions Copyright 1999 Steve Smith Provided with ABSOLUTELY NO WARRANTY. ------------------------------------------------------------------------ ------- MAC Address = 00:10:5A:A2:5A:82 Connectors present: 10Base-T / 100Base-TX. Searching for server (DHCP)... Me: 192.168.123.3, Server: 192.168.123.254, Gateway 192.168.123.254 Loading 192.168.123.254:vmlinuz.elf (ELF)... done Issuing RESET: elf_start | breakpoint = 0x0002ee44 Has anyone seen this before? Is this a problem with our Linux kernel or is the problem with Etherboot? Thanks in advance. -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Mon Sep 13 13:55:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Mon Sep 13 13:55:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <1095089369.17240.18.camel@exponential.lanl.gov> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> <1095089369.17240.18.camel@exponential.lanl.gov> Message-ID: <20040913191424.GB16056@openbios.org> * Li-Ta Lo [040913 17:29]: > Do you have a list of people who is doing things on x86emu ? I only > one I found the the old scitech ftp and XF86 distribution. Another one is Milo, the Alpha Linux Bootloader.. Stefan From daubin at actuality-systems.com Mon Sep 13 13:57:44 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Mon Sep 13 13:57:44 2004 Subject: mkelfImage Message-ID: Hi, I recall getting that. You want to use Eric's 2.5 flavor. I've attached it here: Dave ________________________________ From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Dave Belt Sent: Monday, September 13, 2004 2:35 PM To: linuxbios at clustermatic.org Subject: mkelfImage There appear to be a couple versions of mkelfImage floating around and I've heard reports of varying degrees of reliability with them. Could anyone enlighten me on differences here? We're trying to boot Linux via Etherboot and are getting the following: Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 Loading Etherboot version: 5.2.2 ROM segment 0x2e81 length 0x7938 reloc 0x00020000 CPU 1664 Mhz Etherboot 5.2.2 (GPL) http://etherboot.org Tagged ELF for [3C90X] get_memsizes | linuxbios Relocating _text from: [000244e0,00034330) to [efef01b0,eff00000) Probing pci nic... [3c905b-tpo100] 3C90X Driver 2.00 Copyright 1999 LightSys Technology Services, Inc. Portions Copyright 1999 Steve Smith Provided with ABSOLUTELY NO WARRANTY. ------------------------------------------------------------------------ ------- MAC Address = 00:10:5A:A2:5A:82 Connectors present: 10Base-T / 100Base-TX. Searching for server (DHCP)... Me: 192.168.123.3, Server: 192.168.123.254, Gateway 192.168.123.254 Loading 192.168.123.254:vmlinuz.elf (ELF)... done Issuing RESET: elf_start | breakpoint = 0x0002ee44 Has anyone seen this before? Is this a problem with our Linux kernel or is the problem with Etherboot? Thanks in advance. -------------- next part -------------- An HTML attachment was scrubbed... URL: -------------- next part -------------- A non-text attachment was scrubbed... Name: mkelfImage-2.5.tar Type: application/x-tar Size: 829440 bytes Desc: mkelfImage-2.5.tar URL: From ollie at lanl.gov Mon Sep 13 14:16:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Mon Sep 13 14:16:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040913191424.GB16056@openbios.org> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> <1095089369.17240.18.camel@exponential.lanl.gov> <20040913191424.GB16056@openbios.org> Message-ID: <1095104132.25563.2.camel@exponential.lanl.gov> On Mon, 2004-09-13 at 13:14, Stefan Reinauer wrote: > * Li-Ta Lo [040913 17:29]: > > Do you have a list of people who is doing things on x86emu ? I only > > one I found the the old scitech ftp and XF86 distribution. > > Another one is Milo, the Alpha Linux Bootloader.. Is there anyone still working on that ? I thought Alpha is dead now. Ollie From rsmith at bitworks.com Mon Sep 13 14:44:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Mon Sep 13 14:44:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <16709.56463.924536.617422@xf14.fra.suse.de> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> <4145BF36.1000803@bitworks.com> <16709.56463.924536.617422@xf14.fra.suse.de> Message-ID: <4145FD0D.2070804@bitworks.com> Egbert Eich wrote: > > This is probally where the difference matters most for things like > > vbios. support of the legacy bios calls. VGA card bioses are really > > fragile. One wrong return value and its off the trolly or hung in some > > sort of loop. > > Yes, however we have been pretty lucky so far. > The only real issues arose with 'embedded BIOSes' like on laptops. > These video BIOSes sometimes try to call fynctions in the system BIOS > which behave strangely themselves (like try to switch to protected mode). Oh its far worse than that. They actually have special extensions that the OEM has to support so that they can do special stuff for TV out or LCD panel type detection. And of course this is all Mfg specific and only the info only acessable under NDA. > I would prefer to do this stuff myself as Jon is mostly working on > top of my old code. I would rather use the code from X.Org as a basis > for enhancements as it had more public exposure and testing. Ok. So you want to seed the repository with the stuff from X.org and let everyone else re-implemnt thier stuff on top of that and then feedback what changes they had to make? From stepan at openbios.org Mon Sep 13 15:23:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Mon Sep 13 15:23:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <16709.57049.216500.620111@xf14.fra.suse.de> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> <16709.57049.216500.620111@xf14.fra.suse.de> Message-ID: <20040913204228.GA17305@openbios.org> * Egbert Eich [040913 19:54]: > In the Scitech repository there are already two things: the CPU emulator > and the PC environment. Both reside in separate directories. > The directory structure needs to be changed (in a smart way so that > resyncing with scitech isn't an issue and the emulator can be used > separately) and the PC environment needs to be cleaned up and enhanced. How open is scitech to a restructure of their work? We could simplify things a lot. Last time I looked at x86emu I had major problems getting the different type definitions together ... > Right now I'm in the midst of a release cycle (Stefan knows what that > means) but I hope to find some time afterwards. Good luck :-) I have plenty of things on my todo list, too. I will create a repository within the next 1-2 weeks, so until after 9.2 we can start with major spring/winter cleanup ;) Stefan From ollie at lanl.gov Mon Sep 13 15:44:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Mon Sep 13 15:44:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <16709.57049.216500.620111@xf14.fra.suse.de> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> <16709.57049.216500.620111@xf14.fra.suse.de> Message-ID: <1095109417.25563.5.camel@exponential.lanl.gov> On Mon, 2004-09-13 at 11:54, Egbert Eich wrote: > Stefan Reinauer writes: > > * Li-Ta Lo [040909 18:26]: > > > Did they do anything on the "core" x86emu? Last time I checked, > > > XF86 4.4.0 has almost the same x86emu as testbios. > > > > Yes. But not only the x86 emulation itself is interesting, but also the > > legacy bios emulation around it. There are so many branches and forks > > out there, we _have_ to do something to unite them, otherwise we cannot > > reach our goal in this area. Nobody knows what the others are really > > doing. > > > > I am going to set up an GNU Arch repository on openbios.org asap so we > > can set a starting point for development. > > > > We need some clarification on what parts belong in this repository, and > > which ones don't. Like, where do the PCI access functions go, logically, > > in this picture? > > > > In the Scitech repository there are already two things: the CPU emulator > and the PC environment. Both reside in separate directories. > The directory structure needs to be changed (in a smart way so that > resyncing with scitech isn't an issue and the emulator can be used > separately) and the PC environment needs to be cleaned up and enhanced. > In your X.org CVS log, you said you resync with Scitech's code. Is it the 0.8 from their ftp site or something else ? Ollie From stepan at openbios.org Tue Sep 14 01:55:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Tue Sep 14 01:55:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <1095104132.25563.2.camel@exponential.lanl.gov> References: <65.3320c719.2e705b24@aol.com> <413F251F.1060503@bitworks.com> <20040909075028.GD13092@openbios.org> <1094747164.3158.14.camel@exponential.lanl.gov> <20040913122608.GA9955@openbios.org> <1095089369.17240.18.camel@exponential.lanl.gov> <20040913191424.GB16056@openbios.org> <1095104132.25563.2.camel@exponential.lanl.gov> Message-ID: <20040914071428.GA24046@openbios.org> * Li-Ta Lo [040913 21:35]: > > Another one is Milo, the Alpha Linux Bootloader.. > > Is there anyone still working on that ? I thought Alpha is dead now. > > Ollie Not really.. the last couple of years only me and Jay Estabrook were working on Milo anyways. It is a big nasty bunch of code that noone really wants to touch. I still have the plans to use the last few code snippets that are usable to get OpenBIOS as a simple bootloader for AlphaBIOS/ARCS based machines. Like, the PAL code and some early init should still be usable, all kernel linkage must be removed. No idea whether I will actually get to do this before everybody stopped using these machines though ;) My own Alpha machine is SRM based, so I have no immediate pressure or testing possibilities anyways. Stefan From sagivy at 3vium.com Tue Sep 14 04:30:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Tue Sep 14 04:30:01 2004 Subject: NIC: broadcom/tg3_ipmi Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6B6@cronos.trivium> I try to build bios for tyan s2850 with broadcom NIC. This is the ERROR I got: [broadcom_nic.c] /tmp/ccXAyjD1.s: Assembler messages: /tmp/ccXAyjD1.s:39: Warning: setting incorrect section attributes for .rodata.pci_driver /usr/local/lib/gcc-lib/i686-pc-linux-gnu/3.3.1/../../../../i686-pc-linux -gnu/bin/ld: warning: cannot find entry symbol _start; defaulting to 08048074 /tmp/ccavzIGX.o(.text+0xb): In function `broadcom_nic_init': : undefined reference to `pci_read_config16' /tmp/ccavzIGX.o(.text+0x1a): In function `broadcom_nic_init': : undefined reference to `pci_write_config16' /tmp/ccavzIGX.o(.text+0x26): In function `broadcom_nic_init': : undefined reference to `do_printk' /tmp/ccavzIGX.o(.data+0x0): undefined reference to `pci_dev_read_resources' /tmp/ccavzIGX.o(.data+0x4): undefined reference to `pci_dev_set_resources' /tmp/ccavzIGX.o(.data+0x8): undefined reference to `pci_dev_enable_resources' collect2: ld returned 1 exit status What is the problem ? Sagiv -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Tue Sep 14 05:37:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Tue Sep 14 05:37:00 2004 Subject: building romimage for tyan s2850 mainboard In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6B5@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6B5@cronos.trivium> Message-ID: <20040914105645.GA26746@openbios.org> * Sagiv Yefet [040914 12:43]: > Thanks, it worked. > > There are 2 errors: > 1. ERROR - could not find PCI 1:03.0, using defaults This looks like an error in the mptable creation, but I am not sure without the context here. > 2. ERROR: PNP: 002e.b 70 not allocated > in Config.lb: 002e.b = HW monitor No idea. I always kind of guessed when fiddling with PnP configuration. > what does it means? Can anyone on the list give some details here? Stefan From stepan at openbios.org Tue Sep 14 05:40:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Tue Sep 14 05:40:00 2004 Subject: NIC: broadcom/tg3_ipmi In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6B6@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6B6@cronos.trivium> Message-ID: <20040914105843.GB26746@openbios.org> * Sagiv Yefet [040914 12:53]: > I try to build bios for tyan s2850 with broadcom NIC. Very weird. Maybe something is wrong with your compiler, or your binutils and compiler don't fit well together? Never seen this error. Is your compiler an unpatched 3.3.1? What binutils version are you using? > This is the ERROR I got: [broadcom_nic.c] > > /tmp/ccXAyjD1.s: Assembler messages: > /tmp/ccXAyjD1.s:39: Warning: setting incorrect section attributes for > .rodata.pci_driver > /usr/local/lib/gcc-lib/i686-pc-linux-gnu/3.3.1/../../../../i686-pc-linux > -gnu/bin/ld: warning: cannot find entry symbol _start; defaulting to > 08048074 > /tmp/ccavzIGX.o(.text+0xb): In function `broadcom_nic_init': > : undefined reference to `pci_read_config16' > /tmp/ccavzIGX.o(.text+0x1a): In function `broadcom_nic_init': > : undefined reference to `pci_write_config16' > /tmp/ccavzIGX.o(.text+0x26): In function `broadcom_nic_init': > : undefined reference to `do_printk' > /tmp/ccavzIGX.o(.data+0x0): undefined reference to > `pci_dev_read_resources' > /tmp/ccavzIGX.o(.data+0x4): undefined reference to > `pci_dev_set_resources' > /tmp/ccavzIGX.o(.data+0x8): undefined reference to > `pci_dev_enable_resources' > collect2: ld returned 1 exit status > > What is the problem ? Stefan From hansolofalcon at worldnet.att.net Tue Sep 14 07:33:00 2004 From: hansolofalcon at worldnet.att.net (Gregg C Levine) Date: Tue Sep 14 07:33:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040914071428.GA24046@openbios.org> Message-ID: <001201c49a59$e04fa7a0$6401a8c0@who5> Hello from Gregg C Levine Funny you should be bringing that up now. HP is holding a road show on the state of the art as applied to the Alpha, and relatives, here in NYC, tomorrow Wednesday the 15. They have already told me, that the EV7z processors will stay active at least until something runs out. Figure about the next ten years. The original blue Alphas, are supported, I mean you can call them and ask for support for parts, and manuals, but that's it. ------------------- Gregg C Levine hansolofalcon at worldnet.att.net ------------------------------------------------------------ "The Force will be with you...Always." Obi-Wan Kenobi "Use the Force, Luke."? Obi-Wan Kenobi > -----Original Message----- > From: linuxbios-admin at clustermatic.org [mailto:linuxbios- > admin at clustermatic.org] On Behalf Of Stefan Reinauer > Sent: Tuesday, September 14, 2004 3:14 AM > To: Li-Ta Lo > Cc: Richard Smith; rminnich at lanl.gov; Trellix78 at aol.com; LinuxBIOS; > eich at suse.de > Subject: Re: epia m vga + memcpy update > > * Li-Ta Lo [040913 21:35]: > > > Another one is Milo, the Alpha Linux Bootloader.. > > > > Is there anyone still working on that ? I thought Alpha is dead now. > > > > Ollie > > Not really.. the last couple of years only me and Jay Estabrook were > working on Milo anyways. It is a big nasty bunch of code that noone > really wants to touch. > I still have the plans to use the last few code snippets that are usable > to get OpenBIOS as a simple bootloader for AlphaBIOS/ARCS based > machines. Like, the PAL code and some early init should still be usable, > all kernel linkage must be removed. > No idea whether I will actually get to do this before everybody stopped > using these machines though ;) > My own Alpha machine is SRM based, so I have no immediate pressure or > testing possibilities anyways. > > Stefan > > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From stepan at openbios.org Tue Sep 14 09:09:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Tue Sep 14 09:09:01 2004 Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy@3vium.com] Message-ID: <20040914142905.GB29493@openbios.org> 1) Please Cc the mailing list, there are many people who might help you quicker/better than I do. 2) I don't understand your first question at all. 3) "invalid CMOS LB checksum" Means that the CMOS is not valid for LinuxBIOS. Probably because you had a different firmware running before LinuxBIOS in that machine. This error should go away automatically after rebooting. Stefan ----- Forwarded message from Sagiv Yefet ----- Date: Tue, 14 Sep 2004 16:41:46 +0200 From: "Sagiv Yefet" To: "Stefan Reinauer" Subject: RE: building romimage for tyan s2850 mainboard I comment out the: #dir /drivers/ati/ragexl -- video which pci line in the southbridge it relate to? southbridge amd/amd8111 "amd8111" link 0 pci 0:0.0 pci 0:1.0 on pci 0:1.1 on pci 0:1.2 on pci 0:1.3 on pci 0:1.5 off pci 0:1.6 off pci 1:0.0 on pci 1:0.1 on pci 1:0.2 off pci 1:1.0 off end what is this ERROR means ? invalid CMOS LB checksum Sagiv. -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 12:57 PM To: Sagiv Yefet Cc: linuxbios at clustermatic.org Subject: Re: building romimage for tyan s2850 mainboard * Sagiv Yefet [040914 12:43]: > Thanks, it worked. > > There are 2 errors: > 1. ERROR - could not find PCI 1:03.0, using defaults This looks like an error in the mptable creation, but I am not sure without the context here. > 2. ERROR: PNP: 002e.b 70 not allocated > in Config.lb: 002e.b = HW monitor No idea. I always kind of guessed when fiddling with PnP configuration. > what does it means? Can anyone on the list give some details here? Stefan ----- End forwarded message ----- From YhLu at tyan.com Tue Sep 14 11:25:01 2004 From: YhLu at tyan.com (YhLu) Date: Tue Sep 14 11:25:01 2004 Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy@ 3vium.com] Message-ID: <3174569B9743D511922F00A0C94314230624BBF8@TYANWEB> Sagiv, I just sent you tar ball of my source code before I added S2895 and S2735 support. Please check it out. Regards YH -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 7:29 AM To: linuxbios at clustermatic.org; Sagiv Yefet Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] 1) Please Cc the mailing list, there are many people who might help you quicker/better than I do. 2) I don't understand your first question at all. 3) "invalid CMOS LB checksum" Means that the CMOS is not valid for LinuxBIOS. Probably because you had a different firmware running before LinuxBIOS in that machine. This error should go away automatically after rebooting. Stefan ----- Forwarded message from Sagiv Yefet ----- Date: Tue, 14 Sep 2004 16:41:46 +0200 From: "Sagiv Yefet" To: "Stefan Reinauer" Subject: RE: building romimage for tyan s2850 mainboard I comment out the: #dir /drivers/ati/ragexl -- video which pci line in the southbridge it relate to? southbridge amd/amd8111 "amd8111" link 0 pci 0:0.0 pci 0:1.0 on pci 0:1.1 on pci 0:1.2 on pci 0:1.3 on pci 0:1.5 off pci 0:1.6 off pci 1:0.0 on pci 1:0.1 on pci 1:0.2 off pci 1:1.0 off end what is this ERROR means ? invalid CMOS LB checksum Sagiv. -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 12:57 PM To: Sagiv Yefet Cc: linuxbios at clustermatic.org Subject: Re: building romimage for tyan s2850 mainboard * Sagiv Yefet [040914 12:43]: > Thanks, it worked. > > There are 2 errors: > 1. ERROR - could not find PCI 1:03.0, using defaults This looks like an error in the mptable creation, but I am not sure without the context here. > 2. ERROR: PNP: 002e.b 70 not allocated > in Config.lb: 002e.b = HW monitor No idea. I always kind of guessed when fiddling with PnP configuration. > what does it means? Can anyone on the list give some details here? Stefan ----- End forwarded message ----- _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From adam at cfar.umd.edu Tue Sep 14 12:53:01 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Tue Sep 14 12:53:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040914071428.GA24046@openbios.org> Message-ID: <20040914142217.K83677-100000@www.missl.cs.umd.edu> On Tue, 14 Sep 2004, Stefan Reinauer wrote: > Not really.. the last couple of years only me and Jay Estabrook were > working on Milo anyways. It is a big nasty bunch of code that noone > really wants to touch. sound as if you were talking about BOCHS BIOS :-) From stepan at openbios.org Tue Sep 14 15:17:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Tue Sep 14 15:17:00 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040914142217.K83677-100000@www.missl.cs.umd.edu> References: <20040914071428.GA24046@openbios.org> <20040914142217.K83677-100000@www.missl.cs.umd.edu> Message-ID: <20040914203716.GB2697@openbios.org> * Adam Sulmicki [040914 20:22]: > On Tue, 14 Sep 2004, Stefan Reinauer wrote: > > > Not really.. the last couple of years only me and Jay Estabrook were > > working on Milo anyways. It is a big nasty bunch of code that noone > > really wants to touch. > > sound as if you were talking about BOCHS BIOS :-) It's about 200 kloc linking against a couple of million lines of linux kernel code.. bochs bios is nasty, but I think Milo exceeds this. Which is the main reason I stopped updating it.. building it with recent compilers and recent kernels would require a major rewrite of some parts Stefan From rsmith at bitworks.com Tue Sep 14 16:15:01 2004 From: rsmith at bitworks.com (Richard Smith) Date: Tue Sep 14 16:15:01 2004 Subject: epia m vga + memcpy update In-Reply-To: <20040914203716.GB2697@openbios.org> References: <20040914071428.GA24046@openbios.org> <20040914142217.K83677-100000@www.missl.cs.umd.edu> <20040914203716.GB2697@openbios.org> Message-ID: <41476402.6030904@bitworks.com> Stefan Reinauer wrote: > * Adam Sulmicki [040914 20:22]: > >>>working on Milo anyways. It is a big nasty bunch of code that noone >>>really wants to touch. >> >>sound as if you were talking about BOCHS BIOS :-) > > It's about 200 kloc linking against a couple of million lines of linux > kernel code.. bochs bios is nasty, but I think Milo exceeds this. Which I don't think the 'C' portion of the bochs stuff is that bad. I was able to manipulate it quite eaisly. The assembly portion however is a different story. That stuff is fragile. From liutao at safe-mail.net Tue Sep 14 23:06:00 2004 From: liutao at safe-mail.net (Liu Tao) Date: Tue Sep 14 23:06:00 2004 Subject: PCI configuration question Message-ID: <4147C46A.8090009@safe-mail.net> Hello all, In the LinuxBIOS-AMD64 document the author explains the "pci" keyword > The first occurrence of the pci keyword tells LinuxBIOS where the bridge device start, > relative to PCI configuration space used by the bridge. The following occurences of > the pci keyword describe the provided devices. then gives an example > northbridge amd/amdk8 "mc1" > pci 0:19.0 > pci 0:19.0 > pci 0:19.0 > pci 0:19.1 > pci 0:19.2 > pci 0:19.3 > end I'm not clear why the example repeate "pci 0:19.0" three times? I noticed in chip.c the chip_enumerate() function checks the same path > identical_paths = (i > 0) && (path_eq(&chip->path[i - 1].path, &chip->path[i].path)); but I can't find out the real intent. Another question maybe related to the former one is, in "device" structure what does the "link[MAX_LINKS]" and "links" member describe? Does "link[MAX_LINKS]" describes the secondary or subordinate bus of a bridge device? Why MAX_LINKS is defined to 3? Thanks in advance. From liutao at safe-mail.net Wed Sep 15 04:18:00 2004 From: liutao at safe-mail.net (Liu Tao) Date: Wed Sep 15 04:18:00 2004 Subject: PCI configuration question In-Reply-To: <4147C46A.8090009@safe-mail.net> References: <4147C46A.8090009@safe-mail.net> Message-ID: <41480D9A.8060305@safe-mail.net> Hello, Maybe the question is why put identical paths in the chip structure? Regards, Liu Tao From rimy2000 at hotmail.com Wed Sep 15 04:32:01 2004 From: rimy2000 at hotmail.com (elife elife) Date: Wed Sep 15 04:32:01 2004 Subject: about flash_rom SST 49LF002A support Message-ID: Hi, It seems flash_rom in freebios/util/flash_and_burn not support SST 49LF002A flash chip. Who can teach me how to add this feature? Thanks! _________________________________________________________________ ???? MSN Explorer: http://explorer.msn.com/lccn/ From ebiederman at lnxi.com Wed Sep 15 04:40:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 15 04:40:00 2004 Subject: PCI configuration question In-Reply-To: <4147C46A.8090009@safe-mail.net> References: <4147C46A.8090009@safe-mail.net> Message-ID: Liu Tao writes: > Hello all, > > In the LinuxBIOS-AMD64 document the author explains the "pci" keyword > > The first occurrence of the pci keyword tells LinuxBIOS where the bridge > device start, > > relative to PCI configuration space used by the bridge. The following > occurences of > > the pci keyword describe the provided devices. > > then gives an example > > northbridge amd/amdk8 "mc1" > > pci 0:19.0 > > pci 0:19.0 > > pci 0:19.0 > > pci 0:19.1 > > pci 0:19.2 > > pci 0:19.3 > > end > > I'm not clear why the example repeate "pci 0:19.0" three times? > I noticed in chip.c the chip_enumerate() function checks the same path > > identical_paths = (i > 0) && (path_eq(&chip->path[i - 1].path, > &chip->path[i].path)); > but I can't find out the real intent. Because I need some way of showing there are 3 hypertransport links. With just one I don't have enough places to hang the devices off of. > Another question maybe related to the former one is, in "device" structure > what does the "link[MAX_LINKS]" and "links" member describe? > Does "link[MAX_LINKS]" describes the secondary or subordinate bus of a bridge > device? > Why MAX_LINKS is defined to 3? Because that is the largest number of links I have ever had hanging off of one device. Eric From sagivy at 3vium.com Wed Sep 15 05:29:00 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Wed Sep 15 05:29:00 2004 Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy@3vium.com] Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6B9@cronos.trivium> How can I had the broadcom NIC ? When I comment out this in Config.lb (mainboard)? dir /drivers/broadcom/tg3_ipmi the buildtarget utility says it is not in the Sourcetree. When I change this line to be: dir /drivers/broadcom/tg3 (existing dir in the Sourcetree) there is a make error. I tried it with gcc-3.3.1 and gcc-3.3.2 I have binutils 2.15. Did you ever succeed to build an image supporting broadcom NIC ? Regards, Sagiv -----Original Message----- From: YhLu [mailto:YhLu at tyan.com] Sent: Tuesday, September 14, 2004 6:55 PM To: Stefan Reinauer; linuxbios at clustermatic.org; Sagiv Yefet Subject: RE: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] Sagiv, I just sent you tar ball of my source code before I added S2895 and S2735 support. Please check it out. Regards YH -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 7:29 AM To: linuxbios at clustermatic.org; Sagiv Yefet Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] 1) Please Cc the mailing list, there are many people who might help you quicker/better than I do. 2) I don't understand your first question at all. 3) "invalid CMOS LB checksum" Means that the CMOS is not valid for LinuxBIOS. Probably because you had a different firmware running before LinuxBIOS in that machine. This error should go away automatically after rebooting. Stefan ----- Forwarded message from Sagiv Yefet ----- Date: Tue, 14 Sep 2004 16:41:46 +0200 From: "Sagiv Yefet" To: "Stefan Reinauer" Subject: RE: building romimage for tyan s2850 mainboard I comment out the: #dir /drivers/ati/ragexl -- video which pci line in the southbridge it relate to? southbridge amd/amd8111 "amd8111" link 0 pci 0:0.0 pci 0:1.0 on pci 0:1.1 on pci 0:1.2 on pci 0:1.3 on pci 0:1.5 off pci 0:1.6 off pci 1:0.0 on pci 1:0.1 on pci 1:0.2 off pci 1:1.0 off end what is this ERROR means ? invalid CMOS LB checksum Sagiv. -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 12:57 PM To: Sagiv Yefet Cc: linuxbios at clustermatic.org Subject: Re: building romimage for tyan s2850 mainboard * Sagiv Yefet [040914 12:43]: > Thanks, it worked. > > There are 2 errors: > 1. ERROR - could not find PCI 1:03.0, using defaults This looks like an error in the mptable creation, but I am not sure without the context here. > 2. ERROR: PNP: 002e.b 70 not allocated > in Config.lb: 002e.b = HW monitor No idea. I always kind of guessed when fiddling with PnP configuration. > what does it means? Can anyone on the list give some details here? Stefan ----- End forwarded message ----- _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From jsteve17 at yahoo.com Wed Sep 15 07:57:00 2004 From: jsteve17 at yahoo.com (Jeff Stevens) Date: Wed Sep 15 07:57:00 2004 Subject: LinuxBIOS + Etherboot Problems Message-ID: <20040915131706.92435.qmail@web41404.mail.yahoo.com> I am trying to load a kernel over Etherboot, and am having some problems doing so. I am using etherboot version 5.2.2, and mkelfImage 2.5 released 24 April 2003. Here is the output I get: --> Welcome to elfboot, the open sourced starter. January 2002, Eric Biederman. Version 1.3 Loading Etherboot version: 5.2.2 ROM segment 0x2e81 length 0x7938 reloc 0x00020000 CPU 1664 Mhz Etherboot 5.2.2 (GPL) http://etherboot.org Tagged ELF for [3C90X] get_memsizes | linuxbios Relocating _text from: [000244e0,00034330) to [efef01b0,eff00000) Probing pci nic... [3c905b-tpo100] 3C90X Driver 2.00 Copyright 1999 LightSys Technology Services, Inc. Portions Copyright 1999 Steve Smith Provided with ABSOLUTELY NO WARRANTY. ------------------------------------------------------------------------------- MAC Address = 00:10:5A:A2:5A:82 Connectors present: 10Base-T / 100Base-TX. Searching for server (DHCP)... Me: 192.168.123.3, Server: 192.168.123.254, Gateway 192.168.123.254 Loading 192.168.123.254:vmlinuz.elf (ELF)... done Issuing RESET: elf_start | breakpoint = 0x0002ee44 <-- Do I have the correct versions of Etherboot and mkelfImage? I have booted this kernel on this machine fine before (when it was burned into flash and booted directly from LinuxBIOS). Do I need to change anything in the targets Config.lb when I run etherboot, or should it be the same as when I burn the kernel into flash? I am also able to boot the kernel over Etherboot fine on another one of my machines booting etherboot from a floppy. On the machine in question, Etherboot is the payload of LinuxBIOS. Please help! Thanks, Jeff Stevens __________________________________ Do you Yahoo!? Yahoo! Mail - 50x more storage than other providers! http://promotions.yahoo.com/new_mail From linuxbios at mikebell.org Wed Sep 15 08:26:00 2004 From: linuxbios at mikebell.org (linuxbios at mikebell.org) Date: Wed Sep 15 08:26:00 2004 Subject: VIA EPIA-M and two port riser? Message-ID: <20040915134720.GE6967@tinyvaio.nome.ca> Anyone know what's involved in getting Via's two port PCI riser (which supposedly makes use of special features in the VIA BIOS) working under linuxbios? As it stands I don't get an IRQ assigned to whatever's in the top slot, so I'm assuming it's not working as of now. Is it as simple as adding the missing pci_assign_irqs for device 0x13? From marc at geekythings.com Wed Sep 15 09:04:01 2004 From: marc at geekythings.com (Marc Nicholas) Date: Wed Sep 15 09:04:01 2004 Subject: VIA EPIA-M and two port riser? In-Reply-To: <20040915134720.GE6967@tinyvaio.nome.ca> References: <20040915134720.GE6967@tinyvaio.nome.ca> Message-ID: Interesting....does the riser have a bridge chip on it or something? I was under the impression they were passive, but have never actually used one. -marc On Wed, 15 Sep 2004 linuxbios at mikebell.org wrote: > Anyone know what's involved in getting Via's two port PCI riser (which > supposedly makes use of special features in the VIA BIOS) working under > linuxbios? As it stands I don't get an IRQ assigned to whatever's in the > top slot, so I'm assuming it's not working as of now. > > Is it as simple as adding the missing pci_assign_irqs for device 0x13? > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From ollie at lanl.gov Wed Sep 15 10:35:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Wed Sep 15 10:35:00 2004 Subject: about flash_rom SST 49LF002A support In-Reply-To: References: Message-ID: <1095263656.11062.40.camel@exponential.lanl.gov> On Tue, 2004-09-14 at 21:19, elife elife wrote: > Hi, > It seems flash_rom in freebios/util/flash_and_burn not support SST > 49LF002A flash chip. Who can teach me how to add this feature? > It is easy. Download the datasheet from their web site. Find out the read/write/erase/id command set. If the command set is the same as some previously implemented chip, just add a new entry in the flashchips array in flash_rom.c with correct ID/NAME information and point the "method" to the correct driver code. Otherwise, reuse the previously implemented driver which is closest to the new one. Ollie From YhLu at tyan.com Wed Sep 15 11:04:01 2004 From: YhLu at tyan.com (YhLu) Date: Wed Sep 15 11:04:01 2004 Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy@ 3vium.com] Message-ID: <3174569B9743D511922F00A0C94314230624BCE8@TYANWEB> You can comment out dir /drivers/broadcom/tg3 too. Current Etherboot has problem with NIC is S2850. I forget the chip model. So I use one add on card to do network booting. (intel eepro100) Regards YH -----Original Message----- From: Sagiv Yefet [mailto:sagivy at 3vium.com] Sent: Wednesday, September 15, 2004 4:53 AM To: YhLu Cc: Stefan Reinauer; linuxbios at clustermatic.org Subject: RE: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] How can I had the broadcom NIC ? When I comment out this in Config.lb (mainboard)? dir /drivers/broadcom/tg3_ipmi the buildtarget utility says it is not in the Sourcetree. When I change this line to be: dir /drivers/broadcom/tg3 (existing dir in the Sourcetree) there is a make error. I tried it with gcc-3.3.1 and gcc-3.3.2 I have binutils 2.15. Did you ever succeed to build an image supporting broadcom NIC ? Regards, Sagiv -----Original Message----- From: YhLu [mailto:YhLu at tyan.com] Sent: Tuesday, September 14, 2004 6:55 PM To: Stefan Reinauer; linuxbios at clustermatic.org; Sagiv Yefet Subject: RE: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] Sagiv, I just sent you tar ball of my source code before I added S2895 and S2735 support. Please check it out. Regards YH -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 7:29 AM To: linuxbios at clustermatic.org; Sagiv Yefet Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] 1) Please Cc the mailing list, there are many people who might help you quicker/better than I do. 2) I don't understand your first question at all. 3) "invalid CMOS LB checksum" Means that the CMOS is not valid for LinuxBIOS. Probably because you had a different firmware running before LinuxBIOS in that machine. This error should go away automatically after rebooting. Stefan ----- Forwarded message from Sagiv Yefet ----- Date: Tue, 14 Sep 2004 16:41:46 +0200 From: "Sagiv Yefet" To: "Stefan Reinauer" Subject: RE: building romimage for tyan s2850 mainboard I comment out the: #dir /drivers/ati/ragexl -- video which pci line in the southbridge it relate to? southbridge amd/amd8111 "amd8111" link 0 pci 0:0.0 pci 0:1.0 on pci 0:1.1 on pci 0:1.2 on pci 0:1.3 on pci 0:1.5 off pci 0:1.6 off pci 1:0.0 on pci 1:0.1 on pci 1:0.2 off pci 1:1.0 off end what is this ERROR means ? invalid CMOS LB checksum Sagiv. -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 12:57 PM To: Sagiv Yefet Cc: linuxbios at clustermatic.org Subject: Re: building romimage for tyan s2850 mainboard * Sagiv Yefet [040914 12:43]: > Thanks, it worked. > > There are 2 errors: > 1. ERROR - could not find PCI 1:03.0, using defaults This looks like an error in the mptable creation, but I am not sure without the context here. > 2. ERROR: PNP: 002e.b 70 not allocated > in Config.lb: 002e.b = HW monitor No idea. I always kind of guessed when fiddling with PnP configuration. > what does it means? Can anyone on the list give some details here? Stefan ----- End forwarded message ----- _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From ollie at lanl.gov Wed Sep 15 11:23:00 2004 From: ollie at lanl.gov (Li-Ta Lo) Date: Wed Sep 15 11:23:00 2004 Subject: PCI configuration question In-Reply-To: References: <4147C46A.8090009@safe-mail.net> Message-ID: <1095263316.11062.27.camel@exponential.lanl.gov> On Wed, 2004-09-15 at 04:00, Eric W. Biederman wrote: > Liu Tao writes: > > > Hello all, > > > > In the LinuxBIOS-AMD64 document the author explains the "pci" keyword > > > The first occurrence of the pci keyword tells LinuxBIOS where the bridge > > device start, > > > relative to PCI configuration space used by the bridge. The following > > occurences of > > > the pci keyword describe the provided devices. > > > > then gives an example > > > northbridge amd/amdk8 "mc1" > > > pci 0:19.0 > > > pci 0:19.0 > > > pci 0:19.0 > > > pci 0:19.1 > > > pci 0:19.2 > > > pci 0:19.3 > > > end > > > > I'm not clear why the example repeate "pci 0:19.0" three times? > > I noticed in chip.c the chip_enumerate() function checks the same path > > > identical_paths = (i > 0) && (path_eq(&chip->path[i - 1].path, > > &chip->path[i].path)); > > but I can't find out the real intent. > > Because I need some way of showing there are 3 hypertransport links. > With just one I don't have enough places to hang the devices off of. That is why I said that the word link is heavily overloaded and confusing. Sometimes it means Hypertransport links and sometimes it means PCI bus. And I am pretty sure HT links != PCI bus. > > > Another question maybe related to the former one is, in "device" structure > > what does the "link[MAX_LINKS]" and "links" member describe? > > Does "link[MAX_LINKS]" describes the secondary or subordinate bus of a bridge > > device? > > Why MAX_LINKS is defined to 3? > > Because that is the largest number of links I have ever had hanging off of > one device. > With AMD proposing dual core and HT hypercube is it going to be true in the near future ? Ollie From linuxbios at mikebell.org Wed Sep 15 12:24:00 2004 From: linuxbios at mikebell.org (linuxbios at mikebell.org) Date: Wed Sep 15 12:24:00 2004 Subject: VIA EPIA-M and two port riser? In-Reply-To: References: <20040915134720.GE6967@tinyvaio.nome.ca> Message-ID: <20040915174501.GF6967@tinyvaio.nome.ca> On Wed, Sep 15, 2004 at 10:19:44AM -0400, Marc Nicholas wrote: > Interesting....does the riser have a bridge chip on it or something? I was > under the impression they were passive, but have never actually used one. Nope, no bridge chip. Just a handful of jumpers. From marc at geekythings.com Wed Sep 15 12:43:01 2004 From: marc at geekythings.com (Marc Nicholas) Date: Wed Sep 15 12:43:01 2004 Subject: VIA EPIA-M and two port riser? In-Reply-To: <20040915174501.GF6967@tinyvaio.nome.ca> References: <20040915134720.GE6967@tinyvaio.nome.ca> <20040915174501.GF6967@tinyvaio.nome.ca> Message-ID: Hmmmmmm...I don't really understand why you'd need to do anything special for a passive riser. But I suppose it's possible that LinuxBIOS only expects one PCI device on that target? -marc On Thu, 16 Sep 2004 linuxbios at mikebell.org wrote: > On Wed, Sep 15, 2004 at 10:19:44AM -0400, Marc Nicholas wrote: >> Interesting....does the riser have a bridge chip on it or something? I was >> under the impression they were passive, but have never actually used one. > > Nope, no bridge chip. Just a handful of jumpers. > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From ebiederman at lnxi.com Wed Sep 15 13:12:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 15 13:12:00 2004 Subject: Nvidia CK804 and Tyan S2895 support In-Reply-To: <3174569B9743D511922F00A0C943142305EE0EB1@TYANWEB> References: <3174569B9743D511922F00A0C943142305EE0EB1@TYANWEB> Message-ID: YhLu writes: > Still wait for Nvidia releasing the chipset. Some one said it will be > released this Oct. > > Also I hope more guys can push Nvidia to let us to release the code for > that. Nvidia doesn't make the final decision if they will support LinuxBIOS. Well I will see what I can do. There is a project that I think this would be very appropriate for. How good/open is the Linux support for the peripherals. Eric From linuxbios at mikebell.org Wed Sep 15 21:54:01 2004 From: linuxbios at mikebell.org (linuxbios at mikebell.org) Date: Wed Sep 15 21:54:01 2004 Subject: VIA EPIA-M and two port riser? - Solved? In-Reply-To: <20040915134720.GE6967@tinyvaio.nome.ca> References: <20040915134720.GE6967@tinyvaio.nome.ca> Message-ID: <20040916031455.GI6967@tinyvaio.nome.ca> On Wed, Sep 15, 2004 at 10:47:21PM +0900, linuxbios at mikebell.org wrote: > Is it as simple as adding the missing pci_assign_irqs for device 0x13? Anyone who's curious, this would seem to have done it. Sorry I don't have values for B, C and D. On an unrelated note, anyone know which magic numbers to tweak in order to bump an EPIA-M up to 256MB RAM under linuxbios 1? Index: mainboard.c =================================================================== --- mainboard.c (revision 742) +++ mainboard.c (working copy) @@ -8,6 +8,7 @@ static const unsigned char usbIrqs[4] = { 11, 10, 12, 5 }; static const unsigned char enetIrqs[4] = { 11, 5, 10, 12 }; static const unsigned char slotIrqs[4] = { 10, 12, 5, 11 }; +static const unsigned char slot2Irqs[4] = { 11, 0, 0, 0 }; static const unsigned char firewireIrqs[4] = {10, 12, 5, 11 }; static const unsigned char vt8235Irqs[4] = { 5,10, 12, 11 }; static const unsigned char vgaIrqs[4] = { 11, 5, 12, 10 }; @@ -58,6 +59,10 @@ printk_info("setting vga\n"); pci_assign_irqs(1, 0x00, vgaIrqs); + // PCI Riser slot + printk_info("setting pci riser slot\n"); + pci_assign_irqs(0, 0x13, slot2Irqs); + // PCI slot printk_info("setting pci slot\n"); pci_assign_irqs(0, 0x14, slotIrqs); From ebiederman at lnxi.com Wed Sep 15 22:01:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 15 22:01:00 2004 Subject: VIA EPIA-M and two port riser? In-Reply-To: References: <20040915134720.GE6967@tinyvaio.nome.ca> <20040915174501.GF6967@tinyvaio.nome.ca> Message-ID: Marc Nicholas writes: > Hmmmmmm...I don't really understand why you'd need to do anything special for a > passive riser. But I suppose it's possible that LinuxBIOS only expects one PCI > device on that target? There likely needs to be something so we can get the proper associate of device select to irq. Eric From zhushisongzhu at yahoo.com Thu Sep 16 07:24:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Thu Sep 16 07:24:01 2004 Subject: intel 845GV ddr sdram init Message-ID: <20040916124353.92682.qmail@web13204.mail.yahoo.com> progress on my P4i845GV MB(845GV/82801DB/WB83627HF) (1) setup serial correctly (2) read spd data correctly (3) setup DRB(?), DRA, DRT, DRC (4) RAM_NOP hlt when launching ram read output log : LinuxBIOS-1.0.0 Sep 16 18:47:16 CST 2004 starting... Ram1 dump northbridge: 00: 86 80 60 25 06 00 90 00 03 00 00 06 00 00 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 30: 00 00 00 00 e4 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 1b 08 10 00 50: 00 00 00 00 00 00 00 00 1b 16 00 00 37 2c 37 2c 60: 01 01 01 01 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 00 00 00 00 01 00 00 00 80: 00 00 20 00 ad 00 00 00 06 00 00 00 00 00 00 00 90: 00 00 00 00 00 00 00 00 45 04 00 00 00 02 38 00 a0: 02 00 20 00 17 02 00 1f 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 10 10 00 00 c0: 44 40 30 11 00 00 0c 0e 00 00 00 00 00 00 00 00 d0: 02 28 04 0e 0b 0d 00 10 00 00 11 b3 00 00 00 00 e0: 00 00 00 00 09 00 05 11 21 00 00 00 00 00 00 00 f0: 00 00 00 00 74 f8 00 00 40 0f 00 00 00 00 00 00 Done. C:0000002c:00000000:25601849 C:00000090:00000000:03333333 C:00000094:00000000:00110000 C:00000098:0000ffff:00000445 C:0000009c:ff0000ff:00380a00 C:00000060:00000000:80604020 C:00000070:00000000:00000000 C:00000078:00007190:2b418205 C:0000007c:0000007f:2000c100 dump northbridge: 00: 86 80 60 25 06 00 90 00 03 00 00 06 00 00 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 60 25 30: 00 00 00 00 e4 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 1b 08 10 00 50: 00 00 00 00 00 00 00 00 1b 16 00 00 37 2c 37 2c 60: 20 40 60 80 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 05 82 41 2b 01 c1 00 20 80: 00 00 20 00 ad 00 00 00 06 00 00 00 00 00 00 00 90: 30 33 33 03 00 00 11 00 45 04 00 00 00 0a 38 00 a0: 02 00 20 00 17 02 00 1f 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 10 10 00 00 c0: 44 40 30 11 00 00 0c 0e 00 00 00 00 00 00 00 00 d0: 02 28 04 0e 0b 0d 00 10 00 00 11 b3 00 00 00 00 e0: 00 00 00 00 09 00 05 11 21 00 00 00 00 00 00 00 f0: 00 00 00 00 74 f8 00 00 40 0f 00 00 00 00 00 00 Done. Ram2 Reading SPD data... Z:07 Z:0d Z:0a Z:01 Z:00 Z:40 Z:75 Z:00 Z:82 Z:08 Z:01 Z:0e Z:04 Z:0c Z:a0 Z:00 Z:00 Z:50 Z:50 Z:2d Z:40 Z:90 Z:00 Z:00 done Ram3 Ram Enable 1 Ram Enable 2 dump northbridge: 00: 86 80 60 25 06 00 90 00 03 00 00 06 00 00 00 00 10: 08 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 60 25 30: 00 00 00 00 e4 00 00 00 00 00 00 00 00 00 00 00 40: 00 00 00 00 00 00 00 00 00 00 00 00 1b 08 10 00 50: 00 00 00 00 00 00 00 00 1b 16 00 00 37 2c 37 2c 60: 20 40 60 80 00 00 00 00 00 00 00 00 00 00 00 00 70: 00 00 00 00 00 00 00 00 05 82 41 2b 01 c1 00 20 80: 00 00 20 00 ad 00 00 00 06 00 00 00 00 00 00 00 90: 30 33 33 03 00 00 11 00 45 04 00 00 00 0a 38 00 a0: 02 00 20 00 17 02 00 1f 00 00 00 00 00 00 00 00 b0: 00 00 00 00 00 00 00 00 00 00 00 00 10 10 00 00 c0: 44 40 30 11 00 00 0c 0e 00 00 00 00 00 00 00 00 d0: 02 28 04 0e 0b 0d 00 10 00 00 11 b3 00 00 00 00 e0: 00 00 00 00 09 00 05 11 21 00 00 00 00 00 00 00 f0: 00 00 00 00 74 f8 00 00 40 0f 00 00 00 00 00 00 Done. Ram Enable 3 P:10 Z:11 //0x7c value R:00000000 //=%ecx S:00 //check point [movl (%ecx), %eax // hlt] __________________________________ Do you Yahoo!? Yahoo! Mail - Helps protect you from nasty viruses. http://promotions.yahoo.com/new_mail From stepan at openbios.org Thu Sep 16 08:34:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Thu Sep 16 08:34:00 2004 Subject: VIA EPIA-M and two port riser? - Solved? In-Reply-To: <20040916031455.GI6967@tinyvaio.nome.ca> References: <20040915134720.GE6967@tinyvaio.nome.ca> <20040916031455.GI6967@tinyvaio.nome.ca> Message-ID: <20040916135406.GA6923@openbios.org> * linuxbios at mikebell.org [040916 05:14]: > On Wed, Sep 15, 2004 at 10:47:21PM +0900, linuxbios at mikebell.org wrote: > > Is it as simple as adding the missing pci_assign_irqs for device 0x13? > > Anyone who's curious, this would seem to have done it. > > Sorry I don't have values for B, C and D. They are often cyclic. In case anyone can explain this in more detail: How tight are these interrupt numbers connected to the real hardware. In a system with lots of local and IOi APICs the wiring should be purely virtual anyways, should it not? > static const unsigned char usbIrqs[4] = { 11, 10, 12, 5 }; > static const unsigned char enetIrqs[4] = { 11, 5, 10, 12 }; > static const unsigned char slotIrqs[4] = { 10, 12, 5, 11 }; > +static const unsigned char slot2Irqs[4] = { 11, 0, 0, 0 }; > static const unsigned char firewireIrqs[4] = {10, 12, 5, 11 }; > static const unsigned char vt8235Irqs[4] = { 5,10, 12, 11 }; > static const unsigned char vgaIrqs[4] = { 11, 5, 12, 10 }; Stefan From TWarren at nvidia.com Thu Sep 16 09:55:00 2004 From: TWarren at nvidia.com (Tom Warren) Date: Thu Sep 16 09:55:00 2004 Subject: EPIA-M - which board for freebios2? Message-ID: I'm jumping in to V2 and need a target - the EPIA-M seems to be an inexpensive board to learn on. The EPIA M10000 w/C3 1GHz CPU seems to be readily available for ~$150. Which mainboard version / model # is everyone/anyone using with "targets/via/epia-m"? Thanks, - Tom -------------- next part -------------- An HTML attachment was scrubbed... URL: From jpraher at yahoo.de Thu Sep 16 10:01:00 2004 From: jpraher at yahoo.de (Jakob Praher) Date: Thu Sep 16 10:01:00 2004 Subject: best biscuit pc board (3.5") Message-ID: <1095348043.4660.11.camel@jaques2> hi all, what is the best biscuit board currently supported for linuxbios. Which experience do you have with the pcm 5823? is the sst28SF040 enough (512KB) to include a linux kernel in the bios? thanks -- Jakob From rminnich at lanl.gov Thu Sep 16 12:04:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Sep 16 12:04:01 2004 Subject: best biscuit pc board (3.5") In-Reply-To: <1095348043.4660.11.camel@jaques2> References: <1095348043.4660.11.camel@jaques2> Message-ID: On Thu, 16 Sep 2004, Jakob Praher wrote: > what is the best biscuit board currently supported for linuxbios. I like: > Which experience do you have with the pcm 5823? it's been very good for us. > is the sst28SF040 enough (512KB) to include a linux kernel in the bios? depends on the kernel ... ron From Trellix78 at aol.com Thu Sep 16 12:53:01 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Thu Sep 16 12:53:01 2004 Subject: EPIA-M - which board for freebios2? Message-ID: <6F5752E3.7D2819C8.029B16BB@aol.com> I'm using the EPIA M10000: vt8623 northbridge (CLE266) and vt8235 southbridge. I haven't been able to get V2 to compile as yet for it. V1 compiles and runs properly but AGP doesn't work. I can't seem to find the right way to setup the GART and GATT. Without the datasheets, what can I do? Without AGP support, Xwindows will run but playing videos or doing 3D will crash the system. Also, I'm not sure how to setup the video encoder. I wouldn't recommend the EPIA M10000 simply because VIA has been anything but free and open with the specs. However, that's what I'm using until something better comes along. Good luck. David From TWarren at nvidia.com Thu Sep 16 13:27:00 2004 From: TWarren at nvidia.com (Tom Warren) Date: Thu Sep 16 13:27:00 2004 Subject: EPIA-M - which board for freebios2? Message-ID: Thanks for the info. I'll probably give it a try w/V1 and see how it goes. What V2 errors do you see? Is anyone attempting to fix the V2 epia errors? - Tom -----Original Message----- From: Trellix78 at aol.com [mailto:Trellix78 at aol.com] Sent: Thursday, September 16, 2004 11:13 AM To: Tom Warren Cc: linuxbios at clustermatic.org Subject: Re: EPIA-M - which board for freebios2? I'm using the EPIA M10000: vt8623 northbridge (CLE266) and vt8235 southbridge. I haven't been able to get V2 to compile as yet for it. V1 compiles and runs properly but AGP doesn't work. I can't seem to find the right way to setup the GART and GATT. Without the datasheets, what can I do? Without AGP support, Xwindows will run but playing videos or doing 3D will crash the system. Also, I'm not sure how to setup the video encoder. I wouldn't recommend the EPIA M10000 simply because VIA has been anything but free and open with the specs. However, that's what I'm using until something better comes along. Good luck. David From marc at geekythings.com Thu Sep 16 13:34:00 2004 From: marc at geekythings.com (Marc Nicholas) Date: Thu Sep 16 13:34:00 2004 Subject: EPIA-M - which board for freebios2? In-Reply-To: <6F5752E3.7D2819C8.029B16BB@aol.com> References: <6F5752E3.7D2819C8.029B16BB@aol.com> Message-ID: That's a real shame as it's the board I'd most like to use :-( -marc On Thu, 16 Sep 2004 Trellix78 at aol.com wrote: > I'm using the EPIA M10000: > vt8623 northbridge (CLE266) and vt8235 southbridge. > I haven't been able to get V2 to compile as yet for it. > V1 compiles and runs properly but AGP doesn't work. > I can't seem to find the right way to setup the GART and GATT. > Without the datasheets, what can I do? > Without AGP support, Xwindows will run but playing videos or doing > 3D will crash the system. > Also, I'm not sure how to setup the video encoder. > I wouldn't recommend the EPIA M10000 simply because VIA has been > anything but free and open with the specs. However, that's what I'm > using until something better comes along. Good luck. > > David > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > From daniel at electricrain.com Thu Sep 16 14:09:01 2004 From: daniel at electricrain.com (Dan Sully) Date: Thu Sep 16 14:09:01 2004 Subject: EPIA-M - which board for freebios2? In-Reply-To: References: Message-ID: <20040916192945.GC3874@electricrain.com> * Tom Warren shaped the electrons to say... >What V2 errors do you see? Is anyone attempting to fix the V2 epia errors? I've been able to get V2 to compile, but the box hangs at boot with no output. I'm not very familar (at all) with the low level workings of this stuff. Ron from LANL has mentioned that he's going to find time to work on this soon, but that hasn't happened yet. -D -- On second thought, let's not go to Camelot. It is a silly place. From rminnich at lanl.gov Thu Sep 16 17:23:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Sep 16 17:23:00 2004 Subject: EPIA-M - which board for freebios2? In-Reply-To: References: Message-ID: On Thu, 16 Sep 2004, Tom Warren wrote: > What V2 errors do you see? Is anyone attempting to fix the V2 epia > errors? it's on a list, but Pentium-M comes first. ron From liutao at safe-mail.net Fri Sep 17 03:49:00 2004 From: liutao at safe-mail.net (Liu Tao) Date: Fri Sep 17 03:49:00 2004 Subject: PCI configuration question In-Reply-To: <1095263316.11062.27.camel@exponential.lanl.gov> References: <4147C46A.8090009@safe-mail.net> <1095263316.11062.27.camel@exponential.lanl.gov> Message-ID: <414AA9E6.8060009@safe-mail.net> Thanks for all replys. Now I see the three identical paths refers to three different links (different HT links) but they all have the same path (same PCI path), and because the Opteron chip has three HT links, MAX_LINK is defined to 3, is it? I'm porting linuxbios to a new uni-processor Opteron board, on the board the Opteron chip links to three AMD8131 chips, each on one HT channel. We intend to configure the three NCHT channels all as PCI bus0, seems the design of identical paths just fits :) Regards, Liu Tao From Trellix78 at aol.com Fri Sep 17 23:25:01 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Fri Sep 17 23:25:01 2004 Subject: Intel EFI Message-ID: <97.4d74184b.2e7d15e6@aol.com> I wanted to bring to attention Intel's Platform Innovation Framework for Extensible Firmware Interface since its goals overlap with those LinuxBIOS a little bit. After reading the article at _http://www.linuxdevices.com/articles/AT3790951165.html_ (http://www.linuxdevices.com/articles/AT3790951165.html) , I had some questions about the ability of LinuxBIOS to support next-generation hardware. It looks like Intel wants to change the whole firmware landscape with EFI. If such a framework will be truly open and support legacy systems, it'll make LinuxBIOS redundant, wouldn't it? What about newer architectures like those built around the Itanium? Will LinuxBIOS be able to scale up as well as EFI? Those are questions that I wanted to throw out there. -------------- next part -------------- An HTML attachment was scrubbed... URL: From ebiederman at lnxi.com Sat Sep 18 02:15:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sat Sep 18 02:15:01 2004 Subject: Intel EFI In-Reply-To: <97.4d74184b.2e7d15e6@aol.com> References: <97.4d74184b.2e7d15e6@aol.com> Message-ID: Trellix78 at aol.com writes: > I wanted to bring to attention Intel's Platform Innovation Framework for > Extensible Firmware Interface since its goals overlap with those LinuxBIOS a > little bit. After reading the article at > _http://www.linuxdevices.com/articles/AT3790951165.html_ > (http://www.linuxdevices.com/articles/AT3790951165.html) , > > I had some > questions about the ability of LinuxBIOS to support next-generation > hardware. It looks like Intel wants to change the whole firmware landscape with > EFI. If such a framework will be truly open and support legacy systems, it'll > make LinuxBIOS redundant, wouldn't it? Huge IF. But even then open source can usually find a niche. > What about newer architectures like those built around the Itanium? EFI has a place there. So far Itanium is a niche market. It is not the x86 successor. > Will LinuxBIOS be able to scale up as well as EFI? Has EFI scaled up to x86-64 yet? 32bit interfaces on 64bit hardware look weird. With LinuxBIOS we support a much narrower interface so it is much easier to write. There is more work for the OS todo. But the OS is the hardware abstraction layer not the BIOS. As for running on large hardware that really is not too hard. An OS needs to be able to do things efficiently, which makes scaling hard. After you go SMP I don't see the difficulty. > Those are questions that I wanted to throw out there. So far all I have seen with EFI is a time sink. Commercial things either need everyone to accept them or they tend to die. Open source can get by with a small but growing niche, and be accepted based on the technical merits of the project at hand. If EFI is a huge success we might have an EFI compatibility layer. Eric From zhushisongzhu at yahoo.com Sat Sep 18 04:11:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Sat Sep 18 04:11:01 2004 Subject: i845GV ddr init Message-ID: <20040918092446.32394.qmail@web13203.mail.yahoo.com> (1) The bios from original MB have to handle registers 40~4F, but I check them in i845GV datasheet, they are all intel reserved. Where can I find information about such intel reserved registers? (2) what earlymtrr doing for? Is it related to ddr sdram init? tks zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - Send 10MB messages! http://promotions.yahoo.com/new_mail From rminnich at lanl.gov Sun Sep 19 00:58:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Sun Sep 19 00:58:00 2004 Subject: i845GV ddr init In-Reply-To: <20040918092446.32394.qmail@web13203.mail.yahoo.com> References: <20040918092446.32394.qmail@web13203.mail.yahoo.com> Message-ID: On Sat, 18 Sep 2004, zhu shi song wrote: > (1) The bios from original MB have to handle registers > 40~4F, but I check them in i845GV datasheet, they are > all intel reserved. Where can I find information > about such intel reserved registers? unless you get the super top secret Intel docs, you won't get that info. > (2) what earlymtrr doing for? Is it related to ddr > sdram init? I assume this is V1? earlymtrr just sets up mtrr's so that linuxbios runs quickly. ron From sagivy at 3vium.com Sun Sep 19 06:17:00 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Sun Sep 19 06:17:00 2004 Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy@3vium.com] Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A83@cronos.trivium> I get the message says: The boot Image is not valid. (bzImage). What it is expecting for ? -----Original Message----- From: YhLu [mailto:YhLu at tyan.com] Sent: Wednesday, September 15, 2004 6:34 PM To: Sagiv Yefet Cc: Stefan Reinauer; linuxbios at clustermatic.org Subject: RE: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] You can comment out dir /drivers/broadcom/tg3 too. Current Etherboot has problem with NIC is S2850. I forget the chip model. So I use one add on card to do network booting. (intel eepro100) Regards YH -----Original Message----- From: Sagiv Yefet [mailto:sagivy at 3vium.com] Sent: Wednesday, September 15, 2004 4:53 AM To: YhLu Cc: Stefan Reinauer; linuxbios at clustermatic.org Subject: RE: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] How can I had the broadcom NIC ? When I comment out this in Config.lb (mainboard)? dir /drivers/broadcom/tg3_ipmi the buildtarget utility says it is not in the Sourcetree. When I change this line to be: dir /drivers/broadcom/tg3 (existing dir in the Sourcetree) there is a make error. I tried it with gcc-3.3.1 and gcc-3.3.2 I have binutils 2.15. Did you ever succeed to build an image supporting broadcom NIC ? Regards, Sagiv -----Original Message----- From: YhLu [mailto:YhLu at tyan.com] Sent: Tuesday, September 14, 2004 6:55 PM To: Stefan Reinauer; linuxbios at clustermatic.org; Sagiv Yefet Subject: RE: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] Sagiv, I just sent you tar ball of my source code before I added S2895 and S2735 support. Please check it out. Regards YH -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 7:29 AM To: linuxbios at clustermatic.org; Sagiv Yefet Subject: (fwd) RE: building romimage for tyan s2850 mainboard [sagivy at 3vium.com] 1) Please Cc the mailing list, there are many people who might help you quicker/better than I do. 2) I don't understand your first question at all. 3) "invalid CMOS LB checksum" Means that the CMOS is not valid for LinuxBIOS. Probably because you had a different firmware running before LinuxBIOS in that machine. This error should go away automatically after rebooting. Stefan ----- Forwarded message from Sagiv Yefet ----- Date: Tue, 14 Sep 2004 16:41:46 +0200 From: "Sagiv Yefet" To: "Stefan Reinauer" Subject: RE: building romimage for tyan s2850 mainboard I comment out the: #dir /drivers/ati/ragexl -- video which pci line in the southbridge it relate to? southbridge amd/amd8111 "amd8111" link 0 pci 0:0.0 pci 0:1.0 on pci 0:1.1 on pci 0:1.2 on pci 0:1.3 on pci 0:1.5 off pci 0:1.6 off pci 1:0.0 on pci 1:0.1 on pci 1:0.2 off pci 1:1.0 off end what is this ERROR means ? invalid CMOS LB checksum Sagiv. -----Original Message----- From: Stefan Reinauer [mailto:stepan at openbios.org] Sent: Tuesday, September 14, 2004 12:57 PM To: Sagiv Yefet Cc: linuxbios at clustermatic.org Subject: Re: building romimage for tyan s2850 mainboard * Sagiv Yefet [040914 12:43]: > Thanks, it worked. > > There are 2 errors: > 1. ERROR - could not find PCI 1:03.0, using defaults This looks like an error in the mptable creation, but I am not sure without the context here. > 2. ERROR: PNP: 002e.b 70 not allocated > in Config.lb: 002e.b = HW monitor No idea. I always kind of guessed when fiddling with PnP configuration. > what does it means? Can anyone on the list give some details here? Stefan ----- End forwarded message ----- _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From stepan at openbios.org Sun Sep 19 10:27:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Sun Sep 19 10:27:01 2004 Subject: building romimage for tyan s2850 mainboard [sagivy@3vium.com] In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A83@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A83@cronos.trivium> Message-ID: <20040919154038.GA11506@openbios.org> * Sagiv Yefet [040919 14:35]: > I get the message says: > > The boot Image is not valid. (bzImage). > > What it is expecting for ? Which payload you are using? From dieter at bloms.de Mon Sep 20 04:18:01 2004 From: dieter at bloms.de (Dieter Bloms) Date: Mon Sep 20 04:18:01 2004 Subject: linuxbios on epai-m boards Message-ID: <20040920093228.GD14627@bloms.de> Hi, I want to use the linuxbios on my epai-m board. In the status page the support for this board is unstable. Is it possible to reflash the board with the original software, if the linuxbios doesn't work as aspected ? I haven't got a flash programmer, so if the bios doesn't work, I can throw the board out. -- Gru? Dieter -- I do not get viruses because I do not use MS software. If you use Outlook then please do not put my email address in your address-book so that WHEN you get a virus it won't use my address in the From field. -------------- next part -------------- A non-text attachment was scrubbed... Name: not available Type: application/pgp-signature Size: 189 bytes Desc: not available URL: From sagivy at 3vium.com Mon Sep 20 07:18:00 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Mon Sep 20 07:18:00 2004 Subject: mkelfImage-2.5 Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6BB@cronos.trivium> Hello, I am trying to build the mkelfImage utility. I download the mkelfImage-2.5. configure and build. And I have the this error: linux-i386/head.S: Assembler messages: linux-i386/head.S:458: Error: junk at end of line, first unrecognized character is `U' where can I find a linux elf ? thanks, Sagiv -------------- next part -------------- An HTML attachment was scrubbed... URL: From sagivy at 3vium.com Mon Sep 20 08:14:00 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Mon Sep 20 08:14:00 2004 Subject: PXE support Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A87@cronos.trivium> Does anyone know if linuxbios support in PXE ? Sagiv -------------- next part -------------- An HTML attachment was scrubbed... URL: From pyro at linuxlabs.com Mon Sep 20 09:56:01 2004 From: pyro at linuxlabs.com (Steven James) Date: Mon Sep 20 09:56:01 2004 Subject: linuxbios on epai-m boards In-Reply-To: <20040920093228.GD14627@bloms.de> References: <20040920093228.GD14627@bloms.de> Message-ID: Greetings, As long as the flash is socketed, it's not a big problem. I use a BIOS Savior for development (http://www.ioss.com.tw/web/English.html). It plugs in to the flash socket, then you plug the original flash into it. A switch selects between the BIOS Savior's flash and the original. It's not actually necessary to have one, you CAN switch flash chips with the board powered up as long as you use a non-conductive chip puller or a piece of dental floss under the chip (corner to corner) to pull it. It's one of those 'bad things to do' that really only goes wrong once in a million times. I just buse the BIOS Savior because it makes things quicker and easier when I need to try a lot of test flashes. So you can just get a spare chip, boot thye board, and switch that it with it booted so you'll have the original to go back to if there's a problem. G'day, sjames ||||| |||| ||||||||||||| ||| by Linux Labs International, Inc. Steven James, CTO 55 Marietta Street Suite 1830 Atlanta, Ga 30303 866 824 9737 support On Mon, 20 Sep 2004, Dieter Bloms wrote: > Hi, > > I want to use the linuxbios on my epai-m board. > In the status page the support for this board is unstable. > Is it possible to reflash the board with the original software, if the > linuxbios doesn't work as aspected ? > > I haven't got a flash programmer, so if the bios doesn't work, I can > throw the board out. > > > -- > Gru? > > Dieter > > -- > I do not get viruses because I do not use MS software. > If you use Outlook then please do not put my email address in your > address-book so that WHEN you get a virus it won't use my address in the > From field. > From cro_marmot at comcast.net Mon Sep 20 12:05:47 2004 From: cro_marmot at comcast.net (David Hendricks) Date: Mon Sep 20 12:05:47 2004 Subject: PXE support In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A87@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A87@cronos.trivium> Message-ID: <20040920111530.18854387@sunder> I'm pretty sure you can do PXE in Etherboot. On Mon, 20 Sep 2004 16:32:27 +0200 "Sagiv Yefet" wrote: > Does anyone know if linuxbios support in PXE ? > > Sagiv > > From linuxbios at mikebell.org Mon Sep 20 12:17:00 2004 From: linuxbios at mikebell.org (linuxbios at mikebell.org) Date: Mon Sep 20 12:17:00 2004 Subject: EPIA-M, LinuxBIOS1, RAM size Message-ID: <20040920173207.GC5017@tinyvaio.nome.ca> So no one can tell me where to look to bump the RAM size up to 256M under linuxbios1? From andreas at bawue.net Mon Sep 20 14:36:00 2004 From: andreas at bawue.net (Andreas Thienemann) Date: Mon Sep 20 14:36:00 2004 Subject: Epia-PD anyone? Message-ID: Hi, I'm wondering if the epia-pd is already supported? From what I could gather, it should not be different than the current epia-m board. However, trying the epia-m code on the -pd results in a blank screen, no serial, no beeps, no nothing. just a dead box. So, either I missed something, or I did something wrong. bye, andreas From Trellix78 at aol.com Mon Sep 20 15:51:00 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Mon Sep 20 15:51:00 2004 Subject: EPIA-M, LinuxBIOS1, RAM size Message-ID: <305FD85D.2E2C8ABA.029B16BB@aol.com> I'd look in src/arch/i386/lib/hardwaremain.c. get_ramsize() in void hardwaremain() seems to be the culprit for RAM size. That's where I've been mucking about trying to do automatic memory sizing for the Epia M. I don't have any specs for the northbridge registers, so it's been slow going. I've been working from the spec sheets for an AMD 762 hoping to hit something. However, The 762 seems to conform better to standards. I also suspect an incorrect RAM size is causing the AGP GART setup code to crash the system both in LinuxBIOS and the AGP drivers in Linux. Good luck, and will somebody let me know when and where RAM sizing is working. From Trellix78 at aol.com Mon Sep 20 16:30:01 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Mon Sep 20 16:30:01 2004 Subject: PXE support Message-ID: <1d6.2af5bc1d.2e80a911@aol.com> It does. Etherboot can masquerade as PXE. Unless I'm missing something, I'm not sure why you would want to do that since the DHCP server will send a PXE image, which then has to grab the kernel. Etherboot can just grab the whole thing in one swoop. David Atlanta, GA -------------- next part -------------- An HTML attachment was scrubbed... URL: From sagivy at 3vium.com Tue Sep 21 02:03:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Tue Sep 21 02:03:01 2004 Subject: Boot problem Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6BC@cronos.trivium> I prepared a kernel elf file. The station is up and it loads the elf file. Then nothing happens. Just print something: Firmware: bios is Linuxbios What can be the problem? Sagiv -------------- next part -------------- An HTML attachment was scrubbed... URL: From stepan at openbios.org Tue Sep 21 02:41:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Tue Sep 21 02:41:00 2004 Subject: Boot problem In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6BC@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6BC@cronos.trivium> Message-ID: <20040921075543.GA2547@openbios.org> * Sagiv Yefet [040921 10:21]: > I prepared a kernel elf file. > The station is up and it loads the elf file. > Then nothing happens. > Just print something: > Firmware: bios is Linuxbios One note: It would be a lot easier to help you if you posted a bit of context around your debug reports, like 2-3 lines of serial output before the hang etc. Plus, just pasting the actual serial output is easier to debug than writing error messages down from memory. Detailed reports will give you higher quality and quicker answers. > What can be the problem? You did not specify to use serial console for your Linux kernel. add something like "console=ttyS0,115200n8" to your command line. Stefan From liutao at safe-mail.net Tue Sep 21 08:38:01 2004 From: liutao at safe-mail.net (Liu Tao) Date: Tue Sep 21 08:38:01 2004 Subject: amdk8_scan_chains() questions Message-ID: <41503269.2070005@safe-mail.net> Hello, In AMD's <> 3.3.16 LDTi Bus Number Registers section it says that if the link contains the HT IO hub the secondary bus number must be programmed to 0. But amdk8_scan_chains() is called with max=0, so it won't write the secondary register of any link to 0? Or some other code handles this case? Regards, Liu Tao From cro_marmot at comcast.net Tue Sep 21 11:02:01 2004 From: cro_marmot at comcast.net (David Hendricks) Date: Tue Sep 21 11:02:01 2004 Subject: Boot problem In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6BC@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6BC@cronos.trivium> Message-ID: <20040921101620.6005484b@sunder> As I recall, that's a message Etherboot tends to spew when there's something seriously wrong with the elf image. How did you create the elf? Which version of mkelfImage (If that's what you used)? On Tue, 21 Sep 2004 10:21:23 +0200 "Sagiv Yefet" wrote: > I prepared a kernel elf file. > The station is up and it loads the elf file. > Then nothing happens. > Just print something: > Firmware: bios is Linuxbios > > What can be the problem? > > Sagiv > > From daubin at actuality-systems.com Tue Sep 21 11:47:01 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Tue Sep 21 11:47:01 2004 Subject: Boot problem Message-ID: I second Stefan's response. I was so stubborn at first to try This and then it helped me so much! So please try this or Netconsole. I suspect your kernel could not mount the file System you specified. If you try the above methods you should See exactly what failed. I think... FYI Netconsole link: http://technocrat.net/article.pl?sid=04/08/14/0236245&mode=nested -----Original Message----- From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Stefan Reinauer Sent: Tuesday, September 21, 2004 3:56 AM To: Sagiv Yefet Cc: linuxbios at clustermatic.org Subject: Re: Boot problem * Sagiv Yefet [040921 10:21]: > I prepared a kernel elf file. > The station is up and it loads the elf file. > Then nothing happens. > Just print something: > Firmware: bios is Linuxbios One note: It would be a lot easier to help you if you posted a bit of context around your debug reports, like 2-3 lines of serial output before the hang etc. Plus, just pasting the actual serial output is easier to debug than writing error messages down from memory. Detailed reports will give you higher quality and quicker answers. > What can be the problem? You did not specify to use serial console for your Linux kernel. add something like "console=ttyS0,115200n8" to your command line. Stefan _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From sagivy at 3vium.com Tue Sep 21 17:22:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Tue Sep 21 17:22:01 2004 Subject: FW: Boot problem Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A8A@cronos.trivium> I used : mkelfImage-2.5 The command: ./objdir/sbin/mkelfImage -t bzImage-i386 --kernel=/home/sagivy/vmlinuz \ --command-line="console=ttyS0,115200 root=/dev/hda3" \ --initrd=/home/sagivy/initrd --output=/home/sagivy/vmlinuz.elf I had problem in building mkelfImage: linux-i386/head.S: Assembler messages: linux-i386/head.S:458: Error: junk at end of line, first unrecognized character is `U' So in file convert.h I change from: #define CONVERT_MAGIC 0XA5A5A5A5UL To: #define CONVERT_MAGIC 0XA5A5A5A5 and then it was built. Sagiv -----Original Message----- From: David Hendricks [mailto:cro_marmot at comcast.net] Sent: Tuesday, September 21, 2004 6:16 PM To: linuxbios at clustermatic.org Subject: Re: Boot problem As I recall, that's a message Etherboot tends to spew when there's something seriously wrong with the elf image. How did you create the elf? Which version of mkelfImage (If that's what you used)? On Tue, 21 Sep 2004 10:21:23 +0200 "Sagiv Yefet" wrote: > I prepared a kernel elf file. > The station is up and it loads the elf file. > Then nothing happens. > Just print something: > Firmware: bios is Linuxbios > > What can be the problem? > > Sagiv > > _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From liutao at safe-mail.net Tue Sep 21 21:42:00 2004 From: liutao at safe-mail.net (Liu Tao) Date: Tue Sep 21 21:42:00 2004 Subject: amdk8_scan_chains() questions In-Reply-To: <41503269.2070005@safe-mail.net> References: <41503269.2070005@safe-mail.net> Message-ID: <4150EA0C.8030807@safe-mail.net> Hello, I googled some results of amdk8 linuxbios, and seems after dev_enumerate() AMD8111 is not at bus0. So does it mean when we are running from the BIOS ROM the IO HUB must be at bus0, and when we are running in RAM the bus number doesn't matter? Regards, Liu Tao > > In AMD's <> 3.3.16 LDTi Bus Number > Registers section it says that if the link contains the HT IO hub the > secondary > bus number must be programmed to 0. But amdk8_scan_chains() is called > with > max=0, so it won't write the secondary register of any link to 0? Or > some > other code handles this case? > From stepan at openbios.org Wed Sep 22 01:40:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Sep 22 01:40:00 2004 Subject: amdk8_scan_chains() questions In-Reply-To: <4150EA0C.8030807@safe-mail.net> References: <41503269.2070005@safe-mail.net> <4150EA0C.8030807@safe-mail.net> Message-ID: <20040922065421.GD11140@openbios.org> * Liu Tao [040922 04:57]: > I googled some results of amdk8 linuxbios, and seems > after dev_enumerate() AMD8111 is not at bus0. So does > it mean when we are running from the BIOS ROM the > IO HUB must be at bus0, and when we are running in RAM > the bus number doesn't matter? I think to remember that Linux wants the IO Hub to hang off bus 0 as well. Which is why some ports reversed the probe order to achieve this. Maybe there is a more correct and generic solution to this? Stefan From ebiederman at lnxi.com Wed Sep 22 21:14:01 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 22 21:14:01 2004 Subject: amdk8_scan_chains() questions In-Reply-To: <20040922065421.GD11140@openbios.org> References: <41503269.2070005@safe-mail.net> <4150EA0C.8030807@safe-mail.net> <20040922065421.GD11140@openbios.org> Message-ID: Stefan Reinauer writes: > * Liu Tao [040922 04:57]: > > I googled some results of amdk8 linuxbios, and seems > > after dev_enumerate() AMD8111 is not at bus0. So does > > it mean when we are running from the BIOS ROM the > > IO HUB must be at bus0, and when we are running in RAM > > the bus number doesn't matter? Yes. So long as linux can find it. We just put it at bus 0 as convenience so we can find it easily. Putting the hypertransport chains on their own bus is clearer reflection of reality than putting extra devices on bus 0. > I think to remember that Linux wants the IO Hub to hang off bus 0 as > well. Which is why some ports reversed the probe order to achieve this. > Maybe there is a more correct and generic solution to this? As for linux so long as it can find the bus everything is good. Mostly that is a matter of putting the bus in the pirq table so linux will know about the bus. Eric From ebiederman at lnxi.com Wed Sep 22 21:21:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 22 21:21:00 2004 Subject: FW: Boot problem In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A8A@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A8A@cronos.trivium> Message-ID: "Sagiv Yefet" writes: > I used : mkelfImage-2.5 > > The command: > > ./objdir/sbin/mkelfImage -t bzImage-i386 --kernel=/home/sagivy/vmlinuz \ > --command-line="console=ttyS0,115200 root=/dev/hda3" \ > --initrd=/home/sagivy/initrd --output=/home/sagivy/vmlinuz.elf > > I had problem in building mkelfImage: > > linux-i386/head.S: Assembler messages: > linux-i386/head.S:458: Error: junk at end of line, first unrecognized > character is `U' > > So in file convert.h I change from: > #define CONVERT_MAGIC 0XA5A5A5A5UL > > To: > #define CONVERT_MAGIC 0XA5A5A5A5 > > and then it was built. Thanks. I really need to patch that. I'm wondering why older tools didn't complain. Eric From ebiederman at lnxi.com Wed Sep 22 21:23:10 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 22 21:23:10 2004 Subject: PXE support In-Reply-To: <20040920111530.18854387@sunder> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB228A87@cronos.trivium> <20040920111530.18854387@sunder> Message-ID: David Hendricks writes: > I'm pretty sure you can do PXE in Etherboot. You would need to use it conjunction with ADLO. PXE is huge number of BIOS callbacks which are invariably buggy, to some extent. This is more of the classic case of firmware never being rock solid. Eric From ebiederman at lnxi.com Wed Sep 22 21:26:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Wed Sep 22 21:26:00 2004 Subject: i845GV ddr init In-Reply-To: References: <20040918092446.32394.qmail@web13203.mail.yahoo.com> Message-ID: "Ronald G. Minnich" writes: > On Sat, 18 Sep 2004, zhu shi song wrote: > > > (1) The bios from original MB have to handle registers > > 40~4F, but I check them in i845GV datasheet, they are > > all intel reserved. Where can I find information > > about such intel reserved registers? > > unless you get the super top secret Intel docs, you won't get that info. Either that or you can reverse engineer them ;) Observing what another BIOS does can be interesting. Eric From bchafy at ccs.neu.edu Thu Sep 23 11:18:00 2004 From: bchafy at ccs.neu.edu (Bryan E. Chafy) Date: Thu Sep 23 11:18:00 2004 Subject: where is it? Message-ID: The linuxbios website says to get the source tree from: cvs -d:pserver:anonymous at cvs.freebios.sourceforge.net:/cvsroot/freebios login But it always times out (tried from varios locations). When I go to the "CVS Repository" link, it says to get it from: cvs -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios login ... That worked, but what I get appears to be a very old version. There's no freebios2 directory and nothing updated from this year. On this page I see a freebios2 directory: http://cvs.sourceforge.net/viewcvs.py/freebios/#dirlist What is the correct way to get the latest source tree? From jsteve17 at yahoo.com Thu Sep 23 12:25:01 2004 From: jsteve17 at yahoo.com (Jeff Stevens) Date: Thu Sep 23 12:25:01 2004 Subject: freebios2 compilation error (romcc) Message-ID: <20040923174010.38809.qmail@web41405.mail.yahoo.com> I have downloaded the latest version of LinuxBIOS for AMD64 (freebios2), and am having problems compiling it. It is erroring out when it runs romcc. Here is a screen dump of the error: --> ./romcc -mcpu=k8 -O2 ./auto.E > auto.inc auto.c:118.49: coherent_ht.c:291.41: coherent_ht.c:410.23: coherent_ht.c:645.27: auto.c:221.47: Load address out of bounds make[1]: *** [auto.inc] Error 1 <-- I tried commenting out those lines, and if I just comment out line 645 of coherent_ht.c (result = setup_smp();) it compiles fine. What do I need to do to get this to compile correctly. Thanks, Jeff Stevens __________________________________________________ Do You Yahoo!? Tired of spam? Yahoo! Mail has the best spam protection around http://mail.yahoo.com From jsteve17 at yahoo.com Thu Sep 23 13:13:00 2004 From: jsteve17 at yahoo.com (Jeff Stevens) Date: Thu Sep 23 13:13:00 2004 Subject: freebios2 compilation error (romcc) In-Reply-To: <20040923174010.38809.qmail@web41405.mail.yahoo.com> Message-ID: <20040923182721.95514.qmail@web41415.mail.yahoo.com> I also found if I remove the -O2 option from romcc it compiles fine, but then auto.inc is way to big. Thanks, Jeff --- Jeff Stevens wrote: > I have downloaded the latest version of LinuxBIOS > for > AMD64 (freebios2), and am having problems compiling > it. It is erroring out when it runs romcc. Here is > a > screen dump of the error: > > --> > > ./romcc -mcpu=k8 -O2 ./auto.E > auto.inc > auto.c:118.49: coherent_ht.c:291.41: > coherent_ht.c:410.23: coherent_ht.c:645.27: > auto.c:221.47: > Load address out of bounds > make[1]: *** [auto.inc] Error 1 > > <-- > > I tried commenting out those lines, and if I just > comment out line 645 of coherent_ht.c (result = > setup_smp();) it compiles fine. What do I need to > do > to get this to compile correctly. > > Thanks, > Jeff Stevens > > __________________________________________________ > Do You Yahoo!? > Tired of spam? Yahoo! Mail has the best spam > protection around > http://mail.yahoo.com > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > _______________________________ Do you Yahoo!? Declare Yourself - Register online to vote today! http://vote.yahoo.com From YhLu at tyan.com Thu Sep 23 14:44:01 2004 From: YhLu at tyan.com (YhLu) Date: Thu Sep 23 14:44:01 2004 Subject: freebios2 compilation error (romcc) Message-ID: <3174569B9743D511922F00A0C94314230624C251@TYANWEB> Change to -O -----Original Message----- From: Jeff Stevens [mailto:jsteve17 at yahoo.com] Sent: Thursday, September 23, 2004 11:27 AM To: linuxbios at clustermatic.org Subject: Re: freebios2 compilation error (romcc) I also found if I remove the -O2 option from romcc it compiles fine, but then auto.inc is way to big. Thanks, Jeff --- Jeff Stevens wrote: > I have downloaded the latest version of LinuxBIOS > for > AMD64 (freebios2), and am having problems compiling > it. It is erroring out when it runs romcc. Here is > a > screen dump of the error: > > --> > > ./romcc -mcpu=k8 -O2 ./auto.E > auto.inc > auto.c:118.49: coherent_ht.c:291.41: > coherent_ht.c:410.23: coherent_ht.c:645.27: > auto.c:221.47: > Load address out of bounds > make[1]: *** [auto.inc] Error 1 > > <-- > > I tried commenting out those lines, and if I just > comment out line 645 of coherent_ht.c (result = > setup_smp();) it compiles fine. What do I need to > do > to get this to compile correctly. > > Thanks, > Jeff Stevens > > __________________________________________________ > Do You Yahoo!? > Tired of spam? Yahoo! Mail has the best spam > protection around > http://mail.yahoo.com > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios > _______________________________ Do you Yahoo!? Declare Yourself - Register online to vote today! http://vote.yahoo.com _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From cro_marmot at comcast.net Thu Sep 23 18:23:00 2004 From: cro_marmot at comcast.net (David Hendricks) Date: Thu Sep 23 18:23:00 2004 Subject: where is it? In-Reply-To: References: Message-ID: <20040923173737.1fae02a3@sunder> There are two steps--Login and checkout. Try these two cvs commands: cvs -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios login (Hit retern when prompted for a password) cvs -z3 -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios co freebios2 Sorry about the On Thu, 23 Sep 2004 12:33:03 -0400 (EDT) "Bryan E. Chafy" wrote: > > The linuxbios website says to get the source tree from: > cvs > -d:pserver:anonymous at cvs.freebios.sourceforge.net:/cvsroot/freebios > login > > But it always times out (tried from varios locations). > > When I go to the "CVS Repository" link, it says to get it from: > cvs -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios login > ... > > That worked, but what I get appears to be a very old version. > There's no freebios2 directory and nothing updated from this year. > > On this page I see a freebios2 directory: > http://cvs.sourceforge.net/viewcvs.py/freebios/#dirlist > > What is the correct way to get the latest source tree? > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From cro_marmot at comcast.net Thu Sep 23 18:26:01 2004 From: cro_marmot at comcast.net (David Hendricks) Date: Thu Sep 23 18:26:01 2004 Subject: where is it? In-Reply-To: References: Message-ID: <20040923173927.38f94ffc@sunder> There are two steps--Login and checkout. Try these two cvs commands: cvs -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios login (Hit retern when prompted for a password) cvs -z3 -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios co freebios2 Sorry about the confusion. The page is getting kind of antiquated, but it's a pain to go through LANL and update it. On Thu, 23 Sep 2004 12:33:03 -0400 (EDT) "Bryan E. Chafy" wrote: > > The linuxbios website says to get the source tree from: > cvs > -d:pserver:anonymous at cvs.freebios.sourceforge.net:/cvsroot/freebios > login > > But it always times out (tried from varios locations). > > When I go to the "CVS Repository" link, it says to get it from: > cvs -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios login > ... > > That worked, but what I get appears to be a very old version. > There's no freebios2 directory and nothing updated from this year. > > On this page I see a freebios2 directory: > http://cvs.sourceforge.net/viewcvs.py/freebios/#dirlist > > What is the correct way to get the latest source tree? > _______________________________________________ > Linuxbios mailing list > Linuxbios at clustermatic.org > http://www.clustermatic.org/mailman/listinfo/linuxbios From Trellix78 at aol.com Thu Sep 23 20:43:00 2004 From: Trellix78 at aol.com (Trellix78 at aol.com) Date: Thu Sep 23 20:43:00 2004 Subject: Epia M freebios2 still broken? Message-ID: <1DB71536.6308691F.029B16BB@aol.com> I finally made the jump and compiled a freebios2 image for the Epia M but it's not booting at all. I used the default Config.lb, except that I changed the serial speed to 115200 and the payload to etherboot. Now, I get nothing on the serial port and the system locks up hard. Booting with the stock BIOS doesn't even bring it to life unless I clear CMOS, remove the power and let it sit for a little bit. Anybody know what I can try besides banging my head against the wall? Thanks. David From rminnich at lanl.gov Fri Sep 24 09:46:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Sep 24 09:46:00 2004 Subject: where is it? In-Reply-To: References: Message-ID: On Thu, 23 Sep 2004, Bryan E. Chafy wrote: > > The linuxbios website says to get the source tree from: > cvs -d:pserver:anonymous at cvs.freebios.sourceforge.net:/cvsroot/freebios login export CVS_RSH=ssh and cvs -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios login sorry. This script has worked for me recently cvs -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios login cvs -z3 -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios co freebios cvs -z3 -d:pserver:anonymous at cvs.sourceforge.net:/cvsroot/freebios co \ freebios2 ron From rminnich at lanl.gov Fri Sep 24 10:01:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Fri Sep 24 10:01:01 2004 Subject: Epia M freebios2 still broken? In-Reply-To: <1DB71536.6308691F.029B16BB@aol.com> References: <1DB71536.6308691F.029B16BB@aol.com> Message-ID: I just don't recall where we are on epia-m and V2. I am doing the pentium M port this month and until that's done epia will have to wait, unless somebody else steps up to do it. ron From YhLu at tyan.com Fri Sep 24 11:41:01 2004 From: YhLu at tyan.com (YhLu) Date: Fri Sep 24 11:41:01 2004 Subject: Intel E7520 support Message-ID: <3174569B9743D511922F00A0C94314230624C2C8@TYANWEB> Stefan/Ron, How about add acpi that only is related to pci to the LinuxBIOS? Otherwise how make the PCI-E device get interrupt assigned? Regards YH -----Original Message----- From: YhLu Sent: Thursday, September 23, 2004 6:54 PM To: 'ebiederman at lnxi.com' Subject: RE: Intel E7520 support Eric, How to set let the PCI-E device know the interrupt assign it? Under Normal BIOS, the device can get interrupt via ACPI, and there is no entry in mptable for it. So when using LinuxBIOS, How to do ? Regards YH From stepan at openbios.org Fri Sep 24 17:35:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Fri Sep 24 17:35:00 2004 Subject: Intel E7520 support In-Reply-To: <3174569B9743D511922F00A0C94314230624C2C8@TYANWEB> References: <3174569B9743D511922F00A0C94314230624C2C8@TYANWEB> Message-ID: <20040924224958.GA23382@openbios.org> * YhLu [040924 18:56]: > How about add acpi that only is related to pci to the LinuxBIOS? > > Otherwise how make the PCI-E device get interrupt assigned? We need to provide a DSDT for this, and thus probably a lot of other information about the system. Or can PCI-E interrupts be completely stored in other tables? Last time I tried to get more ACPI support into LinuxBIOS I stopped when I had to create some dozens of tables and a whole bunch of ASL just to get PCI interrupts working. If Linux sees one table, it often thinks that the complete set must be there. The features are not handled "atomicly".. No idea whether it really is possible at all. But going ASL is a lot of work Stefan From ebiederman at lnxi.com Sat Sep 25 23:12:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sat Sep 25 23:12:00 2004 Subject: [BULK] Re: Intel E7520 support In-Reply-To: <20040924224958.GA23382@openbios.org> References: <3174569B9743D511922F00A0C94314230624C2C8@TYANWEB> <20040924224958.GA23382@openbios.org> Message-ID: Stefan Reinauer writes: > * YhLu [040924 18:56]: > > How about add acpi that only is related to pci to the LinuxBIOS? > > > > Otherwise how make the PCI-E device get interrupt assigned? > > We need to provide a DSDT for this, and thus probably a lot of other > information about the system. Or can PCI-E interrupts be completely > stored in other tables? Last time I tried to get more ACPI support into > LinuxBIOS I stopped when I had to create some dozens of tables and a > whole bunch of ASL just to get PCI interrupts working. If Linux sees one > table, it often thinks that the complete set must be there. The features > are not handled "atomicly".. No idea whether it really is possible at > all. But going ASL is a lot of work PCI-E should be drop dead simple, and not require any of this. PCI-E interrupts are in-band. We can assign the non-smp ones in LinuxBIOS with just a little bit of code. I think MSI and the smp case are similarly easy. It should be much easier as all of the interrupts are in-band. If it is harder I will patch the kernel. Needing ASL for is absolutely ridiculous. Especially given how very fragile the linux ACPI code is. It can't even recover when it knows it was given wrong information. And it runs so early you can't see it when it panics the kernel. The Linux ACPI implementation may be fix-able but I don't want to go there unless we have to. Especially for something so simple as PCI-E support. Eric From sagivy at 3vium.com Sun Sep 26 08:14:01 2004 From: sagivy at 3vium.com (Sagiv Yefet) Date: Sun Sep 26 08:14:01 2004 Subject: Kernel for linuxbios Message-ID: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6C0@cronos.trivium> I am using linuxbios with etherboot. In tyan2850. The only kernel so far that was loaded by the bootloader and run is: Cwlinux. www.cwlinux.com/downloads I tried without success: 1. Thinstation (etherboot) 2. Kernel from kernel.org. Is there any specific version I need to use of those kernels? Are there any patches made for the kernels that I didn't use? Where can I find them. What could be the problem? Sagiv -------------- next part -------------- An HTML attachment was scrubbed... URL: From maillists at petrolhead.com Sun Sep 26 09:55:01 2004 From: maillists at petrolhead.com (maillists at petrolhead.com) Date: Sun Sep 26 09:55:01 2004 Subject: amdk8_scan_chains() questions Message-ID: <10D204DE080CA744A64FC11EBC67A17728DFCE@portacabin> > Stefan Reinauer writes: > > > * Liu Tao [040922 04:57]: > > > I googled some results of amdk8 linuxbios, and seems after > > > dev_enumerate() AMD8111 is not at bus0. So does it mean > when we are > > > running from the BIOS ROM the IO HUB must be at bus0, and when we > > > are running in RAM the bus number doesn't matter? > > Yes. So long as linux can find it. We just put it at > bus 0 as convenience so we can find it easily. > > Putting the hypertransport chains on their own bus is clearer > reflection of reality than putting extra devices on bus 0. It's even simpler than that. Before the HT and IO routing is initialized the BIOS ROM access happens because of an HT feature called the compatibility bit. This bit is set for all accesses that are not covered by any routing table io/memory/mem-mapped-io etc. Requests with the compatibility bit set are routed down the link with the IO hub on it and generally, 8131 can route to the PCI bus, these end up in the southbridge/iohub which in the case of ROM BIOS address routes to the ROM. Once the HT and routing is initialized BIOS ROM addresses would be routed to by the routing tables to the BIOS rom, this may be on Bus 0 or Bus 1 or any other number, as long as the routing tables are appropriately setup. Chris From yhlu at tyan.com Sun Sep 26 10:37:00 2004 From: yhlu at tyan.com (Yinghai Lu) Date: Sun Sep 26 10:37:00 2004 Subject: [BULK] Re: Intel E7520 support In-Reply-To: Message-ID: <200409261436.i8QEamL21829@nwn.definitive.org> Good, for SMP support, Add an entry in mptable? YH From stepan at openbios.org Sun Sep 26 11:33:00 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Sun Sep 26 11:33:00 2004 Subject: Kernel for linuxbios In-Reply-To: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6C0@cronos.trivium> References: <4A3D5F6DC9406A4DBE93D9BA8F07E4BB22D6C0@cronos.trivium> Message-ID: <20040926164834.GA17655@openbios.org> * Sagiv Yefet [040926 15:33]: > I tried without success: > 1. Thinstation (etherboot) > 2. Kernel from kernel.org. > Is there any specific version I need to use of those kernels? No, all Linux kernels work fine. > Are there any patches made for the kernels that I didn't use? Where can > I find them. No. No patches needed at all. > What could be the problem? The biggest problem is the low availability of crystal balls nowadays ;) Maybe you did not compile your kernel with serial console support or did not enable serial console on the command line? Stefan From ebiederman at lnxi.com Sun Sep 26 16:07:00 2004 From: ebiederman at lnxi.com (Eric W. Biederman) Date: Sun Sep 26 16:07:00 2004 Subject: [BULK] Re: Intel E7520 support In-Reply-To: <20040926155252.63284D01BE81@spam.llix.net> References: <20040926155252.63284D01BE81@spam.llix.net> Message-ID: "Yinghai Lu" writes: > Good, for SMP support, Add an entry in mptable? I'd have to look but I suspect it is as simple as enabling MSI support in the kernel. Eric From cforney at opus.com Tue Sep 28 01:46:01 2004 From: cforney at opus.com (Craig C Forney) Date: Tue Sep 28 01:46:01 2004 Subject: nVidia CK804 support Message-ID: <000101c4a528$e02cbe00$6400a8c0@opusone> We are in development of a dense dual Opteron board with nVidia's CK804. I understand that YH has been able to port LinuxBIOS for the TYAN S2895 which has a pair of CK804's. I'd really like to make LinuxBIOS available on our board, which is designed to be a blade in a cluster. What is the status of this code, and what are the possibilities/problems related to it's availability? I'd be happy to test/verify the code it in our configuration (which is somewhat different than the TYAN 2895). Any information/assistance appreciated. Regards, Craig Opus Innovations LLC From zhushisongzhu at yahoo.com Tue Sep 28 04:59:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Tue Sep 28 04:59:01 2004 Subject: i845 ddr ram init Message-ID: <20040928101501.59614.qmail@web13204.mail.yahoo.com> (1)I disabled i786/earlymtrr, RAM NOP ok (2)After executing original bios, RAM NOP couldn't pass. Maybe I should set mtrr correctly. zhu _______________________________ Do you Yahoo!? Declare Yourself - Register online to vote today! http://vote.yahoo.com From rminnich at lanl.gov Tue Sep 28 10:34:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 28 10:34:01 2004 Subject: i845 ddr ram init In-Reply-To: <20040928101501.59614.qmail@web13204.mail.yahoo.com> References: <20040928101501.59614.qmail@web13204.mail.yahoo.com> Message-ID: On Tue, 28 Sep 2004, zhu shi song wrote: > (1)I disabled i786/earlymtrr, RAM NOP ok > (2)After executing original bios, RAM NOP couldn't > pass. sounds like it, MTRRs should really not be on during DDR init in the DRAM space. What are your current settings? ron From YhLu at tyan.com Tue Sep 28 11:29:01 2004 From: YhLu at tyan.com (YhLu) Date: Tue Sep 28 11:29:01 2004 Subject: nVidia CK804 support Message-ID: <3174569B9743D511922F00A0C94314230624C431@TYANWEB> We will get answer this week. -----Original Message----- From: Craig C Forney [mailto:cforney at opus.com] Sent: Tuesday, September 28, 2004 12:01 AM To: linuxbios at clustermatic.org Subject: nVidia CK804 support We are in development of a dense dual Opteron board with nVidia's CK804. I understand that YH has been able to port LinuxBIOS for the TYAN S2895 which has a pair of CK804's. I'd really like to make LinuxBIOS available on our board, which is designed to be a blade in a cluster. What is the status of this code, and what are the possibilities/problems related to it's availability? I'd be happy to test/verify the code it in our configuration (which is somewhat different than the TYAN 2895). Any information/assistance appreciated. Regards, Craig Opus Innovations LLC _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From bchafy at ccs.neu.edu Tue Sep 28 12:33:01 2004 From: bchafy at ccs.neu.edu (Bryan E. Chafy) Date: Tue Sep 28 12:33:01 2004 Subject: awdbedit's Chipset Registers Message-ID: OK, I downloaded linuxbios but I dont have a supported board/chipset (an older acer aspire with an ALI chipset). And of course, acerlabs makes it a policy not to give away their specs. But there still might be hope. Award bios's exist for other boards with the same chipset (take a look at http://www.wimsbios.com/index.htm?/numbers.shtml for a cross reference). I got one of those bios files and loaded it in awdbedit. awdbedit lists the chipset registers, or so it seems (click Recognized Items->System BIOS->"Chipset Registers" tab, as well as the "Setup Menu" tab.) Could that be enough info to get a board up and running? The tables look kinda raw, ie no distinction between northbridge/southbdride etc. The "Setup Menu" tab gives a little more detialed description for some registers. Are there any chipset experts out there who could comment on this? From rminnich at lanl.gov Tue Sep 28 13:27:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 28 13:27:00 2004 Subject: awdbedit's Chipset Registers In-Reply-To: References: Message-ID: just knowning the register values is helpful but not enough. The sequence of writing them is important. ron From bari at onelabs.com Tue Sep 28 13:56:01 2004 From: bari at onelabs.com (Bari Ari) Date: Tue Sep 28 13:56:01 2004 Subject: awdbedit's Chipset Registers In-Reply-To: References: Message-ID: <4159B770.60808@onelabs.com> Bryan E. Chafy wrote: > I got one of those bios files and loaded it in awdbedit. > awdbedit lists the chipset registers, or so it seems > (click Recognized Items->System BIOS->"Chipset Registers" tab, as well > as the "Setup Menu" tab.) > Could that be enough info to get a board up and running? It may get you closer or fill in some blanks. I haven't seen awdbedit list all the registers and their settings, only some. Maybe some later version will list all the register settings and the order they are executed or maybe the current version already does this, only not with the binaries I've seen. -Bari From rminnich at lanl.gov Tue Sep 28 15:17:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Tue Sep 28 15:17:01 2004 Subject: flash_rom enhancement Message-ID: it now supports the ICH4 ron From daubin at actuality-systems.com Wed Sep 29 16:02:00 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Wed Sep 29 16:02:00 2004 Subject: PCI IRQ tables Message-ID: Hi, What happens if the pci irq mapping is a mess? I know you can use getpir with a good bios, but what if you don't have one? Is there a way to get the pci irq mapping without a standard bios? If you had to do it by hand could you explain how it should be done? Thanks, Dave -------------- next part -------------- An HTML attachment was scrubbed... URL: From adam at cfar.umd.edu Wed Sep 29 16:25:01 2004 From: adam at cfar.umd.edu (Adam Sulmicki) Date: Wed Sep 29 16:25:01 2004 Subject: SEBOS & ADLO & Windows XP/2K Interrupts In-Reply-To: Message-ID: <20040929173918.N16227-100000@www.missl.cs.umd.edu> I seem remember few people mentioning to me that they could not find the SEBOS/ADLO/WinInt web pages. I'm told they have been restored at : http://www.missl.cs.umd.edu/sebos.html enjoy. From stepan at openbios.org Wed Sep 29 16:29:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Wed Sep 29 16:29:01 2004 Subject: x86emu / bios-emu gnuarch repository Message-ID: <20040929214458.GA9094@openbios.org> Hi, I finally set up a GNU arch repository for x86emu+intXXemu development. With this tree we should try to unify the x86 and legacy bios interrupt emulation that the various projects out there need. If you want to reach it, you have to use tla (http://www.gnuarch.org/) or a the snapshot facility at http://www.openbios.org/arch/ To check out the work from the repository directly, you have to do: tla my-id 'Your Name ' tla register-archive ftp://ftp.openbios.org/pub/arch/x86emu at openbios.org--devel/ tla get x86emu at openbios.org--devel/bios-emu--devel--2004 bios-emu More information (trimmed towards OpenBIOS though) can be found in Patrick Mauritz' very nice tla primer: http://www.openbios.org/~oxygene/tla-primer.txt NOTE: The tree has no patches from LinuxBIOS' testbios or any other project using x86emu included. It is purely taken from X.org X11R6.8.1 It won't even build. Though, I decided to use the X.org code since it is the most sophisticated version out there with most testing. Patches, comments, ideas are very welcome. If you think you need write access to this archive, let me know. Regards, Stefan From zhushisongzhu at yahoo.com Thu Sep 30 05:43:01 2004 From: zhushisongzhu at yahoo.com (zhu shi song) Date: Thu Sep 30 05:43:01 2004 Subject: P4 powerup register value Message-ID: <20040930105910.77772.qmail@web13203.mail.yahoo.com> When p4 power up , what's the value and meaning of the registers such as ebx, edx etc? Who know the information, need help. tks zhu __________________________________ Do you Yahoo!? New and Improved Yahoo! Mail - Send 10MB messages! http://promotions.yahoo.com/new_mail From stuge-linuxbios at cdy.org Thu Sep 30 07:52:00 2004 From: stuge-linuxbios at cdy.org (Peter Stuge) Date: Thu Sep 30 07:52:00 2004 Subject: P4 powerup register value In-Reply-To: <20040930105910.77772.qmail@web13203.mail.yahoo.com> References: <20040930105910.77772.qmail@web13203.mail.yahoo.com> Message-ID: <20040930130755.GB22533@foo.birdnet.se> On Thu, Sep 30, 2004 at 03:59:10AM -0700, zhu shi song wrote: > When p4 power up , what's the value and meaning of the > registers such as ebx, edx etc? > Who know the information, need help. Hmm? eax, ebx, ecx and edx are the 32 bit standard registers that have been around since the 386. I believe they don't have any meaning at power on. Their values, if defined, would be listed in a programming manual for the P4. (Or the 386.) //Peter From stepan at openbios.org Thu Sep 30 08:00:01 2004 From: stepan at openbios.org (Stefan Reinauer) Date: Thu Sep 30 08:00:01 2004 Subject: P4 powerup register value In-Reply-To: <20040930130755.GB22533@foo.birdnet.se> References: <20040930105910.77772.qmail@web13203.mail.yahoo.com> <20040930130755.GB22533@foo.birdnet.se> Message-ID: <20040930131635.GA21190@openbios.org> * Peter Stuge [040930 15:07]: > Hmm? eax, ebx, ecx and edx are the 32 bit standard registers that > have been around since the 386. I believe they don't have any meaning > at power on. Their values, if defined, would be listed in a > programming manual for the P4. (Or the 386.) Some actually do have a meaning. Have a look at the freebios2 tree: freebios2/cpu/i386/bist32.inc Stefan From rminnich at lanl.gov Thu Sep 30 11:31:01 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Sep 30 11:31:01 2004 Subject: changes today. Message-ID: A few changes that are important to some of you. First, I found a fun problem in the i82801dbm early smbus code. It starts an op, then waits for the 'active' bit to go to zero. The CPU is so fast that it polls before the bit goes to one, sees that it is zero, says 'the op is done', then gets an error because the right done bit is not set. The result on the digital Logic adl855pc was that it would not reliably read the smbus. So I've added, to this file: southbridge/intel/i82801dbm/i82801dbm_early_smbus.c this function: > static int smbus_wait_until_active(void) > { > unsigned long loops; > loops = SMBUS_TIMEOUT; > do { > unsigned char val; > smbus_delay(); > val = inb(SMBUS_IO_BASE + SMBHSTSTAT); > if ((val & 1)) { > break; > } > } while(--loops); > return loops?0:-4; > } which I hope is the right way to do this :-) And in the smbus_read_byte, it now calls the function in this manner: > /* poll for it to start */ > if (smbus_wait_until_active() < 0) { > return -4; > } in other words, wait until it is started BEFORE you see if it is done :-) This affects all mobos using this part; let me know if it is trouble for you. It should not be. Next, flash_and_burn now has an erase_block_jedec function, and I have added support for the SST firmware hub parts. Tested and working on the 1 MBYTE SST part (49LF008A) ron From YhLu at tyan.com Thu Sep 30 12:14:01 2004 From: YhLu at tyan.com (YhLu) Date: Thu Sep 30 12:14:01 2004 Subject: changes today. Message-ID: <3174569B9743D511922F00A0C94314230624C5C3@TYANWEB> I guess 82801er need that too. YH -----Original Message----- From: Ronald G. Minnich [mailto:rminnich at lanl.gov] Sent: Thursday, September 30, 2004 9:38 AM To: linuxbios at clustermatic.org Subject: changes today. A few changes that are important to some of you. First, I found a fun problem in the i82801dbm early smbus code. It starts an op, then waits for the 'active' bit to go to zero. The CPU is so fast that it polls before the bit goes to one, sees that it is zero, says 'the op is done', then gets an error because the right done bit is not set. The result on the digital Logic adl855pc was that it would not reliably read the smbus. So I've added, to this file: southbridge/intel/i82801dbm/i82801dbm_early_smbus.c this function: > static int smbus_wait_until_active(void) > { > unsigned long loops; > loops = SMBUS_TIMEOUT; > do { > unsigned char val; > smbus_delay(); > val = inb(SMBUS_IO_BASE + SMBHSTSTAT); > if ((val & 1)) { > break; > } > } while(--loops); > return loops?0:-4; > } which I hope is the right way to do this :-) And in the smbus_read_byte, it now calls the function in this manner: > /* poll for it to start */ > if (smbus_wait_until_active() < 0) { > return -4; > } in other words, wait until it is started BEFORE you see if it is done :-) This affects all mobos using this part; let me know if it is trouble for you. It should not be. Next, flash_and_burn now has an erase_block_jedec function, and I have added support for the SST firmware hub parts. Tested and working on the 1 MBYTE SST part (49LF008A) ron _______________________________________________ Linuxbios mailing list Linuxbios at clustermatic.org http://www.clustermatic.org/mailman/listinfo/linuxbios From daubin at actuality-systems.com Thu Sep 30 13:36:01 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Thu Sep 30 13:36:01 2004 Subject: PCI IRQ tables Message-ID: Hi, I didn't get an answer from the previous post so I'll just simplify a little bit. Can someone point me to where I can learn more about the magic that makes the pci_irq files? Thanks, Dave:) ________________________________ From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Dave Aubin Sent: Wednesday, September 29, 2004 5:18 PM To: linuxbios at clustermatic.org Subject: PCI IRQ tables Hi, What happens if the pci irq mapping is a mess? I know you can use getpir with a good bios, but what if you don't have one? Is there a way to get the pci irq mapping without a standard bios? If you had to do it by hand could you explain how it should be done? Thanks, Dave -------------- next part -------------- An HTML attachment was scrubbed... URL: From YhLu at tyan.com Thu Sep 30 13:44:00 2004 From: YhLu at tyan.com (YhLu) Date: Thu Sep 30 13:44:00 2004 Subject: changes today. Message-ID: <3174569B9743D511922F00A0C94314230624C5E1@TYANWEB> Ron/Eric/Stephan/Ollie, Please check the patch. 1. some tyan volatile messing because of ROMCC changes. 2. S2882 interrupt line assignment in mptable.c 3. exclude range for flash_rom. 4. better ht_setup_chainx() in incoherent_ht.c ---> change share bus 0 to different bus for different incoherent HT link. 5. fix one bug about io and mem allocation for multi ht links. --- in northbridge.c Mark it if used before assign final value. 6. enable amd/quartet to init multi incoherent HT link in auto.c --- not test, no MB on hand. 7. enable S2885 to init multi incoherent HT link in auto.c Regards YH -------------- next part -------------- A non-text attachment was scrubbed... Name: tyan_093004_fb2.patch Type: application/octet-stream Size: 33588 bytes Desc: not available URL: From YhLu at tyan.com Thu Sep 30 13:55:01 2004 From: YhLu at tyan.com (YhLu) Date: Thu Sep 30 13:55:01 2004 Subject: PCI IRQ tables Message-ID: <3174569B9743D511922F00A0C94314230624C5E6@TYANWEB> SMP or single CPU? If SMP, and io apci is enabled, you may only focus on mptable.c and irq-tables.c may only contain device that point to the peer roots bus. YH _____ From: Dave Aubin [mailto:daubin at actuality-systems.com] Sent: Thursday, September 30, 2004 11:53 AM To: Dave Aubin; linuxbios at clustermatic.org Subject: RE: PCI IRQ tables Hi, I didn't get an answer from the previous post so I'll just simplify a little bit. Can someone point me to where I can learn more about the magic that makes the pci_irq files? Thanks, Dave:) _____ From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Dave Aubin Sent: Wednesday, September 29, 2004 5:18 PM To: linuxbios at clustermatic.org Subject: PCI IRQ tables Hi, What happens if the pci irq mapping is a mess? I know you can use getpir with a good bios, but what if you don't have one? Is there a way to get the pci irq mapping without a standard bios? If you had to do it by hand could you explain how it should be done? Thanks, Dave -------------- next part -------------- An HTML attachment was scrubbed... URL: From daubin at actuality-systems.com Thu Sep 30 14:15:01 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Thu Sep 30 14:15:01 2004 Subject: PCI IRQ tables Message-ID: Hi, No I think my question is even simpler than that. Where do I go to learn about the magic that is inside the mp and irq files? Thanks, Dave:) ________________________________ From: YhLu [mailto:YhLu at tyan.com] Sent: Thursday, September 30, 2004 3:14 PM To: Dave Aubin; linuxbios at clustermatic.org Subject: RE: PCI IRQ tables SMP or single CPU? If SMP, and io apci is enabled, you may only focus on mptable.c and irq-tables.c may only contain device that point to the peer roots bus. YH ________________________________ From: Dave Aubin [mailto:daubin at actuality-systems.com] Sent: Thursday, September 30, 2004 11:53 AM To: Dave Aubin; linuxbios at clustermatic.org Subject: RE: PCI IRQ tables Hi, I didn't get an answer from the previous post so I'll just simplify a little bit. Can someone point me to where I can learn more about the magic that makes the pci_irq files? Thanks, Dave:) ________________________________ From: linuxbios-admin at clustermatic.org [mailto:linuxbios-admin at clustermatic.org] On Behalf Of Dave Aubin Sent: Wednesday, September 29, 2004 5:18 PM To: linuxbios at clustermatic.org Subject: PCI IRQ tables Hi, What happens if the pci irq mapping is a mess? I know you can use getpir with a good bios, but what if you don't have one? Is there a way to get the pci irq mapping without a standard bios? If you had to do it by hand could you explain how it should be done? Thanks, Dave -------------- next part -------------- An HTML attachment was scrubbed... URL: From rminnich at lanl.gov Thu Sep 30 14:32:00 2004 From: rminnich at lanl.gov (Ronald G. Minnich) Date: Thu Sep 30 14:32:00 2004 Subject: PCI IRQ tables In-Reply-To: References: Message-ID: you can find the definition of $PIR standard at microsoft -- I always lose it, but google always finds it. ron From daubin at actuality-systems.com Thu Sep 30 15:02:01 2004 From: daubin at actuality-systems.com (Dave Aubin) Date: Thu Sep 30 15:02:01 2004 Subject: PCI IRQ tables Message-ID: PCI IRQ specification:) http://www.microsoft.com/whdc/archive/pciirq.mspx -----Original Message----- From: Ronald G. Minnich [mailto:rminnich at lanl.gov] Sent: Thursday, September 30, 2004 3:49 PM To: Dave Aubin Cc: linuxbios at clustermatic.org Subject: RE: PCI IRQ tables you can find the definition of $PIR standard at microsoft -- I always lose it, but google always finds it. ron