[BULK] [LinuxBIOS] cache as ram for x86

Eric W. Biederman ebiederman at lnxi.com
Tue Jun 21 01:49:27 CEST 2005

yhlu <yinghailu at gmail.com> writes:

> Ron,
> It turns out that Cache as Ram can work in intel xeon too. The only
> difference is AMD need to set some bits in SYSCFG_MSR.
> So final cache as ram support for x86 will be
> cpu/x86/car/cache_as_ram.inc
> cpu/x86/car/cache_as_ram_post.c
> cpu/x86/car/copy_and_run.c

We may have something here, especially code to do the copy once
the are is initialized but this can never be completely generic.

> there is special version for AMD
> cpu/amd/car/cache_as_ram.inc
> cpu/amd/car/cache_as_ram_post.c
> in MB dir 
> cache_as_ram_auto.c it will include old failover.c and auto.c and
> corresponding cache_as_ram_post.c and copy_and_run.c
> the cache_as_ram_post.c will stop the cache as ram and switch to ram stack.
> copy_and_run will decode linuxbios_ram to memory, and jmp to it.
> USE_DCACHE_RAM  ---> use romcc or gcc for auto.c...
> CONFIG_USE_INIT ----> use init or not.
> the code can coexist with romcc .....


> If it is ok, I will check in cache as ram support for s2735 and
> s2885/s2891/s2895 tomorrow.
> Also I would help to verify that on other x86 platform.

If it's not intrusive I don't mind.  But in general for developments
like this I would like to put the code on a branch in the public tree
first before merging it.  That way multiple people can look at and
test the code before it merges and potentially breaks something.

I'm probably the worst offender though :)  So Ron if someone wants to
remind me later...


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