[LinuxBIOS] Proposed change to hypertransport.c for better error handling

[Stefan Reinauer]

* San Mehat <san at google.com> [051021 21:40]:
> Hey Stefan,
> 
> Incidentally, does anyone have an example of how to represent 2
> southbridges on an HT chain?.. ie:
> 
>     CPU0 <---HT---> SB1 <---HT---> SB2
> 
> having issues figuring it out...

On the island aruma I just enumerated them as follows.
In the below example SB1 and SB2 would be an amd8131:

                chip northbridge/amd/amdk8
                        device pci 19.0 on end # LDT0
                        device pci 19.0 on end # LDT1
                        device pci 19.0 on # LDT2
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is
                                        # mandatory
                                        device pci 0.0 on end
                                        device pci 0.1 on end
                                        device pci 1.0 on end
                                        device pci 1.1 on end
                                end
                                chip southbridge/amd/amd8131
                                        # the on/off keyword is
                                        # mandatory
                                        device pci 0.0 on end
                                        device pci 0.1 on end
                                        device pci 1.0 on end
                                        device pci 1.1 on end
                                end
                        end # LDT2
                        device pci 19.1 on end
                        device pci 19.2 on end
                        device pci 19.3 on end
                end


Stefan