[LinuxBIOS] LNXI Merge: lnxi-patch-13/16

jason schildt jschildt at lnxi.com
Sat Sep 3 00:03:31 CEST 2005


DESCRIPTION:
------------------------------------------------

## lnxi-patch-13 ## (20)files

src/mainboard/{all_opteron_boards}/failover.c
		/Iwill/DK8S2/failover.c:
		/Iwill/DK8X/failover.c:
		/arima/hdama/failover.c:
		/newisys/khepri/failover.c:
		/amd/quartet/failover.c:
		/amd/serenade/failover.c:
		/amd/solo/failover.c:
		/ibm/e326/failover.c:
		/ibm/e325/failover.c:
		/island/aruma/failover.c:
		/tyan/s2880/failover.c:
		/tyan/s2881/failover.c:
		/tyan/s2882/failover.c:
		/tyan/s2891/failover.c:
		/tyan/s4880/failover.c:
		/tyan/s2892/failover.c:
		/tyan/s2875/failover.c:
		/tyan/s4882/failover.c:
		/tyan/s2885/failover.c:
		/tyan/s2895/failover.c:

	Replaced cpu_init_detected() with early_mtrr_init_detected().  And killed  
the direct jump to cpu_reset() in failover.c in the above listed boards.


DIFFSTAT:
------------------------------------------------

  Iwill/DK8S2/failover.c    |   11 +++--------
  Iwill/DK8X/failover.c     |   11 +++--------
  amd/quartet/failover.c    |   11 +++--------
  amd/serenade/failover.c   |   11 +++--------
  amd/solo/failover.c       |   11 +++--------
  arima/hdama/failover.c    |    8 +-------
  ibm/e325/failover.c       |   11 +++--------
  ibm/e326/failover.c       |   11 +++--------
  island/aruma/failover.c   |   11 +++--------
  newisys/khepri/failover.c |   11 +++--------
  tyan/s2875/failover.c     |   25 +++----------------------
  tyan/s2880/failover.c     |   25 +++----------------------
  tyan/s2881/failover.c     |   25 +++----------------------
  tyan/s2882/failover.c     |   25 +++----------------------
  tyan/s2885/failover.c     |   29 +++--------------------------
  tyan/s2891/failover.c     |   26 +++-----------------------
  tyan/s2892/failover.c     |   27 +++------------------------
  tyan/s2895/failover.c     |   30 +++---------------------------
  tyan/s4880/failover.c     |   25 +++----------------------
  tyan/s4882/failover.c     |   28 +++-------------------------
  20 files changed, 58 insertions(+), 314 deletions(-)


PATCH:
------------------------------------------------

Index: Iwill/DK8S2/failover.c
===================================================================
--- Iwill/DK8S2/failover.c	(revision 1105)
+++ Iwill/DK8S2/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -19,11 +20,11 @@
  	enable_lapic();

  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -60,12 +61,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: Iwill/DK8X/failover.c
===================================================================
--- Iwill/DK8X/failover.c	(revision 1105)
+++ Iwill/DK8X/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -19,11 +20,11 @@
  	enable_lapic();

  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -60,12 +61,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: arima/hdama/failover.c
===================================================================
--- arima/hdama/failover.c	(revision 1105)
+++ arima/hdama/failover.c	(working copy)
@@ -25,7 +25,7 @@
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -62,12 +62,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: newisys/khepri/failover.c
===================================================================
--- newisys/khepri/failover.c	(revision 1105)
+++ newisys/khepri/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -19,11 +20,11 @@

  	nodeid=lapicid();
  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -60,12 +61,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: amd/quartet/failover.c
===================================================================
--- amd/quartet/failover.c	(revision 1105)
+++ amd/quartet/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -21,11 +22,11 @@
  	nodeid = lapicid() & 0xf;

  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -62,12 +63,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: amd/serenade/failover.c
===================================================================
--- amd/serenade/failover.c	(revision 1105)
+++ amd/serenade/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -21,11 +22,11 @@
  	nodeid = lapicid() & 0xf;

  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -62,12 +63,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: amd/solo/failover.c
===================================================================
--- amd/solo/failover.c	(revision 1105)
+++ amd/solo/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -21,11 +22,11 @@
  	nodeid = lapicid() & 0xf;

  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -62,12 +63,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: ibm/e326/failover.c
===================================================================
--- ibm/e326/failover.c	(revision 1105)
+++ ibm/e326/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -20,11 +21,11 @@
          nodeid = lapicid() & 0xf;

  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -61,12 +62,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: ibm/e325/failover.c
===================================================================
--- ibm/e325/failover.c	(revision 1105)
+++ ibm/e325/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -20,11 +21,11 @@
          nodeid = lapicid() & 0xf;

  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -61,12 +62,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: island/aruma/failover.c
===================================================================
--- island/aruma/failover.c	(revision 1105)
+++ island/aruma/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static unsigned long main(unsigned long bist)
@@ -19,11 +20,11 @@

  	nodeid=lapicid();
  	/* Is this a cpu only reset? */
-	if (cpu_init_detected(nodeid)) {
+	if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -60,12 +61,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
   fallback_image:
  	return bist;
  }
Index: tyan/s2880/failover.c
===================================================================
--- tyan/s2880/failover.c	(revision 1105)
+++ tyan/s2880/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  #if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
          /* Make cerain my local apic is useable */
          enable_lapic();

-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-        nodeid = lapicid();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -74,14 +63,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
   fallback_image:
  	return bist;
  }
Index: tyan/s2881/failover.c
===================================================================
--- tyan/s2881/failover.c	(revision 1105)
+++ tyan/s2881/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  #if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
          /* Make cerain my local apic is useable */
          enable_lapic();

-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-        nodeid = lapicid();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -75,14 +64,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
   fallback_image:
  	return bist;
  }
Index: tyan/s2882/failover.c
===================================================================
--- tyan/s2882/failover.c	(revision 1105)
+++ tyan/s2882/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  #if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
          /* Make cerain my local apic is useable */
          enable_lapic();

-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-        nodeid = lapicid();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -74,14 +63,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
   fallback_image:
  	return bist;
  }
Index: tyan/s2891/failover.c
===================================================================
--- tyan/s2891/failover.c	(revision 1105)
+++ tyan/s2891/failover.c	(working copy)
@@ -10,6 +10,7 @@
  #include "southbridge/nvidia/ck804/ck804_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static void sio_setup(void)
@@ -42,27 +43,15 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
          /* Make cerain my local apic is useable */
          enable_lapic();

-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-        nodeid = lapicid();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected(nodeid)) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	
@@ -102,15 +91,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	//CPU reset will reset memtroller ???
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif

   fallback_image:
  	return bist;
Index: tyan/s4880/failover.c
===================================================================
--- tyan/s4880/failover.c	(revision 1105)
+++ tyan/s4880/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  #if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
          /* Make cerain my local apic is useable */
          enable_lapic();

-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-        nodeid = lapicid();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected()) {
                 if (last_boot_normal()) {
                          goto normal_image;
                  } else {
-                        goto cpu_reset;
+                        goto fallback_image;
                  }
          }
          /* Is this a secondary cpu? */
@@ -75,14 +64,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
   fallback_image:
  	return bist;
  }
Index: tyan/s2892/failover.c
===================================================================
--- tyan/s2892/failover.c	(revision 1105)
+++ tyan/s2892/failover.c	(working copy)
@@ -10,6 +10,7 @@
  #include "southbridge/nvidia/ck804/ck804_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  static void sio_setup(void)
@@ -36,27 +37,15 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
          /* Make cerain my local apic is useable */
          enable_lapic();

-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-        nodeid = lapicid();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	
@@ -96,16 +85,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	//CPU reset will reset memtroller ???
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
-
   fallback_image:
  	return bist;
  }
Index: tyan/s2875/failover.c
===================================================================
--- tyan/s2875/failover.c	(revision 1105)
+++ tyan/s2875/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  #if CONFIG_LOGICAL_CPUS==1
@@ -18,27 +19,15 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
          /* Make cerain my local apic is useable */
          enable_lapic();

-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-        nodeid = lapicid();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -75,14 +64,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
   fallback_image:
  	return bist;
  }
Index: tyan/s4882/failover.c
===================================================================
--- tyan/s4882/failover.c	(revision 1105)
+++ tyan/s4882/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  #if CONFIG_LOGICAL_CPUS==1
@@ -20,28 +21,13 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
-        /* Make cerain my local apic is useable */
-//        enable_lapic();

-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-//        nodeid = lapicid() & 0xf;
-	nodeid = get_node_id();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -77,14 +63,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
   fallback_image:
  	return bist;
  }
Index: tyan/s2885/failover.c
===================================================================
--- tyan/s2885/failover.c	(revision 1105)
+++ tyan/s2885/failover.c	(working copy)
@@ -9,6 +9,7 @@
  #include "southbridge/amd/amd8111/amd8111_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  #if CONFIG_LOGICAL_CPUS==1
@@ -19,29 +20,13 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-	unsigned nodeid;
-#endif	
-	/* Make cerain my local apic is useable */
-//	enable_lapic();
-
-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
  	/* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-//        nodeid = lapicid() & 0xf;
-	nodeid = get_node_id();
+        if (early_mtrr_init_detected()) {
  	/* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
-	/* Is this a cpu only reset? */
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	/* Is this a secondary cpu? */
@@ -77,14 +62,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
   fallback_image:
  	return bist;
  }
Index: tyan/s2895/failover.c
===================================================================
--- tyan/s2895/failover.c	(revision 1105)
+++ tyan/s2895/failover.c	(working copy)
@@ -13,6 +13,7 @@
  #include "southbridge/nvidia/ck804/ck804_enable_rom.c"
  #include "northbridge/amd/amdk8/early_ht.c"
  #include "cpu/x86/lapic/boot_cpu.c"
+#include "cpu/x86/mtrr/earlymtrr.c"
  #include "northbridge/amd/amdk8/reset_test.c"

  #include "superio/smsc/lpc47b397/lpc47b397_early_serial.c"
@@ -59,27 +60,12 @@

  static unsigned long main(unsigned long bist)
  {
-#if CONFIG_LOGICAL_CPUS==1
-        struct node_core_id id;
-#else
-        unsigned nodeid;
-#endif
-        /* Make cerain my local apic is useable */
-//        enable_lapic();
-
-#if CONFIG_LOGICAL_CPUS==1
-        id = get_node_core_id_x();
          /* Is this a cpu only reset? */
-        if (cpu_init_detected(id.nodeid)) {
-#else
-	nodeid = get_node_id();
-        /* Is this a cpu only reset? */
-        if (cpu_init_detected(nodeid)) {
-#endif
+        if (early_mtrr_init_detected()) {
  		if (last_boot_normal()) {
  			goto normal_image;
  		} else {
-			goto cpu_reset;
+			goto fallback_image;
  		}
  	}
  	
@@ -119,16 +105,6 @@
  		: "a" (bist) /* inputs */
  		: /* clobbers */
  		);
- cpu_reset:
-#if 0
-	//CPU reset will reset memtroller ???
-	asm volatile ("jmp __cpu_reset"
-		: /* outputs */
-		: "a"(bist) /* inputs */
-		: /* clobbers */
-		);
-#endif
-
   fallback_image:
  	return bist;
  }



-- 
Jason W. Schildt
LinuxBIOS Software Engineer
Linux Networx




More information about the coreboot mailing list