[LinuxBIOS] SPD as debug channel
stepan at coresystems.de
Fri Dec 1 19:28:53 CET 2006
* Peter Stuge <stuge-linuxbios at cdy.org> [061201 19:16]:
> The assumption was that not much needs to happen before the SPD I2C
> bus is accessible by the CPU - is that valid?
Since you need I2C, you need to get parts of the south bridge working.
So, its basically the same amount of work as with the USB debug port.
Question is: Will we see systems without USB (debug port) but with DDR2
> If not, what IS easily accessible besides the boot ROM? (Which we
> don't want to rely on since we don't know exactly what it will speak
> when in the future.) We just need one bit that can do kHz signalling.
Boot rom is a good start I bet. That will always be there (as long as we
all do firmware development at least).
It might be parallel yesterday, LPC today and SPI tomorrow, but that
is only the interface it connects to. Different connector, different
VHDL source and we should be fine, no?
> > LPC is going away on many boards, I understand.
> But DDR(2) SDRAM will probably stay a while longer. Or not?
If LPC goes away, we need to do SPI. Ok. If we get DDR3, we would have
to do that. Technical standards come and go,.. I'd prefer a solution
that is so cheap that I dont mind throwing the whole kit away after
doing a port or two, rather than trying to create something that is good
> > I think that we are going into a world where we have to figure out
> > usb debug port.
> It's certainly one good debugging option but maybe not the only good
Especially it does not help for reflashing. Finding something nifty here
would be nice.
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