[LinuxBIOS] SPI flash focus
drew.lundsten at ccpu.com
Fri Nov 24 22:39:41 CET 2006
If grounding HOLD# at power-on is working for people so far, that's
great to hear.
The SST datasheet implies that this is not the specified behavior, in
fact my reading is that HOLD# is only sampled on SCK, and with CE# low.
So perhaps it will be necessary to power up with HOLD# grounded by a pin
grabber, then attach the SO8-clip-dongle with the LB/factory image and
reset so the chipset reads from the dongle instead.
If the chipset drives HOLD# directly, though, it gets a little messier;
then it may be best to put a tristate-able buffer on the SO8-clip and
overdrive the mobo's SPI flash signals for the 1-2 seconds needed to
rewrite the whole thing, tristating as soon as the write is finished.
That starts to require a pretty fast interface, driven over a cable, and
now it's a lot messier than simply hotswapping a PLCC chip!
Maybe the cost/complexity is enough of an incentive for people to
improve their soldering skills (and observe good ESD practice).
Soldering a bent-in DIP socket down and loading the flash on another DIP
carrier is <$5 of parts, and you'll need the soldering iron for a more
complex homebrewed programmer anyway.
I myself like the idea of using a USB-capable Cypress PSOC micro (e.g.
CY8C24894) to improve the programming cycle time, while extending the
programmer cable length, but it helps that I already have the eval board
for this one.
From: linuxbios-bounces at linuxbios.org
[mailto:linuxbios-bounces at linuxbios.org] On Behalf Of Segher Boessenkool
Sent: Friday, November 24, 2006 7:23 AM
To: Peter Stuge
Cc: linuxbios at linuxbios.org
Subject: Re: [LinuxBIOS] SPI flash focus
> Unfortunately it requires some special characteristics in the board
> schematic, to not risk destroying the chipset.
> "Warning: please do not try to use SF100 directly on the application
> system if the scenario is not in the above two cases."
> ..from their manual. I agree with them, it could be dangerous to
> drive the SPI chip while it's connected if you don't know exactly how
> it is connected and that it really is safe on that particular board..
The only thing that is required is that they can safely pull the
HOLD# pin to ground. Any sane design will have a pull-up resistor
on that line (and most other SPI lines, for that matter). That
said, there probably _are_ boards that do not have a sane design.
Such a shame.
[Oh, it obviously also doesn't work if the chipset or the motherboard
design uses HOLD# for something else already. This isn't commonly
Aaaaaanyway... It is really simple to build a device like this
yourself for a few bucks. SPI flash has many nice characteristics.
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